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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * drivers/mtd/nand/edb7312.c
3 *
David Woodhouse151e7652006-05-14 01:51:54 +01004 * Copyright (C) 2002 Marius Gröger (mag@sysgo.de)
Linus Torvalds1da177e2005-04-16 15:20:36 -07005 *
6 * Derived from drivers/mtd/nand/autcpu12.c
7 * Copyright (c) 2001 Thomas Gleixner (gleixner@autronix.de)
8 *
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00009 * $Id: edb7312.c,v 1.12 2005/11/07 11:14:30 gleixner Exp $
Linus Torvalds1da177e2005-04-16 15:20:36 -070010 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 *
15 * Overview:
16 * This is a device driver for the NAND flash device found on the
17 * CLEP7312 board which utilizes the Toshiba TC58V64AFT part. This is
18 * a 64Mibit (8MiB x 8 bits) NAND flash device.
19 */
20
21#include <linux/slab.h>
22#include <linux/module.h>
23#include <linux/init.h>
24#include <linux/mtd/mtd.h>
25#include <linux/mtd/nand.h>
26#include <linux/mtd/partitions.h>
27#include <asm/io.h>
David Woodhousee0c7d762006-05-13 18:07:53 +010028#include <asm/arch/hardware.h> /* for CLPS7111_VIRT_BASE */
Linus Torvalds1da177e2005-04-16 15:20:36 -070029#include <asm/sizes.h>
30#include <asm/hardware/clps7111.h>
31
32/*
33 * MTD structure for EDB7312 board
34 */
35static struct mtd_info *ep7312_mtd = NULL;
36
37/*
38 * Values specific to the EDB7312 board (used with EP7312 processor)
39 */
40#define EP7312_FIO_PBASE 0x10000000 /* Phys address of flash */
41#define EP7312_PXDR 0x0001 /*
42 * IO offset to Port B data register
43 * where the CLE, ALE and NCE pins
44 * are wired to.
45 */
46#define EP7312_PXDDR 0x0041 /*
47 * IO offset to Port B data direction
48 * register so we can control the IO
49 * lines.
50 */
51
52/*
53 * Module stuff
54 */
55
56static unsigned long ep7312_fio_pbase = EP7312_FIO_PBASE;
David Woodhousee0c7d762006-05-13 18:07:53 +010057static void __iomem *ep7312_pxdr = (void __iomem *)EP7312_PXDR;
58static void __iomem *ep7312_pxddr = (void __iomem *)EP7312_PXDDR;
Linus Torvalds1da177e2005-04-16 15:20:36 -070059
60#ifdef CONFIG_MTD_PARTITIONS
61/*
62 * Define static partitions for flash device
63 */
64static struct mtd_partition partition_info[] = {
David Woodhousee0c7d762006-05-13 18:07:53 +010065 {.name = "EP7312 Nand Flash",
66 .offset = 0,
67 .size = 8 * 1024 * 1024}
Linus Torvalds1da177e2005-04-16 15:20:36 -070068};
David Woodhousee0c7d762006-05-13 18:07:53 +010069
Linus Torvalds1da177e2005-04-16 15:20:36 -070070#define NUM_PARTITIONS 1
71
72#endif
73
Thomas Gleixner61b03bd2005-11-07 11:15:49 +000074/*
Linus Torvalds1da177e2005-04-16 15:20:36 -070075 * hardware specific access to control-lines
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +020076 *
77 * NAND_NCE: bit 0 -> bit 7
78 * NAND_CLE: bit 1 -> bit 4
79 * NAND_ALE: bit 2 -> bit 5
Linus Torvalds1da177e2005-04-16 15:20:36 -070080 */
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +020081static void ep7312_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
Linus Torvalds1da177e2005-04-16 15:20:36 -070082{
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +020083 struct nand_chip *chip = mtd->priv;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +000084
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +020085 if (ctrl & NAND_CTRL_CHANGE) {
86 unsigned char bits;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +000087
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +020088 bits = (ctrl & (NAND_CLE | NAND_ALE)) << 3;
89 bits = (ctrl & NAND_NCE) << 7;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +000090
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +020091 clps_writeb((clps_readb(ep7312_pxdr) & 0xB0) | 0x10,
92 ep7312_pxdr);
Linus Torvalds1da177e2005-04-16 15:20:36 -070093 }
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +020094 if (cmd != NAND_CMD_NONE)
95 writeb(cmd, chip->IO_ADDR_W);
Linus Torvalds1da177e2005-04-16 15:20:36 -070096}
97
98/*
99 * read device ready pin
100 */
101static int ep7312_device_ready(struct mtd_info *mtd)
102{
103 return 1;
104}
David Woodhousee0c7d762006-05-13 18:07:53 +0100105
Linus Torvalds1da177e2005-04-16 15:20:36 -0700106#ifdef CONFIG_MTD_PARTITIONS
107const char *part_probes[] = { "cmdlinepart", NULL };
108#endif
109
110/*
111 * Main initialization routine
112 */
David Woodhousee0c7d762006-05-13 18:07:53 +0100113static int __init ep7312_init(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700114{
115 struct nand_chip *this;
116 const char *part_type = 0;
117 int mtd_parts_nb = 0;
118 struct mtd_partition *mtd_parts = 0;
David Woodhousee0c7d762006-05-13 18:07:53 +0100119 void __iomem *ep7312_fio_base;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000120
Linus Torvalds1da177e2005-04-16 15:20:36 -0700121 /* Allocate memory for MTD device structure and private data */
David Woodhousee0c7d762006-05-13 18:07:53 +0100122 ep7312_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700123 if (!ep7312_mtd) {
124 printk("Unable to allocate EDB7312 NAND MTD device structure.\n");
125 return -ENOMEM;
126 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000127
Linus Torvalds1da177e2005-04-16 15:20:36 -0700128 /* map physical adress */
129 ep7312_fio_base = ioremap(ep7312_fio_pbase, SZ_1K);
David Woodhousee0c7d762006-05-13 18:07:53 +0100130 if (!ep7312_fio_base) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700131 printk("ioremap EDB7312 NAND flash failed\n");
132 kfree(ep7312_mtd);
133 return -EIO;
134 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000135
Linus Torvalds1da177e2005-04-16 15:20:36 -0700136 /* Get pointer to private data */
David Woodhousee0c7d762006-05-13 18:07:53 +0100137 this = (struct nand_chip *)(&ep7312_mtd[1]);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000138
Linus Torvalds1da177e2005-04-16 15:20:36 -0700139 /* Initialize structures */
David Woodhousee0c7d762006-05-13 18:07:53 +0100140 memset(ep7312_mtd, 0, sizeof(struct mtd_info));
141 memset(this, 0, sizeof(struct nand_chip));
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000142
Linus Torvalds1da177e2005-04-16 15:20:36 -0700143 /* Link the private data with the MTD structure */
144 ep7312_mtd->priv = this;
David Woodhouse552d9202006-05-14 01:20:46 +0100145 ep7312_mtd->owner = THIS_MODULE;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000146
Linus Torvalds1da177e2005-04-16 15:20:36 -0700147 /*
148 * Set GPIO Port B control register so that the pins are configured
149 * to be outputs for controlling the NAND flash.
150 */
151 clps_writeb(0xf0, ep7312_pxddr);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000152
Linus Torvalds1da177e2005-04-16 15:20:36 -0700153 /* insert callbacks */
154 this->IO_ADDR_R = ep7312_fio_base;
155 this->IO_ADDR_W = ep7312_fio_base;
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200156 this->cmd_ctrl = ep7312_hwcontrol;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700157 this->dev_ready = ep7312_device_ready;
158 /* 15 us command delay time */
159 this->chip_delay = 15;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000160
Linus Torvalds1da177e2005-04-16 15:20:36 -0700161 /* Scan to find existence of the device */
David Woodhousee0c7d762006-05-13 18:07:53 +0100162 if (nand_scan(ep7312_mtd, 1)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700163 iounmap((void *)ep7312_fio_base);
David Woodhousee0c7d762006-05-13 18:07:53 +0100164 kfree(ep7312_mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700165 return -ENXIO;
166 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700167#ifdef CONFIG_MTD_PARTITIONS
168 ep7312_mtd->name = "edb7312-nand";
David Woodhousee0c7d762006-05-13 18:07:53 +0100169 mtd_parts_nb = parse_mtd_partitions(ep7312_mtd, part_probes, &mtd_parts, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700170 if (mtd_parts_nb > 0)
171 part_type = "command line";
172 else
173 mtd_parts_nb = 0;
174#endif
175 if (mtd_parts_nb == 0) {
176 mtd_parts = partition_info;
177 mtd_parts_nb = NUM_PARTITIONS;
178 part_type = "static";
179 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000180
Linus Torvalds1da177e2005-04-16 15:20:36 -0700181 /* Register the partitions */
182 printk(KERN_NOTICE "Using %s partition definition\n", part_type);
183 add_mtd_partitions(ep7312_mtd, mtd_parts, mtd_parts_nb);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000184
Linus Torvalds1da177e2005-04-16 15:20:36 -0700185 /* Return happy */
186 return 0;
187}
David Woodhousee0c7d762006-05-13 18:07:53 +0100188
Linus Torvalds1da177e2005-04-16 15:20:36 -0700189module_init(ep7312_init);
190
191/*
192 * Clean up routine
193 */
David Woodhousee0c7d762006-05-13 18:07:53 +0100194static void __exit ep7312_cleanup(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700195{
David Woodhousee0c7d762006-05-13 18:07:53 +0100196 struct nand_chip *this = (struct nand_chip *)&ep7312_mtd[1];
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000197
Linus Torvalds1da177e2005-04-16 15:20:36 -0700198 /* Release resources, unregister device */
David Woodhousee0c7d762006-05-13 18:07:53 +0100199 nand_release(ap7312_mtd);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000200
Amol Lad25f0c652006-09-21 18:12:43 +0530201 /* Release io resource */
Amol Lad76a50272006-10-02 09:48:23 +0100202 iounmap(this->IO_ADDR_R);
Amol Lad25f0c652006-09-21 18:12:43 +0530203
Linus Torvalds1da177e2005-04-16 15:20:36 -0700204 /* Free the MTD device structure */
David Woodhousee0c7d762006-05-13 18:07:53 +0100205 kfree(ep7312_mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700206}
David Woodhousee0c7d762006-05-13 18:07:53 +0100207
Linus Torvalds1da177e2005-04-16 15:20:36 -0700208module_exit(ep7312_cleanup);
209
210MODULE_LICENSE("GPL");
211MODULE_AUTHOR("Marius Groeger <mag@sysgo.de>");
212MODULE_DESCRIPTION("MTD map driver for Cogent EDB7312 board");