Rajeshwar Kurapaty | c155c35 | 2011-12-17 06:35:32 +0530 | [diff] [blame] | 1 | /* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved. |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | * |
| 12 | */ |
| 13 | |
| 14 | #include <linux/kernel.h> |
| 15 | #include <linux/list.h> |
| 16 | #include <linux/platform_device.h> |
| 17 | #include <linux/msm_rotator.h> |
Deepak Kotur | 12301a7 | 2011-11-09 18:30:29 -0800 | [diff] [blame] | 18 | #include <linux/ion.h> |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 19 | #include <linux/gpio.h> |
| 20 | #include <asm/clkdev.h> |
| 21 | #include <linux/msm_kgsl.h> |
| 22 | #include <linux/android_pmem.h> |
| 23 | #include <mach/irqs-8960.h> |
Mayank Rana | 9f51f58 | 2011-08-04 18:35:59 +0530 | [diff] [blame] | 24 | #include <mach/dma.h> |
| 25 | #include <linux/dma-mapping.h> |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 26 | #include <mach/board.h> |
| 27 | #include <mach/msm_iomap.h> |
| 28 | #include <mach/msm_hsusb.h> |
| 29 | #include <mach/msm_sps.h> |
| 30 | #include <mach/rpm.h> |
| 31 | #include <mach/msm_bus_board.h> |
| 32 | #include <mach/msm_memtypes.h> |
Matt Wagantall | 3908893 | 2011-08-02 20:24:56 -0700 | [diff] [blame] | 33 | #include <mach/msm_xo.h> |
Bhalchandra Gajare | 0e795c4 | 2011-08-15 18:10:30 -0700 | [diff] [blame] | 34 | #include <sound/msm-dai-q6.h> |
| 35 | #include <sound/apr_audio.h> |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 36 | #include "clock.h" |
| 37 | #include "devices.h" |
| 38 | #include "devices-msm8x60.h" |
| 39 | #include "footswitch.h" |
Jeff Ohlstein | 7e66855 | 2011-10-06 16:17:25 -0700 | [diff] [blame] | 40 | #include "msm_watchdog.h" |
Praveen Chidambaram | 7849901 | 2011-11-01 17:15:17 -0600 | [diff] [blame^] | 41 | #include "rpm_log.h" |
Praveen Chidambaram | 7a71223 | 2011-10-28 13:39:45 -0600 | [diff] [blame] | 42 | #include "rpm_stats.h" |
Stephen Boyd | eb81988 | 2011-08-29 14:46:30 -0700 | [diff] [blame] | 43 | #include "pil-q6v4.h" |
| 44 | #include "scm-pas.h" |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 45 | |
| 46 | #ifdef CONFIG_MSM_MPM |
| 47 | #include "mpm.h" |
| 48 | #endif |
| 49 | #ifdef CONFIG_MSM_DSPS |
| 50 | #include <mach/msm_dsps.h> |
| 51 | #endif |
| 52 | |
| 53 | |
| 54 | /* Address of GSBI blocks */ |
| 55 | #define MSM_GSBI1_PHYS 0x16000000 |
| 56 | #define MSM_GSBI2_PHYS 0x16100000 |
| 57 | #define MSM_GSBI3_PHYS 0x16200000 |
| 58 | #define MSM_GSBI4_PHYS 0x16300000 |
| 59 | #define MSM_GSBI5_PHYS 0x16400000 |
| 60 | #define MSM_GSBI6_PHYS 0x16500000 |
| 61 | #define MSM_GSBI7_PHYS 0x16600000 |
| 62 | #define MSM_GSBI8_PHYS 0x1A000000 |
| 63 | #define MSM_GSBI9_PHYS 0x1A100000 |
| 64 | #define MSM_GSBI10_PHYS 0x1A200000 |
| 65 | #define MSM_GSBI11_PHYS 0x12440000 |
| 66 | #define MSM_GSBI12_PHYS 0x12480000 |
| 67 | |
| 68 | #define MSM_UART2DM_PHYS (MSM_GSBI2_PHYS + 0x40000) |
| 69 | #define MSM_UART5DM_PHYS (MSM_GSBI5_PHYS + 0x40000) |
Mayank Rana | 9f51f58 | 2011-08-04 18:35:59 +0530 | [diff] [blame] | 70 | #define MSM_UART6DM_PHYS (MSM_GSBI6_PHYS + 0x40000) |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 71 | |
| 72 | /* GSBI QUP devices */ |
| 73 | #define MSM_GSBI1_QUP_PHYS (MSM_GSBI1_PHYS + 0x80000) |
| 74 | #define MSM_GSBI2_QUP_PHYS (MSM_GSBI2_PHYS + 0x80000) |
| 75 | #define MSM_GSBI3_QUP_PHYS (MSM_GSBI3_PHYS + 0x80000) |
| 76 | #define MSM_GSBI4_QUP_PHYS (MSM_GSBI4_PHYS + 0x80000) |
| 77 | #define MSM_GSBI5_QUP_PHYS (MSM_GSBI5_PHYS + 0x80000) |
| 78 | #define MSM_GSBI6_QUP_PHYS (MSM_GSBI6_PHYS + 0x80000) |
| 79 | #define MSM_GSBI7_QUP_PHYS (MSM_GSBI7_PHYS + 0x80000) |
| 80 | #define MSM_GSBI8_QUP_PHYS (MSM_GSBI8_PHYS + 0x80000) |
| 81 | #define MSM_GSBI9_QUP_PHYS (MSM_GSBI9_PHYS + 0x80000) |
| 82 | #define MSM_GSBI10_QUP_PHYS (MSM_GSBI10_PHYS + 0x80000) |
| 83 | #define MSM_GSBI11_QUP_PHYS (MSM_GSBI11_PHYS + 0x20000) |
| 84 | #define MSM_GSBI12_QUP_PHYS (MSM_GSBI12_PHYS + 0x20000) |
| 85 | #define MSM_QUP_SIZE SZ_4K |
| 86 | |
| 87 | #define MSM_PMIC1_SSBI_CMD_PHYS 0x00500000 |
| 88 | #define MSM_PMIC2_SSBI_CMD_PHYS 0x00C00000 |
| 89 | #define MSM_PMIC_SSBI_SIZE SZ_4K |
| 90 | |
Stepan Moskovchenko | be5b45a | 2011-10-17 19:33:34 -0700 | [diff] [blame] | 91 | #define MSM8960_HSUSB_PHYS 0x12500000 |
| 92 | #define MSM8960_HSUSB_SIZE SZ_4K |
| 93 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 94 | static struct resource resources_otg[] = { |
| 95 | { |
| 96 | .start = MSM8960_HSUSB_PHYS, |
| 97 | .end = MSM8960_HSUSB_PHYS + MSM8960_HSUSB_SIZE, |
| 98 | .flags = IORESOURCE_MEM, |
| 99 | }, |
| 100 | { |
| 101 | .start = USB1_HS_IRQ, |
| 102 | .end = USB1_HS_IRQ, |
| 103 | .flags = IORESOURCE_IRQ, |
| 104 | }, |
| 105 | }; |
| 106 | |
Stepan Moskovchenko | 14aa649 | 2011-08-08 15:15:01 -0700 | [diff] [blame] | 107 | struct platform_device msm8960_device_otg = { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 108 | .name = "msm_otg", |
| 109 | .id = -1, |
| 110 | .num_resources = ARRAY_SIZE(resources_otg), |
| 111 | .resource = resources_otg, |
| 112 | .dev = { |
| 113 | .coherent_dma_mask = 0xffffffff, |
| 114 | }, |
| 115 | }; |
| 116 | |
| 117 | static struct resource resources_hsusb[] = { |
| 118 | { |
| 119 | .start = MSM8960_HSUSB_PHYS, |
| 120 | .end = MSM8960_HSUSB_PHYS + MSM8960_HSUSB_SIZE, |
| 121 | .flags = IORESOURCE_MEM, |
| 122 | }, |
| 123 | { |
| 124 | .start = USB1_HS_IRQ, |
| 125 | .end = USB1_HS_IRQ, |
| 126 | .flags = IORESOURCE_IRQ, |
| 127 | }, |
| 128 | }; |
| 129 | |
Stepan Moskovchenko | 14aa649 | 2011-08-08 15:15:01 -0700 | [diff] [blame] | 130 | struct platform_device msm8960_device_gadget_peripheral = { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 131 | .name = "msm_hsusb", |
| 132 | .id = -1, |
| 133 | .num_resources = ARRAY_SIZE(resources_hsusb), |
| 134 | .resource = resources_hsusb, |
| 135 | .dev = { |
| 136 | .coherent_dma_mask = 0xffffffff, |
| 137 | }, |
| 138 | }; |
| 139 | |
| 140 | static struct resource resources_hsusb_host[] = { |
| 141 | { |
| 142 | .start = MSM8960_HSUSB_PHYS, |
| 143 | .end = MSM8960_HSUSB_PHYS + MSM8960_HSUSB_SIZE - 1, |
| 144 | .flags = IORESOURCE_MEM, |
| 145 | }, |
| 146 | { |
| 147 | .start = USB1_HS_IRQ, |
| 148 | .end = USB1_HS_IRQ, |
| 149 | .flags = IORESOURCE_IRQ, |
| 150 | }, |
| 151 | }; |
| 152 | |
Vijayavardhan Vennapusa | eb56648 | 2011-09-18 07:48:37 +0530 | [diff] [blame] | 153 | static u64 dma_mask = DMA_BIT_MASK(32); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 154 | struct platform_device msm_device_hsusb_host = { |
| 155 | .name = "msm_hsusb_host", |
| 156 | .id = -1, |
| 157 | .num_resources = ARRAY_SIZE(resources_hsusb_host), |
| 158 | .resource = resources_hsusb_host, |
| 159 | .dev = { |
| 160 | .dma_mask = &dma_mask, |
| 161 | .coherent_dma_mask = 0xffffffff, |
| 162 | }, |
| 163 | }; |
| 164 | |
Vijayavardhan Vennapusa | eb56648 | 2011-09-18 07:48:37 +0530 | [diff] [blame] | 165 | static struct resource resources_hsic_host[] = { |
| 166 | { |
Stepan Moskovchenko | 8e06ae6 | 2011-10-17 18:01:29 -0700 | [diff] [blame] | 167 | .start = 0x12520000, |
| 168 | .end = 0x12520000 + SZ_4K - 1, |
Vijayavardhan Vennapusa | eb56648 | 2011-09-18 07:48:37 +0530 | [diff] [blame] | 169 | .flags = IORESOURCE_MEM, |
| 170 | }, |
| 171 | { |
| 172 | .start = USB_HSIC_IRQ, |
| 173 | .end = USB_HSIC_IRQ, |
| 174 | .flags = IORESOURCE_IRQ, |
| 175 | }, |
Vamsi Krishna | 34f0158 | 2011-12-14 19:54:42 -0800 | [diff] [blame] | 176 | { |
| 177 | .start = MSM_GPIO_TO_INT(69), |
| 178 | .end = MSM_GPIO_TO_INT(69), |
| 179 | .name = "peripheral_status_irq", |
| 180 | .flags = IORESOURCE_IRQ, |
| 181 | }, |
Vijayavardhan Vennapusa | eb56648 | 2011-09-18 07:48:37 +0530 | [diff] [blame] | 182 | }; |
| 183 | |
| 184 | struct platform_device msm_device_hsic_host = { |
| 185 | .name = "msm_hsic_host", |
| 186 | .id = -1, |
| 187 | .num_resources = ARRAY_SIZE(resources_hsic_host), |
| 188 | .resource = resources_hsic_host, |
| 189 | .dev = { |
| 190 | .dma_mask = &dma_mask, |
| 191 | .coherent_dma_mask = DMA_BIT_MASK(32), |
| 192 | }, |
| 193 | }; |
| 194 | |
Mona Hossain | 11c03ac | 2011-10-26 12:42:10 -0700 | [diff] [blame] | 195 | #define SHARED_IMEM_TZ_BASE 0x2a03f720 |
| 196 | static struct resource tzlog_resources[] = { |
| 197 | { |
| 198 | .start = SHARED_IMEM_TZ_BASE, |
| 199 | .end = SHARED_IMEM_TZ_BASE + SZ_4K - 1, |
| 200 | .flags = IORESOURCE_MEM, |
| 201 | }, |
| 202 | }; |
| 203 | |
| 204 | struct platform_device msm_device_tz_log = { |
| 205 | .name = "tz_log", |
| 206 | .id = 0, |
| 207 | .num_resources = ARRAY_SIZE(tzlog_resources), |
| 208 | .resource = tzlog_resources, |
| 209 | }; |
| 210 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 211 | static struct resource resources_uart_gsbi2[] = { |
| 212 | { |
| 213 | .start = MSM8960_GSBI2_UARTDM_IRQ, |
| 214 | .end = MSM8960_GSBI2_UARTDM_IRQ, |
| 215 | .flags = IORESOURCE_IRQ, |
| 216 | }, |
| 217 | { |
| 218 | .start = MSM_UART2DM_PHYS, |
| 219 | .end = MSM_UART2DM_PHYS + PAGE_SIZE - 1, |
| 220 | .name = "uartdm_resource", |
| 221 | .flags = IORESOURCE_MEM, |
| 222 | }, |
| 223 | { |
| 224 | .start = MSM_GSBI2_PHYS, |
| 225 | .end = MSM_GSBI2_PHYS + PAGE_SIZE - 1, |
| 226 | .name = "gsbi_resource", |
| 227 | .flags = IORESOURCE_MEM, |
| 228 | }, |
| 229 | }; |
| 230 | |
| 231 | struct platform_device msm8960_device_uart_gsbi2 = { |
| 232 | .name = "msm_serial_hsl", |
| 233 | .id = 0, |
| 234 | .num_resources = ARRAY_SIZE(resources_uart_gsbi2), |
| 235 | .resource = resources_uart_gsbi2, |
| 236 | }; |
Mayank Rana | 9f51f58 | 2011-08-04 18:35:59 +0530 | [diff] [blame] | 237 | /* GSBI 6 used into UARTDM Mode */ |
| 238 | static struct resource msm_uart_dm6_resources[] = { |
| 239 | { |
| 240 | .start = MSM_UART6DM_PHYS, |
| 241 | .end = MSM_UART6DM_PHYS + PAGE_SIZE - 1, |
| 242 | .name = "uartdm_resource", |
| 243 | .flags = IORESOURCE_MEM, |
| 244 | }, |
| 245 | { |
| 246 | .start = GSBI6_UARTDM_IRQ, |
| 247 | .end = GSBI6_UARTDM_IRQ, |
| 248 | .flags = IORESOURCE_IRQ, |
| 249 | }, |
| 250 | { |
| 251 | .start = MSM_GSBI6_PHYS, |
| 252 | .end = MSM_GSBI6_PHYS + 4 - 1, |
| 253 | .name = "gsbi_resource", |
| 254 | .flags = IORESOURCE_MEM, |
| 255 | }, |
| 256 | { |
| 257 | .start = DMOV_HSUART_GSBI6_TX_CHAN, |
| 258 | .end = DMOV_HSUART_GSBI6_RX_CHAN, |
| 259 | .name = "uartdm_channels", |
| 260 | .flags = IORESOURCE_DMA, |
| 261 | }, |
| 262 | { |
| 263 | .start = DMOV_HSUART_GSBI6_TX_CRCI, |
| 264 | .end = DMOV_HSUART_GSBI6_RX_CRCI, |
| 265 | .name = "uartdm_crci", |
| 266 | .flags = IORESOURCE_DMA, |
| 267 | }, |
| 268 | }; |
| 269 | static u64 msm_uart_dm6_dma_mask = DMA_BIT_MASK(32); |
| 270 | struct platform_device msm_device_uart_dm6 = { |
| 271 | .name = "msm_serial_hs", |
| 272 | .id = 0, |
| 273 | .num_resources = ARRAY_SIZE(msm_uart_dm6_resources), |
| 274 | .resource = msm_uart_dm6_resources, |
| 275 | .dev = { |
| 276 | .dma_mask = &msm_uart_dm6_dma_mask, |
| 277 | .coherent_dma_mask = DMA_BIT_MASK(32), |
| 278 | }, |
| 279 | }; |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 280 | |
| 281 | static struct resource resources_uart_gsbi5[] = { |
| 282 | { |
| 283 | .start = GSBI5_UARTDM_IRQ, |
| 284 | .end = GSBI5_UARTDM_IRQ, |
| 285 | .flags = IORESOURCE_IRQ, |
| 286 | }, |
| 287 | { |
| 288 | .start = MSM_UART5DM_PHYS, |
| 289 | .end = MSM_UART5DM_PHYS + PAGE_SIZE - 1, |
| 290 | .name = "uartdm_resource", |
| 291 | .flags = IORESOURCE_MEM, |
| 292 | }, |
| 293 | { |
| 294 | .start = MSM_GSBI5_PHYS, |
| 295 | .end = MSM_GSBI5_PHYS + PAGE_SIZE - 1, |
| 296 | .name = "gsbi_resource", |
| 297 | .flags = IORESOURCE_MEM, |
| 298 | }, |
| 299 | }; |
| 300 | |
| 301 | struct platform_device msm8960_device_uart_gsbi5 = { |
| 302 | .name = "msm_serial_hsl", |
| 303 | .id = 0, |
| 304 | .num_resources = ARRAY_SIZE(resources_uart_gsbi5), |
| 305 | .resource = resources_uart_gsbi5, |
| 306 | }; |
| 307 | /* MSM Video core device */ |
| 308 | #ifdef CONFIG_MSM_BUS_SCALING |
| 309 | static struct msm_bus_vectors vidc_init_vectors[] = { |
| 310 | { |
| 311 | .src = MSM_BUS_MASTER_HD_CODEC_PORT0, |
| 312 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 313 | .ab = 0, |
| 314 | .ib = 0, |
| 315 | }, |
| 316 | { |
| 317 | .src = MSM_BUS_MASTER_HD_CODEC_PORT1, |
| 318 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 319 | .ab = 0, |
| 320 | .ib = 0, |
| 321 | }, |
| 322 | { |
| 323 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 324 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 325 | .ab = 0, |
| 326 | .ib = 0, |
| 327 | }, |
| 328 | { |
| 329 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 330 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 331 | .ab = 0, |
| 332 | .ib = 0, |
| 333 | }, |
| 334 | }; |
| 335 | static struct msm_bus_vectors vidc_venc_vga_vectors[] = { |
| 336 | { |
| 337 | .src = MSM_BUS_MASTER_HD_CODEC_PORT0, |
| 338 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 339 | .ab = 54525952, |
| 340 | .ib = 436207616, |
| 341 | }, |
| 342 | { |
| 343 | .src = MSM_BUS_MASTER_HD_CODEC_PORT1, |
| 344 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 345 | .ab = 72351744, |
| 346 | .ib = 289406976, |
| 347 | }, |
| 348 | { |
| 349 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 350 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 351 | .ab = 500000, |
| 352 | .ib = 1000000, |
| 353 | }, |
| 354 | { |
| 355 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 356 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 357 | .ab = 500000, |
| 358 | .ib = 1000000, |
| 359 | }, |
| 360 | }; |
| 361 | static struct msm_bus_vectors vidc_vdec_vga_vectors[] = { |
| 362 | { |
| 363 | .src = MSM_BUS_MASTER_HD_CODEC_PORT0, |
| 364 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 365 | .ab = 40894464, |
| 366 | .ib = 327155712, |
| 367 | }, |
| 368 | { |
| 369 | .src = MSM_BUS_MASTER_HD_CODEC_PORT1, |
| 370 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 371 | .ab = 48234496, |
| 372 | .ib = 192937984, |
| 373 | }, |
| 374 | { |
| 375 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 376 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 377 | .ab = 500000, |
| 378 | .ib = 2000000, |
| 379 | }, |
| 380 | { |
| 381 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 382 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 383 | .ab = 500000, |
| 384 | .ib = 2000000, |
| 385 | }, |
| 386 | }; |
| 387 | static struct msm_bus_vectors vidc_venc_720p_vectors[] = { |
| 388 | { |
| 389 | .src = MSM_BUS_MASTER_HD_CODEC_PORT0, |
| 390 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 391 | .ab = 163577856, |
| 392 | .ib = 1308622848, |
| 393 | }, |
| 394 | { |
| 395 | .src = MSM_BUS_MASTER_HD_CODEC_PORT1, |
| 396 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 397 | .ab = 219152384, |
| 398 | .ib = 876609536, |
| 399 | }, |
| 400 | { |
| 401 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 402 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 403 | .ab = 1750000, |
| 404 | .ib = 3500000, |
| 405 | }, |
| 406 | { |
| 407 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 408 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 409 | .ab = 1750000, |
| 410 | .ib = 3500000, |
| 411 | }, |
| 412 | }; |
| 413 | static struct msm_bus_vectors vidc_vdec_720p_vectors[] = { |
| 414 | { |
| 415 | .src = MSM_BUS_MASTER_HD_CODEC_PORT0, |
| 416 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 417 | .ab = 121634816, |
| 418 | .ib = 973078528, |
| 419 | }, |
| 420 | { |
| 421 | .src = MSM_BUS_MASTER_HD_CODEC_PORT1, |
| 422 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 423 | .ab = 155189248, |
| 424 | .ib = 620756992, |
| 425 | }, |
| 426 | { |
| 427 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 428 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 429 | .ab = 1750000, |
| 430 | .ib = 7000000, |
| 431 | }, |
| 432 | { |
| 433 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 434 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 435 | .ab = 1750000, |
| 436 | .ib = 7000000, |
| 437 | }, |
| 438 | }; |
| 439 | static struct msm_bus_vectors vidc_venc_1080p_vectors[] = { |
| 440 | { |
| 441 | .src = MSM_BUS_MASTER_HD_CODEC_PORT0, |
| 442 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 443 | .ab = 372244480, |
Gopikrishnaiah Anandan | 3e6bdda | 2011-11-04 16:05:04 -0700 | [diff] [blame] | 444 | .ib = 2560000000U, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 445 | }, |
| 446 | { |
| 447 | .src = MSM_BUS_MASTER_HD_CODEC_PORT1, |
| 448 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 449 | .ab = 501219328, |
Gopikrishnaiah Anandan | 3e6bdda | 2011-11-04 16:05:04 -0700 | [diff] [blame] | 450 | .ib = 2560000000U, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 451 | }, |
| 452 | { |
| 453 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 454 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 455 | .ab = 2500000, |
| 456 | .ib = 5000000, |
| 457 | }, |
| 458 | { |
| 459 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 460 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 461 | .ab = 2500000, |
| 462 | .ib = 5000000, |
| 463 | }, |
| 464 | }; |
| 465 | static struct msm_bus_vectors vidc_vdec_1080p_vectors[] = { |
| 466 | { |
| 467 | .src = MSM_BUS_MASTER_HD_CODEC_PORT0, |
| 468 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 469 | .ab = 222298112, |
Gopikrishnaiah Anandan | 3e6bdda | 2011-11-04 16:05:04 -0700 | [diff] [blame] | 470 | .ib = 2560000000U, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 471 | }, |
| 472 | { |
| 473 | .src = MSM_BUS_MASTER_HD_CODEC_PORT1, |
| 474 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 475 | .ab = 330301440, |
Gopikrishnaiah Anandan | 3e6bdda | 2011-11-04 16:05:04 -0700 | [diff] [blame] | 476 | .ib = 2560000000U, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 477 | }, |
| 478 | { |
| 479 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 480 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 481 | .ab = 2500000, |
| 482 | .ib = 700000000, |
| 483 | }, |
| 484 | { |
| 485 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 486 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 487 | .ab = 2500000, |
| 488 | .ib = 10000000, |
| 489 | }, |
| 490 | }; |
| 491 | |
| 492 | static struct msm_bus_paths vidc_bus_client_config[] = { |
| 493 | { |
| 494 | ARRAY_SIZE(vidc_init_vectors), |
| 495 | vidc_init_vectors, |
| 496 | }, |
| 497 | { |
| 498 | ARRAY_SIZE(vidc_venc_vga_vectors), |
| 499 | vidc_venc_vga_vectors, |
| 500 | }, |
| 501 | { |
| 502 | ARRAY_SIZE(vidc_vdec_vga_vectors), |
| 503 | vidc_vdec_vga_vectors, |
| 504 | }, |
| 505 | { |
| 506 | ARRAY_SIZE(vidc_venc_720p_vectors), |
| 507 | vidc_venc_720p_vectors, |
| 508 | }, |
| 509 | { |
| 510 | ARRAY_SIZE(vidc_vdec_720p_vectors), |
| 511 | vidc_vdec_720p_vectors, |
| 512 | }, |
| 513 | { |
| 514 | ARRAY_SIZE(vidc_venc_1080p_vectors), |
| 515 | vidc_venc_1080p_vectors, |
| 516 | }, |
| 517 | { |
| 518 | ARRAY_SIZE(vidc_vdec_1080p_vectors), |
| 519 | vidc_vdec_1080p_vectors, |
| 520 | }, |
| 521 | }; |
| 522 | |
| 523 | static struct msm_bus_scale_pdata vidc_bus_client_data = { |
| 524 | vidc_bus_client_config, |
| 525 | ARRAY_SIZE(vidc_bus_client_config), |
| 526 | .name = "vidc", |
| 527 | }; |
| 528 | #endif |
| 529 | |
Mona Hossain | 9c430e3 | 2011-07-27 11:04:47 -0700 | [diff] [blame] | 530 | #ifdef CONFIG_HW_RANDOM_MSM |
| 531 | /* PRNG device */ |
| 532 | #define MSM_PRNG_PHYS 0x1A500000 |
| 533 | static struct resource rng_resources = { |
| 534 | .flags = IORESOURCE_MEM, |
| 535 | .start = MSM_PRNG_PHYS, |
| 536 | .end = MSM_PRNG_PHYS + SZ_512 - 1, |
| 537 | }; |
| 538 | |
| 539 | struct platform_device msm_device_rng = { |
| 540 | .name = "msm_rng", |
| 541 | .id = 0, |
| 542 | .num_resources = 1, |
| 543 | .resource = &rng_resources, |
| 544 | }; |
| 545 | #endif |
| 546 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 547 | #define MSM_VIDC_BASE_PHYS 0x04400000 |
| 548 | #define MSM_VIDC_BASE_SIZE 0x00100000 |
| 549 | |
| 550 | static struct resource msm_device_vidc_resources[] = { |
| 551 | { |
| 552 | .start = MSM_VIDC_BASE_PHYS, |
| 553 | .end = MSM_VIDC_BASE_PHYS + MSM_VIDC_BASE_SIZE - 1, |
| 554 | .flags = IORESOURCE_MEM, |
| 555 | }, |
| 556 | { |
| 557 | .start = VCODEC_IRQ, |
| 558 | .end = VCODEC_IRQ, |
| 559 | .flags = IORESOURCE_IRQ, |
| 560 | }, |
| 561 | }; |
| 562 | |
| 563 | struct msm_vidc_platform_data vidc_platform_data = { |
| 564 | #ifdef CONFIG_MSM_BUS_SCALING |
| 565 | .vidc_bus_client_pdata = &vidc_bus_client_data, |
| 566 | #endif |
Deepak Kotur | cb4f672 | 2011-10-31 14:06:57 -0700 | [diff] [blame] | 567 | #ifdef CONFIG_MSM_MULTIMEDIA_USE_ION |
Olav Haugan | b5be799 | 2011-11-18 14:29:02 -0800 | [diff] [blame] | 568 | .memtype = ION_CP_MM_HEAP_ID, |
Deepak Kotur | cb4f672 | 2011-10-31 14:06:57 -0700 | [diff] [blame] | 569 | .enable_ion = 1, |
| 570 | #else |
Deepak Kotur | 12301a7 | 2011-11-09 18:30:29 -0800 | [diff] [blame] | 571 | .memtype = MEMTYPE_EBI1, |
Deepak Kotur | cb4f672 | 2011-10-31 14:06:57 -0700 | [diff] [blame] | 572 | .enable_ion = 0, |
| 573 | #endif |
Deepika Pepakayala | bebc762 | 2011-12-01 15:13:43 -0800 | [diff] [blame] | 574 | .disable_dmx = 0, |
Rajeshwar Kurapaty | c155c35 | 2011-12-17 06:35:32 +0530 | [diff] [blame] | 575 | .disable_fullhd = 0, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 576 | }; |
| 577 | |
| 578 | struct platform_device msm_device_vidc = { |
| 579 | .name = "msm_vidc", |
| 580 | .id = 0, |
| 581 | .num_resources = ARRAY_SIZE(msm_device_vidc_resources), |
| 582 | .resource = msm_device_vidc_resources, |
| 583 | .dev = { |
| 584 | .platform_data = &vidc_platform_data, |
| 585 | }, |
| 586 | }; |
| 587 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 588 | #define MSM_SDC1_BASE 0x12400000 |
| 589 | #define MSM_SDC1_DML_BASE (MSM_SDC1_BASE + 0x800) |
| 590 | #define MSM_SDC1_BAM_BASE (MSM_SDC1_BASE + 0x2000) |
| 591 | #define MSM_SDC2_BASE 0x12140000 |
| 592 | #define MSM_SDC2_DML_BASE (MSM_SDC2_BASE + 0x800) |
| 593 | #define MSM_SDC2_BAM_BASE (MSM_SDC2_BASE + 0x2000) |
| 594 | #define MSM_SDC2_BASE 0x12140000 |
| 595 | #define MSM_SDC3_BASE 0x12180000 |
| 596 | #define MSM_SDC3_DML_BASE (MSM_SDC3_BASE + 0x800) |
| 597 | #define MSM_SDC3_BAM_BASE (MSM_SDC3_BASE + 0x2000) |
| 598 | #define MSM_SDC4_BASE 0x121C0000 |
| 599 | #define MSM_SDC4_DML_BASE (MSM_SDC4_BASE + 0x800) |
| 600 | #define MSM_SDC4_BAM_BASE (MSM_SDC4_BASE + 0x2000) |
| 601 | #define MSM_SDC5_BASE 0x12200000 |
| 602 | #define MSM_SDC5_DML_BASE (MSM_SDC5_BASE + 0x800) |
| 603 | #define MSM_SDC5_BAM_BASE (MSM_SDC5_BASE + 0x2000) |
| 604 | |
| 605 | static struct resource resources_sdc1[] = { |
| 606 | { |
| 607 | .name = "core_mem", |
| 608 | .flags = IORESOURCE_MEM, |
| 609 | .start = MSM_SDC1_BASE, |
| 610 | .end = MSM_SDC1_DML_BASE - 1, |
| 611 | }, |
| 612 | { |
| 613 | .name = "core_irq", |
| 614 | .flags = IORESOURCE_IRQ, |
| 615 | .start = SDC1_IRQ_0, |
| 616 | .end = SDC1_IRQ_0 |
| 617 | }, |
| 618 | #ifdef CONFIG_MMC_MSM_SPS_SUPPORT |
| 619 | { |
| 620 | .name = "sdcc_dml_addr", |
| 621 | .start = MSM_SDC1_DML_BASE, |
| 622 | .end = MSM_SDC1_BAM_BASE - 1, |
| 623 | .flags = IORESOURCE_MEM, |
| 624 | }, |
| 625 | { |
| 626 | .name = "sdcc_bam_addr", |
| 627 | .start = MSM_SDC1_BAM_BASE, |
| 628 | .end = MSM_SDC1_BAM_BASE + (2 * SZ_4K) - 1, |
| 629 | .flags = IORESOURCE_MEM, |
| 630 | }, |
| 631 | { |
| 632 | .name = "sdcc_bam_irq", |
| 633 | .start = SDC1_BAM_IRQ, |
| 634 | .end = SDC1_BAM_IRQ, |
| 635 | .flags = IORESOURCE_IRQ, |
| 636 | }, |
| 637 | #endif |
| 638 | }; |
| 639 | |
| 640 | static struct resource resources_sdc2[] = { |
| 641 | { |
| 642 | .name = "core_mem", |
| 643 | .flags = IORESOURCE_MEM, |
| 644 | .start = MSM_SDC2_BASE, |
| 645 | .end = MSM_SDC2_DML_BASE - 1, |
| 646 | }, |
| 647 | { |
| 648 | .name = "core_irq", |
| 649 | .flags = IORESOURCE_IRQ, |
| 650 | .start = SDC2_IRQ_0, |
| 651 | .end = SDC2_IRQ_0 |
| 652 | }, |
| 653 | #ifdef CONFIG_MMC_MSM_SPS_SUPPORT |
| 654 | { |
| 655 | .name = "sdcc_dml_addr", |
| 656 | .start = MSM_SDC2_DML_BASE, |
| 657 | .end = MSM_SDC2_BAM_BASE - 1, |
| 658 | .flags = IORESOURCE_MEM, |
| 659 | }, |
| 660 | { |
| 661 | .name = "sdcc_bam_addr", |
| 662 | .start = MSM_SDC2_BAM_BASE, |
| 663 | .end = MSM_SDC2_BAM_BASE + (2 * SZ_4K) - 1, |
| 664 | .flags = IORESOURCE_MEM, |
| 665 | }, |
| 666 | { |
| 667 | .name = "sdcc_bam_irq", |
| 668 | .start = SDC2_BAM_IRQ, |
| 669 | .end = SDC2_BAM_IRQ, |
| 670 | .flags = IORESOURCE_IRQ, |
| 671 | }, |
| 672 | #endif |
| 673 | }; |
| 674 | |
| 675 | static struct resource resources_sdc3[] = { |
| 676 | { |
| 677 | .name = "core_mem", |
| 678 | .flags = IORESOURCE_MEM, |
| 679 | .start = MSM_SDC3_BASE, |
| 680 | .end = MSM_SDC3_DML_BASE - 1, |
| 681 | }, |
| 682 | { |
| 683 | .name = "core_irq", |
| 684 | .flags = IORESOURCE_IRQ, |
| 685 | .start = SDC3_IRQ_0, |
| 686 | .end = SDC3_IRQ_0 |
| 687 | }, |
| 688 | #ifdef CONFIG_MMC_MSM_SPS_SUPPORT |
| 689 | { |
| 690 | .name = "sdcc_dml_addr", |
| 691 | .start = MSM_SDC3_DML_BASE, |
| 692 | .end = MSM_SDC3_BAM_BASE - 1, |
| 693 | .flags = IORESOURCE_MEM, |
| 694 | }, |
| 695 | { |
| 696 | .name = "sdcc_bam_addr", |
| 697 | .start = MSM_SDC3_BAM_BASE, |
| 698 | .end = MSM_SDC3_BAM_BASE + (2 * SZ_4K) - 1, |
| 699 | .flags = IORESOURCE_MEM, |
| 700 | }, |
| 701 | { |
| 702 | .name = "sdcc_bam_irq", |
| 703 | .start = SDC3_BAM_IRQ, |
| 704 | .end = SDC3_BAM_IRQ, |
| 705 | .flags = IORESOURCE_IRQ, |
| 706 | }, |
| 707 | #endif |
| 708 | }; |
| 709 | |
| 710 | static struct resource resources_sdc4[] = { |
| 711 | { |
| 712 | .name = "core_mem", |
| 713 | .flags = IORESOURCE_MEM, |
| 714 | .start = MSM_SDC4_BASE, |
| 715 | .end = MSM_SDC4_DML_BASE - 1, |
| 716 | }, |
| 717 | { |
| 718 | .name = "core_irq", |
| 719 | .flags = IORESOURCE_IRQ, |
| 720 | .start = SDC4_IRQ_0, |
| 721 | .end = SDC4_IRQ_0 |
| 722 | }, |
| 723 | #ifdef CONFIG_MMC_MSM_SPS_SUPPORT |
| 724 | { |
| 725 | .name = "sdcc_dml_addr", |
| 726 | .start = MSM_SDC4_DML_BASE, |
| 727 | .end = MSM_SDC4_BAM_BASE - 1, |
| 728 | .flags = IORESOURCE_MEM, |
| 729 | }, |
| 730 | { |
| 731 | .name = "sdcc_bam_addr", |
| 732 | .start = MSM_SDC4_BAM_BASE, |
| 733 | .end = MSM_SDC4_BAM_BASE + (2 * SZ_4K) - 1, |
| 734 | .flags = IORESOURCE_MEM, |
| 735 | }, |
| 736 | { |
| 737 | .name = "sdcc_bam_irq", |
| 738 | .start = SDC4_BAM_IRQ, |
| 739 | .end = SDC4_BAM_IRQ, |
| 740 | .flags = IORESOURCE_IRQ, |
| 741 | }, |
| 742 | #endif |
| 743 | }; |
| 744 | |
| 745 | static struct resource resources_sdc5[] = { |
| 746 | { |
| 747 | .name = "core_mem", |
| 748 | .flags = IORESOURCE_MEM, |
| 749 | .start = MSM_SDC5_BASE, |
| 750 | .end = MSM_SDC5_DML_BASE - 1, |
| 751 | }, |
| 752 | { |
| 753 | .name = "core_irq", |
| 754 | .flags = IORESOURCE_IRQ, |
| 755 | .start = SDC5_IRQ_0, |
| 756 | .end = SDC5_IRQ_0 |
| 757 | }, |
| 758 | #ifdef CONFIG_MMC_MSM_SPS_SUPPORT |
| 759 | { |
| 760 | .name = "sdcc_dml_addr", |
| 761 | .start = MSM_SDC5_DML_BASE, |
| 762 | .end = MSM_SDC5_BAM_BASE - 1, |
| 763 | .flags = IORESOURCE_MEM, |
| 764 | }, |
| 765 | { |
| 766 | .name = "sdcc_bam_addr", |
| 767 | .start = MSM_SDC5_BAM_BASE, |
| 768 | .end = MSM_SDC5_BAM_BASE + (2 * SZ_4K) - 1, |
| 769 | .flags = IORESOURCE_MEM, |
| 770 | }, |
| 771 | { |
| 772 | .name = "sdcc_bam_irq", |
| 773 | .start = SDC5_BAM_IRQ, |
| 774 | .end = SDC5_BAM_IRQ, |
| 775 | .flags = IORESOURCE_IRQ, |
| 776 | }, |
| 777 | #endif |
| 778 | }; |
| 779 | |
| 780 | struct platform_device msm_device_sdc1 = { |
| 781 | .name = "msm_sdcc", |
| 782 | .id = 1, |
| 783 | .num_resources = ARRAY_SIZE(resources_sdc1), |
| 784 | .resource = resources_sdc1, |
| 785 | .dev = { |
| 786 | .coherent_dma_mask = 0xffffffff, |
| 787 | }, |
| 788 | }; |
| 789 | |
| 790 | struct platform_device msm_device_sdc2 = { |
| 791 | .name = "msm_sdcc", |
| 792 | .id = 2, |
| 793 | .num_resources = ARRAY_SIZE(resources_sdc2), |
| 794 | .resource = resources_sdc2, |
| 795 | .dev = { |
| 796 | .coherent_dma_mask = 0xffffffff, |
| 797 | }, |
| 798 | }; |
| 799 | |
| 800 | struct platform_device msm_device_sdc3 = { |
| 801 | .name = "msm_sdcc", |
| 802 | .id = 3, |
| 803 | .num_resources = ARRAY_SIZE(resources_sdc3), |
| 804 | .resource = resources_sdc3, |
| 805 | .dev = { |
| 806 | .coherent_dma_mask = 0xffffffff, |
| 807 | }, |
| 808 | }; |
| 809 | |
| 810 | struct platform_device msm_device_sdc4 = { |
| 811 | .name = "msm_sdcc", |
| 812 | .id = 4, |
| 813 | .num_resources = ARRAY_SIZE(resources_sdc4), |
| 814 | .resource = resources_sdc4, |
| 815 | .dev = { |
| 816 | .coherent_dma_mask = 0xffffffff, |
| 817 | }, |
| 818 | }; |
| 819 | |
| 820 | struct platform_device msm_device_sdc5 = { |
| 821 | .name = "msm_sdcc", |
| 822 | .id = 5, |
| 823 | .num_resources = ARRAY_SIZE(resources_sdc5), |
| 824 | .resource = resources_sdc5, |
| 825 | .dev = { |
| 826 | .coherent_dma_mask = 0xffffffff, |
| 827 | }, |
| 828 | }; |
| 829 | |
Stephen Boyd | eb81988 | 2011-08-29 14:46:30 -0700 | [diff] [blame] | 830 | #define MSM_LPASS_QDSP6SS_PHYS 0x28800000 |
| 831 | #define SFAB_LPASS_Q6_ACLK_CTL (MSM_CLK_CTL_BASE + 0x23A0) |
| 832 | |
| 833 | static struct resource msm_8960_q6_lpass_resources[] = { |
| 834 | { |
| 835 | .start = MSM_LPASS_QDSP6SS_PHYS, |
| 836 | .end = MSM_LPASS_QDSP6SS_PHYS + SZ_256 - 1, |
| 837 | .flags = IORESOURCE_MEM, |
| 838 | }, |
| 839 | }; |
| 840 | |
| 841 | static struct pil_q6v4_pdata msm_8960_q6_lpass_data = { |
| 842 | .strap_tcm_base = 0x01460000, |
| 843 | .strap_ahb_upper = 0x00290000, |
| 844 | .strap_ahb_lower = 0x00000280, |
| 845 | .aclk_reg = SFAB_LPASS_Q6_ACLK_CTL, |
Matt Wagantall | 3908893 | 2011-08-02 20:24:56 -0700 | [diff] [blame] | 846 | .xo_id = MSM_XO_PXO, |
Stephen Boyd | eb81988 | 2011-08-29 14:46:30 -0700 | [diff] [blame] | 847 | .name = "q6", |
| 848 | .pas_id = PAS_Q6, |
Matt Wagantall | 6e4aafb | 2011-09-09 17:53:54 -0700 | [diff] [blame] | 849 | .bus_port = MSM_BUS_MASTER_LPASS_PROC, |
Stephen Boyd | eb81988 | 2011-08-29 14:46:30 -0700 | [diff] [blame] | 850 | }; |
| 851 | |
| 852 | struct platform_device msm_8960_q6_lpass = { |
| 853 | .name = "pil_qdsp6v4", |
| 854 | .id = 0, |
| 855 | .num_resources = ARRAY_SIZE(msm_8960_q6_lpass_resources), |
| 856 | .resource = msm_8960_q6_lpass_resources, |
| 857 | .dev.platform_data = &msm_8960_q6_lpass_data, |
| 858 | }; |
| 859 | |
| 860 | #define MSM_MSS_ENABLE_PHYS 0x08B00000 |
| 861 | #define MSM_FW_QDSP6SS_PHYS 0x08800000 |
| 862 | #define MSS_Q6FW_JTAG_CLK_CTL (MSM_CLK_CTL_BASE + 0x2C6C) |
| 863 | #define SFAB_MSS_Q6_FW_ACLK_CTL (MSM_CLK_CTL_BASE + 0x2044) |
| 864 | |
| 865 | static struct resource msm_8960_q6_mss_fw_resources[] = { |
| 866 | { |
| 867 | .start = MSM_FW_QDSP6SS_PHYS, |
| 868 | .end = MSM_FW_QDSP6SS_PHYS + SZ_256 - 1, |
| 869 | .flags = IORESOURCE_MEM, |
| 870 | }, |
| 871 | { |
| 872 | .start = MSM_MSS_ENABLE_PHYS, |
| 873 | .end = MSM_MSS_ENABLE_PHYS + 4 - 1, |
| 874 | .flags = IORESOURCE_MEM, |
| 875 | }, |
| 876 | }; |
| 877 | |
| 878 | static struct pil_q6v4_pdata msm_8960_q6_mss_fw_data = { |
| 879 | .strap_tcm_base = 0x00400000, |
| 880 | .strap_ahb_upper = 0x00090000, |
| 881 | .strap_ahb_lower = 0x00000080, |
| 882 | .aclk_reg = SFAB_MSS_Q6_FW_ACLK_CTL, |
| 883 | .jtag_clk_reg = MSS_Q6FW_JTAG_CLK_CTL, |
Matt Wagantall | ed90b00 | 2011-12-12 21:22:43 -0800 | [diff] [blame] | 884 | .xo_id = MSM_XO_CXO, |
Stephen Boyd | eb81988 | 2011-08-29 14:46:30 -0700 | [diff] [blame] | 885 | .name = "modem_fw", |
| 886 | .depends = "q6", |
| 887 | .pas_id = PAS_MODEM_FW, |
Matt Wagantall | 6e4aafb | 2011-09-09 17:53:54 -0700 | [diff] [blame] | 888 | .bus_port = MSM_BUS_MASTER_MSS_FW_PROC, |
Stephen Boyd | eb81988 | 2011-08-29 14:46:30 -0700 | [diff] [blame] | 889 | }; |
| 890 | |
| 891 | struct platform_device msm_8960_q6_mss_fw = { |
| 892 | .name = "pil_qdsp6v4", |
| 893 | .id = 1, |
| 894 | .num_resources = ARRAY_SIZE(msm_8960_q6_mss_fw_resources), |
| 895 | .resource = msm_8960_q6_mss_fw_resources, |
| 896 | .dev.platform_data = &msm_8960_q6_mss_fw_data, |
| 897 | }; |
| 898 | |
| 899 | #define MSM_SW_QDSP6SS_PHYS 0x08900000 |
| 900 | #define SFAB_MSS_Q6_SW_ACLK_CTL (MSM_CLK_CTL_BASE + 0x2040) |
| 901 | #define MSS_Q6SW_JTAG_CLK_CTL (MSM_CLK_CTL_BASE + 0x2C68) |
| 902 | |
| 903 | static struct resource msm_8960_q6_mss_sw_resources[] = { |
| 904 | { |
| 905 | .start = MSM_SW_QDSP6SS_PHYS, |
| 906 | .end = MSM_SW_QDSP6SS_PHYS + SZ_256 - 1, |
| 907 | .flags = IORESOURCE_MEM, |
| 908 | }, |
| 909 | { |
| 910 | .start = MSM_MSS_ENABLE_PHYS, |
| 911 | .end = MSM_MSS_ENABLE_PHYS + 4 - 1, |
| 912 | .flags = IORESOURCE_MEM, |
| 913 | }, |
| 914 | }; |
| 915 | |
| 916 | static struct pil_q6v4_pdata msm_8960_q6_mss_sw_data = { |
| 917 | .strap_tcm_base = 0x00420000, |
| 918 | .strap_ahb_upper = 0x00090000, |
| 919 | .strap_ahb_lower = 0x00000080, |
| 920 | .aclk_reg = SFAB_MSS_Q6_SW_ACLK_CTL, |
| 921 | .jtag_clk_reg = MSS_Q6SW_JTAG_CLK_CTL, |
Matt Wagantall | ed90b00 | 2011-12-12 21:22:43 -0800 | [diff] [blame] | 922 | .xo_id = MSM_XO_CXO, |
Stephen Boyd | eb81988 | 2011-08-29 14:46:30 -0700 | [diff] [blame] | 923 | .name = "modem", |
| 924 | .depends = "modem_fw", |
| 925 | .pas_id = PAS_MODEM_SW, |
Matt Wagantall | 6e4aafb | 2011-09-09 17:53:54 -0700 | [diff] [blame] | 926 | .bus_port = MSM_BUS_MASTER_MSS_SW_PROC, |
Stephen Boyd | eb81988 | 2011-08-29 14:46:30 -0700 | [diff] [blame] | 927 | }; |
| 928 | |
| 929 | struct platform_device msm_8960_q6_mss_sw = { |
| 930 | .name = "pil_qdsp6v4", |
| 931 | .id = 2, |
| 932 | .num_resources = ARRAY_SIZE(msm_8960_q6_mss_sw_resources), |
| 933 | .resource = msm_8960_q6_mss_sw_resources, |
| 934 | .dev.platform_data = &msm_8960_q6_mss_sw_data, |
| 935 | }; |
| 936 | |
Stephen Boyd | 322a992 | 2011-09-20 01:05:54 -0700 | [diff] [blame] | 937 | static struct resource msm_8960_riva_resources[] = { |
| 938 | { |
| 939 | .start = 0x03204000, |
| 940 | .end = 0x03204000 + SZ_256 - 1, |
| 941 | .flags = IORESOURCE_MEM, |
| 942 | }, |
| 943 | }; |
| 944 | |
| 945 | struct platform_device msm_8960_riva = { |
| 946 | .name = "pil_riva", |
| 947 | .id = -1, |
| 948 | .num_resources = ARRAY_SIZE(msm_8960_riva_resources), |
| 949 | .resource = msm_8960_riva_resources, |
| 950 | }; |
| 951 | |
Stephen Boyd | d89eebe | 2011-09-28 23:28:11 -0700 | [diff] [blame] | 952 | struct platform_device msm_pil_tzapps = { |
| 953 | .name = "pil_tzapps", |
| 954 | .id = -1, |
| 955 | }; |
| 956 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 957 | struct platform_device msm_device_smd = { |
| 958 | .name = "msm_smd", |
| 959 | .id = -1, |
| 960 | }; |
| 961 | |
| 962 | struct platform_device msm_device_bam_dmux = { |
| 963 | .name = "BAM_RMNT", |
| 964 | .id = -1, |
| 965 | }; |
| 966 | |
Jeff Ohlstein | 7e66855 | 2011-10-06 16:17:25 -0700 | [diff] [blame] | 967 | static struct msm_watchdog_pdata msm_watchdog_pdata = { |
| 968 | .pet_time = 10000, |
| 969 | .bark_time = 11000, |
| 970 | .has_secure = true, |
| 971 | }; |
| 972 | |
| 973 | struct platform_device msm8960_device_watchdog = { |
| 974 | .name = "msm_watchdog", |
| 975 | .id = -1, |
| 976 | .dev = { |
| 977 | .platform_data = &msm_watchdog_pdata, |
| 978 | }, |
| 979 | }; |
| 980 | |
Stepan Moskovchenko | df13d34 | 2011-08-03 19:01:25 -0700 | [diff] [blame] | 981 | static struct resource msm_dmov_resource[] = { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 982 | { |
| 983 | .start = ADM_0_SCSS_1_IRQ, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 984 | .flags = IORESOURCE_IRQ, |
| 985 | }, |
Jeff Ohlstein | 905f1ce | 2011-09-07 18:50:18 -0700 | [diff] [blame] | 986 | { |
| 987 | .start = 0x18320000, |
| 988 | .end = 0x18320000 + SZ_1M - 1, |
| 989 | .flags = IORESOURCE_MEM, |
| 990 | }, |
| 991 | }; |
| 992 | |
| 993 | static struct msm_dmov_pdata msm_dmov_pdata = { |
| 994 | .sd = 1, |
| 995 | .sd_size = 0x800, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 996 | }; |
| 997 | |
Stepan Moskovchenko | df13d34 | 2011-08-03 19:01:25 -0700 | [diff] [blame] | 998 | struct platform_device msm8960_device_dmov = { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 999 | .name = "msm_dmov", |
| 1000 | .id = -1, |
| 1001 | .resource = msm_dmov_resource, |
| 1002 | .num_resources = ARRAY_SIZE(msm_dmov_resource), |
Jeff Ohlstein | 905f1ce | 2011-09-07 18:50:18 -0700 | [diff] [blame] | 1003 | .dev = { |
| 1004 | .platform_data = &msm_dmov_pdata, |
| 1005 | }, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1006 | }; |
| 1007 | |
| 1008 | static struct platform_device *msm_sdcc_devices[] __initdata = { |
| 1009 | &msm_device_sdc1, |
| 1010 | &msm_device_sdc2, |
| 1011 | &msm_device_sdc3, |
| 1012 | &msm_device_sdc4, |
| 1013 | &msm_device_sdc5, |
| 1014 | }; |
| 1015 | |
| 1016 | int __init msm_add_sdcc(unsigned int controller, struct mmc_platform_data *plat) |
| 1017 | { |
| 1018 | struct platform_device *pdev; |
| 1019 | |
| 1020 | if (controller < 1 || controller > 5) |
| 1021 | return -EINVAL; |
| 1022 | |
| 1023 | pdev = msm_sdcc_devices[controller-1]; |
| 1024 | pdev->dev.platform_data = plat; |
| 1025 | return platform_device_register(pdev); |
| 1026 | } |
| 1027 | |
| 1028 | static struct resource resources_qup_i2c_gsbi4[] = { |
| 1029 | { |
| 1030 | .name = "gsbi_qup_i2c_addr", |
| 1031 | .start = MSM_GSBI4_PHYS, |
Harini Jayaraman | d7614a7 | 2011-09-15 14:16:02 -0600 | [diff] [blame] | 1032 | .end = MSM_GSBI4_PHYS + 4 - 1, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1033 | .flags = IORESOURCE_MEM, |
| 1034 | }, |
| 1035 | { |
| 1036 | .name = "qup_phys_addr", |
| 1037 | .start = MSM_GSBI4_QUP_PHYS, |
Harini Jayaraman | d7614a7 | 2011-09-15 14:16:02 -0600 | [diff] [blame] | 1038 | .end = MSM_GSBI4_QUP_PHYS + MSM_QUP_SIZE - 1, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1039 | .flags = IORESOURCE_MEM, |
| 1040 | }, |
| 1041 | { |
| 1042 | .name = "qup_err_intr", |
| 1043 | .start = GSBI4_QUP_IRQ, |
| 1044 | .end = GSBI4_QUP_IRQ, |
| 1045 | .flags = IORESOURCE_IRQ, |
| 1046 | }, |
| 1047 | }; |
| 1048 | |
| 1049 | struct platform_device msm8960_device_qup_i2c_gsbi4 = { |
| 1050 | .name = "qup_i2c", |
| 1051 | .id = 4, |
| 1052 | .num_resources = ARRAY_SIZE(resources_qup_i2c_gsbi4), |
| 1053 | .resource = resources_qup_i2c_gsbi4, |
| 1054 | }; |
| 1055 | |
| 1056 | static struct resource resources_qup_i2c_gsbi3[] = { |
| 1057 | { |
| 1058 | .name = "gsbi_qup_i2c_addr", |
| 1059 | .start = MSM_GSBI3_PHYS, |
Harini Jayaraman | d7614a7 | 2011-09-15 14:16:02 -0600 | [diff] [blame] | 1060 | .end = MSM_GSBI3_PHYS + 4 - 1, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1061 | .flags = IORESOURCE_MEM, |
| 1062 | }, |
| 1063 | { |
| 1064 | .name = "qup_phys_addr", |
| 1065 | .start = MSM_GSBI3_QUP_PHYS, |
Harini Jayaraman | d7614a7 | 2011-09-15 14:16:02 -0600 | [diff] [blame] | 1066 | .end = MSM_GSBI3_QUP_PHYS + MSM_QUP_SIZE - 1, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1067 | .flags = IORESOURCE_MEM, |
| 1068 | }, |
| 1069 | { |
| 1070 | .name = "qup_err_intr", |
| 1071 | .start = GSBI3_QUP_IRQ, |
| 1072 | .end = GSBI3_QUP_IRQ, |
| 1073 | .flags = IORESOURCE_IRQ, |
| 1074 | }, |
| 1075 | }; |
| 1076 | |
| 1077 | struct platform_device msm8960_device_qup_i2c_gsbi3 = { |
| 1078 | .name = "qup_i2c", |
| 1079 | .id = 3, |
| 1080 | .num_resources = ARRAY_SIZE(resources_qup_i2c_gsbi3), |
| 1081 | .resource = resources_qup_i2c_gsbi3, |
| 1082 | }; |
| 1083 | |
| 1084 | static struct resource resources_qup_i2c_gsbi10[] = { |
| 1085 | { |
| 1086 | .name = "gsbi_qup_i2c_addr", |
| 1087 | .start = MSM_GSBI10_PHYS, |
Harini Jayaraman | d7614a7 | 2011-09-15 14:16:02 -0600 | [diff] [blame] | 1088 | .end = MSM_GSBI10_PHYS + 4 - 1, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1089 | .flags = IORESOURCE_MEM, |
| 1090 | }, |
| 1091 | { |
| 1092 | .name = "qup_phys_addr", |
| 1093 | .start = MSM_GSBI10_QUP_PHYS, |
Harini Jayaraman | d7614a7 | 2011-09-15 14:16:02 -0600 | [diff] [blame] | 1094 | .end = MSM_GSBI10_QUP_PHYS + MSM_QUP_SIZE - 1, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1095 | .flags = IORESOURCE_MEM, |
| 1096 | }, |
| 1097 | { |
| 1098 | .name = "qup_err_intr", |
| 1099 | .start = GSBI10_QUP_IRQ, |
| 1100 | .end = GSBI10_QUP_IRQ, |
| 1101 | .flags = IORESOURCE_IRQ, |
| 1102 | }, |
| 1103 | }; |
| 1104 | |
| 1105 | struct platform_device msm8960_device_qup_i2c_gsbi10 = { |
| 1106 | .name = "qup_i2c", |
| 1107 | .id = 10, |
| 1108 | .num_resources = ARRAY_SIZE(resources_qup_i2c_gsbi10), |
| 1109 | .resource = resources_qup_i2c_gsbi10, |
| 1110 | }; |
| 1111 | |
| 1112 | static struct resource resources_qup_i2c_gsbi12[] = { |
| 1113 | { |
| 1114 | .name = "gsbi_qup_i2c_addr", |
| 1115 | .start = MSM_GSBI12_PHYS, |
Harini Jayaraman | d7614a7 | 2011-09-15 14:16:02 -0600 | [diff] [blame] | 1116 | .end = MSM_GSBI12_PHYS + 4 - 1, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1117 | .flags = IORESOURCE_MEM, |
| 1118 | }, |
| 1119 | { |
| 1120 | .name = "qup_phys_addr", |
| 1121 | .start = MSM_GSBI12_QUP_PHYS, |
Harini Jayaraman | d7614a7 | 2011-09-15 14:16:02 -0600 | [diff] [blame] | 1122 | .end = MSM_GSBI12_QUP_PHYS + MSM_QUP_SIZE - 1, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1123 | .flags = IORESOURCE_MEM, |
| 1124 | }, |
| 1125 | { |
| 1126 | .name = "qup_err_intr", |
| 1127 | .start = GSBI12_QUP_IRQ, |
| 1128 | .end = GSBI12_QUP_IRQ, |
| 1129 | .flags = IORESOURCE_IRQ, |
| 1130 | }, |
| 1131 | }; |
| 1132 | |
| 1133 | struct platform_device msm8960_device_qup_i2c_gsbi12 = { |
| 1134 | .name = "qup_i2c", |
| 1135 | .id = 12, |
| 1136 | .num_resources = ARRAY_SIZE(resources_qup_i2c_gsbi12), |
| 1137 | .resource = resources_qup_i2c_gsbi12, |
| 1138 | }; |
| 1139 | |
| 1140 | #ifdef CONFIG_MSM_CAMERA |
| 1141 | struct resource msm_camera_resources[] = { |
| 1142 | { |
Nishant Pandit | 24153d8 | 2011-08-27 16:05:13 +0530 | [diff] [blame] | 1143 | .name = "s3d_rw", |
| 1144 | .start = 0x008003E0, |
| 1145 | .end = 0x008003E0 + SZ_16 - 1, |
| 1146 | .flags = IORESOURCE_MEM, |
| 1147 | }, |
| 1148 | { |
| 1149 | .name = "s3d_ctl", |
| 1150 | .start = 0x008020B8, |
| 1151 | .end = 0x008020B8 + SZ_16 - 1, |
| 1152 | .flags = IORESOURCE_MEM, |
| 1153 | }, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1154 | }; |
| 1155 | |
| 1156 | int __init msm_get_cam_resources(struct msm_camera_sensor_info *s_info) |
| 1157 | { |
| 1158 | s_info->resource = msm_camera_resources; |
| 1159 | s_info->num_resources = ARRAY_SIZE(msm_camera_resources); |
| 1160 | return 0; |
| 1161 | } |
Kevin Chan | f6216f2 | 2011-10-25 18:40:11 -0700 | [diff] [blame] | 1162 | |
| 1163 | static struct resource msm_csiphy0_resources[] = { |
| 1164 | { |
| 1165 | .name = "csiphy", |
| 1166 | .start = 0x04800C00, |
| 1167 | .end = 0x04800C00 + SZ_1K - 1, |
| 1168 | .flags = IORESOURCE_MEM, |
| 1169 | }, |
| 1170 | { |
| 1171 | .name = "csiphy", |
| 1172 | .start = CSIPHY_4LN_IRQ, |
| 1173 | .end = CSIPHY_4LN_IRQ, |
| 1174 | .flags = IORESOURCE_IRQ, |
| 1175 | }, |
| 1176 | }; |
| 1177 | |
| 1178 | static struct resource msm_csiphy1_resources[] = { |
| 1179 | { |
| 1180 | .name = "csiphy", |
| 1181 | .start = 0x04801000, |
| 1182 | .end = 0x04801000 + SZ_1K - 1, |
| 1183 | .flags = IORESOURCE_MEM, |
| 1184 | }, |
| 1185 | { |
| 1186 | .name = "csiphy", |
| 1187 | .start = MSM8960_CSIPHY_2LN_IRQ, |
| 1188 | .end = MSM8960_CSIPHY_2LN_IRQ, |
| 1189 | .flags = IORESOURCE_IRQ, |
| 1190 | }, |
| 1191 | }; |
| 1192 | |
| 1193 | struct platform_device msm8960_device_csiphy0 = { |
| 1194 | .name = "msm_csiphy", |
| 1195 | .id = 0, |
| 1196 | .resource = msm_csiphy0_resources, |
| 1197 | .num_resources = ARRAY_SIZE(msm_csiphy0_resources), |
| 1198 | }; |
| 1199 | |
| 1200 | struct platform_device msm8960_device_csiphy1 = { |
| 1201 | .name = "msm_csiphy", |
| 1202 | .id = 1, |
| 1203 | .resource = msm_csiphy1_resources, |
| 1204 | .num_resources = ARRAY_SIZE(msm_csiphy1_resources), |
| 1205 | }; |
Kevin Chan | c8b52e8 | 2011-10-25 23:20:21 -0700 | [diff] [blame] | 1206 | |
| 1207 | static struct resource msm_csid0_resources[] = { |
| 1208 | { |
| 1209 | .name = "csid", |
| 1210 | .start = 0x04800000, |
| 1211 | .end = 0x04800000 + SZ_1K - 1, |
| 1212 | .flags = IORESOURCE_MEM, |
| 1213 | }, |
| 1214 | { |
| 1215 | .name = "csid", |
| 1216 | .start = CSI_0_IRQ, |
| 1217 | .end = CSI_0_IRQ, |
| 1218 | .flags = IORESOURCE_IRQ, |
| 1219 | }, |
| 1220 | }; |
| 1221 | |
| 1222 | static struct resource msm_csid1_resources[] = { |
| 1223 | { |
| 1224 | .name = "csid", |
| 1225 | .start = 0x04800400, |
| 1226 | .end = 0x04800400 + SZ_1K - 1, |
| 1227 | .flags = IORESOURCE_MEM, |
| 1228 | }, |
| 1229 | { |
| 1230 | .name = "csid", |
| 1231 | .start = CSI_1_IRQ, |
| 1232 | .end = CSI_1_IRQ, |
| 1233 | .flags = IORESOURCE_IRQ, |
| 1234 | }, |
| 1235 | }; |
| 1236 | |
| 1237 | struct platform_device msm8960_device_csid0 = { |
| 1238 | .name = "msm_csid", |
| 1239 | .id = 0, |
| 1240 | .resource = msm_csid0_resources, |
| 1241 | .num_resources = ARRAY_SIZE(msm_csid0_resources), |
| 1242 | }; |
| 1243 | |
| 1244 | struct platform_device msm8960_device_csid1 = { |
| 1245 | .name = "msm_csid", |
| 1246 | .id = 1, |
| 1247 | .resource = msm_csid1_resources, |
| 1248 | .num_resources = ARRAY_SIZE(msm_csid1_resources), |
| 1249 | }; |
Kevin Chan | e12c667 | 2011-10-26 11:55:26 -0700 | [diff] [blame] | 1250 | |
| 1251 | struct resource msm_ispif_resources[] = { |
| 1252 | { |
| 1253 | .name = "ispif", |
| 1254 | .start = 0x04800800, |
| 1255 | .end = 0x04800800 + SZ_1K - 1, |
| 1256 | .flags = IORESOURCE_MEM, |
| 1257 | }, |
| 1258 | { |
| 1259 | .name = "ispif", |
| 1260 | .start = ISPIF_IRQ, |
| 1261 | .end = ISPIF_IRQ, |
| 1262 | .flags = IORESOURCE_IRQ, |
| 1263 | }, |
| 1264 | }; |
| 1265 | |
| 1266 | struct platform_device msm8960_device_ispif = { |
| 1267 | .name = "msm_ispif", |
| 1268 | .id = 0, |
| 1269 | .resource = msm_ispif_resources, |
| 1270 | .num_resources = ARRAY_SIZE(msm_ispif_resources), |
| 1271 | }; |
Kevin Chan | 5827c55 | 2011-10-28 18:36:32 -0700 | [diff] [blame] | 1272 | |
| 1273 | static struct resource msm_vfe_resources[] = { |
| 1274 | { |
| 1275 | .name = "vfe32", |
| 1276 | .start = 0x04500000, |
| 1277 | .end = 0x04500000 + SZ_1M - 1, |
| 1278 | .flags = IORESOURCE_MEM, |
| 1279 | }, |
| 1280 | { |
| 1281 | .name = "vfe32", |
| 1282 | .start = VFE_IRQ, |
| 1283 | .end = VFE_IRQ, |
| 1284 | .flags = IORESOURCE_IRQ, |
| 1285 | }, |
| 1286 | }; |
| 1287 | |
| 1288 | struct platform_device msm8960_device_vfe = { |
| 1289 | .name = "msm_vfe", |
| 1290 | .id = 0, |
| 1291 | .resource = msm_vfe_resources, |
| 1292 | .num_resources = ARRAY_SIZE(msm_vfe_resources), |
| 1293 | }; |
Kevin Chan | a085312 | 2011-11-07 19:48:44 -0800 | [diff] [blame] | 1294 | |
| 1295 | static struct resource msm_vpe_resources[] = { |
| 1296 | { |
| 1297 | .name = "vpe", |
| 1298 | .start = 0x05300000, |
| 1299 | .end = 0x05300000 + SZ_1M - 1, |
| 1300 | .flags = IORESOURCE_MEM, |
| 1301 | }, |
| 1302 | { |
| 1303 | .name = "vpe", |
| 1304 | .start = VPE_IRQ, |
| 1305 | .end = VPE_IRQ, |
| 1306 | .flags = IORESOURCE_IRQ, |
| 1307 | }, |
| 1308 | }; |
| 1309 | |
| 1310 | struct platform_device msm8960_device_vpe = { |
| 1311 | .name = "msm_vpe", |
| 1312 | .id = 0, |
| 1313 | .resource = msm_vpe_resources, |
| 1314 | .num_resources = ARRAY_SIZE(msm_vpe_resources), |
| 1315 | }; |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1316 | #endif |
| 1317 | |
Jay Chokshi | 33c044a | 2011-12-07 13:05:40 -0800 | [diff] [blame] | 1318 | static struct resource resources_ssbi_pmic[] = { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1319 | { |
| 1320 | .start = MSM_PMIC1_SSBI_CMD_PHYS, |
| 1321 | .end = MSM_PMIC1_SSBI_CMD_PHYS + MSM_PMIC_SSBI_SIZE - 1, |
| 1322 | .flags = IORESOURCE_MEM, |
| 1323 | }, |
| 1324 | }; |
| 1325 | |
Jay Chokshi | 33c044a | 2011-12-07 13:05:40 -0800 | [diff] [blame] | 1326 | struct platform_device msm8960_device_ssbi_pmic = { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1327 | .name = "msm_ssbi", |
| 1328 | .id = 0, |
Jay Chokshi | 33c044a | 2011-12-07 13:05:40 -0800 | [diff] [blame] | 1329 | .resource = resources_ssbi_pmic, |
| 1330 | .num_resources = ARRAY_SIZE(resources_ssbi_pmic), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1331 | }; |
| 1332 | |
| 1333 | static struct resource resources_qup_spi_gsbi1[] = { |
| 1334 | { |
| 1335 | .name = "spi_base", |
| 1336 | .start = MSM_GSBI1_QUP_PHYS, |
| 1337 | .end = MSM_GSBI1_QUP_PHYS + SZ_4K - 1, |
| 1338 | .flags = IORESOURCE_MEM, |
| 1339 | }, |
| 1340 | { |
| 1341 | .name = "gsbi_base", |
| 1342 | .start = MSM_GSBI1_PHYS, |
| 1343 | .end = MSM_GSBI1_PHYS + 4 - 1, |
| 1344 | .flags = IORESOURCE_MEM, |
| 1345 | }, |
| 1346 | { |
| 1347 | .name = "spi_irq_in", |
| 1348 | .start = MSM8960_GSBI1_QUP_IRQ, |
| 1349 | .end = MSM8960_GSBI1_QUP_IRQ, |
| 1350 | .flags = IORESOURCE_IRQ, |
| 1351 | }, |
Harini Jayaraman | aac8e34 | 2011-08-09 19:25:23 -0600 | [diff] [blame] | 1352 | { |
| 1353 | .name = "spi_clk", |
| 1354 | .start = 9, |
| 1355 | .end = 9, |
| 1356 | .flags = IORESOURCE_IO, |
| 1357 | }, |
| 1358 | { |
Harini Jayaraman | aac8e34 | 2011-08-09 19:25:23 -0600 | [diff] [blame] | 1359 | .name = "spi_miso", |
| 1360 | .start = 7, |
| 1361 | .end = 7, |
| 1362 | .flags = IORESOURCE_IO, |
| 1363 | }, |
| 1364 | { |
| 1365 | .name = "spi_mosi", |
| 1366 | .start = 6, |
| 1367 | .end = 6, |
| 1368 | .flags = IORESOURCE_IO, |
| 1369 | }, |
Harini Jayaraman | 8392e43 | 2011-11-29 18:26:17 -0700 | [diff] [blame] | 1370 | { |
| 1371 | .name = "spi_cs", |
| 1372 | .start = 8, |
| 1373 | .end = 8, |
| 1374 | .flags = IORESOURCE_IO, |
| 1375 | }, |
| 1376 | { |
| 1377 | .name = "spi_cs1", |
| 1378 | .start = 14, |
| 1379 | .end = 14, |
| 1380 | .flags = IORESOURCE_IO, |
| 1381 | }, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1382 | }; |
| 1383 | |
| 1384 | struct platform_device msm8960_device_qup_spi_gsbi1 = { |
| 1385 | .name = "spi_qsd", |
| 1386 | .id = 0, |
| 1387 | .num_resources = ARRAY_SIZE(resources_qup_spi_gsbi1), |
| 1388 | .resource = resources_qup_spi_gsbi1, |
| 1389 | }; |
| 1390 | |
| 1391 | struct platform_device msm_pcm = { |
| 1392 | .name = "msm-pcm-dsp", |
| 1393 | .id = -1, |
| 1394 | }; |
| 1395 | |
| 1396 | struct platform_device msm_pcm_routing = { |
| 1397 | .name = "msm-pcm-routing", |
| 1398 | .id = -1, |
| 1399 | }; |
| 1400 | |
| 1401 | struct platform_device msm_cpudai0 = { |
| 1402 | .name = "msm-dai-q6", |
| 1403 | .id = 0x4000, |
| 1404 | }; |
| 1405 | |
| 1406 | struct platform_device msm_cpudai1 = { |
| 1407 | .name = "msm-dai-q6", |
| 1408 | .id = 0x4001, |
| 1409 | }; |
| 1410 | |
| 1411 | struct platform_device msm_cpudai_hdmi_rx = { |
| 1412 | .name = "msm-dai-q6", |
| 1413 | .id = 8, |
| 1414 | }; |
| 1415 | |
| 1416 | struct platform_device msm_cpudai_bt_rx = { |
| 1417 | .name = "msm-dai-q6", |
| 1418 | .id = 0x3000, |
| 1419 | }; |
| 1420 | |
| 1421 | struct platform_device msm_cpudai_bt_tx = { |
| 1422 | .name = "msm-dai-q6", |
| 1423 | .id = 0x3001, |
| 1424 | }; |
| 1425 | |
| 1426 | struct platform_device msm_cpudai_fm_rx = { |
| 1427 | .name = "msm-dai-q6", |
| 1428 | .id = 0x3004, |
| 1429 | }; |
| 1430 | |
| 1431 | struct platform_device msm_cpudai_fm_tx = { |
| 1432 | .name = "msm-dai-q6", |
| 1433 | .id = 0x3005, |
| 1434 | }; |
| 1435 | |
Helen Zeng | 0705a5f | 2011-10-14 15:29:52 -0700 | [diff] [blame] | 1436 | struct platform_device msm_cpudai_incall_music_rx = { |
| 1437 | .name = "msm-dai-q6", |
| 1438 | .id = 0x8005, |
| 1439 | }; |
| 1440 | |
Helen Zeng | e3d716a | 2011-10-14 16:32:16 -0700 | [diff] [blame] | 1441 | struct platform_device msm_cpudai_incall_record_rx = { |
| 1442 | .name = "msm-dai-q6", |
| 1443 | .id = 0x8004, |
| 1444 | }; |
| 1445 | |
| 1446 | struct platform_device msm_cpudai_incall_record_tx = { |
| 1447 | .name = "msm-dai-q6", |
| 1448 | .id = 0x8003, |
| 1449 | }; |
| 1450 | |
Bhalchandra Gajare | 0e795c4 | 2011-08-15 18:10:30 -0700 | [diff] [blame] | 1451 | /* |
| 1452 | * Machine specific data for AUX PCM Interface |
| 1453 | * which the driver will be unware of. |
| 1454 | */ |
| 1455 | struct msm_dai_auxpcm_pdata auxpcm_rx_pdata = { |
| 1456 | .clk = "pcm_clk", |
| 1457 | .mode = AFE_PCM_CFG_MODE_PCM, |
| 1458 | .sync = AFE_PCM_CFG_SYNC_INT, |
| 1459 | .frame = AFE_PCM_CFG_FRM_256BPF, |
| 1460 | .quant = AFE_PCM_CFG_QUANT_LINEAR_NOPAD, |
| 1461 | .slot = 0, |
| 1462 | .data = AFE_PCM_CFG_CDATAOE_MASTER, |
| 1463 | .pcm_clk_rate = 2048000, |
| 1464 | }; |
| 1465 | |
| 1466 | struct platform_device msm_cpudai_auxpcm_rx = { |
| 1467 | .name = "msm-dai-q6", |
| 1468 | .id = 2, |
| 1469 | .dev = { |
| 1470 | .platform_data = &auxpcm_rx_pdata, |
| 1471 | }, |
| 1472 | }; |
| 1473 | |
| 1474 | struct platform_device msm_cpudai_auxpcm_tx = { |
| 1475 | .name = "msm-dai-q6", |
| 1476 | .id = 3, |
| 1477 | }; |
| 1478 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1479 | struct platform_device msm_cpu_fe = { |
| 1480 | .name = "msm-dai-fe", |
| 1481 | .id = -1, |
| 1482 | }; |
| 1483 | |
| 1484 | struct platform_device msm_stub_codec = { |
| 1485 | .name = "msm-stub-codec", |
| 1486 | .id = 1, |
| 1487 | }; |
| 1488 | |
| 1489 | struct platform_device msm_voice = { |
| 1490 | .name = "msm-pcm-voice", |
| 1491 | .id = -1, |
| 1492 | }; |
| 1493 | |
| 1494 | struct platform_device msm_voip = { |
| 1495 | .name = "msm-voip-dsp", |
| 1496 | .id = -1, |
| 1497 | }; |
| 1498 | |
| 1499 | struct platform_device msm_lpa_pcm = { |
| 1500 | .name = "msm-pcm-lpa", |
| 1501 | .id = -1, |
| 1502 | }; |
| 1503 | |
Asish Bhattacharya | 96bb6f4 | 2011-11-01 20:36:09 +0530 | [diff] [blame] | 1504 | struct platform_device msm_compr_dsp = { |
| 1505 | .name = "msm-compr-dsp", |
| 1506 | .id = -1, |
| 1507 | }; |
| 1508 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1509 | struct platform_device msm_pcm_hostless = { |
| 1510 | .name = "msm-pcm-hostless", |
| 1511 | .id = -1, |
| 1512 | }; |
| 1513 | |
Laxminath Kasam | cee1d60 | 2011-08-01 19:26:57 +0530 | [diff] [blame] | 1514 | struct platform_device msm_cpudai_afe_01_rx = { |
| 1515 | .name = "msm-dai-q6", |
| 1516 | .id = 0xE0, |
| 1517 | }; |
| 1518 | |
| 1519 | struct platform_device msm_cpudai_afe_01_tx = { |
| 1520 | .name = "msm-dai-q6", |
| 1521 | .id = 0xF0, |
| 1522 | }; |
| 1523 | |
| 1524 | struct platform_device msm_cpudai_afe_02_rx = { |
| 1525 | .name = "msm-dai-q6", |
| 1526 | .id = 0xF1, |
| 1527 | }; |
| 1528 | |
| 1529 | struct platform_device msm_cpudai_afe_02_tx = { |
| 1530 | .name = "msm-dai-q6", |
| 1531 | .id = 0xE1, |
| 1532 | }; |
| 1533 | |
| 1534 | struct platform_device msm_pcm_afe = { |
| 1535 | .name = "msm-pcm-afe", |
| 1536 | .id = -1, |
| 1537 | }; |
| 1538 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1539 | struct platform_device *msm_footswitch_devices[] = { |
Nagamalleswararao Ganji | fd7454a | 2011-08-09 10:56:40 -0700 | [diff] [blame] | 1540 | FS_8X60(FS_ROT, "fs_rot"), |
Shuzhen Wang | 4d28c09 | 2011-07-14 15:40:33 -0700 | [diff] [blame] | 1541 | FS_8X60(FS_IJPEG, "fs_ijpeg"), |
| 1542 | FS_8X60(FS_VFE, "fs_vfe"), |
| 1543 | FS_8X60(FS_VPE, "fs_vpe"), |
Lucille Sylvester | a610fb1 | 2011-07-22 17:22:20 -0600 | [diff] [blame] | 1544 | FS_8X60(FS_GFX3D, "fs_gfx3d"), |
| 1545 | FS_8X60(FS_GFX2D0, "fs_gfx2d0"), |
| 1546 | FS_8X60(FS_GFX2D1, "fs_gfx2d1"), |
Gopikrishnaiah Anandan | 031eb94 | 2011-07-28 13:24:00 -0700 | [diff] [blame] | 1547 | FS_8X60(FS_VED, "fs_ved"), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1548 | }; |
| 1549 | unsigned msm_num_footswitch_devices = ARRAY_SIZE(msm_footswitch_devices); |
| 1550 | |
| 1551 | #ifdef CONFIG_MSM_ROTATOR |
| 1552 | #define ROTATOR_HW_BASE 0x04E00000 |
| 1553 | static struct resource resources_msm_rotator[] = { |
| 1554 | { |
| 1555 | .start = ROTATOR_HW_BASE, |
| 1556 | .end = ROTATOR_HW_BASE + 0x100000 - 1, |
| 1557 | .flags = IORESOURCE_MEM, |
| 1558 | }, |
| 1559 | { |
| 1560 | .start = ROT_IRQ, |
| 1561 | .end = ROT_IRQ, |
| 1562 | .flags = IORESOURCE_IRQ, |
| 1563 | }, |
| 1564 | }; |
| 1565 | |
| 1566 | static struct msm_rot_clocks rotator_clocks[] = { |
| 1567 | { |
Matt Wagantall | bb90da9 | 2011-10-25 15:07:52 -0700 | [diff] [blame] | 1568 | .clk_name = "core_clk", |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1569 | .clk_type = ROTATOR_CORE_CLK, |
Nagamalleswararao Ganji | 0bb10734 | 2011-10-10 20:55:32 -0700 | [diff] [blame] | 1570 | .clk_rate = 200 * 1000 * 1000, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1571 | }, |
| 1572 | { |
Matt Wagantall | bb90da9 | 2011-10-25 15:07:52 -0700 | [diff] [blame] | 1573 | .clk_name = "iface_clk", |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1574 | .clk_type = ROTATOR_PCLK, |
| 1575 | .clk_rate = 0, |
| 1576 | }, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1577 | }; |
| 1578 | |
| 1579 | static struct msm_rotator_platform_data rotator_pdata = { |
| 1580 | .number_of_clocks = ARRAY_SIZE(rotator_clocks), |
| 1581 | .hardware_version_number = 0x01020309, |
| 1582 | .rotator_clks = rotator_clocks, |
| 1583 | .regulator_name = "fs_rot", |
Nagamalleswararao Ganji | 5fabbd6 | 2011-11-06 23:10:43 -0800 | [diff] [blame] | 1584 | #ifdef CONFIG_MSM_BUS_SCALING |
| 1585 | .bus_scale_table = &rotator_bus_scale_pdata, |
| 1586 | #endif |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1587 | }; |
| 1588 | |
| 1589 | struct platform_device msm_rotator_device = { |
| 1590 | .name = "msm_rotator", |
| 1591 | .id = 0, |
| 1592 | .num_resources = ARRAY_SIZE(resources_msm_rotator), |
| 1593 | .resource = resources_msm_rotator, |
| 1594 | .dev = { |
| 1595 | .platform_data = &rotator_pdata, |
| 1596 | }, |
| 1597 | }; |
| 1598 | #endif |
| 1599 | |
| 1600 | #define MIPI_DSI_HW_BASE 0x04700000 |
| 1601 | #define MDP_HW_BASE 0x05100000 |
| 1602 | |
| 1603 | static struct resource msm_mipi_dsi1_resources[] = { |
| 1604 | { |
| 1605 | .name = "mipi_dsi", |
| 1606 | .start = MIPI_DSI_HW_BASE, |
kuogee hsieh | f12acf5 | 2011-09-06 10:49:43 -0700 | [diff] [blame] | 1607 | .end = MIPI_DSI_HW_BASE + 0x000F0000 - 1, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1608 | .flags = IORESOURCE_MEM, |
| 1609 | }, |
| 1610 | { |
| 1611 | .start = DSI1_IRQ, |
| 1612 | .end = DSI1_IRQ, |
| 1613 | .flags = IORESOURCE_IRQ, |
| 1614 | }, |
| 1615 | }; |
| 1616 | |
| 1617 | struct platform_device msm_mipi_dsi1_device = { |
| 1618 | .name = "mipi_dsi", |
| 1619 | .id = 1, |
| 1620 | .num_resources = ARRAY_SIZE(msm_mipi_dsi1_resources), |
| 1621 | .resource = msm_mipi_dsi1_resources, |
| 1622 | }; |
| 1623 | |
| 1624 | static struct resource msm_mdp_resources[] = { |
| 1625 | { |
| 1626 | .name = "mdp", |
| 1627 | .start = MDP_HW_BASE, |
kuogee hsieh | f12acf5 | 2011-09-06 10:49:43 -0700 | [diff] [blame] | 1628 | .end = MDP_HW_BASE + 0x000F0000 - 1, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1629 | .flags = IORESOURCE_MEM, |
| 1630 | }, |
| 1631 | { |
| 1632 | .start = MDP_IRQ, |
| 1633 | .end = MDP_IRQ, |
| 1634 | .flags = IORESOURCE_IRQ, |
| 1635 | }, |
| 1636 | }; |
| 1637 | |
| 1638 | static struct platform_device msm_mdp_device = { |
| 1639 | .name = "mdp", |
| 1640 | .id = 0, |
| 1641 | .num_resources = ARRAY_SIZE(msm_mdp_resources), |
| 1642 | .resource = msm_mdp_resources, |
| 1643 | }; |
| 1644 | |
| 1645 | static void __init msm_register_device(struct platform_device *pdev, void *data) |
| 1646 | { |
| 1647 | int ret; |
| 1648 | |
| 1649 | pdev->dev.platform_data = data; |
| 1650 | ret = platform_device_register(pdev); |
| 1651 | if (ret) |
| 1652 | dev_err(&pdev->dev, |
| 1653 | "%s: platform_device_register() failed = %d\n", |
| 1654 | __func__, ret); |
| 1655 | } |
| 1656 | |
Ravishangar Kalyanam | 882930f | 2011-07-08 17:51:52 -0700 | [diff] [blame] | 1657 | #ifdef CONFIG_MSM_BUS_SCALING |
| 1658 | static struct platform_device msm_dtv_device = { |
| 1659 | .name = "dtv", |
| 1660 | .id = 0, |
| 1661 | }; |
| 1662 | #endif |
| 1663 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1664 | void __init msm_fb_register_device(char *name, void *data) |
| 1665 | { |
| 1666 | if (!strncmp(name, "mdp", 3)) |
| 1667 | msm_register_device(&msm_mdp_device, data); |
| 1668 | else if (!strncmp(name, "mipi_dsi", 8)) |
| 1669 | msm_register_device(&msm_mipi_dsi1_device, data); |
Ravishangar Kalyanam | 882930f | 2011-07-08 17:51:52 -0700 | [diff] [blame] | 1670 | #ifdef CONFIG_MSM_BUS_SCALING |
| 1671 | else if (!strncmp(name, "dtv", 3)) |
| 1672 | msm_register_device(&msm_dtv_device, data); |
| 1673 | #endif |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1674 | else |
| 1675 | printk(KERN_ERR "%s: unknown device! %s\n", __func__, name); |
| 1676 | } |
| 1677 | |
| 1678 | static struct resource resources_sps[] = { |
| 1679 | { |
| 1680 | .name = "pipe_mem", |
| 1681 | .start = 0x12800000, |
| 1682 | .end = 0x12800000 + 0x4000 - 1, |
| 1683 | .flags = IORESOURCE_MEM, |
| 1684 | }, |
| 1685 | { |
| 1686 | .name = "bamdma_dma", |
| 1687 | .start = 0x12240000, |
| 1688 | .end = 0x12240000 + 0x1000 - 1, |
| 1689 | .flags = IORESOURCE_MEM, |
| 1690 | }, |
| 1691 | { |
| 1692 | .name = "bamdma_bam", |
| 1693 | .start = 0x12244000, |
| 1694 | .end = 0x12244000 + 0x4000 - 1, |
| 1695 | .flags = IORESOURCE_MEM, |
| 1696 | }, |
| 1697 | { |
| 1698 | .name = "bamdma_irq", |
| 1699 | .start = SPS_BAM_DMA_IRQ, |
| 1700 | .end = SPS_BAM_DMA_IRQ, |
| 1701 | .flags = IORESOURCE_IRQ, |
| 1702 | }, |
| 1703 | }; |
| 1704 | |
| 1705 | struct msm_sps_platform_data msm_sps_pdata = { |
| 1706 | .bamdma_restricted_pipes = 0x06, |
| 1707 | }; |
| 1708 | |
| 1709 | struct platform_device msm_device_sps = { |
| 1710 | .name = "msm_sps", |
| 1711 | .id = -1, |
| 1712 | .num_resources = ARRAY_SIZE(resources_sps), |
| 1713 | .resource = resources_sps, |
| 1714 | .dev.platform_data = &msm_sps_pdata, |
| 1715 | }; |
| 1716 | |
| 1717 | #ifdef CONFIG_MSM_MPM |
Praveen Chidambaram | 7849901 | 2011-11-01 17:15:17 -0600 | [diff] [blame^] | 1718 | static uint16_t msm_mpm_irqs_m2a[MSM_MPM_NR_MPM_IRQS] __initdata = { |
Praveen Chidambaram | b3d857c | 2011-05-31 16:28:07 -0600 | [diff] [blame] | 1719 | [1] = MSM_GPIO_TO_INT(46), |
| 1720 | [2] = MSM_GPIO_TO_INT(150), |
| 1721 | [4] = MSM_GPIO_TO_INT(103), |
| 1722 | [5] = MSM_GPIO_TO_INT(104), |
| 1723 | [6] = MSM_GPIO_TO_INT(105), |
| 1724 | [7] = MSM_GPIO_TO_INT(106), |
| 1725 | [8] = MSM_GPIO_TO_INT(107), |
| 1726 | [9] = MSM_GPIO_TO_INT(7), |
| 1727 | [10] = MSM_GPIO_TO_INT(11), |
| 1728 | [11] = MSM_GPIO_TO_INT(15), |
| 1729 | [12] = MSM_GPIO_TO_INT(19), |
| 1730 | [13] = MSM_GPIO_TO_INT(23), |
| 1731 | [14] = MSM_GPIO_TO_INT(27), |
| 1732 | [15] = MSM_GPIO_TO_INT(31), |
| 1733 | [16] = MSM_GPIO_TO_INT(35), |
| 1734 | [19] = MSM_GPIO_TO_INT(90), |
| 1735 | [20] = MSM_GPIO_TO_INT(92), |
| 1736 | [23] = MSM_GPIO_TO_INT(85), |
| 1737 | [24] = MSM_GPIO_TO_INT(83), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1738 | [25] = USB1_HS_IRQ, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1739 | [27] = HDMI_IRQ, |
Praveen Chidambaram | b3d857c | 2011-05-31 16:28:07 -0600 | [diff] [blame] | 1740 | [29] = MSM_GPIO_TO_INT(10), |
| 1741 | [30] = MSM_GPIO_TO_INT(102), |
| 1742 | [31] = MSM_GPIO_TO_INT(81), |
| 1743 | [32] = MSM_GPIO_TO_INT(78), |
| 1744 | [33] = MSM_GPIO_TO_INT(94), |
| 1745 | [34] = MSM_GPIO_TO_INT(72), |
| 1746 | [35] = MSM_GPIO_TO_INT(39), |
| 1747 | [36] = MSM_GPIO_TO_INT(43), |
| 1748 | [37] = MSM_GPIO_TO_INT(61), |
| 1749 | [38] = MSM_GPIO_TO_INT(50), |
| 1750 | [39] = MSM_GPIO_TO_INT(42), |
| 1751 | [41] = MSM_GPIO_TO_INT(62), |
| 1752 | [42] = MSM_GPIO_TO_INT(76), |
| 1753 | [43] = MSM_GPIO_TO_INT(75), |
| 1754 | [44] = MSM_GPIO_TO_INT(70), |
| 1755 | [45] = MSM_GPIO_TO_INT(69), |
| 1756 | [46] = MSM_GPIO_TO_INT(67), |
| 1757 | [47] = MSM_GPIO_TO_INT(65), |
| 1758 | [48] = MSM_GPIO_TO_INT(58), |
| 1759 | [49] = MSM_GPIO_TO_INT(54), |
| 1760 | [50] = MSM_GPIO_TO_INT(52), |
| 1761 | [51] = MSM_GPIO_TO_INT(49), |
| 1762 | [52] = MSM_GPIO_TO_INT(40), |
| 1763 | [53] = MSM_GPIO_TO_INT(37), |
| 1764 | [54] = MSM_GPIO_TO_INT(24), |
| 1765 | [55] = MSM_GPIO_TO_INT(14), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1766 | }; |
| 1767 | |
Praveen Chidambaram | 7849901 | 2011-11-01 17:15:17 -0600 | [diff] [blame^] | 1768 | static uint16_t msm_mpm_bypassed_apps_irqs[] __initdata = { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1769 | TLMM_MSM_SUMMARY_IRQ, |
| 1770 | RPM_APCC_CPU0_GP_HIGH_IRQ, |
| 1771 | RPM_APCC_CPU0_GP_MEDIUM_IRQ, |
| 1772 | RPM_APCC_CPU0_GP_LOW_IRQ, |
| 1773 | RPM_APCC_CPU0_WAKE_UP_IRQ, |
| 1774 | RPM_APCC_CPU1_GP_HIGH_IRQ, |
| 1775 | RPM_APCC_CPU1_GP_MEDIUM_IRQ, |
| 1776 | RPM_APCC_CPU1_GP_LOW_IRQ, |
| 1777 | RPM_APCC_CPU1_WAKE_UP_IRQ, |
| 1778 | MSS_TO_APPS_IRQ_0, |
| 1779 | MSS_TO_APPS_IRQ_1, |
| 1780 | MSS_TO_APPS_IRQ_2, |
| 1781 | MSS_TO_APPS_IRQ_3, |
| 1782 | MSS_TO_APPS_IRQ_4, |
| 1783 | MSS_TO_APPS_IRQ_5, |
| 1784 | MSS_TO_APPS_IRQ_6, |
| 1785 | MSS_TO_APPS_IRQ_7, |
| 1786 | MSS_TO_APPS_IRQ_8, |
| 1787 | MSS_TO_APPS_IRQ_9, |
| 1788 | LPASS_SCSS_GP_LOW_IRQ, |
| 1789 | LPASS_SCSS_GP_MEDIUM_IRQ, |
| 1790 | LPASS_SCSS_GP_HIGH_IRQ, |
David Collins | 5e2b2fd | 2011-09-08 15:23:30 -0700 | [diff] [blame] | 1791 | SPS_MTI_30, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1792 | SPS_MTI_31, |
David Collins | 5e2b2fd | 2011-09-08 15:23:30 -0700 | [diff] [blame] | 1793 | RIVA_APSS_SPARE_IRQ, |
David Collins | 84ecd0a | 2011-09-27 21:11:11 -0700 | [diff] [blame] | 1794 | RIVA_APPS_WLAN_SMSM_IRQ, |
| 1795 | RIVA_APPS_WLAN_RX_DATA_AVAIL_IRQ, |
| 1796 | RIVA_APPS_WLAN_DATA_XFER_DONE_IRQ, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1797 | }; |
| 1798 | |
Praveen Chidambaram | 7849901 | 2011-11-01 17:15:17 -0600 | [diff] [blame^] | 1799 | struct msm_mpm_device_data msm8960_mpm_dev_data __initdata = { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1800 | .irqs_m2a = msm_mpm_irqs_m2a, |
| 1801 | .irqs_m2a_size = ARRAY_SIZE(msm_mpm_irqs_m2a), |
| 1802 | .bypassed_apps_irqs = msm_mpm_bypassed_apps_irqs, |
| 1803 | .bypassed_apps_irqs_size = ARRAY_SIZE(msm_mpm_bypassed_apps_irqs), |
| 1804 | .mpm_request_reg_base = MSM_RPM_BASE + 0x9d8, |
| 1805 | .mpm_status_reg_base = MSM_RPM_BASE + 0xdf8, |
| 1806 | .mpm_apps_ipc_reg = MSM_APCS_GCC_BASE + 0x008, |
| 1807 | .mpm_apps_ipc_val = BIT(1), |
| 1808 | .mpm_ipc_irq = RPM_APCC_CPU0_GP_MEDIUM_IRQ, |
| 1809 | |
| 1810 | }; |
| 1811 | #endif |
| 1812 | |
Stephen Boyd | bb600ae | 2011-08-02 20:11:40 -0700 | [diff] [blame] | 1813 | static struct clk_lookup msm_clocks_8960_dummy[] = { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1814 | CLK_DUMMY("pll2", PLL2, NULL, 0), |
| 1815 | CLK_DUMMY("pll8", PLL8, NULL, 0), |
| 1816 | CLK_DUMMY("pll4", PLL4, NULL, 0), |
| 1817 | |
| 1818 | CLK_DUMMY("afab_clk", AFAB_CLK, NULL, 0), |
| 1819 | CLK_DUMMY("afab_a_clk", AFAB_A_CLK, NULL, 0), |
| 1820 | CLK_DUMMY("cfpb_clk", CFPB_CLK, NULL, 0), |
| 1821 | CLK_DUMMY("cfpb_a_clk", CFPB_A_CLK, NULL, 0), |
| 1822 | CLK_DUMMY("dfab_clk", DFAB_CLK, NULL, 0), |
| 1823 | CLK_DUMMY("dfab_a_clk", DFAB_A_CLK, NULL, 0), |
| 1824 | CLK_DUMMY("ebi1_clk", EBI1_CLK, NULL, 0), |
| 1825 | CLK_DUMMY("ebi1_a_clk", EBI1_A_CLK, NULL, 0), |
| 1826 | CLK_DUMMY("mmfab_clk", MMFAB_CLK, NULL, 0), |
| 1827 | CLK_DUMMY("mmfab_a_clk", MMFAB_A_CLK, NULL, 0), |
| 1828 | CLK_DUMMY("mmfpb_clk", MMFPB_CLK, NULL, 0), |
| 1829 | CLK_DUMMY("mmfpb_a_clk", MMFPB_A_CLK, NULL, 0), |
| 1830 | CLK_DUMMY("sfab_clk", SFAB_CLK, NULL, 0), |
| 1831 | CLK_DUMMY("sfab_a_clk", SFAB_A_CLK, NULL, 0), |
| 1832 | CLK_DUMMY("sfpb_clk", SFPB_CLK, NULL, 0), |
| 1833 | CLK_DUMMY("sfpb_a_clk", SFPB_A_CLK, NULL, 0), |
| 1834 | |
Matt Wagantall | e252237 | 2011-08-17 14:52:21 -0700 | [diff] [blame] | 1835 | CLK_DUMMY("core_clk", GSBI1_UART_CLK, NULL, OFF), |
| 1836 | CLK_DUMMY("core_clk", GSBI2_UART_CLK, "msm_serial_hsl.0", OFF), |
| 1837 | CLK_DUMMY("core_clk", GSBI3_UART_CLK, NULL, OFF), |
| 1838 | CLK_DUMMY("core_clk", GSBI4_UART_CLK, NULL, OFF), |
| 1839 | CLK_DUMMY("core_clk", GSBI5_UART_CLK, NULL, OFF), |
| 1840 | CLK_DUMMY("core_clk", GSBI6_UART_CLK, NULL, OFF), |
| 1841 | CLK_DUMMY("core_clk", GSBI7_UART_CLK, NULL, OFF), |
| 1842 | CLK_DUMMY("core_clk", GSBI8_UART_CLK, NULL, OFF), |
| 1843 | CLK_DUMMY("core_clk", GSBI9_UART_CLK, NULL, OFF), |
| 1844 | CLK_DUMMY("core_clk", GSBI10_UART_CLK, NULL, OFF), |
| 1845 | CLK_DUMMY("core_clk", GSBI11_UART_CLK, NULL, OFF), |
| 1846 | CLK_DUMMY("core_clk", GSBI12_UART_CLK, NULL, OFF), |
Matt Wagantall | 62cf63e | 2011-08-17 16:34:47 -0700 | [diff] [blame] | 1847 | CLK_DUMMY("core_clk", GSBI1_QUP_CLK, "spi_qsd.0", OFF), |
| 1848 | CLK_DUMMY("core_clk", GSBI2_QUP_CLK, NULL, OFF), |
| 1849 | CLK_DUMMY("core_clk", GSBI3_QUP_CLK, NULL, OFF), |
| 1850 | CLK_DUMMY("core_clk", GSBI4_QUP_CLK, "qup_i2c.4", OFF), |
| 1851 | CLK_DUMMY("core_clk", GSBI5_QUP_CLK, NULL, OFF), |
| 1852 | CLK_DUMMY("core_clk", GSBI6_QUP_CLK, NULL, OFF), |
| 1853 | CLK_DUMMY("core_clk", GSBI7_QUP_CLK, NULL, OFF), |
| 1854 | CLK_DUMMY("core_clk", GSBI8_QUP_CLK, NULL, OFF), |
| 1855 | CLK_DUMMY("core_clk", GSBI9_QUP_CLK, NULL, OFF), |
| 1856 | CLK_DUMMY("core_clk", GSBI10_QUP_CLK, NULL, OFF), |
| 1857 | CLK_DUMMY("core_clk", GSBI11_QUP_CLK, NULL, OFF), |
| 1858 | CLK_DUMMY("core_clk", GSBI12_QUP_CLK, NULL, OFF), |
Matt Wagantall | b86ad26 | 2011-10-24 19:50:29 -0700 | [diff] [blame] | 1859 | CLK_DUMMY("core_clk", PDM_CLK, NULL, OFF), |
Matt Wagantall | d86d683 | 2011-08-17 14:06:55 -0700 | [diff] [blame] | 1860 | CLK_DUMMY("mem_clk", PMEM_CLK, NULL, OFF), |
Matt Wagantall | c120529 | 2011-08-11 17:19:31 -0700 | [diff] [blame] | 1861 | CLK_DUMMY("core_clk", PRNG_CLK, NULL, OFF), |
Matt Wagantall | 37ce384 | 2011-08-17 16:00:36 -0700 | [diff] [blame] | 1862 | CLK_DUMMY("core_clk", SDC1_CLK, NULL, OFF), |
| 1863 | CLK_DUMMY("core_clk", SDC2_CLK, NULL, OFF), |
| 1864 | CLK_DUMMY("core_clk", SDC3_CLK, NULL, OFF), |
| 1865 | CLK_DUMMY("core_clk", SDC4_CLK, NULL, OFF), |
| 1866 | CLK_DUMMY("core_clk", SDC5_CLK, NULL, OFF), |
Matt Wagantall | 640e5fd | 2011-08-17 16:08:53 -0700 | [diff] [blame] | 1867 | CLK_DUMMY("core_clk", TSIF_REF_CLK, NULL, OFF), |
Matt Wagantall | b86ad26 | 2011-10-24 19:50:29 -0700 | [diff] [blame] | 1868 | CLK_DUMMY("core_clk", TSSC_CLK, NULL, OFF), |
Manu Gautam | 5143b25 | 2012-01-05 19:25:23 -0800 | [diff] [blame] | 1869 | CLK_DUMMY("alt_core_clk", USB_HS1_XCVR_CLK, NULL, OFF), |
| 1870 | CLK_DUMMY("phy_clk", USB_PHY0_CLK, NULL, OFF), |
| 1871 | CLK_DUMMY("src_clk", USB_FS1_SRC_CLK, NULL, OFF), |
| 1872 | CLK_DUMMY("alt_core_clk", USB_FS1_XCVR_CLK, NULL, OFF), |
| 1873 | CLK_DUMMY("sys_clk", USB_FS1_SYS_CLK, NULL, OFF), |
| 1874 | CLK_DUMMY("src_clk", USB_FS2_SRC_CLK, NULL, OFF), |
| 1875 | CLK_DUMMY("alt_core_clk", USB_FS2_XCVR_CLK, NULL, OFF), |
| 1876 | CLK_DUMMY("sys_clk", USB_FS2_SYS_CLK, NULL, OFF), |
Matt Wagantall | c4b3a4d | 2011-08-17 16:58:39 -0700 | [diff] [blame] | 1877 | CLK_DUMMY("iface_clk", CE2_CLK, "qce.0", OFF), |
| 1878 | CLK_DUMMY("core_clk", CE1_CORE_CLK, "qce.0", OFF), |
Matt Wagantall | 62cf63e | 2011-08-17 16:34:47 -0700 | [diff] [blame] | 1879 | CLK_DUMMY("iface_clk", GSBI1_P_CLK, "spi_qsd.0", OFF), |
| 1880 | CLK_DUMMY("iface_clk", GSBI2_P_CLK, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1881 | "msm_serial_hsl.0", OFF), |
Matt Wagantall | 62cf63e | 2011-08-17 16:34:47 -0700 | [diff] [blame] | 1882 | CLK_DUMMY("iface_clk", GSBI3_P_CLK, NULL, OFF), |
Matt Wagantall | ac29485 | 2011-08-17 15:44:58 -0700 | [diff] [blame] | 1883 | CLK_DUMMY("iface_clk", GSBI4_P_CLK, "qup_i2c.4", OFF), |
Matt Wagantall | 62cf63e | 2011-08-17 16:34:47 -0700 | [diff] [blame] | 1884 | CLK_DUMMY("iface_clk", GSBI5_P_CLK, NULL, OFF), |
Matt Wagantall | e252237 | 2011-08-17 14:52:21 -0700 | [diff] [blame] | 1885 | CLK_DUMMY("iface_clk", GSBI6_P_CLK, NULL, OFF), |
Matt Wagantall | 62cf63e | 2011-08-17 16:34:47 -0700 | [diff] [blame] | 1886 | CLK_DUMMY("iface_clk", GSBI7_P_CLK, NULL, OFF), |
| 1887 | CLK_DUMMY("iface_clk", GSBI8_P_CLK, NULL, OFF), |
| 1888 | CLK_DUMMY("iface_clk", GSBI9_P_CLK, NULL, OFF), |
| 1889 | CLK_DUMMY("iface_clk", GSBI10_P_CLK, NULL, OFF), |
| 1890 | CLK_DUMMY("iface_clk", GSBI11_P_CLK, NULL, OFF), |
| 1891 | CLK_DUMMY("iface_clk", GSBI12_P_CLK, NULL, OFF), |
| 1892 | CLK_DUMMY("iface_clk", GSBI12_P_CLK, NULL, OFF), |
Matt Wagantall | 640e5fd | 2011-08-17 16:08:53 -0700 | [diff] [blame] | 1893 | CLK_DUMMY("iface_clk", TSIF_P_CLK, NULL, OFF), |
Manu Gautam | 5143b25 | 2012-01-05 19:25:23 -0800 | [diff] [blame] | 1894 | CLK_DUMMY("iface_clk", USB_FS1_P_CLK, NULL, OFF), |
| 1895 | CLK_DUMMY("iface_clk", USB_FS2_P_CLK, NULL, OFF), |
| 1896 | CLK_DUMMY("iface_clk", USB_HS1_P_CLK, NULL, OFF), |
Matt Wagantall | 37ce384 | 2011-08-17 16:00:36 -0700 | [diff] [blame] | 1897 | CLK_DUMMY("iface_clk", SDC1_P_CLK, NULL, OFF), |
| 1898 | CLK_DUMMY("iface_clk", SDC2_P_CLK, NULL, OFF), |
| 1899 | CLK_DUMMY("iface_clk", SDC3_P_CLK, NULL, OFF), |
| 1900 | CLK_DUMMY("iface_clk", SDC4_P_CLK, NULL, OFF), |
| 1901 | CLK_DUMMY("iface_clk", SDC5_P_CLK, NULL, OFF), |
Matt Wagantall | e1a8606 | 2011-08-18 17:46:10 -0700 | [diff] [blame] | 1902 | CLK_DUMMY("core_clk", ADM0_CLK, NULL, OFF), |
| 1903 | CLK_DUMMY("iface_clk", ADM0_P_CLK, NULL, OFF), |
Matt Wagantall | b86ad26 | 2011-10-24 19:50:29 -0700 | [diff] [blame] | 1904 | CLK_DUMMY("iface_clk", PMIC_ARB0_P_CLK, NULL, OFF), |
| 1905 | CLK_DUMMY("iface_clk", PMIC_ARB1_P_CLK, NULL, OFF), |
| 1906 | CLK_DUMMY("core_clk", PMIC_SSBI2_CLK, NULL, OFF), |
| 1907 | CLK_DUMMY("mem_clk", RPM_MSG_RAM_P_CLK, NULL, OFF), |
| 1908 | CLK_DUMMY("core_clk", AMP_CLK, NULL, OFF), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1909 | CLK_DUMMY("cam_clk", CAM0_CLK, NULL, OFF), |
| 1910 | CLK_DUMMY("cam_clk", CAM1_CLK, NULL, OFF), |
| 1911 | CLK_DUMMY("csi_src_clk", CSI0_SRC_CLK, NULL, OFF), |
| 1912 | CLK_DUMMY("csi_src_clk", CSI1_SRC_CLK, NULL, OFF), |
| 1913 | CLK_DUMMY("csi_clk", CSI0_CLK, NULL, OFF), |
| 1914 | CLK_DUMMY("csi_clk", CSI1_CLK, NULL, OFF), |
| 1915 | CLK_DUMMY("csi_pix_clk", CSI_PIX_CLK, NULL, OFF), |
| 1916 | CLK_DUMMY("csi_rdi_clk", CSI_RDI_CLK, NULL, OFF), |
| 1917 | CLK_DUMMY("csiphy_timer_src_clk", CSIPHY_TIMER_SRC_CLK, NULL, OFF), |
| 1918 | CLK_DUMMY("csi0phy_timer_clk", CSIPHY0_TIMER_CLK, NULL, OFF), |
| 1919 | CLK_DUMMY("csi1phy_timer_clk", CSIPHY1_TIMER_CLK, NULL, OFF), |
| 1920 | CLK_DUMMY("dsi_byte_div_clk", DSI1_BYTE_CLK, "mipi_dsi.1", OFF), |
| 1921 | CLK_DUMMY("dsi_byte_div_clk", DSI2_BYTE_CLK, "mipi_dsi.2", OFF), |
| 1922 | CLK_DUMMY("dsi_esc_clk", DSI1_ESC_CLK, "mipi_dsi.1", OFF), |
| 1923 | CLK_DUMMY("dsi_esc_clk", DSI2_ESC_CLK, "mipi_dsi.2", OFF), |
Matt Wagantall | 9dc0163 | 2011-08-17 18:55:04 -0700 | [diff] [blame] | 1924 | CLK_DUMMY("core_clk", GFX2D0_CLK, NULL, OFF), |
| 1925 | CLK_DUMMY("core_clk", GFX2D1_CLK, NULL, OFF), |
| 1926 | CLK_DUMMY("core_clk", GFX3D_CLK, NULL, OFF), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1927 | CLK_DUMMY("ijpeg_clk", IJPEG_CLK, NULL, OFF), |
Matt Wagantall | 9dc0163 | 2011-08-17 18:55:04 -0700 | [diff] [blame] | 1928 | CLK_DUMMY("mem_clk", IMEM_CLK, NULL, OFF), |
Matt Wagantall | b86ad26 | 2011-10-24 19:50:29 -0700 | [diff] [blame] | 1929 | CLK_DUMMY("core_clk", JPEGD_CLK, NULL, OFF), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1930 | CLK_DUMMY("mdp_clk", MDP_CLK, NULL, OFF), |
| 1931 | CLK_DUMMY("mdp_vsync_clk", MDP_VSYNC_CLK, NULL, OFF), |
| 1932 | CLK_DUMMY("lut_mdp", LUT_MDP_CLK, NULL, OFF), |
Matt Wagantall | bb90da9 | 2011-10-25 15:07:52 -0700 | [diff] [blame] | 1933 | CLK_DUMMY("core_clk", ROT_CLK, NULL, OFF), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1934 | CLK_DUMMY("tv_src_clk", TV_SRC_CLK, NULL, OFF), |
| 1935 | CLK_DUMMY("tv_enc_clk", TV_ENC_CLK, NULL, OFF), |
| 1936 | CLK_DUMMY("tv_dac_clk", TV_DAC_CLK, NULL, OFF), |
Matt Wagantall | b86ad26 | 2011-10-24 19:50:29 -0700 | [diff] [blame] | 1937 | CLK_DUMMY("core_clk", VCODEC_CLK, NULL, OFF), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1938 | CLK_DUMMY("mdp_tv_clk", MDP_TV_CLK, NULL, OFF), |
| 1939 | CLK_DUMMY("hdmi_clk", HDMI_TV_CLK, NULL, OFF), |
| 1940 | CLK_DUMMY("hdmi_app_clk", HDMI_APP_CLK, NULL, OFF), |
| 1941 | CLK_DUMMY("vpe_clk", VPE_CLK, NULL, OFF), |
| 1942 | CLK_DUMMY("vfe_clk", VFE_CLK, NULL, OFF), |
| 1943 | CLK_DUMMY("csi_vfe_clk", CSI0_VFE_CLK, NULL, OFF), |
| 1944 | CLK_DUMMY("vfe_axi_clk", VFE_AXI_CLK, NULL, OFF), |
| 1945 | CLK_DUMMY("ijpeg_axi_clk", IJPEG_AXI_CLK, NULL, OFF), |
| 1946 | CLK_DUMMY("mdp_axi_clk", MDP_AXI_CLK, NULL, OFF), |
Matt Wagantall | bb90da9 | 2011-10-25 15:07:52 -0700 | [diff] [blame] | 1947 | CLK_DUMMY("bus_clk", ROT_AXI_CLK, NULL, OFF), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1948 | CLK_DUMMY("vcodec_axi_clk", VCODEC_AXI_CLK, NULL, OFF), |
| 1949 | CLK_DUMMY("vcodec_axi_a_clk", VCODEC_AXI_A_CLK, NULL, OFF), |
| 1950 | CLK_DUMMY("vcodec_axi_b_clk", VCODEC_AXI_B_CLK, NULL, OFF), |
| 1951 | CLK_DUMMY("vpe_axi_clk", VPE_AXI_CLK, NULL, OFF), |
| 1952 | CLK_DUMMY("amp_pclk", AMP_P_CLK, NULL, OFF), |
| 1953 | CLK_DUMMY("csi_pclk", CSI0_P_CLK, NULL, OFF), |
| 1954 | CLK_DUMMY("dsi_m_pclk", DSI1_M_P_CLK, "mipi_dsi.1", OFF), |
| 1955 | CLK_DUMMY("dsi_s_pclk", DSI1_S_P_CLK, "mipi_dsi.1", OFF), |
| 1956 | CLK_DUMMY("dsi_m_pclk", DSI2_M_P_CLK, "mipi_dsi.2", OFF), |
| 1957 | CLK_DUMMY("dsi_s_pclk", DSI2_S_P_CLK, "mipi_dsi.2", OFF), |
Matt Wagantall | 9dc0163 | 2011-08-17 18:55:04 -0700 | [diff] [blame] | 1958 | CLK_DUMMY("iface_clk", GFX2D0_P_CLK, NULL, OFF), |
| 1959 | CLK_DUMMY("iface_clk", GFX2D1_P_CLK, NULL, OFF), |
| 1960 | CLK_DUMMY("iface_clk", GFX3D_P_CLK, NULL, OFF), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1961 | CLK_DUMMY("hdmi_m_pclk", HDMI_M_P_CLK, NULL, OFF), |
| 1962 | CLK_DUMMY("hdmi_s_pclk", HDMI_S_P_CLK, NULL, OFF), |
| 1963 | CLK_DUMMY("ijpeg_pclk", IJPEG_P_CLK, NULL, OFF), |
| 1964 | CLK_DUMMY("jpegd_pclk", JPEGD_P_CLK, NULL, OFF), |
Matt Wagantall | 9dc0163 | 2011-08-17 18:55:04 -0700 | [diff] [blame] | 1965 | CLK_DUMMY("mem_iface_clk", IMEM_P_CLK, NULL, OFF), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1966 | CLK_DUMMY("mdp_pclk", MDP_P_CLK, NULL, OFF), |
Matt Wagantall | e604d71 | 2011-10-21 15:38:18 -0700 | [diff] [blame] | 1967 | CLK_DUMMY("iface_clk", SMMU_P_CLK, NULL, OFF), |
Matt Wagantall | bb90da9 | 2011-10-25 15:07:52 -0700 | [diff] [blame] | 1968 | CLK_DUMMY("iface_clk", ROT_P_CLK, NULL, OFF), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1969 | CLK_DUMMY("tv_enc_pclk", TV_ENC_P_CLK, NULL, OFF), |
| 1970 | CLK_DUMMY("vcodec_pclk", VCODEC_P_CLK, NULL, OFF), |
| 1971 | CLK_DUMMY("vfe_pclk", VFE_P_CLK, NULL, OFF), |
| 1972 | CLK_DUMMY("vpe_pclk", VPE_P_CLK, NULL, OFF), |
| 1973 | CLK_DUMMY("mi2s_osr_clk", MI2S_OSR_CLK, NULL, OFF), |
| 1974 | CLK_DUMMY("mi2s_bit_clk", MI2S_BIT_CLK, NULL, OFF), |
| 1975 | CLK_DUMMY("i2s_mic_osr_clk", CODEC_I2S_MIC_OSR_CLK, NULL, OFF), |
| 1976 | CLK_DUMMY("i2s_mic_bit_clk", CODEC_I2S_MIC_BIT_CLK, NULL, OFF), |
| 1977 | CLK_DUMMY("i2s_mic_osr_clk", SPARE_I2S_MIC_OSR_CLK, NULL, OFF), |
| 1978 | CLK_DUMMY("i2s_mic_bit_clk", SPARE_I2S_MIC_BIT_CLK, NULL, OFF), |
| 1979 | CLK_DUMMY("i2s_spkr_osr_clk", CODEC_I2S_SPKR_OSR_CLK, NULL, OFF), |
| 1980 | CLK_DUMMY("i2s_spkr_bit_clk", CODEC_I2S_SPKR_BIT_CLK, NULL, OFF), |
| 1981 | CLK_DUMMY("i2s_spkr_osr_clk", SPARE_I2S_SPKR_OSR_CLK, NULL, OFF), |
| 1982 | CLK_DUMMY("i2s_spkr_bit_clk", SPARE_I2S_SPKR_BIT_CLK, NULL, OFF), |
| 1983 | CLK_DUMMY("pcm_clk", PCM_CLK, NULL, OFF), |
Matt Wagantall | e604d71 | 2011-10-21 15:38:18 -0700 | [diff] [blame] | 1984 | CLK_DUMMY("core_clk", JPEGD_AXI_CLK, NULL, 0), |
| 1985 | CLK_DUMMY("core_clk", VFE_AXI_CLK, NULL, 0), |
| 1986 | CLK_DUMMY("core_clk", VCODEC_AXI_CLK, NULL, 0), |
| 1987 | CLK_DUMMY("core_clk", GFX3D_CLK, NULL, 0), |
| 1988 | CLK_DUMMY("core_clk", GFX2D0_CLK, NULL, 0), |
| 1989 | CLK_DUMMY("core_clk", GFX2D1_CLK, NULL, 0), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1990 | |
| 1991 | CLK_DUMMY("dfab_dsps_clk", DFAB_DSPS_CLK, NULL, 0), |
Manu Gautam | 5143b25 | 2012-01-05 19:25:23 -0800 | [diff] [blame] | 1992 | CLK_DUMMY("core_clk", DFAB_USB_HS_CLK, "msm_otg", NULL), |
Matt Wagantall | 37ce384 | 2011-08-17 16:00:36 -0700 | [diff] [blame] | 1993 | CLK_DUMMY("bus_clk", DFAB_SDC1_CLK, "msm_sdcc.1", 0), |
| 1994 | CLK_DUMMY("bus_clk", DFAB_SDC2_CLK, "msm_sdcc.2", 0), |
| 1995 | CLK_DUMMY("bus_clk", DFAB_SDC3_CLK, "msm_sdcc.3", 0), |
| 1996 | CLK_DUMMY("bus_clk", DFAB_SDC4_CLK, "msm_sdcc.4", 0), |
| 1997 | CLK_DUMMY("bus_clk", DFAB_SDC5_CLK, "msm_sdcc.5", 0), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1998 | CLK_DUMMY("dfab_clk", DFAB_CLK, NULL, 0), |
| 1999 | CLK_DUMMY("dma_bam_pclk", DMA_BAM_P_CLK, NULL, 0), |
| 2000 | }; |
| 2001 | |
Stephen Boyd | bb600ae | 2011-08-02 20:11:40 -0700 | [diff] [blame] | 2002 | struct clock_init_data msm8960_dummy_clock_init_data __initdata = { |
| 2003 | .table = msm_clocks_8960_dummy, |
| 2004 | .size = ARRAY_SIZE(msm_clocks_8960_dummy), |
| 2005 | }; |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2006 | |
| 2007 | #define LPASS_SLIMBUS_PHYS 0x28080000 |
| 2008 | #define LPASS_SLIMBUS_BAM_PHYS 0x28084000 |
Sagar Dharia | cc96945 | 2011-09-19 10:34:30 -0600 | [diff] [blame] | 2009 | #define LPASS_SLIMBUS_SLEW (MSM8960_TLMM_PHYS + 0x207C) |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2010 | /* Board info for the slimbus slave device */ |
| 2011 | static struct resource slimbus_res[] = { |
| 2012 | { |
| 2013 | .start = LPASS_SLIMBUS_PHYS, |
| 2014 | .end = LPASS_SLIMBUS_PHYS + 8191, |
| 2015 | .flags = IORESOURCE_MEM, |
| 2016 | .name = "slimbus_physical", |
| 2017 | }, |
| 2018 | { |
| 2019 | .start = LPASS_SLIMBUS_BAM_PHYS, |
| 2020 | .end = LPASS_SLIMBUS_BAM_PHYS + 8191, |
| 2021 | .flags = IORESOURCE_MEM, |
| 2022 | .name = "slimbus_bam_physical", |
| 2023 | }, |
| 2024 | { |
Sagar Dharia | cc96945 | 2011-09-19 10:34:30 -0600 | [diff] [blame] | 2025 | .start = LPASS_SLIMBUS_SLEW, |
| 2026 | .end = LPASS_SLIMBUS_SLEW + 4 - 1, |
| 2027 | .flags = IORESOURCE_MEM, |
| 2028 | .name = "slimbus_slew_reg", |
| 2029 | }, |
| 2030 | { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2031 | .start = SLIMBUS0_CORE_EE1_IRQ, |
| 2032 | .end = SLIMBUS0_CORE_EE1_IRQ, |
| 2033 | .flags = IORESOURCE_IRQ, |
| 2034 | .name = "slimbus_irq", |
| 2035 | }, |
| 2036 | { |
| 2037 | .start = SLIMBUS0_BAM_EE1_IRQ, |
| 2038 | .end = SLIMBUS0_BAM_EE1_IRQ, |
| 2039 | .flags = IORESOURCE_IRQ, |
| 2040 | .name = "slimbus_bam_irq", |
| 2041 | }, |
| 2042 | }; |
| 2043 | |
| 2044 | struct platform_device msm_slim_ctrl = { |
| 2045 | .name = "msm_slim_ctrl", |
| 2046 | .id = 1, |
| 2047 | .num_resources = ARRAY_SIZE(slimbus_res), |
| 2048 | .resource = slimbus_res, |
| 2049 | .dev = { |
| 2050 | .coherent_dma_mask = 0xffffffffULL, |
| 2051 | }, |
| 2052 | }; |
| 2053 | |
| 2054 | #ifdef CONFIG_MSM_BUS_SCALING |
| 2055 | static struct msm_bus_vectors grp3d_init_vectors[] = { |
| 2056 | { |
| 2057 | .src = MSM_BUS_MASTER_GRAPHICS_3D, |
| 2058 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 2059 | .ab = 0, |
| 2060 | .ib = 0, |
| 2061 | }, |
| 2062 | }; |
| 2063 | |
Lucille Sylvester | 34ec369 | 2011-08-16 16:28:04 -0600 | [diff] [blame] | 2064 | static struct msm_bus_vectors grp3d_low_vectors[] = { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2065 | { |
| 2066 | .src = MSM_BUS_MASTER_GRAPHICS_3D, |
| 2067 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 2068 | .ab = 0, |
Lucille Sylvester | 3efebb5 | 2012-01-17 12:58:38 -0700 | [diff] [blame] | 2069 | .ib = KGSL_CONVERT_TO_MBPS(1000), |
Lucille Sylvester | 34ec369 | 2011-08-16 16:28:04 -0600 | [diff] [blame] | 2070 | }, |
| 2071 | }; |
| 2072 | |
| 2073 | static struct msm_bus_vectors grp3d_nominal_low_vectors[] = { |
| 2074 | { |
| 2075 | .src = MSM_BUS_MASTER_GRAPHICS_3D, |
| 2076 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 2077 | .ab = 0, |
Suman Tatiraju | 0123d18 | 2011-09-30 14:59:06 -0700 | [diff] [blame] | 2078 | .ib = KGSL_CONVERT_TO_MBPS(2048), |
Lucille Sylvester | 34ec369 | 2011-08-16 16:28:04 -0600 | [diff] [blame] | 2079 | }, |
| 2080 | }; |
| 2081 | |
| 2082 | static struct msm_bus_vectors grp3d_nominal_high_vectors[] = { |
| 2083 | { |
| 2084 | .src = MSM_BUS_MASTER_GRAPHICS_3D, |
| 2085 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 2086 | .ab = 0, |
Suman Tatiraju | 0123d18 | 2011-09-30 14:59:06 -0700 | [diff] [blame] | 2087 | .ib = KGSL_CONVERT_TO_MBPS(2656), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2088 | }, |
| 2089 | }; |
| 2090 | |
| 2091 | static struct msm_bus_vectors grp3d_max_vectors[] = { |
| 2092 | { |
| 2093 | .src = MSM_BUS_MASTER_GRAPHICS_3D, |
| 2094 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 2095 | .ab = 0, |
Suman Tatiraju | 0123d18 | 2011-09-30 14:59:06 -0700 | [diff] [blame] | 2096 | .ib = KGSL_CONVERT_TO_MBPS(3968), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2097 | }, |
| 2098 | }; |
| 2099 | |
| 2100 | static struct msm_bus_paths grp3d_bus_scale_usecases[] = { |
| 2101 | { |
| 2102 | ARRAY_SIZE(grp3d_init_vectors), |
| 2103 | grp3d_init_vectors, |
| 2104 | }, |
| 2105 | { |
Lucille Sylvester | 34ec369 | 2011-08-16 16:28:04 -0600 | [diff] [blame] | 2106 | ARRAY_SIZE(grp3d_low_vectors), |
| 2107 | grp3d_low_vectors, |
| 2108 | }, |
| 2109 | { |
| 2110 | ARRAY_SIZE(grp3d_nominal_low_vectors), |
| 2111 | grp3d_nominal_low_vectors, |
| 2112 | }, |
| 2113 | { |
| 2114 | ARRAY_SIZE(grp3d_nominal_high_vectors), |
| 2115 | grp3d_nominal_high_vectors, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2116 | }, |
| 2117 | { |
| 2118 | ARRAY_SIZE(grp3d_max_vectors), |
| 2119 | grp3d_max_vectors, |
| 2120 | }, |
| 2121 | }; |
| 2122 | |
| 2123 | static struct msm_bus_scale_pdata grp3d_bus_scale_pdata = { |
| 2124 | grp3d_bus_scale_usecases, |
| 2125 | ARRAY_SIZE(grp3d_bus_scale_usecases), |
| 2126 | .name = "grp3d", |
| 2127 | }; |
| 2128 | |
| 2129 | static struct msm_bus_vectors grp2d0_init_vectors[] = { |
| 2130 | { |
| 2131 | .src = MSM_BUS_MASTER_GRAPHICS_2D_CORE0, |
| 2132 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 2133 | .ab = 0, |
| 2134 | .ib = 0, |
| 2135 | }, |
| 2136 | }; |
| 2137 | |
Lucille Sylvester | 808eca2 | 2011-11-03 10:26:29 -0700 | [diff] [blame] | 2138 | static struct msm_bus_vectors grp2d0_nominal_vectors[] = { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2139 | { |
| 2140 | .src = MSM_BUS_MASTER_GRAPHICS_2D_CORE0, |
| 2141 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 2142 | .ab = 0, |
Lucille Sylvester | 3efebb5 | 2012-01-17 12:58:38 -0700 | [diff] [blame] | 2143 | .ib = KGSL_CONVERT_TO_MBPS(1000), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2144 | }, |
| 2145 | }; |
| 2146 | |
Lucille Sylvester | 808eca2 | 2011-11-03 10:26:29 -0700 | [diff] [blame] | 2147 | static struct msm_bus_vectors grp2d0_max_vectors[] = { |
| 2148 | { |
| 2149 | .src = MSM_BUS_MASTER_GRAPHICS_2D_CORE0, |
| 2150 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 2151 | .ab = 0, |
| 2152 | .ib = KGSL_CONVERT_TO_MBPS(2048), |
| 2153 | }, |
| 2154 | }; |
| 2155 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2156 | static struct msm_bus_paths grp2d0_bus_scale_usecases[] = { |
| 2157 | { |
| 2158 | ARRAY_SIZE(grp2d0_init_vectors), |
| 2159 | grp2d0_init_vectors, |
| 2160 | }, |
| 2161 | { |
Lucille Sylvester | 808eca2 | 2011-11-03 10:26:29 -0700 | [diff] [blame] | 2162 | ARRAY_SIZE(grp2d0_nominal_vectors), |
| 2163 | grp2d0_nominal_vectors, |
| 2164 | }, |
| 2165 | { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2166 | ARRAY_SIZE(grp2d0_max_vectors), |
| 2167 | grp2d0_max_vectors, |
| 2168 | }, |
| 2169 | }; |
| 2170 | |
| 2171 | struct msm_bus_scale_pdata grp2d0_bus_scale_pdata = { |
| 2172 | grp2d0_bus_scale_usecases, |
| 2173 | ARRAY_SIZE(grp2d0_bus_scale_usecases), |
| 2174 | .name = "grp2d0", |
| 2175 | }; |
| 2176 | |
| 2177 | static struct msm_bus_vectors grp2d1_init_vectors[] = { |
| 2178 | { |
| 2179 | .src = MSM_BUS_MASTER_GRAPHICS_2D_CORE1, |
| 2180 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 2181 | .ab = 0, |
| 2182 | .ib = 0, |
| 2183 | }, |
| 2184 | }; |
| 2185 | |
Lucille Sylvester | 808eca2 | 2011-11-03 10:26:29 -0700 | [diff] [blame] | 2186 | static struct msm_bus_vectors grp2d1_nominal_vectors[] = { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2187 | { |
| 2188 | .src = MSM_BUS_MASTER_GRAPHICS_2D_CORE1, |
| 2189 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 2190 | .ab = 0, |
Lucille Sylvester | 3efebb5 | 2012-01-17 12:58:38 -0700 | [diff] [blame] | 2191 | .ib = KGSL_CONVERT_TO_MBPS(1000), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2192 | }, |
| 2193 | }; |
| 2194 | |
Lucille Sylvester | 808eca2 | 2011-11-03 10:26:29 -0700 | [diff] [blame] | 2195 | static struct msm_bus_vectors grp2d1_max_vectors[] = { |
| 2196 | { |
| 2197 | .src = MSM_BUS_MASTER_GRAPHICS_2D_CORE1, |
| 2198 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 2199 | .ab = 0, |
| 2200 | .ib = KGSL_CONVERT_TO_MBPS(2048), |
| 2201 | }, |
| 2202 | }; |
| 2203 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2204 | static struct msm_bus_paths grp2d1_bus_scale_usecases[] = { |
| 2205 | { |
| 2206 | ARRAY_SIZE(grp2d1_init_vectors), |
| 2207 | grp2d1_init_vectors, |
| 2208 | }, |
| 2209 | { |
Lucille Sylvester | 808eca2 | 2011-11-03 10:26:29 -0700 | [diff] [blame] | 2210 | ARRAY_SIZE(grp2d1_nominal_vectors), |
| 2211 | grp2d1_nominal_vectors, |
| 2212 | }, |
| 2213 | { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2214 | ARRAY_SIZE(grp2d1_max_vectors), |
| 2215 | grp2d1_max_vectors, |
| 2216 | }, |
| 2217 | }; |
| 2218 | |
| 2219 | struct msm_bus_scale_pdata grp2d1_bus_scale_pdata = { |
| 2220 | grp2d1_bus_scale_usecases, |
| 2221 | ARRAY_SIZE(grp2d1_bus_scale_usecases), |
| 2222 | .name = "grp2d1", |
| 2223 | }; |
| 2224 | #endif |
| 2225 | |
| 2226 | static struct resource kgsl_3d0_resources[] = { |
| 2227 | { |
| 2228 | .name = KGSL_3D0_REG_MEMORY, |
| 2229 | .start = 0x04300000, /* GFX3D address */ |
| 2230 | .end = 0x0431ffff, |
| 2231 | .flags = IORESOURCE_MEM, |
| 2232 | }, |
| 2233 | { |
| 2234 | .name = KGSL_3D0_IRQ, |
| 2235 | .start = GFX3D_IRQ, |
| 2236 | .end = GFX3D_IRQ, |
| 2237 | .flags = IORESOURCE_IRQ, |
| 2238 | }, |
| 2239 | }; |
| 2240 | |
| 2241 | static struct kgsl_device_platform_data kgsl_3d0_pdata = { |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 2242 | .pwrlevel = { |
| 2243 | { |
| 2244 | .gpu_freq = 400000000, |
| 2245 | .bus_freq = 4, |
| 2246 | .io_fraction = 0, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2247 | }, |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 2248 | { |
| 2249 | .gpu_freq = 300000000, |
| 2250 | .bus_freq = 3, |
| 2251 | .io_fraction = 33, |
| 2252 | }, |
| 2253 | { |
| 2254 | .gpu_freq = 200000000, |
| 2255 | .bus_freq = 2, |
| 2256 | .io_fraction = 100, |
| 2257 | }, |
| 2258 | { |
| 2259 | .gpu_freq = 128000000, |
| 2260 | .bus_freq = 1, |
| 2261 | .io_fraction = 100, |
| 2262 | }, |
| 2263 | { |
| 2264 | .gpu_freq = 27000000, |
| 2265 | .bus_freq = 0, |
| 2266 | }, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2267 | }, |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 2268 | .init_level = 0, |
| 2269 | .num_levels = 5, |
| 2270 | .set_grp_async = NULL, |
Lucille Sylvester | 93650bb | 2011-11-02 14:37:10 -0700 | [diff] [blame] | 2271 | .idle_timeout = HZ/20, |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 2272 | .nap_allowed = true, |
| 2273 | .clk_map = KGSL_CLK_CORE | KGSL_CLK_IFACE | KGSL_CLK_MEM_IFACE, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2274 | #ifdef CONFIG_MSM_BUS_SCALING |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 2275 | .bus_scale_table = &grp3d_bus_scale_pdata, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2276 | #endif |
Shubhraprakash Das | 767fdda | 2011-08-15 15:49:45 -0600 | [diff] [blame] | 2277 | .iommu_user_ctx_name = "gfx3d_user", |
| 2278 | .iommu_priv_ctx_name = NULL, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2279 | }; |
| 2280 | |
| 2281 | struct platform_device msm_kgsl_3d0 = { |
| 2282 | .name = "kgsl-3d0", |
| 2283 | .id = 0, |
| 2284 | .num_resources = ARRAY_SIZE(kgsl_3d0_resources), |
| 2285 | .resource = kgsl_3d0_resources, |
| 2286 | .dev = { |
| 2287 | .platform_data = &kgsl_3d0_pdata, |
| 2288 | }, |
| 2289 | }; |
| 2290 | |
| 2291 | static struct resource kgsl_2d0_resources[] = { |
| 2292 | { |
| 2293 | .name = KGSL_2D0_REG_MEMORY, |
| 2294 | .start = 0x04100000, /* Z180 base address */ |
| 2295 | .end = 0x04100FFF, |
| 2296 | .flags = IORESOURCE_MEM, |
| 2297 | }, |
| 2298 | { |
| 2299 | .name = KGSL_2D0_IRQ, |
| 2300 | .start = GFX2D0_IRQ, |
| 2301 | .end = GFX2D0_IRQ, |
| 2302 | .flags = IORESOURCE_IRQ, |
| 2303 | }, |
| 2304 | }; |
| 2305 | |
| 2306 | static struct kgsl_device_platform_data kgsl_2d0_pdata = { |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 2307 | .pwrlevel = { |
| 2308 | { |
| 2309 | .gpu_freq = 200000000, |
Lucille Sylvester | 808eca2 | 2011-11-03 10:26:29 -0700 | [diff] [blame] | 2310 | .bus_freq = 2, |
| 2311 | }, |
| 2312 | { |
| 2313 | .gpu_freq = 96000000, |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 2314 | .bus_freq = 1, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2315 | }, |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 2316 | { |
Lucille Sylvester | 808eca2 | 2011-11-03 10:26:29 -0700 | [diff] [blame] | 2317 | .gpu_freq = 27000000, |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 2318 | .bus_freq = 0, |
| 2319 | }, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2320 | }, |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 2321 | .init_level = 0, |
Lucille Sylvester | 808eca2 | 2011-11-03 10:26:29 -0700 | [diff] [blame] | 2322 | .num_levels = 3, |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 2323 | .set_grp_async = NULL, |
Lucille Sylvester | 808eca2 | 2011-11-03 10:26:29 -0700 | [diff] [blame] | 2324 | .idle_timeout = HZ/5, |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 2325 | .nap_allowed = true, |
| 2326 | .clk_map = KGSL_CLK_CORE | KGSL_CLK_IFACE, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2327 | #ifdef CONFIG_MSM_BUS_SCALING |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 2328 | .bus_scale_table = &grp2d0_bus_scale_pdata, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2329 | #endif |
Shubhraprakash Das | 767fdda | 2011-08-15 15:49:45 -0600 | [diff] [blame] | 2330 | .iommu_user_ctx_name = "gfx2d0_2d0", |
| 2331 | .iommu_priv_ctx_name = NULL, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2332 | }; |
| 2333 | |
| 2334 | struct platform_device msm_kgsl_2d0 = { |
| 2335 | .name = "kgsl-2d0", |
| 2336 | .id = 0, |
| 2337 | .num_resources = ARRAY_SIZE(kgsl_2d0_resources), |
| 2338 | .resource = kgsl_2d0_resources, |
| 2339 | .dev = { |
| 2340 | .platform_data = &kgsl_2d0_pdata, |
| 2341 | }, |
| 2342 | }; |
| 2343 | |
| 2344 | static struct resource kgsl_2d1_resources[] = { |
| 2345 | { |
| 2346 | .name = KGSL_2D1_REG_MEMORY, |
| 2347 | .start = 0x04200000, /* Z180 device 1 base address */ |
| 2348 | .end = 0x04200FFF, |
| 2349 | .flags = IORESOURCE_MEM, |
| 2350 | }, |
| 2351 | { |
| 2352 | .name = KGSL_2D1_IRQ, |
| 2353 | .start = GFX2D1_IRQ, |
| 2354 | .end = GFX2D1_IRQ, |
| 2355 | .flags = IORESOURCE_IRQ, |
| 2356 | }, |
| 2357 | }; |
| 2358 | |
| 2359 | static struct kgsl_device_platform_data kgsl_2d1_pdata = { |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 2360 | .pwrlevel = { |
| 2361 | { |
| 2362 | .gpu_freq = 200000000, |
Lucille Sylvester | 808eca2 | 2011-11-03 10:26:29 -0700 | [diff] [blame] | 2363 | .bus_freq = 2, |
| 2364 | }, |
| 2365 | { |
| 2366 | .gpu_freq = 96000000, |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 2367 | .bus_freq = 1, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2368 | }, |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 2369 | { |
Lucille Sylvester | 808eca2 | 2011-11-03 10:26:29 -0700 | [diff] [blame] | 2370 | .gpu_freq = 27000000, |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 2371 | .bus_freq = 0, |
| 2372 | }, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2373 | }, |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 2374 | .init_level = 0, |
Lucille Sylvester | 808eca2 | 2011-11-03 10:26:29 -0700 | [diff] [blame] | 2375 | .num_levels = 3, |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 2376 | .set_grp_async = NULL, |
Lucille Sylvester | 808eca2 | 2011-11-03 10:26:29 -0700 | [diff] [blame] | 2377 | .idle_timeout = HZ/5, |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 2378 | .nap_allowed = true, |
| 2379 | .clk_map = KGSL_CLK_CORE | KGSL_CLK_IFACE, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2380 | #ifdef CONFIG_MSM_BUS_SCALING |
Lucille Sylvester | dce84cd | 2011-10-12 14:15:37 -0600 | [diff] [blame] | 2381 | .bus_scale_table = &grp2d1_bus_scale_pdata, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2382 | #endif |
Shubhraprakash Das | 767fdda | 2011-08-15 15:49:45 -0600 | [diff] [blame] | 2383 | .iommu_user_ctx_name = "gfx2d1_2d1", |
| 2384 | .iommu_priv_ctx_name = NULL, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2385 | }; |
| 2386 | |
| 2387 | struct platform_device msm_kgsl_2d1 = { |
| 2388 | .name = "kgsl-2d1", |
| 2389 | .id = 1, |
| 2390 | .num_resources = ARRAY_SIZE(kgsl_2d1_resources), |
| 2391 | .resource = kgsl_2d1_resources, |
| 2392 | .dev = { |
| 2393 | .platform_data = &kgsl_2d1_pdata, |
| 2394 | }, |
| 2395 | }; |
| 2396 | |
| 2397 | #ifdef CONFIG_MSM_GEMINI |
| 2398 | static struct resource msm_gemini_resources[] = { |
| 2399 | { |
| 2400 | .start = 0x04600000, |
| 2401 | .end = 0x04600000 + SZ_1M - 1, |
| 2402 | .flags = IORESOURCE_MEM, |
| 2403 | }, |
| 2404 | { |
| 2405 | .start = JPEG_IRQ, |
| 2406 | .end = JPEG_IRQ, |
| 2407 | .flags = IORESOURCE_IRQ, |
| 2408 | }, |
| 2409 | }; |
| 2410 | |
| 2411 | struct platform_device msm8960_gemini_device = { |
| 2412 | .name = "msm_gemini", |
| 2413 | .resource = msm_gemini_resources, |
| 2414 | .num_resources = ARRAY_SIZE(msm_gemini_resources), |
| 2415 | }; |
| 2416 | #endif |
| 2417 | |
Praveen Chidambaram | 7849901 | 2011-11-01 17:15:17 -0600 | [diff] [blame^] | 2418 | struct msm_rpm_platform_data msm8960_rpm_data __initdata = { |
| 2419 | .reg_base_addrs = { |
| 2420 | [MSM_RPM_PAGE_STATUS] = MSM_RPM_BASE, |
| 2421 | [MSM_RPM_PAGE_CTRL] = MSM_RPM_BASE + 0x400, |
| 2422 | [MSM_RPM_PAGE_REQ] = MSM_RPM_BASE + 0x600, |
| 2423 | [MSM_RPM_PAGE_ACK] = MSM_RPM_BASE + 0xa00, |
| 2424 | }, |
| 2425 | .irq_ack = RPM_APCC_CPU0_GP_HIGH_IRQ, |
| 2426 | .ipc_rpm_reg = MSM_APCS_GCC_BASE + 0x008, |
| 2427 | .ipc_rpm_val = 4, |
| 2428 | .target_id = { |
| 2429 | MSM_RPM_MAP(8960, NOTIFICATION_CONFIGURED_0, NOTIFICATION, 4), |
| 2430 | MSM_RPM_MAP(8960, NOTIFICATION_REGISTERED_0, NOTIFICATION, 4), |
| 2431 | MSM_RPM_MAP(8960, INVALIDATE_0, INVALIDATE, 8), |
| 2432 | MSM_RPM_MAP(8960, TRIGGER_TIMED_TO, TRIGGER_TIMED, 1), |
| 2433 | MSM_RPM_MAP(8960, TRIGGER_TIMED_SCLK_COUNT, TRIGGER_TIMED, 1), |
| 2434 | MSM_RPM_MAP(8960, RPM_CTL, RPM_CTL, 1), |
| 2435 | MSM_RPM_MAP(8960, CXO_CLK, CXO_CLK, 1), |
| 2436 | MSM_RPM_MAP(8960, PXO_CLK, PXO_CLK, 1), |
| 2437 | MSM_RPM_MAP(8960, APPS_FABRIC_CLK, APPS_FABRIC_CLK, 1), |
| 2438 | MSM_RPM_MAP(8960, SYSTEM_FABRIC_CLK, SYSTEM_FABRIC_CLK, 1), |
| 2439 | MSM_RPM_MAP(8960, MM_FABRIC_CLK, MM_FABRIC_CLK, 1), |
| 2440 | MSM_RPM_MAP(8960, DAYTONA_FABRIC_CLK, DAYTONA_FABRIC_CLK, 1), |
| 2441 | MSM_RPM_MAP(8960, SFPB_CLK, SFPB_CLK, 1), |
| 2442 | MSM_RPM_MAP(8960, CFPB_CLK, CFPB_CLK, 1), |
| 2443 | MSM_RPM_MAP(8960, MMFPB_CLK, MMFPB_CLK, 1), |
| 2444 | MSM_RPM_MAP(8960, EBI1_CLK, EBI1_CLK, 1), |
| 2445 | MSM_RPM_MAP(8960, APPS_FABRIC_CFG_HALT_0, |
| 2446 | APPS_FABRIC_CFG_HALT, 2), |
| 2447 | MSM_RPM_MAP(8960, APPS_FABRIC_CFG_CLKMOD_0, |
| 2448 | APPS_FABRIC_CFG_CLKMOD, 3), |
| 2449 | MSM_RPM_MAP(8960, APPS_FABRIC_CFG_IOCTL, |
| 2450 | APPS_FABRIC_CFG_IOCTL, 1), |
| 2451 | MSM_RPM_MAP(8960, APPS_FABRIC_ARB_0, APPS_FABRIC_ARB, 12), |
| 2452 | MSM_RPM_MAP(8960, SYS_FABRIC_CFG_HALT_0, |
| 2453 | SYS_FABRIC_CFG_HALT, 2), |
| 2454 | MSM_RPM_MAP(8960, SYS_FABRIC_CFG_CLKMOD_0, |
| 2455 | SYS_FABRIC_CFG_CLKMOD, 3), |
| 2456 | MSM_RPM_MAP(8960, SYS_FABRIC_CFG_IOCTL, |
| 2457 | SYS_FABRIC_CFG_IOCTL, 1), |
| 2458 | MSM_RPM_MAP(8960, SYSTEM_FABRIC_ARB_0, |
| 2459 | SYSTEM_FABRIC_ARB, 29), |
| 2460 | MSM_RPM_MAP(8960, MMSS_FABRIC_CFG_HALT_0, |
| 2461 | MMSS_FABRIC_CFG_HALT, 2), |
| 2462 | MSM_RPM_MAP(8960, MMSS_FABRIC_CFG_CLKMOD_0, |
| 2463 | MMSS_FABRIC_CFG_CLKMOD, 3), |
| 2464 | MSM_RPM_MAP(8960, MMSS_FABRIC_CFG_IOCTL, |
| 2465 | MMSS_FABRIC_CFG_IOCTL, 1), |
| 2466 | MSM_RPM_MAP(8960, MM_FABRIC_ARB_0, MM_FABRIC_ARB, 23), |
| 2467 | MSM_RPM_MAP(8960, PM8921_S1_0, PM8921_S1, 2), |
| 2468 | MSM_RPM_MAP(8960, PM8921_S2_0, PM8921_S2, 2), |
| 2469 | MSM_RPM_MAP(8960, PM8921_S3_0, PM8921_S3, 2), |
| 2470 | MSM_RPM_MAP(8960, PM8921_S4_0, PM8921_S4, 2), |
| 2471 | MSM_RPM_MAP(8960, PM8921_S5_0, PM8921_S5, 2), |
| 2472 | MSM_RPM_MAP(8960, PM8921_S6_0, PM8921_S6, 2), |
| 2473 | MSM_RPM_MAP(8960, PM8921_S7_0, PM8921_S7, 2), |
| 2474 | MSM_RPM_MAP(8960, PM8921_S8_0, PM8921_S8, 2), |
| 2475 | MSM_RPM_MAP(8960, PM8921_L1_0, PM8921_L1, 2), |
| 2476 | MSM_RPM_MAP(8960, PM8921_L2_0, PM8921_L2, 2), |
| 2477 | MSM_RPM_MAP(8960, PM8921_L3_0, PM8921_L3, 2), |
| 2478 | MSM_RPM_MAP(8960, PM8921_L4_0, PM8921_L4, 2), |
| 2479 | MSM_RPM_MAP(8960, PM8921_L5_0, PM8921_L5, 2), |
| 2480 | MSM_RPM_MAP(8960, PM8921_L6_0, PM8921_L6, 2), |
| 2481 | MSM_RPM_MAP(8960, PM8921_L7_0, PM8921_L7, 2), |
| 2482 | MSM_RPM_MAP(8960, PM8921_L8_0, PM8921_L8, 2), |
| 2483 | MSM_RPM_MAP(8960, PM8921_L9_0, PM8921_L9, 2), |
| 2484 | MSM_RPM_MAP(8960, PM8921_L10_0, PM8921_L10, 2), |
| 2485 | MSM_RPM_MAP(8960, PM8921_L11_0, PM8921_L11, 2), |
| 2486 | MSM_RPM_MAP(8960, PM8921_L12_0, PM8921_L12, 2), |
| 2487 | MSM_RPM_MAP(8960, PM8921_L13_0, PM8921_L13, 2), |
| 2488 | MSM_RPM_MAP(8960, PM8921_L14_0, PM8921_L14, 2), |
| 2489 | MSM_RPM_MAP(8960, PM8921_L15_0, PM8921_L15, 2), |
| 2490 | MSM_RPM_MAP(8960, PM8921_L16_0, PM8921_L16, 2), |
| 2491 | MSM_RPM_MAP(8960, PM8921_L17_0, PM8921_L17, 2), |
| 2492 | MSM_RPM_MAP(8960, PM8921_L18_0, PM8921_L18, 2), |
| 2493 | MSM_RPM_MAP(8960, PM8921_L19_0, PM8921_L19, 2), |
| 2494 | MSM_RPM_MAP(8960, PM8921_L20_0, PM8921_L20, 2), |
| 2495 | MSM_RPM_MAP(8960, PM8921_L21_0, PM8921_L21, 2), |
| 2496 | MSM_RPM_MAP(8960, PM8921_L22_0, PM8921_L22, 2), |
| 2497 | MSM_RPM_MAP(8960, PM8921_L23_0, PM8921_L23, 2), |
| 2498 | MSM_RPM_MAP(8960, PM8921_L24_0, PM8921_L24, 2), |
| 2499 | MSM_RPM_MAP(8960, PM8921_L25_0, PM8921_L25, 2), |
| 2500 | MSM_RPM_MAP(8960, PM8921_L26_0, PM8921_L26, 2), |
| 2501 | MSM_RPM_MAP(8960, PM8921_L27_0, PM8921_L27, 2), |
| 2502 | MSM_RPM_MAP(8960, PM8921_L28_0, PM8921_L28, 2), |
| 2503 | MSM_RPM_MAP(8960, PM8921_L29_0, PM8921_L29, 2), |
| 2504 | MSM_RPM_MAP(8960, PM8921_CLK1_0, PM8921_CLK1, 2), |
| 2505 | MSM_RPM_MAP(8960, PM8921_CLK2_0, PM8921_CLK2, 2), |
| 2506 | MSM_RPM_MAP(8960, PM8921_LVS1, PM8921_LVS1, 1), |
| 2507 | MSM_RPM_MAP(8960, PM8921_LVS2, PM8921_LVS2, 1), |
| 2508 | MSM_RPM_MAP(8960, PM8921_LVS3, PM8921_LVS3, 1), |
| 2509 | MSM_RPM_MAP(8960, PM8921_LVS4, PM8921_LVS4, 1), |
| 2510 | MSM_RPM_MAP(8960, PM8921_LVS5, PM8921_LVS5, 1), |
| 2511 | MSM_RPM_MAP(8960, PM8921_LVS6, PM8921_LVS6, 1), |
| 2512 | MSM_RPM_MAP(8960, PM8921_LVS7, PM8921_LVS7, 1), |
| 2513 | MSM_RPM_MAP(8960, NCP_0, NCP, 2), |
| 2514 | MSM_RPM_MAP(8960, CXO_BUFFERS, CXO_BUFFERS, 1), |
| 2515 | MSM_RPM_MAP(8960, USB_OTG_SWITCH, USB_OTG_SWITCH, 1), |
| 2516 | MSM_RPM_MAP(8960, HDMI_SWITCH, HDMI_SWITCH, 1), |
| 2517 | MSM_RPM_MAP(8960, DDR_DMM_0, DDR_DMM, 2), |
| 2518 | MSM_RPM_MAP(8960, QDSS_CLK, QDSS_CLK, 1), |
| 2519 | }, |
| 2520 | .target_status = { |
| 2521 | MSM_RPM_STATUS_ID_MAP(8960, VERSION_MAJOR), |
| 2522 | MSM_RPM_STATUS_ID_MAP(8960, VERSION_MINOR), |
| 2523 | MSM_RPM_STATUS_ID_MAP(8960, VERSION_BUILD), |
| 2524 | MSM_RPM_STATUS_ID_MAP(8960, SUPPORTED_RESOURCES_0), |
| 2525 | MSM_RPM_STATUS_ID_MAP(8960, SUPPORTED_RESOURCES_1), |
| 2526 | MSM_RPM_STATUS_ID_MAP(8960, SUPPORTED_RESOURCES_2), |
| 2527 | MSM_RPM_STATUS_ID_MAP(8960, RESERVED_SUPPORTED_RESOURCES_0), |
| 2528 | MSM_RPM_STATUS_ID_MAP(8960, SEQUENCE), |
| 2529 | MSM_RPM_STATUS_ID_MAP(8960, RPM_CTL), |
| 2530 | MSM_RPM_STATUS_ID_MAP(8960, CXO_CLK), |
| 2531 | MSM_RPM_STATUS_ID_MAP(8960, PXO_CLK), |
| 2532 | MSM_RPM_STATUS_ID_MAP(8960, APPS_FABRIC_CLK), |
| 2533 | MSM_RPM_STATUS_ID_MAP(8960, SYSTEM_FABRIC_CLK), |
| 2534 | MSM_RPM_STATUS_ID_MAP(8960, MM_FABRIC_CLK), |
| 2535 | MSM_RPM_STATUS_ID_MAP(8960, DAYTONA_FABRIC_CLK), |
| 2536 | MSM_RPM_STATUS_ID_MAP(8960, SFPB_CLK), |
| 2537 | MSM_RPM_STATUS_ID_MAP(8960, CFPB_CLK), |
| 2538 | MSM_RPM_STATUS_ID_MAP(8960, MMFPB_CLK), |
| 2539 | MSM_RPM_STATUS_ID_MAP(8960, EBI1_CLK), |
| 2540 | MSM_RPM_STATUS_ID_MAP(8960, APPS_FABRIC_CFG_HALT), |
| 2541 | MSM_RPM_STATUS_ID_MAP(8960, APPS_FABRIC_CFG_CLKMOD), |
| 2542 | MSM_RPM_STATUS_ID_MAP(8960, APPS_FABRIC_CFG_IOCTL), |
| 2543 | MSM_RPM_STATUS_ID_MAP(8960, APPS_FABRIC_ARB), |
| 2544 | MSM_RPM_STATUS_ID_MAP(8960, SYS_FABRIC_CFG_HALT), |
| 2545 | MSM_RPM_STATUS_ID_MAP(8960, SYS_FABRIC_CFG_CLKMOD), |
| 2546 | MSM_RPM_STATUS_ID_MAP(8960, SYS_FABRIC_CFG_IOCTL), |
| 2547 | MSM_RPM_STATUS_ID_MAP(8960, SYSTEM_FABRIC_ARB), |
| 2548 | MSM_RPM_STATUS_ID_MAP(8960, MMSS_FABRIC_CFG_HALT), |
| 2549 | MSM_RPM_STATUS_ID_MAP(8960, MMSS_FABRIC_CFG_CLKMOD), |
| 2550 | MSM_RPM_STATUS_ID_MAP(8960, MMSS_FABRIC_CFG_IOCTL), |
| 2551 | MSM_RPM_STATUS_ID_MAP(8960, MM_FABRIC_ARB), |
| 2552 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_S1_0), |
| 2553 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_S1_1), |
| 2554 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_S2_0), |
| 2555 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_S2_1), |
| 2556 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_S3_0), |
| 2557 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_S3_1), |
| 2558 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_S4_0), |
| 2559 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_S4_1), |
| 2560 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_S5_0), |
| 2561 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_S5_1), |
| 2562 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_S6_0), |
| 2563 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_S6_1), |
| 2564 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_S7_0), |
| 2565 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_S7_1), |
| 2566 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_S8_0), |
| 2567 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_S8_1), |
| 2568 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L1_0), |
| 2569 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L1_1), |
| 2570 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L2_0), |
| 2571 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L2_1), |
| 2572 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L3_0), |
| 2573 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L3_1), |
| 2574 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L4_0), |
| 2575 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L4_1), |
| 2576 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L5_0), |
| 2577 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L5_1), |
| 2578 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L6_0), |
| 2579 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L6_1), |
| 2580 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L7_0), |
| 2581 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L7_1), |
| 2582 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L8_0), |
| 2583 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L8_1), |
| 2584 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L9_0), |
| 2585 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L9_1), |
| 2586 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L10_0), |
| 2587 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L10_1), |
| 2588 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L11_0), |
| 2589 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L11_1), |
| 2590 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L12_0), |
| 2591 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L12_1), |
| 2592 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L13_0), |
| 2593 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L13_1), |
| 2594 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L14_0), |
| 2595 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L14_1), |
| 2596 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L15_0), |
| 2597 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L15_1), |
| 2598 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L16_0), |
| 2599 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L16_1), |
| 2600 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L17_0), |
| 2601 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L17_1), |
| 2602 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L18_0), |
| 2603 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L18_1), |
| 2604 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L19_0), |
| 2605 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L19_1), |
| 2606 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L20_0), |
| 2607 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L20_1), |
| 2608 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L21_0), |
| 2609 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L21_1), |
| 2610 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L22_0), |
| 2611 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L22_1), |
| 2612 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L23_0), |
| 2613 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L23_1), |
| 2614 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L24_0), |
| 2615 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L24_1), |
| 2616 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L25_0), |
| 2617 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L25_1), |
| 2618 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L26_0), |
| 2619 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L26_1), |
| 2620 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L27_0), |
| 2621 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L27_1), |
| 2622 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L28_0), |
| 2623 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L28_1), |
| 2624 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L29_0), |
| 2625 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_L29_1), |
| 2626 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_CLK1_0), |
| 2627 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_CLK1_1), |
| 2628 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_CLK2_0), |
| 2629 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_CLK2_1), |
| 2630 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_LVS1), |
| 2631 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_LVS2), |
| 2632 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_LVS3), |
| 2633 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_LVS4), |
| 2634 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_LVS5), |
| 2635 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_LVS6), |
| 2636 | MSM_RPM_STATUS_ID_MAP(8960, PM8921_LVS7), |
| 2637 | MSM_RPM_STATUS_ID_MAP(8960, NCP_0), |
| 2638 | MSM_RPM_STATUS_ID_MAP(8960, NCP_1), |
| 2639 | MSM_RPM_STATUS_ID_MAP(8960, CXO_BUFFERS), |
| 2640 | MSM_RPM_STATUS_ID_MAP(8960, USB_OTG_SWITCH), |
| 2641 | MSM_RPM_STATUS_ID_MAP(8960, HDMI_SWITCH), |
| 2642 | MSM_RPM_STATUS_ID_MAP(8960, DDR_DMM_0), |
| 2643 | MSM_RPM_STATUS_ID_MAP(8960, DDR_DMM_1), |
| 2644 | MSM_RPM_STATUS_ID_MAP(8960, EBI1_CH0_RANGE), |
| 2645 | MSM_RPM_STATUS_ID_MAP(8960, EBI1_CH1_RANGE), |
| 2646 | }, |
| 2647 | .target_ctrl_id = { |
| 2648 | MSM_RPM_CTRL_MAP(8960, VERSION_MAJOR), |
| 2649 | MSM_RPM_CTRL_MAP(8960, VERSION_MINOR), |
| 2650 | MSM_RPM_CTRL_MAP(8960, VERSION_BUILD), |
| 2651 | MSM_RPM_CTRL_MAP(8960, REQ_CTX_0), |
| 2652 | MSM_RPM_CTRL_MAP(8960, REQ_SEL_0), |
| 2653 | MSM_RPM_CTRL_MAP(8960, ACK_CTX_0), |
| 2654 | MSM_RPM_CTRL_MAP(8960, ACK_SEL_0), |
| 2655 | }, |
| 2656 | .sel_invalidate = MSM_RPM_8960_SEL_INVALIDATE, |
| 2657 | .sel_notification = MSM_RPM_8960_SEL_NOTIFICATION, |
| 2658 | .sel_last = MSM_RPM_8960_SEL_LAST, |
| 2659 | .ver = {3, 0, 0}, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2660 | }; |
Praveen Chidambaram | 8985b01 | 2011-12-16 13:38:59 -0700 | [diff] [blame] | 2661 | |
Praveen Chidambaram | 7849901 | 2011-11-01 17:15:17 -0600 | [diff] [blame^] | 2662 | struct platform_device msm8960_rpm_device = { |
Maheshkumar Sivasubramanian | 9c8cdc9 | 2011-09-12 14:11:30 -0600 | [diff] [blame] | 2663 | .name = "msm_rpm", |
| 2664 | .id = -1, |
| 2665 | }; |
| 2666 | |
Praveen Chidambaram | 7849901 | 2011-11-01 17:15:17 -0600 | [diff] [blame^] | 2667 | static struct msm_rpm_log_platform_data msm_rpm_log_pdata = { |
| 2668 | .phys_addr_base = 0x0010C000, |
| 2669 | .reg_offsets = { |
| 2670 | [MSM_RPM_LOG_PAGE_INDICES] = 0x00000080, |
| 2671 | [MSM_RPM_LOG_PAGE_BUFFER] = 0x000000A0, |
| 2672 | }, |
| 2673 | .phys_size = SZ_8K, |
| 2674 | .log_len = 4096, /* log's buffer length in bytes */ |
| 2675 | .log_len_mask = (4096 >> 2) - 1, /* length mask in units of u32 */ |
| 2676 | }; |
| 2677 | |
| 2678 | struct platform_device msm8960_rpm_log_device = { |
| 2679 | .name = "msm_rpm_log", |
| 2680 | .id = -1, |
| 2681 | .dev = { |
| 2682 | .platform_data = &msm_rpm_log_pdata, |
| 2683 | }, |
| 2684 | }; |
| 2685 | |
Praveen Chidambaram | 7a71223 | 2011-10-28 13:39:45 -0600 | [diff] [blame] | 2686 | static struct msm_rpmstats_platform_data msm_rpm_stat_pdata = { |
| 2687 | .phys_addr_base = 0x0010D204, |
| 2688 | .phys_size = SZ_8K, |
| 2689 | }; |
| 2690 | |
Praveen Chidambaram | 7849901 | 2011-11-01 17:15:17 -0600 | [diff] [blame^] | 2691 | struct platform_device msm8960_rpm_stat_device = { |
Praveen Chidambaram | 7a71223 | 2011-10-28 13:39:45 -0600 | [diff] [blame] | 2692 | .name = "msm_rpm_stat", |
| 2693 | .id = -1, |
| 2694 | .dev = { |
| 2695 | .platform_data = &msm_rpm_stat_pdata, |
| 2696 | }, |
| 2697 | }; |
Maheshkumar Sivasubramanian | 9c8cdc9 | 2011-09-12 14:11:30 -0600 | [diff] [blame] | 2698 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2699 | struct platform_device msm_bus_sys_fabric = { |
| 2700 | .name = "msm_bus_fabric", |
| 2701 | .id = MSM_BUS_FAB_SYSTEM, |
| 2702 | }; |
| 2703 | struct platform_device msm_bus_apps_fabric = { |
| 2704 | .name = "msm_bus_fabric", |
| 2705 | .id = MSM_BUS_FAB_APPSS, |
| 2706 | }; |
| 2707 | struct platform_device msm_bus_mm_fabric = { |
| 2708 | .name = "msm_bus_fabric", |
| 2709 | .id = MSM_BUS_FAB_MMSS, |
| 2710 | }; |
| 2711 | struct platform_device msm_bus_sys_fpb = { |
| 2712 | .name = "msm_bus_fabric", |
| 2713 | .id = MSM_BUS_FAB_SYSTEM_FPB, |
| 2714 | }; |
| 2715 | struct platform_device msm_bus_cpss_fpb = { |
| 2716 | .name = "msm_bus_fabric", |
| 2717 | .id = MSM_BUS_FAB_CPSS_FPB, |
| 2718 | }; |
| 2719 | |
| 2720 | /* Sensors DSPS platform data */ |
| 2721 | #ifdef CONFIG_MSM_DSPS |
| 2722 | |
| 2723 | #define PPSS_REG_PHYS_BASE 0x12080000 |
| 2724 | |
| 2725 | static struct dsps_clk_info dsps_clks[] = {}; |
| 2726 | static struct dsps_regulator_info dsps_regs[] = {}; |
| 2727 | |
| 2728 | /* |
| 2729 | * Note: GPIOs field is intialized in run-time at the function |
| 2730 | * msm8960_init_dsps(). |
| 2731 | */ |
| 2732 | |
| 2733 | struct msm_dsps_platform_data msm_dsps_pdata = { |
| 2734 | .clks = dsps_clks, |
| 2735 | .clks_num = ARRAY_SIZE(dsps_clks), |
| 2736 | .gpios = NULL, |
| 2737 | .gpios_num = 0, |
| 2738 | .regs = dsps_regs, |
| 2739 | .regs_num = ARRAY_SIZE(dsps_regs), |
| 2740 | .dsps_pwr_ctl_en = 1, |
| 2741 | .signature = DSPS_SIGNATURE, |
| 2742 | }; |
| 2743 | |
| 2744 | static struct resource msm_dsps_resources[] = { |
| 2745 | { |
| 2746 | .start = PPSS_REG_PHYS_BASE, |
| 2747 | .end = PPSS_REG_PHYS_BASE + SZ_8K - 1, |
| 2748 | .name = "ppss_reg", |
| 2749 | .flags = IORESOURCE_MEM, |
| 2750 | }, |
Wentao Xu | a55500b | 2011-08-16 18:15:04 -0400 | [diff] [blame] | 2751 | |
| 2752 | { |
| 2753 | .start = PPSS_WDOG_TIMER_IRQ, |
| 2754 | .end = PPSS_WDOG_TIMER_IRQ, |
| 2755 | .name = "ppss_wdog", |
| 2756 | .flags = IORESOURCE_IRQ, |
| 2757 | }, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2758 | }; |
| 2759 | |
| 2760 | struct platform_device msm_dsps_device = { |
| 2761 | .name = "msm_dsps", |
| 2762 | .id = 0, |
| 2763 | .num_resources = ARRAY_SIZE(msm_dsps_resources), |
| 2764 | .resource = msm_dsps_resources, |
| 2765 | .dev.platform_data = &msm_dsps_pdata, |
| 2766 | }; |
| 2767 | |
| 2768 | #endif /* CONFIG_MSM_DSPS */ |
Pratik Patel | 7831c08 | 2011-06-08 21:44:37 -0700 | [diff] [blame] | 2769 | |
| 2770 | #ifdef CONFIG_MSM_QDSS |
| 2771 | |
| 2772 | #define MSM_QDSS_PHYS_BASE 0x01A00000 |
| 2773 | #define MSM_ETB_PHYS_BASE (MSM_QDSS_PHYS_BASE + 0x1000) |
| 2774 | #define MSM_TPIU_PHYS_BASE (MSM_QDSS_PHYS_BASE + 0x3000) |
| 2775 | #define MSM_FUNNEL_PHYS_BASE (MSM_QDSS_PHYS_BASE + 0x4000) |
| 2776 | #define MSM_PTM_PHYS_BASE (MSM_QDSS_PHYS_BASE + 0x1C000) |
| 2777 | |
| 2778 | static struct resource msm_etb_resources[] = { |
| 2779 | { |
| 2780 | .start = MSM_ETB_PHYS_BASE, |
| 2781 | .end = MSM_ETB_PHYS_BASE + SZ_4K - 1, |
| 2782 | .flags = IORESOURCE_MEM, |
| 2783 | }, |
| 2784 | }; |
| 2785 | |
| 2786 | struct platform_device msm_etb_device = { |
| 2787 | .name = "msm_etb", |
| 2788 | .id = 0, |
| 2789 | .num_resources = ARRAY_SIZE(msm_etb_resources), |
| 2790 | .resource = msm_etb_resources, |
| 2791 | }; |
| 2792 | |
| 2793 | static struct resource msm_tpiu_resources[] = { |
| 2794 | { |
| 2795 | .start = MSM_TPIU_PHYS_BASE, |
| 2796 | .end = MSM_TPIU_PHYS_BASE + SZ_4K - 1, |
| 2797 | .flags = IORESOURCE_MEM, |
| 2798 | }, |
| 2799 | }; |
| 2800 | |
| 2801 | struct platform_device msm_tpiu_device = { |
| 2802 | .name = "msm_tpiu", |
| 2803 | .id = 0, |
| 2804 | .num_resources = ARRAY_SIZE(msm_tpiu_resources), |
| 2805 | .resource = msm_tpiu_resources, |
| 2806 | }; |
| 2807 | |
| 2808 | static struct resource msm_funnel_resources[] = { |
| 2809 | { |
| 2810 | .start = MSM_FUNNEL_PHYS_BASE, |
| 2811 | .end = MSM_FUNNEL_PHYS_BASE + SZ_4K - 1, |
| 2812 | .flags = IORESOURCE_MEM, |
| 2813 | }, |
| 2814 | }; |
| 2815 | |
| 2816 | struct platform_device msm_funnel_device = { |
| 2817 | .name = "msm_funnel", |
| 2818 | .id = 0, |
| 2819 | .num_resources = ARRAY_SIZE(msm_funnel_resources), |
| 2820 | .resource = msm_funnel_resources, |
| 2821 | }; |
| 2822 | |
| 2823 | static struct resource msm_ptm_resources[] = { |
| 2824 | { |
| 2825 | .start = MSM_PTM_PHYS_BASE, |
| 2826 | .end = MSM_PTM_PHYS_BASE + (SZ_4K * 2) - 1, |
| 2827 | .flags = IORESOURCE_MEM, |
| 2828 | }, |
| 2829 | }; |
| 2830 | |
| 2831 | struct platform_device msm_ptm_device = { |
| 2832 | .name = "msm_ptm", |
| 2833 | .id = 0, |
| 2834 | .num_resources = ARRAY_SIZE(msm_ptm_resources), |
| 2835 | .resource = msm_ptm_resources, |
| 2836 | }; |
| 2837 | |
| 2838 | #endif |