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Pete Popove3ad1c22005-03-01 06:33:16 +00001/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 * Alchemy Pb1200/Db1200 board setup.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
12 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
14 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
15 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
17 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
18 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
19 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
20 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
21 *
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
Sergei Shtylyovce28f942008-04-23 22:43:55 +040026
Pete Popove3ad1c22005-03-01 06:33:16 +000027#include <linux/init.h>
28#include <linux/sched.h>
Yoichi Yuasa25b31cb2007-10-15 19:11:24 +090029
Yoichi Yuasa25b31cb2007-10-15 19:11:24 +090030#include <prom.h>
Sergei Shtylyovc3d1d5c2008-04-30 23:29:04 +040031#include <au1xxx.h>
Pete Popove3ad1c22005-03-01 06:33:16 +000032
Pete Popove3ad1c22005-03-01 06:33:16 +000033
Manuel Lauss23ba25d2008-12-21 09:26:15 +010034const char *get_system_type(void)
35{
36 return "Alchemy Pb1200";
37}
38
Ralf Baechle49a89ef2007-10-11 23:46:15 +010039void board_reset(void)
Pete Popove3ad1c22005-03-01 06:33:16 +000040{
41 bcsr->resets = 0;
Pete Popov64abf642005-09-14 16:17:59 +000042 bcsr->system = 0;
Pete Popove3ad1c22005-03-01 06:33:16 +000043}
44
45void __init board_setup(void)
46{
Manuel Lauss71793802008-12-21 09:26:16 +010047 char *argptr;
48
49 argptr = prom_getcmdline();
50#ifdef CONFIG_SERIAL_8250_CONSOLE
51 argptr = strstr(argptr, "console=");
52 if (argptr == NULL) {
53 argptr = prom_getcmdline();
54 strcat(argptr, " console=ttyS0,115200");
55 }
56#endif
57#ifdef CONFIG_FB_AU1200
58 strcat(argptr, " video=au1200fb:panel:bs");
59#endif
Pete Popove3ad1c22005-03-01 06:33:16 +000060
61#if 0
Ralf Baechlef5cd9f12007-11-01 12:22:53 +000062 {
Sergei Shtylyovc3d1d5c2008-04-30 23:29:04 +040063 u32 pin_func;
Ralf Baechlef5cd9f12007-11-01 12:22:53 +000064
Sergei Shtylyovc3d1d5c2008-04-30 23:29:04 +040065 /*
66 * Enable PSC1 SYNC for AC97. Normaly done in audio driver,
67 * but it is board specific code, so put it here.
68 */
69 pin_func = au_readl(SYS_PINFUNC);
70 au_sync();
71 pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
72 au_writel(pin_func, SYS_PINFUNC);
Pete Popove3ad1c22005-03-01 06:33:16 +000073
Sergei Shtylyovc3d1d5c2008-04-30 23:29:04 +040074 au_writel(0, (u32)bcsr | 0x10); /* turn off PCMCIA power */
75 au_sync();
Ralf Baechlef5cd9f12007-11-01 12:22:53 +000076 }
Pete Popove3ad1c22005-03-01 06:33:16 +000077#endif
78
Pete Popov64abf642005-09-14 16:17:59 +000079#if defined(CONFIG_I2C_AU1550)
Pete Popove3ad1c22005-03-01 06:33:16 +000080 {
Sergei Shtylyovc3d1d5c2008-04-30 23:29:04 +040081 u32 freq0, clksrc;
82 u32 pin_func;
Pete Popove3ad1c22005-03-01 06:33:16 +000083
Sergei Shtylyovc3d1d5c2008-04-30 23:29:04 +040084 /* Select SMBus in CPLD */
85 bcsr->resets &= ~BCSR_RESETS_PCS0MUX;
Pete Popove3ad1c22005-03-01 06:33:16 +000086
Sergei Shtylyovc3d1d5c2008-04-30 23:29:04 +040087 pin_func = au_readl(SYS_PINFUNC);
88 au_sync();
89 pin_func &= ~(SYS_PINFUNC_P0A | SYS_PINFUNC_P0B);
90 /* Set GPIOs correctly */
91 pin_func |= 2 << 17;
92 au_writel(pin_func, SYS_PINFUNC);
93 au_sync();
Pete Popove3ad1c22005-03-01 06:33:16 +000094
Sergei Shtylyovc3d1d5c2008-04-30 23:29:04 +040095 /* The I2C driver depends on 50 MHz clock */
96 freq0 = au_readl(SYS_FREQCTRL0);
97 au_sync();
98 freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1);
99 freq0 |= 3 << SYS_FC_FRDIV1_BIT;
100 /* 396 MHz / (3 + 1) * 2 == 49.5 MHz */
101 au_writel(freq0, SYS_FREQCTRL0);
102 au_sync();
103 freq0 |= SYS_FC_FE1;
104 au_writel(freq0, SYS_FREQCTRL0);
105 au_sync();
Pete Popove3ad1c22005-03-01 06:33:16 +0000106
Sergei Shtylyovc3d1d5c2008-04-30 23:29:04 +0400107 clksrc = au_readl(SYS_CLKSRC);
108 au_sync();
109 clksrc &= ~(SYS_CS_CE0 | SYS_CS_DE0 | SYS_CS_ME0_MASK);
110 /* Bit 22 is EXTCLK0 for PSC0 */
111 clksrc |= SYS_CS_MUX_FQ1 << SYS_CS_ME0_BIT;
112 au_writel(clksrc, SYS_CLKSRC);
113 au_sync();
Pete Popove3ad1c22005-03-01 06:33:16 +0000114 }
115#endif
116
Sergei Shtylyovc3d1d5c2008-04-30 23:29:04 +0400117 /*
118 * The Pb1200 development board uses external MUX for PSC0 to
119 * support SMB/SPI. bcsr->resets bit 12: 0=SMB 1=SPI
120 */
Ralf Baechle6fec2e12007-07-13 06:33:09 +0100121#ifdef CONFIG_I2C_AU1550
Sergei Shtylyovc3d1d5c2008-04-30 23:29:04 +0400122 bcsr->resets &= ~BCSR_RESETS_PCS0MUX;
Pete Popove3ad1c22005-03-01 06:33:16 +0000123#endif
124 au_sync();
125
126#ifdef CONFIG_MIPS_PB1200
Sergei Shtylyovc3d1d5c2008-04-30 23:29:04 +0400127 printk(KERN_INFO "AMD Alchemy Pb1200 Board\n");
Pete Popove3ad1c22005-03-01 06:33:16 +0000128#endif
129#ifdef CONFIG_MIPS_DB1200
Sergei Shtylyovc3d1d5c2008-04-30 23:29:04 +0400130 printk(KERN_INFO "AMD Alchemy Db1200 Board\n");
Pete Popove3ad1c22005-03-01 06:33:16 +0000131#endif
Pete Popove3ad1c22005-03-01 06:33:16 +0000132}
Pete Popov64abf642005-09-14 16:17:59 +0000133
Sergei Shtylyovc3d1d5c2008-04-30 23:29:04 +0400134int board_au1200fb_panel(void)
Pete Popov64abf642005-09-14 16:17:59 +0000135{
136 BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
137 int p;
138
139 p = bcsr->switches;
140 p >>= 8;
141 p &= 0x0F;
142 return p;
143}
144
Sergei Shtylyovc3d1d5c2008-04-30 23:29:04 +0400145int board_au1200fb_panel_init(void)
Pete Popov64abf642005-09-14 16:17:59 +0000146{
147 /* Apply power */
Sergei Shtylyovc3d1d5c2008-04-30 23:29:04 +0400148 BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
149
150 bcsr->board |= BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL;
151 /* printk(KERN_DEBUG "board_au1200fb_panel_init()\n"); */
Pete Popov64abf642005-09-14 16:17:59 +0000152 return 0;
153}
154
Sergei Shtylyovc3d1d5c2008-04-30 23:29:04 +0400155int board_au1200fb_panel_shutdown(void)
Pete Popov64abf642005-09-14 16:17:59 +0000156{
157 /* Remove power */
Sergei Shtylyovc3d1d5c2008-04-30 23:29:04 +0400158 BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
159
160 bcsr->board &= ~(BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD |
161 BCSR_BOARD_LCDBL);
162 /* printk(KERN_DEBUG "board_au1200fb_panel_shutdown()\n"); */
Pete Popov64abf642005-09-14 16:17:59 +0000163 return 0;
164}