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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* starfire.c: Linux device driver for the Adaptec Starfire network adapter. */
2/*
3 Written 1998-2000 by Donald Becker.
4
Jeff Garzikfdecea62005-05-12 20:16:24 -04005 Current maintainer is Ion Badulescu <ionut ta badula tod org>. Please
Linus Torvalds1da177e2005-04-16 15:20:36 -07006 send all bug reports to me, and not to Donald Becker, as this code
7 has been heavily modified from Donald's original version.
8
9 This software may be used and distributed according to the terms of
10 the GNU General Public License (GPL), incorporated herein by reference.
11 Drivers based on or derived from this code fall under the GPL and must
12 retain the authorship, copyright and license notice. This file is not
13 a complete program and may only be used when the entire operating
14 system is licensed under the GPL.
15
16 The information below comes from Donald Becker's original driver:
17
18 The author may be reached as becker@scyld.com, or C/O
19 Scyld Computing Corporation
20 410 Severn Ave., Suite 210
21 Annapolis MD 21403
22
23 Support and updates available at
24 http://www.scyld.com/network/starfire.html
25
26 -----------------------------------------------------------
27
28 Linux kernel-specific changes:
29
30 LK1.1.1 (jgarzik):
31 - Use PCI driver interface
32 - Fix MOD_xxx races
33 - softnet fixups
34
35 LK1.1.2 (jgarzik):
36 - Merge Becker version 0.15
37
38 LK1.1.3 (Andrew Morton)
39 - Timer cleanups
40
41 LK1.1.4 (jgarzik):
42 - Merge Becker version 1.03
43
44 LK1.2.1 (Ion Badulescu <ionut@cs.columbia.edu>)
45 - Support hardware Rx/Tx checksumming
46 - Use the GFP firmware taken from Adaptec's Netware driver
47
48 LK1.2.2 (Ion Badulescu)
49 - Backported to 2.2.x
50
51 LK1.2.3 (Ion Badulescu)
52 - Fix the flaky mdio interface
53 - More compat clean-ups
54
55 LK1.2.4 (Ion Badulescu)
56 - More 2.2.x initialization fixes
57
58 LK1.2.5 (Ion Badulescu)
59 - Several fixes from Manfred Spraul
60
61 LK1.2.6 (Ion Badulescu)
62 - Fixed ifup/ifdown/ifup problem in 2.4.x
63
64 LK1.2.7 (Ion Badulescu)
65 - Removed unused code
66 - Made more functions static and __init
67
68 LK1.2.8 (Ion Badulescu)
69 - Quell bogus error messages, inform about the Tx threshold
70 - Removed #ifdef CONFIG_PCI, this driver is PCI only
71
72 LK1.2.9 (Ion Badulescu)
73 - Merged Jeff Garzik's changes from 2.4.4-pre5
74 - Added 2.2.x compatibility stuff required by the above changes
75
76 LK1.2.9a (Ion Badulescu)
77 - More updates from Jeff Garzik
78
79 LK1.3.0 (Ion Badulescu)
80 - Merged zerocopy support
81
82 LK1.3.1 (Ion Badulescu)
83 - Added ethtool support
84 - Added GPIO (media change) interrupt support
85
86 LK1.3.2 (Ion Badulescu)
87 - Fixed 2.2.x compatibility issues introduced in 1.3.1
88 - Fixed ethtool ioctl returning uninitialized memory
89
90 LK1.3.3 (Ion Badulescu)
91 - Initialize the TxMode register properly
92 - Don't dereference dev->priv after freeing it
93
94 LK1.3.4 (Ion Badulescu)
95 - Fixed initialization timing problems
96 - Fixed interrupt mask definitions
97
98 LK1.3.5 (jgarzik)
99 - ethtool NWAY_RST, GLINK, [GS]MSGLVL support
100
101 LK1.3.6:
102 - Sparc64 support and fixes (Ion Badulescu)
103 - Better stats and error handling (Ion Badulescu)
104 - Use new pci_set_mwi() PCI API function (jgarzik)
105
106 LK1.3.7 (Ion Badulescu)
107 - minimal implementation of tx_timeout()
108 - correctly shutdown the Rx/Tx engines in netdev_close()
109 - added calls to netif_carrier_on/off
110 (patch from Stefan Rompf <srompf@isg.de>)
111 - VLAN support
112
113 LK1.3.8 (Ion Badulescu)
114 - adjust DMA burst size on sparc64
115 - 64-bit support
116 - reworked zerocopy support for 64-bit buffers
117 - working and usable interrupt mitigation/latency
118 - reduced Tx interrupt frequency for lower interrupt overhead
119
120 LK1.3.9 (Ion Badulescu)
121 - bugfix for mcast filter
122 - enable the right kind of Tx interrupts (TxDMADone, not TxDone)
123
124 LK1.4.0 (Ion Badulescu)
125 - NAPI support
126
127 LK1.4.1 (Ion Badulescu)
128 - flush PCI posting buffers after disabling Rx interrupts
129 - put the chip to a D3 slumber on driver unload
130 - added config option to enable/disable NAPI
131
Jeff Garzikfdecea62005-05-12 20:16:24 -0400132 LK1.4.2 (Ion Badulescu)
133 - finally added firmware (GPL'ed by Adaptec)
134 - removed compatibility code for 2.2.x
135
Ion Badulescu67974232005-10-03 22:31:36 -0400136 LK1.4.2.1 (Ion Badulescu)
137 - fixed 32/64 bit issues on i386 + CONFIG_HIGHMEM
138 - added 32-bit padding to outgoing skb's, removed previous workaround
139
Jeff Garzikfdecea62005-05-12 20:16:24 -0400140TODO: - fix forced speed/duplexing code (broken a long time ago, when
141 somebody converted the driver to use the generic MII code)
142 - fix VLAN support
Linus Torvalds1da177e2005-04-16 15:20:36 -0700143*/
144
145#define DRV_NAME "starfire"
Ion Badulescu67974232005-10-03 22:31:36 -0400146#define DRV_VERSION "1.03+LK1.4.2.1"
147#define DRV_RELDATE "October 3, 2005"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700148
149#include <linux/config.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -0700150#include <linux/module.h>
151#include <linux/kernel.h>
152#include <linux/pci.h>
153#include <linux/netdevice.h>
154#include <linux/etherdevice.h>
155#include <linux/init.h>
156#include <linux/delay.h>
Jeff Garzikfdecea62005-05-12 20:16:24 -0400157#include <linux/crc32.h>
158#include <linux/ethtool.h>
159#include <linux/mii.h>
160#include <linux/if_vlan.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -0700161#include <asm/processor.h> /* Processor type for cache alignment. */
162#include <asm/uaccess.h>
163#include <asm/io.h>
164
Jeff Garzikfdecea62005-05-12 20:16:24 -0400165#include "starfire_firmware.h"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700166/*
167 * The current frame processor firmware fails to checksum a fragment
168 * of length 1. If and when this is fixed, the #define below can be removed.
169 */
170#define HAS_BROKEN_FIRMWARE
Ion Badulescu67974232005-10-03 22:31:36 -0400171
172/*
173 * If using the broken firmware, data must be padded to the next 32-bit boundary.
174 */
175#ifdef HAS_BROKEN_FIRMWARE
176#define PADDING_MASK 3
177#endif
178
Linus Torvalds1da177e2005-04-16 15:20:36 -0700179/*
180 * Define this if using the driver with the zero-copy patch
181 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700182#define ZEROCOPY
Linus Torvalds1da177e2005-04-16 15:20:36 -0700183
184#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
185#define VLAN_SUPPORT
186#endif
187
188#ifndef CONFIG_ADAPTEC_STARFIRE_NAPI
189#undef HAVE_NETDEV_POLL
190#endif
191
192/* The user-configurable values.
193 These may be modified when a driver module is loaded.*/
194
195/* Used for tuning interrupt latency vs. overhead. */
196static int intr_latency;
197static int small_frames;
198
199static int debug = 1; /* 1 normal messages, 0 quiet .. 7 verbose. */
200static int max_interrupt_work = 20;
201static int mtu;
202/* Maximum number of multicast addresses to filter (vs. rx-all-multicast).
203 The Starfire has a 512 element hash table based on the Ethernet CRC. */
Arjan van de Venf71e1302006-03-03 21:33:57 -0500204static const int multicast_filter_limit = 512;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700205/* Whether to do TCP/UDP checksums in hardware */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700206static int enable_hw_cksum = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700207
208#define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer.*/
209/*
210 * Set the copy breakpoint for the copy-only-tiny-frames scheme.
211 * Setting to > 1518 effectively disables this feature.
212 *
213 * NOTE:
214 * The ia64 doesn't allow for unaligned loads even of integers being
215 * misaligned on a 2 byte boundary. Thus always force copying of
216 * packets as the starfire doesn't allow for misaligned DMAs ;-(
217 * 23/10/2000 - Jes
218 *
219 * The Alpha and the Sparc don't like unaligned loads, either. On Sparc64,
220 * at least, having unaligned frames leads to a rather serious performance
221 * penalty. -Ion
222 */
223#if defined(__ia64__) || defined(__alpha__) || defined(__sparc__)
224static int rx_copybreak = PKT_BUF_SZ;
225#else
226static int rx_copybreak /* = 0 */;
227#endif
228
229/* PCI DMA burst size -- on sparc64 we want to force it to 64 bytes, on the others the default of 128 is fine. */
230#ifdef __sparc__
231#define DMA_BURST_SIZE 64
232#else
233#define DMA_BURST_SIZE 128
234#endif
235
236/* Used to pass the media type, etc.
237 Both 'options[]' and 'full_duplex[]' exist for driver interoperability.
238 The media type is usually passed in 'options[]'.
239 These variables are deprecated, use ethtool instead. -Ion
240*/
241#define MAX_UNITS 8 /* More are supported, limit only on options */
242static int options[MAX_UNITS] = {0, };
243static int full_duplex[MAX_UNITS] = {0, };
244
245/* Operational parameters that are set at compile time. */
246
247/* The "native" ring sizes are either 256 or 2048.
248 However in some modes a descriptor may be marked to wrap the ring earlier.
249*/
250#define RX_RING_SIZE 256
251#define TX_RING_SIZE 32
252/* The completion queues are fixed at 1024 entries i.e. 4K or 8KB. */
253#define DONE_Q_SIZE 1024
254/* All queues must be aligned on a 256-byte boundary */
255#define QUEUE_ALIGN 256
256
257#if RX_RING_SIZE > 256
258#define RX_Q_ENTRIES Rx2048QEntries
259#else
260#define RX_Q_ENTRIES Rx256QEntries
261#endif
262
263/* Operational parameters that usually are not changed. */
264/* Time in jiffies before concluding the transmitter is hung. */
265#define TX_TIMEOUT (2 * HZ)
266
267/*
268 * This SUCKS.
269 * We need a much better method to determine if dma_addr_t is 64-bit.
270 */
Ion Badulescu67974232005-10-03 22:31:36 -0400271#if (defined(__i386__) && defined(CONFIG_HIGHMEM64G)) || defined(__x86_64__) || defined (__ia64__) || defined(__mips64__) || (defined(__mips__) && defined(CONFIG_HIGHMEM) && defined(CONFIG_64BIT_PHYS_ADDR))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700272/* 64-bit dma_addr_t */
273#define ADDR_64BITS /* This chip uses 64 bit addresses. */
Ion Badulescu67974232005-10-03 22:31:36 -0400274#define netdrv_addr_t u64
Linus Torvalds1da177e2005-04-16 15:20:36 -0700275#define cpu_to_dma(x) cpu_to_le64(x)
276#define dma_to_cpu(x) le64_to_cpu(x)
277#define RX_DESC_Q_ADDR_SIZE RxDescQAddr64bit
278#define TX_DESC_Q_ADDR_SIZE TxDescQAddr64bit
279#define RX_COMPL_Q_ADDR_SIZE RxComplQAddr64bit
280#define TX_COMPL_Q_ADDR_SIZE TxComplQAddr64bit
281#define RX_DESC_ADDR_SIZE RxDescAddr64bit
282#else /* 32-bit dma_addr_t */
Ion Badulescu67974232005-10-03 22:31:36 -0400283#define netdrv_addr_t u32
Linus Torvalds1da177e2005-04-16 15:20:36 -0700284#define cpu_to_dma(x) cpu_to_le32(x)
285#define dma_to_cpu(x) le32_to_cpu(x)
286#define RX_DESC_Q_ADDR_SIZE RxDescQAddr32bit
287#define TX_DESC_Q_ADDR_SIZE TxDescQAddr32bit
288#define RX_COMPL_Q_ADDR_SIZE RxComplQAddr32bit
289#define TX_COMPL_Q_ADDR_SIZE TxComplQAddr32bit
290#define RX_DESC_ADDR_SIZE RxDescAddr32bit
291#endif
292
Linus Torvalds1da177e2005-04-16 15:20:36 -0700293#define skb_first_frag_len(skb) skb_headlen(skb)
294#define skb_num_frags(skb) (skb_shinfo(skb)->nr_frags + 1)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700295
296#ifdef HAVE_NETDEV_POLL
297#define init_poll(dev) \
Jeff Garzikfdecea62005-05-12 20:16:24 -0400298do { \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700299 dev->poll = &netdev_poll; \
Jeff Garzikfdecea62005-05-12 20:16:24 -0400300 dev->weight = max_interrupt_work; \
301} while (0)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700302#define netdev_rx(dev, ioaddr) \
303do { \
304 u32 intr_enable; \
305 if (netif_rx_schedule_prep(dev)) { \
306 __netif_rx_schedule(dev); \
307 intr_enable = readl(ioaddr + IntrEnable); \
308 intr_enable &= ~(IntrRxDone | IntrRxEmpty); \
309 writel(intr_enable, ioaddr + IntrEnable); \
310 readl(ioaddr + IntrEnable); /* flush PCI posting buffers */ \
311 } else { \
312 /* Paranoia check */ \
313 intr_enable = readl(ioaddr + IntrEnable); \
314 if (intr_enable & (IntrRxDone | IntrRxEmpty)) { \
Jeff Garzikfdecea62005-05-12 20:16:24 -0400315 printk(KERN_INFO "%s: interrupt while in polling mode!\n", dev->name); \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700316 intr_enable &= ~(IntrRxDone | IntrRxEmpty); \
317 writel(intr_enable, ioaddr + IntrEnable); \
318 } \
319 } \
320} while (0)
321#define netdev_receive_skb(skb) netif_receive_skb(skb)
322#define vlan_netdev_receive_skb(skb, vlgrp, vlid) vlan_hwaccel_receive_skb(skb, vlgrp, vlid)
323static int netdev_poll(struct net_device *dev, int *budget);
324#else /* not HAVE_NETDEV_POLL */
325#define init_poll(dev)
326#define netdev_receive_skb(skb) netif_rx(skb)
327#define vlan_netdev_receive_skb(skb, vlgrp, vlid) vlan_hwaccel_rx(skb, vlgrp, vlid)
328#define netdev_rx(dev, ioaddr) \
329do { \
330 int quota = np->dirty_rx + RX_RING_SIZE - np->cur_rx; \
331 __netdev_rx(dev, &quota);\
332} while (0)
333#endif /* not HAVE_NETDEV_POLL */
334/* end of compatibility code */
335
336
337/* These identify the driver base version and may not be removed. */
Randy Dunlape19360f2006-04-10 23:22:06 -0700338static const char version[] __devinitdata =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700339KERN_INFO "starfire.c:v1.03 7/26/2000 Written by Donald Becker <becker@scyld.com>\n"
340KERN_INFO " (unofficial 2.2/2.4 kernel port, version " DRV_VERSION ", " DRV_RELDATE ")\n";
341
342MODULE_AUTHOR("Donald Becker <becker@scyld.com>");
343MODULE_DESCRIPTION("Adaptec Starfire Ethernet driver");
344MODULE_LICENSE("GPL");
Jeff Garzikfdecea62005-05-12 20:16:24 -0400345MODULE_VERSION(DRV_VERSION);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700346
347module_param(max_interrupt_work, int, 0);
348module_param(mtu, int, 0);
349module_param(debug, int, 0);
350module_param(rx_copybreak, int, 0);
351module_param(intr_latency, int, 0);
352module_param(small_frames, int, 0);
353module_param_array(options, int, NULL, 0);
354module_param_array(full_duplex, int, NULL, 0);
355module_param(enable_hw_cksum, int, 0);
356MODULE_PARM_DESC(max_interrupt_work, "Maximum events handled per interrupt");
357MODULE_PARM_DESC(mtu, "MTU (all boards)");
358MODULE_PARM_DESC(debug, "Debug level (0-6)");
359MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames");
360MODULE_PARM_DESC(intr_latency, "Maximum interrupt latency, in microseconds");
361MODULE_PARM_DESC(small_frames, "Maximum size of receive frames that bypass interrupt latency (0,64,128,256,512)");
362MODULE_PARM_DESC(options, "Deprecated: Bits 0-3: media type, bit 17: full duplex");
363MODULE_PARM_DESC(full_duplex, "Deprecated: Forced full-duplex setting (0/1)");
364MODULE_PARM_DESC(enable_hw_cksum, "Enable/disable hardware cksum support (0/1)");
365
366/*
367 Theory of Operation
368
369I. Board Compatibility
370
371This driver is for the Adaptec 6915 "Starfire" 64 bit PCI Ethernet adapter.
372
373II. Board-specific settings
374
375III. Driver operation
376
377IIIa. Ring buffers
378
379The Starfire hardware uses multiple fixed-size descriptor queues/rings. The
380ring sizes are set fixed by the hardware, but may optionally be wrapped
381earlier by the END bit in the descriptor.
382This driver uses that hardware queue size for the Rx ring, where a large
383number of entries has no ill effect beyond increases the potential backlog.
384The Tx ring is wrapped with the END bit, since a large hardware Tx queue
385disables the queue layer priority ordering and we have no mechanism to
386utilize the hardware two-level priority queue. When modifying the
387RX/TX_RING_SIZE pay close attention to page sizes and the ring-empty warning
388levels.
389
390IIIb/c. Transmit/Receive Structure
391
392See the Adaptec manual for the many possible structures, and options for
393each structure. There are far too many to document all of them here.
394
395For transmit this driver uses type 0/1 transmit descriptors (depending
396on the 32/64 bitness of the architecture), and relies on automatic
397minimum-length padding. It does not use the completion queue
398consumer index, but instead checks for non-zero status entries.
399
Jeff Garzikfdecea62005-05-12 20:16:24 -0400400For receive this driver uses type 2/3 receive descriptors. The driver
Linus Torvalds1da177e2005-04-16 15:20:36 -0700401allocates full frame size skbuffs for the Rx ring buffers, so all frames
402should fit in a single descriptor. The driver does not use the completion
403queue consumer index, but instead checks for non-zero status entries.
404
405When an incoming frame is less than RX_COPYBREAK bytes long, a fresh skbuff
406is allocated and the frame is copied to the new skbuff. When the incoming
407frame is larger, the skbuff is passed directly up the protocol stack.
408Buffers consumed this way are replaced by newly allocated skbuffs in a later
409phase of receive.
410
411A notable aspect of operation is that unaligned buffers are not permitted by
412the Starfire hardware. Thus the IP header at offset 14 in an ethernet frame
413isn't longword aligned, which may cause problems on some machine
414e.g. Alphas and IA64. For these architectures, the driver is forced to copy
415the frame into a new skbuff unconditionally. Copied frames are put into the
416skbuff at an offset of "+2", thus 16-byte aligning the IP header.
417
418IIId. Synchronization
419
420The driver runs as two independent, single-threaded flows of control. One
421is the send-packet routine, which enforces single-threaded use by the
422dev->tbusy flag. The other thread is the interrupt handler, which is single
423threaded by the hardware and interrupt handling software.
424
425The send packet thread has partial control over the Tx ring and the netif_queue
426status. If the number of free Tx slots in the ring falls below a certain number
427(currently hardcoded to 4), it signals the upper layer to stop the queue.
428
429The interrupt handler has exclusive control over the Rx ring and records stats
430from the Tx ring. After reaping the stats, it marks the Tx queue entry as
431empty by incrementing the dirty_tx mark. Iff the netif_queue is stopped and the
432number of free Tx slow is above the threshold, it signals the upper layer to
433restart the queue.
434
435IV. Notes
436
437IVb. References
438
439The Adaptec Starfire manuals, available only from Adaptec.
440http://www.scyld.com/expert/100mbps.html
441http://www.scyld.com/expert/NWay.html
442
443IVc. Errata
444
445- StopOnPerr is broken, don't enable
446- Hardware ethernet padding exposes random data, perform software padding
447 instead (unverified -- works correctly for all the hardware I have)
448
449*/
450
Jeff Garzikfdecea62005-05-12 20:16:24 -0400451
Linus Torvalds1da177e2005-04-16 15:20:36 -0700452
453enum chip_capability_flags {CanHaveMII=1, };
454
455enum chipset {
456 CH_6915 = 0,
457};
458
459static struct pci_device_id starfire_pci_tbl[] = {
460 { 0x9004, 0x6915, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_6915 },
461 { 0, }
462};
463MODULE_DEVICE_TABLE(pci, starfire_pci_tbl);
464
465/* A chip capabilities table, matching the CH_xxx entries in xxx_pci_tbl[] above. */
Arjan van de Venf71e1302006-03-03 21:33:57 -0500466static const struct chip_info {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700467 const char *name;
468 int drv_flags;
469} netdrv_tbl[] __devinitdata = {
470 { "Adaptec Starfire 6915", CanHaveMII },
471};
472
473
474/* Offsets to the device registers.
475 Unlike software-only systems, device drivers interact with complex hardware.
476 It's not useful to define symbolic names for every register bit in the
477 device. The name can only partially document the semantics and make
478 the driver longer and more difficult to read.
479 In general, only the important configuration values or bits changed
480 multiple times should be defined symbolically.
481*/
482enum register_offsets {
483 PCIDeviceConfig=0x50040, GenCtrl=0x50070, IntrTimerCtrl=0x50074,
484 IntrClear=0x50080, IntrStatus=0x50084, IntrEnable=0x50088,
485 MIICtrl=0x52000, TxStationAddr=0x50120, EEPROMCtrl=0x51000,
486 GPIOCtrl=0x5008C, TxDescCtrl=0x50090,
487 TxRingPtr=0x50098, HiPriTxRingPtr=0x50094, /* Low and High priority. */
488 TxRingHiAddr=0x5009C, /* 64 bit address extension. */
489 TxProducerIdx=0x500A0, TxConsumerIdx=0x500A4,
490 TxThreshold=0x500B0,
491 CompletionHiAddr=0x500B4, TxCompletionAddr=0x500B8,
492 RxCompletionAddr=0x500BC, RxCompletionQ2Addr=0x500C0,
493 CompletionQConsumerIdx=0x500C4, RxDMACtrl=0x500D0,
494 RxDescQCtrl=0x500D4, RxDescQHiAddr=0x500DC, RxDescQAddr=0x500E0,
495 RxDescQIdx=0x500E8, RxDMAStatus=0x500F0, RxFilterMode=0x500F4,
496 TxMode=0x55000, VlanType=0x55064,
497 PerfFilterTable=0x56000, HashTable=0x56100,
498 TxGfpMem=0x58000, RxGfpMem=0x5a000,
499};
500
501/*
502 * Bits in the interrupt status/mask registers.
503 * Warning: setting Intr[Ab]NormalSummary in the IntrEnable register
504 * enables all the interrupt sources that are or'ed into those status bits.
505 */
506enum intr_status_bits {
507 IntrLinkChange=0xf0000000, IntrStatsMax=0x08000000,
508 IntrAbnormalSummary=0x02000000, IntrGeneralTimer=0x01000000,
509 IntrSoftware=0x800000, IntrRxComplQ1Low=0x400000,
510 IntrTxComplQLow=0x200000, IntrPCI=0x100000,
511 IntrDMAErr=0x080000, IntrTxDataLow=0x040000,
512 IntrRxComplQ2Low=0x020000, IntrRxDescQ1Low=0x010000,
513 IntrNormalSummary=0x8000, IntrTxDone=0x4000,
514 IntrTxDMADone=0x2000, IntrTxEmpty=0x1000,
515 IntrEarlyRxQ2=0x0800, IntrEarlyRxQ1=0x0400,
516 IntrRxQ2Done=0x0200, IntrRxQ1Done=0x0100,
517 IntrRxGFPDead=0x80, IntrRxDescQ2Low=0x40,
518 IntrNoTxCsum=0x20, IntrTxBadID=0x10,
519 IntrHiPriTxBadID=0x08, IntrRxGfp=0x04,
520 IntrTxGfp=0x02, IntrPCIPad=0x01,
521 /* not quite bits */
522 IntrRxDone=IntrRxQ2Done | IntrRxQ1Done,
523 IntrRxEmpty=IntrRxDescQ1Low | IntrRxDescQ2Low,
524 IntrNormalMask=0xff00, IntrAbnormalMask=0x3ff00fe,
525};
526
527/* Bits in the RxFilterMode register. */
528enum rx_mode_bits {
529 AcceptBroadcast=0x04, AcceptAllMulticast=0x02, AcceptAll=0x01,
530 AcceptMulticast=0x10, PerfectFilter=0x40, HashFilter=0x30,
531 PerfectFilterVlan=0x80, MinVLANPrio=0xE000, VlanMode=0x0200,
532 WakeupOnGFP=0x0800,
533};
534
535/* Bits in the TxMode register */
536enum tx_mode_bits {
537 MiiSoftReset=0x8000, MIILoopback=0x4000,
538 TxFlowEnable=0x0800, RxFlowEnable=0x0400,
539 PadEnable=0x04, FullDuplex=0x02, HugeFrame=0x01,
540};
541
542/* Bits in the TxDescCtrl register. */
543enum tx_ctrl_bits {
544 TxDescSpaceUnlim=0x00, TxDescSpace32=0x10, TxDescSpace64=0x20,
545 TxDescSpace128=0x30, TxDescSpace256=0x40,
546 TxDescType0=0x00, TxDescType1=0x01, TxDescType2=0x02,
547 TxDescType3=0x03, TxDescType4=0x04,
548 TxNoDMACompletion=0x08,
549 TxDescQAddr64bit=0x80, TxDescQAddr32bit=0,
550 TxHiPriFIFOThreshShift=24, TxPadLenShift=16,
551 TxDMABurstSizeShift=8,
552};
553
554/* Bits in the RxDescQCtrl register. */
555enum rx_ctrl_bits {
556 RxBufferLenShift=16, RxMinDescrThreshShift=0,
557 RxPrefetchMode=0x8000, RxVariableQ=0x2000,
558 Rx2048QEntries=0x4000, Rx256QEntries=0,
559 RxDescAddr64bit=0x1000, RxDescAddr32bit=0,
560 RxDescQAddr64bit=0x0100, RxDescQAddr32bit=0,
561 RxDescSpace4=0x000, RxDescSpace8=0x100,
562 RxDescSpace16=0x200, RxDescSpace32=0x300,
563 RxDescSpace64=0x400, RxDescSpace128=0x500,
564 RxConsumerWrEn=0x80,
565};
566
567/* Bits in the RxDMACtrl register. */
568enum rx_dmactrl_bits {
569 RxReportBadFrames=0x80000000, RxDMAShortFrames=0x40000000,
570 RxDMABadFrames=0x20000000, RxDMACrcErrorFrames=0x10000000,
571 RxDMAControlFrame=0x08000000, RxDMAPauseFrame=0x04000000,
572 RxChecksumIgnore=0, RxChecksumRejectTCPUDP=0x02000000,
573 RxChecksumRejectTCPOnly=0x01000000,
574 RxCompletionQ2Enable=0x800000,
575 RxDMAQ2Disable=0, RxDMAQ2FPOnly=0x100000,
576 RxDMAQ2SmallPkt=0x200000, RxDMAQ2HighPrio=0x300000,
577 RxDMAQ2NonIP=0x400000,
578 RxUseBackupQueue=0x080000, RxDMACRC=0x040000,
579 RxEarlyIntThreshShift=12, RxHighPrioThreshShift=8,
580 RxBurstSizeShift=0,
581};
582
583/* Bits in the RxCompletionAddr register */
584enum rx_compl_bits {
585 RxComplQAddr64bit=0x80, RxComplQAddr32bit=0,
586 RxComplProducerWrEn=0x40,
587 RxComplType0=0x00, RxComplType1=0x10,
588 RxComplType2=0x20, RxComplType3=0x30,
589 RxComplThreshShift=0,
590};
591
592/* Bits in the TxCompletionAddr register */
593enum tx_compl_bits {
594 TxComplQAddr64bit=0x80, TxComplQAddr32bit=0,
595 TxComplProducerWrEn=0x40,
596 TxComplIntrStatus=0x20,
597 CommonQueueMode=0x10,
598 TxComplThreshShift=0,
599};
600
601/* Bits in the GenCtrl register */
602enum gen_ctrl_bits {
603 RxEnable=0x05, TxEnable=0x0a,
604 RxGFPEnable=0x10, TxGFPEnable=0x20,
605};
606
607/* Bits in the IntrTimerCtrl register */
608enum intr_ctrl_bits {
609 Timer10X=0x800, EnableIntrMasking=0x60, SmallFrameBypass=0x100,
610 SmallFrame64=0, SmallFrame128=0x200, SmallFrame256=0x400, SmallFrame512=0x600,
611 IntrLatencyMask=0x1f,
612};
613
614/* The Rx and Tx buffer descriptors. */
615struct starfire_rx_desc {
616 dma_addr_t rxaddr;
617};
618enum rx_desc_bits {
619 RxDescValid=1, RxDescEndRing=2,
620};
621
622/* Completion queue entry. */
623struct short_rx_done_desc {
624 u32 status; /* Low 16 bits is length. */
625};
626struct basic_rx_done_desc {
627 u32 status; /* Low 16 bits is length. */
628 u16 vlanid;
629 u16 status2;
630};
631struct csum_rx_done_desc {
632 u32 status; /* Low 16 bits is length. */
633 u16 csum; /* Partial checksum */
634 u16 status2;
635};
636struct full_rx_done_desc {
637 u32 status; /* Low 16 bits is length. */
638 u16 status3;
639 u16 status2;
640 u16 vlanid;
641 u16 csum; /* partial checksum */
642 u32 timestamp;
643};
644/* XXX: this is ugly and I'm not sure it's worth the trouble -Ion */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700645#ifdef VLAN_SUPPORT
646typedef struct full_rx_done_desc rx_done_desc;
647#define RxComplType RxComplType3
648#else /* not VLAN_SUPPORT */
649typedef struct csum_rx_done_desc rx_done_desc;
650#define RxComplType RxComplType2
651#endif /* not VLAN_SUPPORT */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700652
653enum rx_done_bits {
654 RxOK=0x20000000, RxFIFOErr=0x10000000, RxBufQ2=0x08000000,
655};
656
657/* Type 1 Tx descriptor. */
658struct starfire_tx_desc_1 {
659 u32 status; /* Upper bits are status, lower 16 length. */
660 u32 addr;
661};
662
663/* Type 2 Tx descriptor. */
664struct starfire_tx_desc_2 {
665 u32 status; /* Upper bits are status, lower 16 length. */
666 u32 reserved;
667 u64 addr;
668};
669
670#ifdef ADDR_64BITS
671typedef struct starfire_tx_desc_2 starfire_tx_desc;
672#define TX_DESC_TYPE TxDescType2
673#else /* not ADDR_64BITS */
674typedef struct starfire_tx_desc_1 starfire_tx_desc;
675#define TX_DESC_TYPE TxDescType1
676#endif /* not ADDR_64BITS */
677#define TX_DESC_SPACING TxDescSpaceUnlim
678
679enum tx_desc_bits {
680 TxDescID=0xB0000000,
681 TxCRCEn=0x01000000, TxDescIntr=0x08000000,
682 TxRingWrap=0x04000000, TxCalTCP=0x02000000,
683};
684struct tx_done_desc {
685 u32 status; /* timestamp, index. */
686#if 0
687 u32 intrstatus; /* interrupt status */
688#endif
689};
690
691struct rx_ring_info {
692 struct sk_buff *skb;
693 dma_addr_t mapping;
694};
695struct tx_ring_info {
696 struct sk_buff *skb;
697 dma_addr_t mapping;
698 unsigned int used_slots;
699};
700
701#define PHY_CNT 2
702struct netdev_private {
703 /* Descriptor rings first for alignment. */
704 struct starfire_rx_desc *rx_ring;
705 starfire_tx_desc *tx_ring;
706 dma_addr_t rx_ring_dma;
707 dma_addr_t tx_ring_dma;
708 /* The addresses of rx/tx-in-place skbuffs. */
709 struct rx_ring_info rx_info[RX_RING_SIZE];
710 struct tx_ring_info tx_info[TX_RING_SIZE];
711 /* Pointers to completion queues (full pages). */
712 rx_done_desc *rx_done_q;
713 dma_addr_t rx_done_q_dma;
714 unsigned int rx_done;
715 struct tx_done_desc *tx_done_q;
716 dma_addr_t tx_done_q_dma;
717 unsigned int tx_done;
718 struct net_device_stats stats;
719 struct pci_dev *pci_dev;
720#ifdef VLAN_SUPPORT
721 struct vlan_group *vlgrp;
722#endif
723 void *queue_mem;
724 dma_addr_t queue_mem_dma;
725 size_t queue_mem_size;
726
727 /* Frequently used values: keep some adjacent for cache effect. */
728 spinlock_t lock;
729 unsigned int cur_rx, dirty_rx; /* Producer/consumer ring indices */
730 unsigned int cur_tx, dirty_tx, reap_tx;
731 unsigned int rx_buf_sz; /* Based on MTU+slack. */
732 /* These values keep track of the transceiver/media in use. */
733 int speed100; /* Set if speed == 100MBit. */
734 u32 tx_mode;
735 u32 intr_timer_ctrl;
736 u8 tx_threshold;
737 /* MII transceiver section. */
738 struct mii_if_info mii_if; /* MII lib hooks/info */
739 int phy_cnt; /* MII device addresses. */
740 unsigned char phys[PHY_CNT]; /* MII device addresses. */
741 void __iomem *base;
742};
743
744
745static int mdio_read(struct net_device *dev, int phy_id, int location);
746static void mdio_write(struct net_device *dev, int phy_id, int location, int value);
747static int netdev_open(struct net_device *dev);
748static void check_duplex(struct net_device *dev);
749static void tx_timeout(struct net_device *dev);
750static void init_ring(struct net_device *dev);
751static int start_tx(struct sk_buff *skb, struct net_device *dev);
752static irqreturn_t intr_handler(int irq, void *dev_instance, struct pt_regs *regs);
753static void netdev_error(struct net_device *dev, int intr_status);
754static int __netdev_rx(struct net_device *dev, int *quota);
755static void refill_rx_ring(struct net_device *dev);
756static void netdev_error(struct net_device *dev, int intr_status);
757static void set_rx_mode(struct net_device *dev);
758static struct net_device_stats *get_stats(struct net_device *dev);
759static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
760static int netdev_close(struct net_device *dev);
761static void netdev_media_change(struct net_device *dev);
762static struct ethtool_ops ethtool_ops;
763
764
765#ifdef VLAN_SUPPORT
766static void netdev_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
767{
768 struct netdev_private *np = netdev_priv(dev);
769
770 spin_lock(&np->lock);
771 if (debug > 2)
772 printk("%s: Setting vlgrp to %p\n", dev->name, grp);
773 np->vlgrp = grp;
774 set_rx_mode(dev);
775 spin_unlock(&np->lock);
776}
777
778static void netdev_vlan_rx_add_vid(struct net_device *dev, unsigned short vid)
779{
780 struct netdev_private *np = netdev_priv(dev);
781
782 spin_lock(&np->lock);
783 if (debug > 1)
784 printk("%s: Adding vlanid %d to vlan filter\n", dev->name, vid);
785 set_rx_mode(dev);
786 spin_unlock(&np->lock);
787}
788
789static void netdev_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
790{
791 struct netdev_private *np = netdev_priv(dev);
792
793 spin_lock(&np->lock);
794 if (debug > 1)
795 printk("%s: removing vlanid %d from vlan filter\n", dev->name, vid);
796 if (np->vlgrp)
797 np->vlgrp->vlan_devices[vid] = NULL;
798 set_rx_mode(dev);
799 spin_unlock(&np->lock);
800}
801#endif /* VLAN_SUPPORT */
802
803
804static int __devinit starfire_init_one(struct pci_dev *pdev,
805 const struct pci_device_id *ent)
806{
807 struct netdev_private *np;
808 int i, irq, option, chip_idx = ent->driver_data;
809 struct net_device *dev;
810 static int card_idx = -1;
811 long ioaddr;
812 void __iomem *base;
813 int drv_flags, io_size;
814 int boguscnt;
815
816/* when built into the kernel, we only print version if device is found */
817#ifndef MODULE
818 static int printed_version;
819 if (!printed_version++)
820 printk(version);
821#endif
822
823 card_idx++;
824
825 if (pci_enable_device (pdev))
826 return -EIO;
827
828 ioaddr = pci_resource_start(pdev, 0);
829 io_size = pci_resource_len(pdev, 0);
830 if (!ioaddr || ((pci_resource_flags(pdev, 0) & IORESOURCE_MEM) == 0)) {
831 printk(KERN_ERR DRV_NAME " %d: no PCI MEM resources, aborting\n", card_idx);
832 return -ENODEV;
833 }
834
835 dev = alloc_etherdev(sizeof(*np));
836 if (!dev) {
837 printk(KERN_ERR DRV_NAME " %d: cannot alloc etherdev, aborting\n", card_idx);
838 return -ENOMEM;
839 }
840 SET_MODULE_OWNER(dev);
841 SET_NETDEV_DEV(dev, &pdev->dev);
842
843 irq = pdev->irq;
844
845 if (pci_request_regions (pdev, DRV_NAME)) {
846 printk(KERN_ERR DRV_NAME " %d: cannot reserve PCI resources, aborting\n", card_idx);
847 goto err_out_free_netdev;
848 }
849
850 /* ioremap is borken in Linux-2.2.x/sparc64 */
851 base = ioremap(ioaddr, io_size);
852 if (!base) {
853 printk(KERN_ERR DRV_NAME " %d: cannot remap %#x @ %#lx, aborting\n",
854 card_idx, io_size, ioaddr);
855 goto err_out_free_res;
856 }
857
858 pci_set_master(pdev);
859
860 /* enable MWI -- it vastly improves Rx performance on sparc64 */
861 pci_set_mwi(pdev);
862
Linus Torvalds1da177e2005-04-16 15:20:36 -0700863#ifdef ZEROCOPY
864 /* Starfire can do TCP/UDP checksumming */
865 if (enable_hw_cksum)
Jeff Garzikfdecea62005-05-12 20:16:24 -0400866 dev->features |= NETIF_F_IP_CSUM | NETIF_F_SG;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700867#endif /* ZEROCOPY */
868#ifdef VLAN_SUPPORT
869 dev->features |= NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_FILTER;
870 dev->vlan_rx_register = netdev_vlan_rx_register;
871 dev->vlan_rx_add_vid = netdev_vlan_rx_add_vid;
872 dev->vlan_rx_kill_vid = netdev_vlan_rx_kill_vid;
873#endif /* VLAN_RX_KILL_VID */
874#ifdef ADDR_64BITS
875 dev->features |= NETIF_F_HIGHDMA;
876#endif /* ADDR_64BITS */
877
878 /* Serial EEPROM reads are hidden by the hardware. */
879 for (i = 0; i < 6; i++)
880 dev->dev_addr[i] = readb(base + EEPROMCtrl + 20 - i);
881
882#if ! defined(final_version) /* Dump the EEPROM contents during development. */
883 if (debug > 4)
884 for (i = 0; i < 0x20; i++)
885 printk("%2.2x%s",
886 (unsigned int)readb(base + EEPROMCtrl + i),
887 i % 16 != 15 ? " " : "\n");
888#endif
889
890 /* Issue soft reset */
891 writel(MiiSoftReset, base + TxMode);
892 udelay(1000);
893 writel(0, base + TxMode);
894
895 /* Reset the chip to erase previous misconfiguration. */
896 writel(1, base + PCIDeviceConfig);
897 boguscnt = 1000;
898 while (--boguscnt > 0) {
899 udelay(10);
900 if ((readl(base + PCIDeviceConfig) & 1) == 0)
901 break;
902 }
903 if (boguscnt == 0)
904 printk("%s: chipset reset never completed!\n", dev->name);
905 /* wait a little longer */
906 udelay(1000);
907
908 dev->base_addr = (unsigned long)base;
909 dev->irq = irq;
910
911 np = netdev_priv(dev);
912 np->base = base;
913 spin_lock_init(&np->lock);
914 pci_set_drvdata(pdev, dev);
915
916 np->pci_dev = pdev;
917
918 np->mii_if.dev = dev;
919 np->mii_if.mdio_read = mdio_read;
920 np->mii_if.mdio_write = mdio_write;
921 np->mii_if.phy_id_mask = 0x1f;
922 np->mii_if.reg_num_mask = 0x1f;
923
924 drv_flags = netdrv_tbl[chip_idx].drv_flags;
925
926 option = card_idx < MAX_UNITS ? options[card_idx] : 0;
927 if (dev->mem_start)
928 option = dev->mem_start;
929
930 /* The lower four bits are the media type. */
931 if (option & 0x200)
932 np->mii_if.full_duplex = 1;
933
934 if (card_idx < MAX_UNITS && full_duplex[card_idx] > 0)
935 np->mii_if.full_duplex = 1;
936
937 if (np->mii_if.full_duplex)
938 np->mii_if.force_media = 1;
939 else
940 np->mii_if.force_media = 0;
941 np->speed100 = 1;
942
943 /* timer resolution is 128 * 0.8us */
944 np->intr_timer_ctrl = (((intr_latency * 10) / 1024) & IntrLatencyMask) |
945 Timer10X | EnableIntrMasking;
946
947 if (small_frames > 0) {
948 np->intr_timer_ctrl |= SmallFrameBypass;
949 switch (small_frames) {
950 case 1 ... 64:
951 np->intr_timer_ctrl |= SmallFrame64;
952 break;
953 case 65 ... 128:
954 np->intr_timer_ctrl |= SmallFrame128;
955 break;
956 case 129 ... 256:
957 np->intr_timer_ctrl |= SmallFrame256;
958 break;
959 default:
960 np->intr_timer_ctrl |= SmallFrame512;
961 if (small_frames > 512)
962 printk("Adjusting small_frames down to 512\n");
963 break;
964 }
965 }
966
967 /* The chip-specific entries in the device structure. */
968 dev->open = &netdev_open;
969 dev->hard_start_xmit = &start_tx;
Jeff Garzikfdecea62005-05-12 20:16:24 -0400970 dev->tx_timeout = tx_timeout;
971 dev->watchdog_timeo = TX_TIMEOUT;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700972 init_poll(dev);
973 dev->stop = &netdev_close;
974 dev->get_stats = &get_stats;
975 dev->set_multicast_list = &set_rx_mode;
976 dev->do_ioctl = &netdev_ioctl;
977 SET_ETHTOOL_OPS(dev, &ethtool_ops);
978
979 if (mtu)
980 dev->mtu = mtu;
981
982 if (register_netdev(dev))
983 goto err_out_cleardev;
984
985 printk(KERN_INFO "%s: %s at %p, ",
986 dev->name, netdrv_tbl[chip_idx].name, base);
987 for (i = 0; i < 5; i++)
988 printk("%2.2x:", dev->dev_addr[i]);
989 printk("%2.2x, IRQ %d.\n", dev->dev_addr[i], irq);
990
991 if (drv_flags & CanHaveMII) {
992 int phy, phy_idx = 0;
993 int mii_status;
994 for (phy = 0; phy < 32 && phy_idx < PHY_CNT; phy++) {
995 mdio_write(dev, phy, MII_BMCR, BMCR_RESET);
996 mdelay(100);
997 boguscnt = 1000;
998 while (--boguscnt > 0)
999 if ((mdio_read(dev, phy, MII_BMCR) & BMCR_RESET) == 0)
1000 break;
1001 if (boguscnt == 0) {
Jeff Garzikfdecea62005-05-12 20:16:24 -04001002 printk("%s: PHY#%d reset never completed!\n", dev->name, phy);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001003 continue;
1004 }
1005 mii_status = mdio_read(dev, phy, MII_BMSR);
1006 if (mii_status != 0) {
1007 np->phys[phy_idx++] = phy;
1008 np->mii_if.advertising = mdio_read(dev, phy, MII_ADVERTISE);
1009 printk(KERN_INFO "%s: MII PHY found at address %d, status "
1010 "%#4.4x advertising %#4.4x.\n",
1011 dev->name, phy, mii_status, np->mii_if.advertising);
1012 /* there can be only one PHY on-board */
1013 break;
1014 }
1015 }
1016 np->phy_cnt = phy_idx;
1017 if (np->phy_cnt > 0)
1018 np->mii_if.phy_id = np->phys[0];
1019 else
1020 memset(&np->mii_if, 0, sizeof(np->mii_if));
1021 }
1022
1023 printk(KERN_INFO "%s: scatter-gather and hardware TCP cksumming %s.\n",
1024 dev->name, enable_hw_cksum ? "enabled" : "disabled");
1025 return 0;
1026
1027err_out_cleardev:
1028 pci_set_drvdata(pdev, NULL);
1029 iounmap(base);
1030err_out_free_res:
1031 pci_release_regions (pdev);
1032err_out_free_netdev:
1033 free_netdev(dev);
1034 return -ENODEV;
1035}
1036
1037
1038/* Read the MII Management Data I/O (MDIO) interfaces. */
1039static int mdio_read(struct net_device *dev, int phy_id, int location)
1040{
1041 struct netdev_private *np = netdev_priv(dev);
1042 void __iomem *mdio_addr = np->base + MIICtrl + (phy_id<<7) + (location<<2);
1043 int result, boguscnt=1000;
1044 /* ??? Should we add a busy-wait here? */
1045 do
1046 result = readl(mdio_addr);
1047 while ((result & 0xC0000000) != 0x80000000 && --boguscnt > 0);
1048 if (boguscnt == 0)
1049 return 0;
1050 if ((result & 0xffff) == 0xffff)
1051 return 0;
1052 return result & 0xffff;
1053}
1054
1055
1056static void mdio_write(struct net_device *dev, int phy_id, int location, int value)
1057{
1058 struct netdev_private *np = netdev_priv(dev);
1059 void __iomem *mdio_addr = np->base + MIICtrl + (phy_id<<7) + (location<<2);
1060 writel(value, mdio_addr);
1061 /* The busy-wait will occur before a read. */
1062}
1063
1064
1065static int netdev_open(struct net_device *dev)
1066{
1067 struct netdev_private *np = netdev_priv(dev);
1068 void __iomem *ioaddr = np->base;
1069 int i, retval;
1070 size_t tx_done_q_size, rx_done_q_size, tx_ring_size, rx_ring_size;
1071
1072 /* Do we ever need to reset the chip??? */
Jeff Garzikfdecea62005-05-12 20:16:24 -04001073
Linus Torvalds1da177e2005-04-16 15:20:36 -07001074 retval = request_irq(dev->irq, &intr_handler, SA_SHIRQ, dev->name, dev);
1075 if (retval)
1076 return retval;
1077
1078 /* Disable the Rx and Tx, and reset the chip. */
1079 writel(0, ioaddr + GenCtrl);
1080 writel(1, ioaddr + PCIDeviceConfig);
1081 if (debug > 1)
1082 printk(KERN_DEBUG "%s: netdev_open() irq %d.\n",
1083 dev->name, dev->irq);
1084
1085 /* Allocate the various queues. */
1086 if (np->queue_mem == 0) {
1087 tx_done_q_size = ((sizeof(struct tx_done_desc) * DONE_Q_SIZE + QUEUE_ALIGN - 1) / QUEUE_ALIGN) * QUEUE_ALIGN;
1088 rx_done_q_size = ((sizeof(rx_done_desc) * DONE_Q_SIZE + QUEUE_ALIGN - 1) / QUEUE_ALIGN) * QUEUE_ALIGN;
1089 tx_ring_size = ((sizeof(starfire_tx_desc) * TX_RING_SIZE + QUEUE_ALIGN - 1) / QUEUE_ALIGN) * QUEUE_ALIGN;
1090 rx_ring_size = sizeof(struct starfire_rx_desc) * RX_RING_SIZE;
1091 np->queue_mem_size = tx_done_q_size + rx_done_q_size + tx_ring_size + rx_ring_size;
1092 np->queue_mem = pci_alloc_consistent(np->pci_dev, np->queue_mem_size, &np->queue_mem_dma);
Alexey Dobriyand8840ac2005-10-07 02:05:23 +04001093 if (np->queue_mem == NULL) {
1094 free_irq(dev->irq, dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001095 return -ENOMEM;
Alexey Dobriyand8840ac2005-10-07 02:05:23 +04001096 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001097
1098 np->tx_done_q = np->queue_mem;
1099 np->tx_done_q_dma = np->queue_mem_dma;
1100 np->rx_done_q = (void *) np->tx_done_q + tx_done_q_size;
1101 np->rx_done_q_dma = np->tx_done_q_dma + tx_done_q_size;
1102 np->tx_ring = (void *) np->rx_done_q + rx_done_q_size;
1103 np->tx_ring_dma = np->rx_done_q_dma + rx_done_q_size;
1104 np->rx_ring = (void *) np->tx_ring + tx_ring_size;
1105 np->rx_ring_dma = np->tx_ring_dma + tx_ring_size;
1106 }
1107
1108 /* Start with no carrier, it gets adjusted later */
1109 netif_carrier_off(dev);
1110 init_ring(dev);
1111 /* Set the size of the Rx buffers. */
1112 writel((np->rx_buf_sz << RxBufferLenShift) |
1113 (0 << RxMinDescrThreshShift) |
1114 RxPrefetchMode | RxVariableQ |
1115 RX_Q_ENTRIES |
1116 RX_DESC_Q_ADDR_SIZE | RX_DESC_ADDR_SIZE |
1117 RxDescSpace4,
1118 ioaddr + RxDescQCtrl);
1119
1120 /* Set up the Rx DMA controller. */
1121 writel(RxChecksumIgnore |
1122 (0 << RxEarlyIntThreshShift) |
1123 (6 << RxHighPrioThreshShift) |
1124 ((DMA_BURST_SIZE / 32) << RxBurstSizeShift),
1125 ioaddr + RxDMACtrl);
1126
1127 /* Set Tx descriptor */
1128 writel((2 << TxHiPriFIFOThreshShift) |
1129 (0 << TxPadLenShift) |
1130 ((DMA_BURST_SIZE / 32) << TxDMABurstSizeShift) |
1131 TX_DESC_Q_ADDR_SIZE |
1132 TX_DESC_SPACING | TX_DESC_TYPE,
1133 ioaddr + TxDescCtrl);
1134
1135 writel( (np->queue_mem_dma >> 16) >> 16, ioaddr + RxDescQHiAddr);
1136 writel( (np->queue_mem_dma >> 16) >> 16, ioaddr + TxRingHiAddr);
1137 writel( (np->queue_mem_dma >> 16) >> 16, ioaddr + CompletionHiAddr);
1138 writel(np->rx_ring_dma, ioaddr + RxDescQAddr);
1139 writel(np->tx_ring_dma, ioaddr + TxRingPtr);
1140
1141 writel(np->tx_done_q_dma, ioaddr + TxCompletionAddr);
1142 writel(np->rx_done_q_dma |
1143 RxComplType |
1144 (0 << RxComplThreshShift),
1145 ioaddr + RxCompletionAddr);
1146
1147 if (debug > 1)
1148 printk(KERN_DEBUG "%s: Filling in the station address.\n", dev->name);
1149
1150 /* Fill both the Tx SA register and the Rx perfect filter. */
1151 for (i = 0; i < 6; i++)
1152 writeb(dev->dev_addr[i], ioaddr + TxStationAddr + 5 - i);
1153 /* The first entry is special because it bypasses the VLAN filter.
1154 Don't use it. */
1155 writew(0, ioaddr + PerfFilterTable);
1156 writew(0, ioaddr + PerfFilterTable + 4);
1157 writew(0, ioaddr + PerfFilterTable + 8);
1158 for (i = 1; i < 16; i++) {
1159 u16 *eaddrs = (u16 *)dev->dev_addr;
1160 void __iomem *setup_frm = ioaddr + PerfFilterTable + i * 16;
1161 writew(cpu_to_be16(eaddrs[2]), setup_frm); setup_frm += 4;
1162 writew(cpu_to_be16(eaddrs[1]), setup_frm); setup_frm += 4;
1163 writew(cpu_to_be16(eaddrs[0]), setup_frm); setup_frm += 8;
1164 }
1165
1166 /* Initialize other registers. */
1167 /* Configure the PCI bus bursts and FIFO thresholds. */
1168 np->tx_mode = TxFlowEnable|RxFlowEnable|PadEnable; /* modified when link is up. */
1169 writel(MiiSoftReset | np->tx_mode, ioaddr + TxMode);
1170 udelay(1000);
1171 writel(np->tx_mode, ioaddr + TxMode);
1172 np->tx_threshold = 4;
1173 writel(np->tx_threshold, ioaddr + TxThreshold);
1174
1175 writel(np->intr_timer_ctrl, ioaddr + IntrTimerCtrl);
1176
Linus Torvalds1da177e2005-04-16 15:20:36 -07001177 netif_start_queue(dev);
1178
1179 if (debug > 1)
1180 printk(KERN_DEBUG "%s: Setting the Rx and Tx modes.\n", dev->name);
1181 set_rx_mode(dev);
1182
1183 np->mii_if.advertising = mdio_read(dev, np->phys[0], MII_ADVERTISE);
1184 check_duplex(dev);
1185
1186 /* Enable GPIO interrupts on link change */
1187 writel(0x0f00ff00, ioaddr + GPIOCtrl);
1188
1189 /* Set the interrupt mask */
1190 writel(IntrRxDone | IntrRxEmpty | IntrDMAErr |
1191 IntrTxDMADone | IntrStatsMax | IntrLinkChange |
1192 IntrRxGFPDead | IntrNoTxCsum | IntrTxBadID,
1193 ioaddr + IntrEnable);
1194 /* Enable PCI interrupts. */
1195 writel(0x00800000 | readl(ioaddr + PCIDeviceConfig),
1196 ioaddr + PCIDeviceConfig);
1197
1198#ifdef VLAN_SUPPORT
1199 /* Set VLAN type to 802.1q */
1200 writel(ETH_P_8021Q, ioaddr + VlanType);
1201#endif /* VLAN_SUPPORT */
1202
Linus Torvalds1da177e2005-04-16 15:20:36 -07001203 /* Load Rx/Tx firmware into the frame processors */
1204 for (i = 0; i < FIRMWARE_RX_SIZE * 2; i++)
1205 writel(firmware_rx[i], ioaddr + RxGfpMem + i * 4);
1206 for (i = 0; i < FIRMWARE_TX_SIZE * 2; i++)
1207 writel(firmware_tx[i], ioaddr + TxGfpMem + i * 4);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001208 if (enable_hw_cksum)
1209 /* Enable the Rx and Tx units, and the Rx/Tx frame processors. */
1210 writel(TxEnable|TxGFPEnable|RxEnable|RxGFPEnable, ioaddr + GenCtrl);
1211 else
1212 /* Enable the Rx and Tx units only. */
1213 writel(TxEnable|RxEnable, ioaddr + GenCtrl);
1214
1215 if (debug > 1)
1216 printk(KERN_DEBUG "%s: Done netdev_open().\n",
1217 dev->name);
1218
1219 return 0;
1220}
1221
1222
1223static void check_duplex(struct net_device *dev)
1224{
1225 struct netdev_private *np = netdev_priv(dev);
1226 u16 reg0;
1227 int silly_count = 1000;
1228
1229 mdio_write(dev, np->phys[0], MII_ADVERTISE, np->mii_if.advertising);
1230 mdio_write(dev, np->phys[0], MII_BMCR, BMCR_RESET);
1231 udelay(500);
1232 while (--silly_count && mdio_read(dev, np->phys[0], MII_BMCR) & BMCR_RESET)
1233 /* do nothing */;
1234 if (!silly_count) {
1235 printk("%s: MII reset failed!\n", dev->name);
1236 return;
1237 }
1238
1239 reg0 = mdio_read(dev, np->phys[0], MII_BMCR);
1240
1241 if (!np->mii_if.force_media) {
1242 reg0 |= BMCR_ANENABLE | BMCR_ANRESTART;
1243 } else {
1244 reg0 &= ~(BMCR_ANENABLE | BMCR_ANRESTART);
1245 if (np->speed100)
1246 reg0 |= BMCR_SPEED100;
1247 if (np->mii_if.full_duplex)
1248 reg0 |= BMCR_FULLDPLX;
1249 printk(KERN_DEBUG "%s: Link forced to %sMbit %s-duplex\n",
1250 dev->name,
1251 np->speed100 ? "100" : "10",
1252 np->mii_if.full_duplex ? "full" : "half");
1253 }
1254 mdio_write(dev, np->phys[0], MII_BMCR, reg0);
1255}
1256
1257
1258static void tx_timeout(struct net_device *dev)
1259{
1260 struct netdev_private *np = netdev_priv(dev);
1261 void __iomem *ioaddr = np->base;
1262 int old_debug;
1263
1264 printk(KERN_WARNING "%s: Transmit timed out, status %#8.8x, "
1265 "resetting...\n", dev->name, (int) readl(ioaddr + IntrStatus));
1266
1267 /* Perhaps we should reinitialize the hardware here. */
1268
1269 /*
1270 * Stop and restart the interface.
1271 * Cheat and increase the debug level temporarily.
1272 */
1273 old_debug = debug;
1274 debug = 2;
1275 netdev_close(dev);
1276 netdev_open(dev);
1277 debug = old_debug;
1278
1279 /* Trigger an immediate transmit demand. */
1280
1281 dev->trans_start = jiffies;
1282 np->stats.tx_errors++;
1283 netif_wake_queue(dev);
1284}
1285
1286
1287/* Initialize the Rx and Tx rings, along with various 'dev' bits. */
1288static void init_ring(struct net_device *dev)
1289{
1290 struct netdev_private *np = netdev_priv(dev);
1291 int i;
1292
1293 np->cur_rx = np->cur_tx = np->reap_tx = 0;
1294 np->dirty_rx = np->dirty_tx = np->rx_done = np->tx_done = 0;
1295
1296 np->rx_buf_sz = (dev->mtu <= 1500 ? PKT_BUF_SZ : dev->mtu + 32);
1297
1298 /* Fill in the Rx buffers. Handle allocation failure gracefully. */
1299 for (i = 0; i < RX_RING_SIZE; i++) {
1300 struct sk_buff *skb = dev_alloc_skb(np->rx_buf_sz);
1301 np->rx_info[i].skb = skb;
1302 if (skb == NULL)
1303 break;
David S. Miller689be432005-06-28 15:25:31 -07001304 np->rx_info[i].mapping = pci_map_single(np->pci_dev, skb->data, np->rx_buf_sz, PCI_DMA_FROMDEVICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001305 skb->dev = dev; /* Mark as being used by this device. */
1306 /* Grrr, we cannot offset to correctly align the IP header. */
1307 np->rx_ring[i].rxaddr = cpu_to_dma(np->rx_info[i].mapping | RxDescValid);
1308 }
1309 writew(i - 1, np->base + RxDescQIdx);
1310 np->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1311
1312 /* Clear the remainder of the Rx buffer ring. */
1313 for ( ; i < RX_RING_SIZE; i++) {
1314 np->rx_ring[i].rxaddr = 0;
1315 np->rx_info[i].skb = NULL;
1316 np->rx_info[i].mapping = 0;
1317 }
1318 /* Mark the last entry as wrapping the ring. */
1319 np->rx_ring[RX_RING_SIZE - 1].rxaddr |= cpu_to_dma(RxDescEndRing);
1320
1321 /* Clear the completion rings. */
1322 for (i = 0; i < DONE_Q_SIZE; i++) {
1323 np->rx_done_q[i].status = 0;
1324 np->tx_done_q[i].status = 0;
1325 }
1326
1327 for (i = 0; i < TX_RING_SIZE; i++)
1328 memset(&np->tx_info[i], 0, sizeof(np->tx_info[i]));
1329
1330 return;
1331}
1332
1333
1334static int start_tx(struct sk_buff *skb, struct net_device *dev)
1335{
1336 struct netdev_private *np = netdev_priv(dev);
1337 unsigned int entry;
1338 u32 status;
1339 int i;
1340
Linus Torvalds1da177e2005-04-16 15:20:36 -07001341 /*
1342 * be cautious here, wrapping the queue has weird semantics
1343 * and we may not have enough slots even when it seems we do.
1344 */
1345 if ((np->cur_tx - np->dirty_tx) + skb_num_frags(skb) * 2 > TX_RING_SIZE) {
1346 netif_stop_queue(dev);
1347 return 1;
1348 }
1349
1350#if defined(ZEROCOPY) && defined(HAS_BROKEN_FIRMWARE)
Ion Badulescu67974232005-10-03 22:31:36 -04001351 if (skb->ip_summed == CHECKSUM_HW) {
1352 skb = skb_padto(skb, (skb->len + PADDING_MASK) & ~PADDING_MASK);
1353 if (skb == NULL)
1354 return NETDEV_TX_OK;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001355 }
1356#endif /* ZEROCOPY && HAS_BROKEN_FIRMWARE */
1357
1358 entry = np->cur_tx % TX_RING_SIZE;
1359 for (i = 0; i < skb_num_frags(skb); i++) {
1360 int wrap_ring = 0;
1361 status = TxDescID;
1362
1363 if (i == 0) {
1364 np->tx_info[entry].skb = skb;
1365 status |= TxCRCEn;
1366 if (entry >= TX_RING_SIZE - skb_num_frags(skb)) {
1367 status |= TxRingWrap;
1368 wrap_ring = 1;
1369 }
1370 if (np->reap_tx) {
1371 status |= TxDescIntr;
1372 np->reap_tx = 0;
1373 }
1374 if (skb->ip_summed == CHECKSUM_HW) {
1375 status |= TxCalTCP;
1376 np->stats.tx_compressed++;
1377 }
1378 status |= skb_first_frag_len(skb) | (skb_num_frags(skb) << 16);
1379
1380 np->tx_info[entry].mapping =
1381 pci_map_single(np->pci_dev, skb->data, skb_first_frag_len(skb), PCI_DMA_TODEVICE);
1382 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001383 skb_frag_t *this_frag = &skb_shinfo(skb)->frags[i - 1];
1384 status |= this_frag->size;
1385 np->tx_info[entry].mapping =
1386 pci_map_single(np->pci_dev, page_address(this_frag->page) + this_frag->page_offset, this_frag->size, PCI_DMA_TODEVICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001387 }
1388
1389 np->tx_ring[entry].addr = cpu_to_dma(np->tx_info[entry].mapping);
1390 np->tx_ring[entry].status = cpu_to_le32(status);
1391 if (debug > 3)
1392 printk(KERN_DEBUG "%s: Tx #%d/#%d slot %d status %#8.8x.\n",
1393 dev->name, np->cur_tx, np->dirty_tx,
1394 entry, status);
1395 if (wrap_ring) {
1396 np->tx_info[entry].used_slots = TX_RING_SIZE - entry;
1397 np->cur_tx += np->tx_info[entry].used_slots;
1398 entry = 0;
1399 } else {
1400 np->tx_info[entry].used_slots = 1;
1401 np->cur_tx += np->tx_info[entry].used_slots;
1402 entry++;
1403 }
1404 /* scavenge the tx descriptors twice per TX_RING_SIZE */
1405 if (np->cur_tx % (TX_RING_SIZE / 2) == 0)
1406 np->reap_tx = 1;
1407 }
1408
1409 /* Non-x86: explicitly flush descriptor cache lines here. */
1410 /* Ensure all descriptors are written back before the transmit is
1411 initiated. - Jes */
1412 wmb();
1413
1414 /* Update the producer index. */
1415 writel(entry * (sizeof(starfire_tx_desc) / 8), np->base + TxProducerIdx);
1416
1417 /* 4 is arbitrary, but should be ok */
1418 if ((np->cur_tx - np->dirty_tx) + 4 > TX_RING_SIZE)
1419 netif_stop_queue(dev);
1420
1421 dev->trans_start = jiffies;
1422
1423 return 0;
1424}
1425
1426
1427/* The interrupt handler does all of the Rx thread work and cleans up
1428 after the Tx thread. */
1429static irqreturn_t intr_handler(int irq, void *dev_instance, struct pt_regs *rgs)
1430{
1431 struct net_device *dev = dev_instance;
1432 struct netdev_private *np = netdev_priv(dev);
1433 void __iomem *ioaddr = np->base;
1434 int boguscnt = max_interrupt_work;
1435 int consumer;
1436 int tx_status;
1437 int handled = 0;
1438
1439 do {
1440 u32 intr_status = readl(ioaddr + IntrClear);
1441
1442 if (debug > 4)
1443 printk(KERN_DEBUG "%s: Interrupt status %#8.8x.\n",
1444 dev->name, intr_status);
1445
1446 if (intr_status == 0 || intr_status == (u32) -1)
1447 break;
1448
1449 handled = 1;
1450
1451 if (intr_status & (IntrRxDone | IntrRxEmpty))
1452 netdev_rx(dev, ioaddr);
1453
1454 /* Scavenge the skbuff list based on the Tx-done queue.
1455 There are redundant checks here that may be cleaned up
1456 after the driver has proven to be reliable. */
1457 consumer = readl(ioaddr + TxConsumerIdx);
1458 if (debug > 3)
1459 printk(KERN_DEBUG "%s: Tx Consumer index is %d.\n",
1460 dev->name, consumer);
1461
1462 while ((tx_status = le32_to_cpu(np->tx_done_q[np->tx_done].status)) != 0) {
1463 if (debug > 3)
1464 printk(KERN_DEBUG "%s: Tx completion #%d entry %d is %#8.8x.\n",
1465 dev->name, np->dirty_tx, np->tx_done, tx_status);
1466 if ((tx_status & 0xe0000000) == 0xa0000000) {
1467 np->stats.tx_packets++;
1468 } else if ((tx_status & 0xe0000000) == 0x80000000) {
1469 u16 entry = (tx_status & 0x7fff) / sizeof(starfire_tx_desc);
1470 struct sk_buff *skb = np->tx_info[entry].skb;
1471 np->tx_info[entry].skb = NULL;
1472 pci_unmap_single(np->pci_dev,
1473 np->tx_info[entry].mapping,
1474 skb_first_frag_len(skb),
1475 PCI_DMA_TODEVICE);
1476 np->tx_info[entry].mapping = 0;
1477 np->dirty_tx += np->tx_info[entry].used_slots;
1478 entry = (entry + np->tx_info[entry].used_slots) % TX_RING_SIZE;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001479 {
1480 int i;
1481 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1482 pci_unmap_single(np->pci_dev,
1483 np->tx_info[entry].mapping,
1484 skb_shinfo(skb)->frags[i].size,
1485 PCI_DMA_TODEVICE);
1486 np->dirty_tx++;
1487 entry++;
1488 }
1489 }
Jeff Garzikfdecea62005-05-12 20:16:24 -04001490
Linus Torvalds1da177e2005-04-16 15:20:36 -07001491 dev_kfree_skb_irq(skb);
1492 }
1493 np->tx_done_q[np->tx_done].status = 0;
1494 np->tx_done = (np->tx_done + 1) % DONE_Q_SIZE;
1495 }
1496 writew(np->tx_done, ioaddr + CompletionQConsumerIdx + 2);
1497
1498 if (netif_queue_stopped(dev) &&
1499 (np->cur_tx - np->dirty_tx + 4 < TX_RING_SIZE)) {
1500 /* The ring is no longer full, wake the queue. */
1501 netif_wake_queue(dev);
1502 }
1503
1504 /* Stats overflow */
1505 if (intr_status & IntrStatsMax)
1506 get_stats(dev);
1507
1508 /* Media change interrupt. */
1509 if (intr_status & IntrLinkChange)
1510 netdev_media_change(dev);
1511
1512 /* Abnormal error summary/uncommon events handlers. */
1513 if (intr_status & IntrAbnormalSummary)
1514 netdev_error(dev, intr_status);
1515
1516 if (--boguscnt < 0) {
1517 if (debug > 1)
1518 printk(KERN_WARNING "%s: Too much work at interrupt, "
1519 "status=%#8.8x.\n",
1520 dev->name, intr_status);
1521 break;
1522 }
1523 } while (1);
1524
1525 if (debug > 4)
1526 printk(KERN_DEBUG "%s: exiting interrupt, status=%#8.8x.\n",
1527 dev->name, (int) readl(ioaddr + IntrStatus));
1528 return IRQ_RETVAL(handled);
1529}
1530
1531
1532/* This routine is logically part of the interrupt/poll handler, but separated
1533 for clarity, code sharing between NAPI/non-NAPI, and better register allocation. */
1534static int __netdev_rx(struct net_device *dev, int *quota)
1535{
1536 struct netdev_private *np = netdev_priv(dev);
1537 u32 desc_status;
1538 int retcode = 0;
1539
1540 /* If EOP is set on the next entry, it's a new packet. Send it up. */
1541 while ((desc_status = le32_to_cpu(np->rx_done_q[np->rx_done].status)) != 0) {
1542 struct sk_buff *skb;
1543 u16 pkt_len;
1544 int entry;
1545 rx_done_desc *desc = &np->rx_done_q[np->rx_done];
1546
1547 if (debug > 4)
1548 printk(KERN_DEBUG " netdev_rx() status of %d was %#8.8x.\n", np->rx_done, desc_status);
1549 if (!(desc_status & RxOK)) {
Jeff Garzikfdecea62005-05-12 20:16:24 -04001550 /* There was an error. */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001551 if (debug > 2)
1552 printk(KERN_DEBUG " netdev_rx() Rx error was %#8.8x.\n", desc_status);
1553 np->stats.rx_errors++;
1554 if (desc_status & RxFIFOErr)
1555 np->stats.rx_fifo_errors++;
1556 goto next_rx;
1557 }
1558
1559 if (*quota <= 0) { /* out of rx quota */
1560 retcode = 1;
1561 goto out;
1562 }
1563 (*quota)--;
1564
1565 pkt_len = desc_status; /* Implicitly Truncate */
1566 entry = (desc_status >> 16) & 0x7ff;
1567
1568 if (debug > 4)
1569 printk(KERN_DEBUG " netdev_rx() normal Rx pkt length %d, quota %d.\n", pkt_len, *quota);
1570 /* Check if the packet is long enough to accept without copying
1571 to a minimally-sized skbuff. */
1572 if (pkt_len < rx_copybreak
1573 && (skb = dev_alloc_skb(pkt_len + 2)) != NULL) {
1574 skb->dev = dev;
1575 skb_reserve(skb, 2); /* 16 byte align the IP header */
1576 pci_dma_sync_single_for_cpu(np->pci_dev,
1577 np->rx_info[entry].mapping,
1578 pkt_len, PCI_DMA_FROMDEVICE);
David S. Miller689be432005-06-28 15:25:31 -07001579 eth_copy_and_sum(skb, np->rx_info[entry].skb->data, pkt_len, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001580 pci_dma_sync_single_for_device(np->pci_dev,
1581 np->rx_info[entry].mapping,
1582 pkt_len, PCI_DMA_FROMDEVICE);
1583 skb_put(skb, pkt_len);
1584 } else {
1585 pci_unmap_single(np->pci_dev, np->rx_info[entry].mapping, np->rx_buf_sz, PCI_DMA_FROMDEVICE);
1586 skb = np->rx_info[entry].skb;
1587 skb_put(skb, pkt_len);
1588 np->rx_info[entry].skb = NULL;
1589 np->rx_info[entry].mapping = 0;
1590 }
1591#ifndef final_version /* Remove after testing. */
1592 /* You will want this info for the initial debug. */
1593 if (debug > 5)
1594 printk(KERN_DEBUG " Rx data %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:"
1595 "%2.2x %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x %2.2x%2.2x.\n",
1596 skb->data[0], skb->data[1], skb->data[2], skb->data[3],
1597 skb->data[4], skb->data[5], skb->data[6], skb->data[7],
1598 skb->data[8], skb->data[9], skb->data[10],
1599 skb->data[11], skb->data[12], skb->data[13]);
1600#endif
1601
1602 skb->protocol = eth_type_trans(skb, dev);
Jeff Garzikfdecea62005-05-12 20:16:24 -04001603#ifdef VLAN_SUPPORT
Linus Torvalds1da177e2005-04-16 15:20:36 -07001604 if (debug > 4)
1605 printk(KERN_DEBUG " netdev_rx() status2 of %d was %#4.4x.\n", np->rx_done, le16_to_cpu(desc->status2));
1606#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07001607 if (le16_to_cpu(desc->status2) & 0x0100) {
1608 skb->ip_summed = CHECKSUM_UNNECESSARY;
1609 np->stats.rx_compressed++;
1610 }
1611 /*
1612 * This feature doesn't seem to be working, at least
1613 * with the two firmware versions I have. If the GFP sees
1614 * an IP fragment, it either ignores it completely, or reports
1615 * "bad checksum" on it.
1616 *
1617 * Maybe I missed something -- corrections are welcome.
1618 * Until then, the printk stays. :-) -Ion
1619 */
1620 else if (le16_to_cpu(desc->status2) & 0x0040) {
1621 skb->ip_summed = CHECKSUM_HW;
1622 skb->csum = le16_to_cpu(desc->csum);
1623 printk(KERN_DEBUG "%s: checksum_hw, status2 = %#x\n", dev->name, le16_to_cpu(desc->status2));
1624 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001625#ifdef VLAN_SUPPORT
1626 if (np->vlgrp && le16_to_cpu(desc->status2) & 0x0200) {
1627 if (debug > 4)
1628 printk(KERN_DEBUG " netdev_rx() vlanid = %d\n", le16_to_cpu(desc->vlanid));
1629 /* vlan_netdev_receive_skb() expects a packet with the VLAN tag stripped out */
1630 vlan_netdev_receive_skb(skb, np->vlgrp, le16_to_cpu(desc->vlanid) & VLAN_VID_MASK);
1631 } else
1632#endif /* VLAN_SUPPORT */
1633 netdev_receive_skb(skb);
1634 dev->last_rx = jiffies;
1635 np->stats.rx_packets++;
1636
1637 next_rx:
1638 np->cur_rx++;
1639 desc->status = 0;
1640 np->rx_done = (np->rx_done + 1) % DONE_Q_SIZE;
1641 }
1642 writew(np->rx_done, np->base + CompletionQConsumerIdx);
1643
1644 out:
1645 refill_rx_ring(dev);
1646 if (debug > 5)
1647 printk(KERN_DEBUG " exiting netdev_rx(): %d, status of %d was %#8.8x.\n",
1648 retcode, np->rx_done, desc_status);
1649 return retcode;
1650}
1651
1652
1653#ifdef HAVE_NETDEV_POLL
1654static int netdev_poll(struct net_device *dev, int *budget)
1655{
1656 u32 intr_status;
1657 struct netdev_private *np = netdev_priv(dev);
1658 void __iomem *ioaddr = np->base;
1659 int retcode = 0, quota = dev->quota;
1660
1661 do {
1662 writel(IntrRxDone | IntrRxEmpty, ioaddr + IntrClear);
1663
1664 retcode = __netdev_rx(dev, &quota);
1665 *budget -= (dev->quota - quota);
1666 dev->quota = quota;
1667 if (retcode)
1668 goto out;
1669
1670 intr_status = readl(ioaddr + IntrStatus);
1671 } while (intr_status & (IntrRxDone | IntrRxEmpty));
1672
1673 netif_rx_complete(dev);
1674 intr_status = readl(ioaddr + IntrEnable);
1675 intr_status |= IntrRxDone | IntrRxEmpty;
1676 writel(intr_status, ioaddr + IntrEnable);
1677
1678 out:
1679 if (debug > 5)
1680 printk(KERN_DEBUG " exiting netdev_poll(): %d.\n", retcode);
1681
1682 /* Restart Rx engine if stopped. */
1683 return retcode;
1684}
1685#endif /* HAVE_NETDEV_POLL */
1686
1687
1688static void refill_rx_ring(struct net_device *dev)
1689{
1690 struct netdev_private *np = netdev_priv(dev);
1691 struct sk_buff *skb;
1692 int entry = -1;
1693
1694 /* Refill the Rx ring buffers. */
1695 for (; np->cur_rx - np->dirty_rx > 0; np->dirty_rx++) {
1696 entry = np->dirty_rx % RX_RING_SIZE;
1697 if (np->rx_info[entry].skb == NULL) {
1698 skb = dev_alloc_skb(np->rx_buf_sz);
1699 np->rx_info[entry].skb = skb;
1700 if (skb == NULL)
1701 break; /* Better luck next round. */
1702 np->rx_info[entry].mapping =
David S. Miller689be432005-06-28 15:25:31 -07001703 pci_map_single(np->pci_dev, skb->data, np->rx_buf_sz, PCI_DMA_FROMDEVICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001704 skb->dev = dev; /* Mark as being used by this device. */
1705 np->rx_ring[entry].rxaddr =
1706 cpu_to_dma(np->rx_info[entry].mapping | RxDescValid);
1707 }
1708 if (entry == RX_RING_SIZE - 1)
1709 np->rx_ring[entry].rxaddr |= cpu_to_dma(RxDescEndRing);
1710 }
1711 if (entry >= 0)
1712 writew(entry, np->base + RxDescQIdx);
1713}
1714
1715
1716static void netdev_media_change(struct net_device *dev)
1717{
1718 struct netdev_private *np = netdev_priv(dev);
1719 void __iomem *ioaddr = np->base;
1720 u16 reg0, reg1, reg4, reg5;
1721 u32 new_tx_mode;
1722 u32 new_intr_timer_ctrl;
1723
1724 /* reset status first */
1725 mdio_read(dev, np->phys[0], MII_BMCR);
1726 mdio_read(dev, np->phys[0], MII_BMSR);
1727
1728 reg0 = mdio_read(dev, np->phys[0], MII_BMCR);
1729 reg1 = mdio_read(dev, np->phys[0], MII_BMSR);
1730
1731 if (reg1 & BMSR_LSTATUS) {
1732 /* link is up */
1733 if (reg0 & BMCR_ANENABLE) {
1734 /* autonegotiation is enabled */
1735 reg4 = mdio_read(dev, np->phys[0], MII_ADVERTISE);
1736 reg5 = mdio_read(dev, np->phys[0], MII_LPA);
1737 if (reg4 & ADVERTISE_100FULL && reg5 & LPA_100FULL) {
1738 np->speed100 = 1;
1739 np->mii_if.full_duplex = 1;
1740 } else if (reg4 & ADVERTISE_100HALF && reg5 & LPA_100HALF) {
1741 np->speed100 = 1;
1742 np->mii_if.full_duplex = 0;
1743 } else if (reg4 & ADVERTISE_10FULL && reg5 & LPA_10FULL) {
1744 np->speed100 = 0;
1745 np->mii_if.full_duplex = 1;
1746 } else {
1747 np->speed100 = 0;
1748 np->mii_if.full_duplex = 0;
1749 }
1750 } else {
1751 /* autonegotiation is disabled */
1752 if (reg0 & BMCR_SPEED100)
1753 np->speed100 = 1;
1754 else
1755 np->speed100 = 0;
1756 if (reg0 & BMCR_FULLDPLX)
1757 np->mii_if.full_duplex = 1;
1758 else
1759 np->mii_if.full_duplex = 0;
1760 }
1761 netif_carrier_on(dev);
1762 printk(KERN_DEBUG "%s: Link is up, running at %sMbit %s-duplex\n",
1763 dev->name,
1764 np->speed100 ? "100" : "10",
1765 np->mii_if.full_duplex ? "full" : "half");
1766
1767 new_tx_mode = np->tx_mode & ~FullDuplex; /* duplex setting */
1768 if (np->mii_if.full_duplex)
1769 new_tx_mode |= FullDuplex;
1770 if (np->tx_mode != new_tx_mode) {
1771 np->tx_mode = new_tx_mode;
1772 writel(np->tx_mode | MiiSoftReset, ioaddr + TxMode);
1773 udelay(1000);
1774 writel(np->tx_mode, ioaddr + TxMode);
1775 }
1776
1777 new_intr_timer_ctrl = np->intr_timer_ctrl & ~Timer10X;
1778 if (np->speed100)
1779 new_intr_timer_ctrl |= Timer10X;
1780 if (np->intr_timer_ctrl != new_intr_timer_ctrl) {
1781 np->intr_timer_ctrl = new_intr_timer_ctrl;
1782 writel(new_intr_timer_ctrl, ioaddr + IntrTimerCtrl);
1783 }
1784 } else {
1785 netif_carrier_off(dev);
1786 printk(KERN_DEBUG "%s: Link is down\n", dev->name);
1787 }
1788}
1789
1790
1791static void netdev_error(struct net_device *dev, int intr_status)
1792{
1793 struct netdev_private *np = netdev_priv(dev);
1794
1795 /* Came close to underrunning the Tx FIFO, increase threshold. */
1796 if (intr_status & IntrTxDataLow) {
1797 if (np->tx_threshold <= PKT_BUF_SZ / 16) {
1798 writel(++np->tx_threshold, np->base + TxThreshold);
1799 printk(KERN_NOTICE "%s: PCI bus congestion, increasing Tx FIFO threshold to %d bytes\n",
1800 dev->name, np->tx_threshold * 16);
1801 } else
1802 printk(KERN_WARNING "%s: PCI Tx underflow -- adapter is probably malfunctioning\n", dev->name);
1803 }
1804 if (intr_status & IntrRxGFPDead) {
1805 np->stats.rx_fifo_errors++;
1806 np->stats.rx_errors++;
1807 }
1808 if (intr_status & (IntrNoTxCsum | IntrDMAErr)) {
1809 np->stats.tx_fifo_errors++;
1810 np->stats.tx_errors++;
1811 }
1812 if ((intr_status & ~(IntrNormalMask | IntrAbnormalSummary | IntrLinkChange | IntrStatsMax | IntrTxDataLow | IntrRxGFPDead | IntrNoTxCsum | IntrPCIPad)) && debug)
1813 printk(KERN_ERR "%s: Something Wicked happened! %#8.8x.\n",
1814 dev->name, intr_status);
1815}
1816
1817
1818static struct net_device_stats *get_stats(struct net_device *dev)
1819{
1820 struct netdev_private *np = netdev_priv(dev);
1821 void __iomem *ioaddr = np->base;
1822
1823 /* This adapter architecture needs no SMP locks. */
1824 np->stats.tx_bytes = readl(ioaddr + 0x57010);
1825 np->stats.rx_bytes = readl(ioaddr + 0x57044);
1826 np->stats.tx_packets = readl(ioaddr + 0x57000);
1827 np->stats.tx_aborted_errors =
1828 readl(ioaddr + 0x57024) + readl(ioaddr + 0x57028);
1829 np->stats.tx_window_errors = readl(ioaddr + 0x57018);
1830 np->stats.collisions =
1831 readl(ioaddr + 0x57004) + readl(ioaddr + 0x57008);
1832
1833 /* The chip only need report frame silently dropped. */
1834 np->stats.rx_dropped += readw(ioaddr + RxDMAStatus);
1835 writew(0, ioaddr + RxDMAStatus);
1836 np->stats.rx_crc_errors = readl(ioaddr + 0x5703C);
1837 np->stats.rx_frame_errors = readl(ioaddr + 0x57040);
1838 np->stats.rx_length_errors = readl(ioaddr + 0x57058);
1839 np->stats.rx_missed_errors = readl(ioaddr + 0x5707C);
1840
1841 return &np->stats;
1842}
1843
1844
Linus Torvalds1da177e2005-04-16 15:20:36 -07001845static void set_rx_mode(struct net_device *dev)
1846{
1847 struct netdev_private *np = netdev_priv(dev);
1848 void __iomem *ioaddr = np->base;
1849 u32 rx_mode = MinVLANPrio;
1850 struct dev_mc_list *mclist;
1851 int i;
1852#ifdef VLAN_SUPPORT
1853
1854 rx_mode |= VlanMode;
1855 if (np->vlgrp) {
1856 int vlan_count = 0;
1857 void __iomem *filter_addr = ioaddr + HashTable + 8;
1858 for (i = 0; i < VLAN_VID_MASK; i++) {
1859 if (np->vlgrp->vlan_devices[i]) {
1860 if (vlan_count >= 32)
1861 break;
1862 writew(cpu_to_be16(i), filter_addr);
1863 filter_addr += 16;
1864 vlan_count++;
1865 }
1866 }
1867 if (i == VLAN_VID_MASK) {
1868 rx_mode |= PerfectFilterVlan;
1869 while (vlan_count < 32) {
1870 writew(0, filter_addr);
1871 filter_addr += 16;
1872 vlan_count++;
1873 }
1874 }
1875 }
1876#endif /* VLAN_SUPPORT */
1877
1878 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1879 rx_mode |= AcceptAll;
1880 } else if ((dev->mc_count > multicast_filter_limit)
1881 || (dev->flags & IFF_ALLMULTI)) {
1882 /* Too many to match, or accept all multicasts. */
1883 rx_mode |= AcceptBroadcast|AcceptAllMulticast|PerfectFilter;
1884 } else if (dev->mc_count <= 14) {
1885 /* Use the 16 element perfect filter, skip first two entries. */
1886 void __iomem *filter_addr = ioaddr + PerfFilterTable + 2 * 16;
1887 u16 *eaddrs;
1888 for (i = 2, mclist = dev->mc_list; mclist && i < dev->mc_count + 2;
1889 i++, mclist = mclist->next) {
1890 eaddrs = (u16 *)mclist->dmi_addr;
1891 writew(cpu_to_be16(eaddrs[2]), filter_addr); filter_addr += 4;
1892 writew(cpu_to_be16(eaddrs[1]), filter_addr); filter_addr += 4;
1893 writew(cpu_to_be16(eaddrs[0]), filter_addr); filter_addr += 8;
1894 }
1895 eaddrs = (u16 *)dev->dev_addr;
1896 while (i++ < 16) {
1897 writew(cpu_to_be16(eaddrs[0]), filter_addr); filter_addr += 4;
1898 writew(cpu_to_be16(eaddrs[1]), filter_addr); filter_addr += 4;
1899 writew(cpu_to_be16(eaddrs[2]), filter_addr); filter_addr += 8;
1900 }
1901 rx_mode |= AcceptBroadcast|PerfectFilter;
1902 } else {
1903 /* Must use a multicast hash table. */
1904 void __iomem *filter_addr;
1905 u16 *eaddrs;
1906 u16 mc_filter[32] __attribute__ ((aligned(sizeof(long)))); /* Multicast hash filter */
1907
1908 memset(mc_filter, 0, sizeof(mc_filter));
1909 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1910 i++, mclist = mclist->next) {
Jeff Garzikfdecea62005-05-12 20:16:24 -04001911 /* The chip uses the upper 9 CRC bits
1912 as index into the hash table */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001913 int bit_nr = ether_crc_le(ETH_ALEN, mclist->dmi_addr) >> 23;
1914 __u32 *fptr = (__u32 *) &mc_filter[(bit_nr >> 4) & ~1];
1915
1916 *fptr |= cpu_to_le32(1 << (bit_nr & 31));
1917 }
1918 /* Clear the perfect filter list, skip first two entries. */
1919 filter_addr = ioaddr + PerfFilterTable + 2 * 16;
1920 eaddrs = (u16 *)dev->dev_addr;
1921 for (i = 2; i < 16; i++) {
1922 writew(cpu_to_be16(eaddrs[0]), filter_addr); filter_addr += 4;
1923 writew(cpu_to_be16(eaddrs[1]), filter_addr); filter_addr += 4;
1924 writew(cpu_to_be16(eaddrs[2]), filter_addr); filter_addr += 8;
1925 }
1926 for (filter_addr = ioaddr + HashTable, i = 0; i < 32; filter_addr+= 16, i++)
1927 writew(mc_filter[i], filter_addr);
1928 rx_mode |= AcceptBroadcast|PerfectFilter|HashFilter;
1929 }
1930 writel(rx_mode, ioaddr + RxFilterMode);
1931}
1932
1933static int check_if_running(struct net_device *dev)
1934{
1935 if (!netif_running(dev))
1936 return -EINVAL;
1937 return 0;
1938}
1939
1940static void get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1941{
1942 struct netdev_private *np = netdev_priv(dev);
1943 strcpy(info->driver, DRV_NAME);
1944 strcpy(info->version, DRV_VERSION);
Jeff Garzikfdecea62005-05-12 20:16:24 -04001945 strcpy(info->bus_info, pci_name(np->pci_dev));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001946}
1947
1948static int get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1949{
1950 struct netdev_private *np = netdev_priv(dev);
1951 spin_lock_irq(&np->lock);
1952 mii_ethtool_gset(&np->mii_if, ecmd);
1953 spin_unlock_irq(&np->lock);
1954 return 0;
1955}
1956
1957static int set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1958{
1959 struct netdev_private *np = netdev_priv(dev);
1960 int res;
1961 spin_lock_irq(&np->lock);
1962 res = mii_ethtool_sset(&np->mii_if, ecmd);
1963 spin_unlock_irq(&np->lock);
1964 check_duplex(dev);
1965 return res;
1966}
1967
1968static int nway_reset(struct net_device *dev)
1969{
1970 struct netdev_private *np = netdev_priv(dev);
1971 return mii_nway_restart(&np->mii_if);
1972}
1973
1974static u32 get_link(struct net_device *dev)
1975{
1976 struct netdev_private *np = netdev_priv(dev);
1977 return mii_link_ok(&np->mii_if);
1978}
1979
1980static u32 get_msglevel(struct net_device *dev)
1981{
1982 return debug;
1983}
1984
1985static void set_msglevel(struct net_device *dev, u32 val)
1986{
1987 debug = val;
1988}
1989
1990static struct ethtool_ops ethtool_ops = {
1991 .begin = check_if_running,
1992 .get_drvinfo = get_drvinfo,
1993 .get_settings = get_settings,
1994 .set_settings = set_settings,
1995 .nway_reset = nway_reset,
1996 .get_link = get_link,
1997 .get_msglevel = get_msglevel,
1998 .set_msglevel = set_msglevel,
1999};
2000
2001static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2002{
2003 struct netdev_private *np = netdev_priv(dev);
2004 struct mii_ioctl_data *data = if_mii(rq);
2005 int rc;
2006
2007 if (!netif_running(dev))
2008 return -EINVAL;
2009
2010 spin_lock_irq(&np->lock);
2011 rc = generic_mii_ioctl(&np->mii_if, data, cmd, NULL);
2012 spin_unlock_irq(&np->lock);
2013
2014 if ((cmd == SIOCSMIIREG) && (data->phy_id == np->phys[0]))
2015 check_duplex(dev);
2016
2017 return rc;
2018}
2019
2020static int netdev_close(struct net_device *dev)
2021{
2022 struct netdev_private *np = netdev_priv(dev);
2023 void __iomem *ioaddr = np->base;
2024 int i;
2025
2026 netif_stop_queue(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002027
2028 if (debug > 1) {
2029 printk(KERN_DEBUG "%s: Shutting down ethercard, Intr status %#8.8x.\n",
2030 dev->name, (int) readl(ioaddr + IntrStatus));
2031 printk(KERN_DEBUG "%s: Queue pointers were Tx %d / %d, Rx %d / %d.\n",
2032 dev->name, np->cur_tx, np->dirty_tx,
2033 np->cur_rx, np->dirty_rx);
2034 }
2035
2036 /* Disable interrupts by clearing the interrupt mask. */
2037 writel(0, ioaddr + IntrEnable);
2038
2039 /* Stop the chip's Tx and Rx processes. */
2040 writel(0, ioaddr + GenCtrl);
2041 readl(ioaddr + GenCtrl);
2042
2043 if (debug > 5) {
2044 printk(KERN_DEBUG" Tx ring at %#llx:\n",
2045 (long long) np->tx_ring_dma);
2046 for (i = 0; i < 8 /* TX_RING_SIZE is huge! */; i++)
2047 printk(KERN_DEBUG " #%d desc. %#8.8x %#llx -> %#8.8x.\n",
2048 i, le32_to_cpu(np->tx_ring[i].status),
2049 (long long) dma_to_cpu(np->tx_ring[i].addr),
2050 le32_to_cpu(np->tx_done_q[i].status));
2051 printk(KERN_DEBUG " Rx ring at %#llx -> %p:\n",
2052 (long long) np->rx_ring_dma, np->rx_done_q);
2053 if (np->rx_done_q)
2054 for (i = 0; i < 8 /* RX_RING_SIZE */; i++) {
2055 printk(KERN_DEBUG " #%d desc. %#llx -> %#8.8x\n",
2056 i, (long long) dma_to_cpu(np->rx_ring[i].rxaddr), le32_to_cpu(np->rx_done_q[i].status));
2057 }
2058 }
2059
2060 free_irq(dev->irq, dev);
2061
2062 /* Free all the skbuffs in the Rx queue. */
2063 for (i = 0; i < RX_RING_SIZE; i++) {
2064 np->rx_ring[i].rxaddr = cpu_to_dma(0xBADF00D0); /* An invalid address. */
2065 if (np->rx_info[i].skb != NULL) {
2066 pci_unmap_single(np->pci_dev, np->rx_info[i].mapping, np->rx_buf_sz, PCI_DMA_FROMDEVICE);
2067 dev_kfree_skb(np->rx_info[i].skb);
2068 }
2069 np->rx_info[i].skb = NULL;
2070 np->rx_info[i].mapping = 0;
2071 }
2072 for (i = 0; i < TX_RING_SIZE; i++) {
2073 struct sk_buff *skb = np->tx_info[i].skb;
2074 if (skb == NULL)
2075 continue;
2076 pci_unmap_single(np->pci_dev,
2077 np->tx_info[i].mapping,
2078 skb_first_frag_len(skb), PCI_DMA_TODEVICE);
2079 np->tx_info[i].mapping = 0;
2080 dev_kfree_skb(skb);
2081 np->tx_info[i].skb = NULL;
2082 }
2083
2084 return 0;
2085}
2086
Stefan Rompfd4fbeab2006-01-17 22:52:51 +01002087#ifdef CONFIG_PM
2088static int starfire_suspend(struct pci_dev *pdev, pm_message_t state)
2089{
2090 struct net_device *dev = pci_get_drvdata(pdev);
2091
2092 if (netif_running(dev)) {
2093 netif_device_detach(dev);
2094 netdev_close(dev);
2095 }
2096
2097 pci_save_state(pdev);
2098 pci_set_power_state(pdev, pci_choose_state(pdev,state));
2099
2100 return 0;
2101}
2102
2103static int starfire_resume(struct pci_dev *pdev)
2104{
2105 struct net_device *dev = pci_get_drvdata(pdev);
2106
2107 pci_set_power_state(pdev, PCI_D0);
2108 pci_restore_state(pdev);
2109
2110 if (netif_running(dev)) {
2111 netdev_open(dev);
2112 netif_device_attach(dev);
2113 }
2114
2115 return 0;
2116}
2117#endif /* CONFIG_PM */
2118
Linus Torvalds1da177e2005-04-16 15:20:36 -07002119
2120static void __devexit starfire_remove_one (struct pci_dev *pdev)
2121{
2122 struct net_device *dev = pci_get_drvdata(pdev);
2123 struct netdev_private *np = netdev_priv(dev);
2124
Eric Sesterhenn5d9428d2006-04-02 13:52:48 +02002125 BUG_ON(!dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002126
2127 unregister_netdev(dev);
2128
2129 if (np->queue_mem)
2130 pci_free_consistent(pdev, np->queue_mem_size, np->queue_mem, np->queue_mem_dma);
2131
2132
2133 /* XXX: add wakeup code -- requires firmware for MagicPacket */
2134 pci_set_power_state(pdev, PCI_D3hot); /* go to sleep in D3 mode */
2135 pci_disable_device(pdev);
2136
2137 iounmap(np->base);
2138 pci_release_regions(pdev);
2139
2140 pci_set_drvdata(pdev, NULL);
2141 free_netdev(dev); /* Will also free np!! */
2142}
2143
2144
2145static struct pci_driver starfire_driver = {
2146 .name = DRV_NAME,
2147 .probe = starfire_init_one,
2148 .remove = __devexit_p(starfire_remove_one),
Stefan Rompfd4fbeab2006-01-17 22:52:51 +01002149#ifdef CONFIG_PM
2150 .suspend = starfire_suspend,
2151 .resume = starfire_resume,
2152#endif /* CONFIG_PM */
Linus Torvalds1da177e2005-04-16 15:20:36 -07002153 .id_table = starfire_pci_tbl,
2154};
2155
2156
2157static int __init starfire_init (void)
2158{
2159/* when a module, this is printed whether or not devices are found in probe */
2160#ifdef MODULE
2161 printk(version);
Jeff Garzikfdecea62005-05-12 20:16:24 -04002162#ifdef HAVE_NETDEV_POLL
2163 printk(KERN_INFO DRV_NAME ": polling (NAPI) enabled\n");
2164#else
2165 printk(KERN_INFO DRV_NAME ": polling (NAPI) disabled\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07002166#endif
Jeff Garzikfdecea62005-05-12 20:16:24 -04002167#endif
2168
Linus Torvalds1da177e2005-04-16 15:20:36 -07002169 /* we can do this test only at run-time... sigh */
Ion Badulescu67974232005-10-03 22:31:36 -04002170 if (sizeof(dma_addr_t) != sizeof(netdrv_addr_t)) {
2171 printk("This driver has dma_addr_t issues, please send email to maintainer\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07002172 return -ENODEV;
2173 }
Ion Badulescu67974232005-10-03 22:31:36 -04002174
Linus Torvalds1da177e2005-04-16 15:20:36 -07002175 return pci_module_init (&starfire_driver);
2176}
2177
2178
2179static void __exit starfire_cleanup (void)
2180{
2181 pci_unregister_driver (&starfire_driver);
2182}
2183
2184
2185module_init(starfire_init);
2186module_exit(starfire_cleanup);
2187
2188
2189/*
2190 * Local variables:
2191 * c-basic-offset: 8
2192 * tab-width: 8
2193 * End:
2194 */