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Sathish Ambley9d69ac32012-03-21 10:28:26 -07001/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
Sathish Ambley4df614c2011-10-07 16:30:46 -070012
13/include/ "skeleton.dtsi"
Abhimanyu Kapur90ced6e2012-06-26 17:41:25 -070014/include/ "msm8974_pm.dtsi"
Abhimanyu Kapur90ced6e2012-06-26 17:41:25 -070015/include/ "msm8974-iommu.dtsi"
Kevin Chan350b6932012-08-01 02:21:00 -070016/include/ "msm8974-camera.dtsi"
Pratik Patelf20bacb2012-07-21 14:46:36 -070017/include/ "msm8974-coresight.dtsi"
Matt Wagantallfc727212012-01-06 18:18:25 -080018/include/ "msm-gdsc.dtsi"
Olav Haugan49173442012-08-01 13:23:18 -070019/include/ "msm8974-ion.dtsi"
Pu Chen1335e872012-08-01 08:45:25 -060020/include/ "msm8974-gpu.dtsi"
Adrian Salido-Morenoa80c69e2012-07-31 18:11:09 -070021/include/ "msm8974-mdss.dtsi"
Sathish Ambley4df614c2011-10-07 16:30:46 -070022
23/ {
Abhimanyu Kapur90ced6e2012-06-26 17:41:25 -070024 model = "Qualcomm MSM 8974";
25 compatible = "qcom,msm8974";
Sathish Ambley4df614c2011-10-07 16:30:46 -070026 interrupt-parent = <&intc>;
27
28 intc: interrupt-controller@F9000000 {
29 compatible = "qcom,msm-qgic2";
30 interrupt-controller;
Michael Bohanc7224532012-01-06 16:02:52 -080031 #interrupt-cells = <3>;
Sathish Ambley4df614c2011-10-07 16:30:46 -070032 reg = <0xF9000000 0x1000>,
33 <0xF9002000 0x1000>;
34 };
Sathish Ambley3d50c762011-10-25 15:26:00 -070035
Sathish Ambleye046b242012-04-09 12:38:05 -070036 msmgpio: gpio@fd510000 {
Michael Bohan0425f6f2012-01-17 14:36:39 -080037 compatible = "qcom,msm-gpio";
Rohit Vaswanib1cc4932012-07-23 21:30:11 -070038 gpio-controller;
39 #gpio-cells = <2>;
Michael Bohan0425f6f2012-01-17 14:36:39 -080040 interrupt-controller;
41 #interrupt-cells = <2>;
Sathish Ambleye046b242012-04-09 12:38:05 -070042 reg = <0xfd510000 0x4000>;
Michael Bohan0425f6f2012-01-17 14:36:39 -080043 };
44
Sathish Ambley098f9bd2011-11-09 16:32:53 -080045 timer {
Sathish Ambley2f27a172012-03-16 10:46:28 -070046 compatible = "qcom,msm-qtimer", "arm,armv7-timer";
Sathish Ambleyddd099e2012-04-25 13:24:47 -070047 interrupts = <1 2 0 1 3 0>;
Sathish Ambley2f27a172012-03-16 10:46:28 -070048 clock-frequency = <19200000>;
Sathish Ambley098f9bd2011-11-09 16:32:53 -080049 };
50
Praneeth Paladugu4b73ec82012-02-08 12:55:59 -080051 qcom,vidc@fdc00000 {
52 compatible = "qcom,msm-vidc";
53 reg = <0xfdc00000 0xff000>;
54 interrupts = <0 44 0>;
Vinay Kalia68398a42012-06-22 18:36:12 -070055 vidc-cp-map = <0x1000000 0x40000000>;
56 vidc-ns-map = <0x40000000 0x40000000>;
Vinay Kalia40680aa2012-07-23 12:45:39 -070057 load-freq-tbl = <979200 410000000>,
58 <560145 266670000>,
59 <421161 200000000>,
60 <243000 133330000>,
61 <108000 100000000>,
62 <36000 50000000>;
Praneeth Paladugu4b73ec82012-02-08 12:55:59 -080063 };
64
David Brown225abee2012-02-09 22:28:50 -080065 serial@f991f000 {
Sathish Ambley3d50c762011-10-25 15:26:00 -070066 compatible = "qcom,msm-lsuart-v14";
David Brown225abee2012-02-09 22:28:50 -080067 reg = <0xf991f000 0x1000>;
Michael Bohanc7224532012-01-06 16:02:52 -080068 interrupts = <0 109 0>;
Stepan Moskovchenko43f11582012-08-08 17:20:38 -070069 status = "disabled";
Sathish Ambley3d50c762011-10-25 15:26:00 -070070 };
Pavankumar Kondetieaea7fe2011-10-27 14:46:45 +053071
Sathish Ambley9d69ac32012-03-21 10:28:26 -070072 serial@f995e000 {
73 compatible = "qcom,msm-lsuart-v14";
74 reg = <0xf995e000 0x1000>;
75 interrupts = <0 114 0>;
Stepan Moskovchenko43f11582012-08-08 17:20:38 -070076 status = "disabled";
Sathish Ambley9d69ac32012-03-21 10:28:26 -070077 };
78
Stepan Moskovchenko5269b602012-08-08 17:57:09 -070079 serial@f991e000 {
80 compatible = "qcom,msm-lsuart-v14";
81 reg = <0xf991e000 0x1000>;
82 interrupts = <0 108 0>;
83 status = "disabled";
84 };
85
David Brown225abee2012-02-09 22:28:50 -080086 usb@f9a55000 {
Pavankumar Kondetieaea7fe2011-10-27 14:46:45 +053087 compatible = "qcom,hsusb-otg";
David Brown225abee2012-02-09 22:28:50 -080088 reg = <0xf9a55000 0x400>;
Manu Gautamf8c45642012-08-10 10:20:56 -070089 interrupts = <0 134 0 0 140 0>;
90 interrupt-names = "core_irq", "async_irq";
Michael Bohane66a3a92012-03-26 12:47:28 -070091 HSUSB_VDDCX-supply = <&pm8841_s2>;
92 HSUSB_1p8-supply = <&pm8941_l6>;
93 HSUSB_3p3-supply = <&pm8941_l24>;
Pavankumar Kondetieaea7fe2011-10-27 14:46:45 +053094
95 qcom,hsusb-otg-phy-type = <2>;
96 qcom,hsusb-otg-mode = <1>;
97 qcom,hsusb-otg-otg-control = <1>;
Manu Gautambd53fba2012-07-31 16:13:06 +053098 qcom,hsusb-otg-disable-reset;
Pavankumar Kondetieaea7fe2011-10-27 14:46:45 +053099 };
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530100
Krishna Kondab6da6932012-08-19 12:04:05 -0700101 sdcc1: qcom,sdcc@f9824000 {
Sujit Reddy Thumma38459152012-06-26 00:07:59 +0530102 cell-index = <1>; /* SDC1 eMMC slot */
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530103 compatible = "qcom,msm-sdcc";
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530104 reg = <0xf9824000 0x1000>;
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530105 reg-names = "core_mem";
Michael Bohanc7224532012-01-06 16:02:52 -0800106 interrupts = <0 123 0>;
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530107 interrupt-names = "core_irq";
Sujit Reddy Thummab9ff7f02012-05-04 09:57:49 +0530108 vdd-supply = <&pm8941_l20>;
109 vdd-io-supply = <&pm8941_s3>;
110
111 qcom,sdcc-vdd-voltage_level = <2950000 2950000>;
112 qcom,sdcc-vdd-current_level = <800 500000>;
113
114 qcom,sdcc-vdd-io-always_on;
115 qcom,sdcc-vdd-io-voltage_level = <1800000 1800000>;
116 qcom,sdcc-vdd-io-current_level = <250 154000>;
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530117
Sujit Reddy Thumma38459152012-06-26 00:07:59 +0530118 qcom,sdcc-pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
119 qcom,sdcc-pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
120 qcom,sdcc-pad-drv-on = <0x7 0x4 0x4>; /* 16mA, 10mA, 10mA */
121 qcom,sdcc-pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
122
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530123 qcom,sdcc-clk-rates = <400000 25000000 50000000 100000000 200000000>;
124 qcom,sdcc-sup-voltages = <2950 2950>;
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530125 qcom,sdcc-bus-width = <8>;
126 qcom,sdcc-nonremovable;
Sujit Reddy Thumma824b7522012-05-30 13:04:34 +0530127 qcom,sdcc-bus-speed-mode = "HS200_1p8v", "DDR_1p8v";
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530128 };
129
Krishna Kondab6da6932012-08-19 12:04:05 -0700130 sdcc2: qcom,sdcc@f98a4000 {
Sujit Reddy Thumma38459152012-06-26 00:07:59 +0530131 cell-index = <2>; /* SDC2 SD card slot */
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530132 compatible = "qcom,msm-sdcc";
133 reg = <0xf98a4000 0x1000>;
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530134 reg-names = "core_mem";
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530135 interrupts = <0 125 0>;
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530136 interrupt-names = "core_irq";
Sujit Reddy Thummab9ff7f02012-05-04 09:57:49 +0530137 vdd-supply = <&pm8941_l21>;
138 vdd-io-supply = <&pm8941_l13>;
139
140 qcom,sdcc-vdd-voltage_level = <2950000 2950000>;
141 qcom,sdcc-vdd-current_level = <9000 800000>;
142
143 qcom,sdcc-vdd-io-always_on;
144 qcom,sdcc-vdd-io-lpm_sup;
145 qcom,sdcc-vdd-io-voltage_level = <1800000 2950000>;
146 qcom,sdcc-vdd-io-current_level = <6 22000>;
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530147
Sujit Reddy Thumma38459152012-06-26 00:07:59 +0530148 qcom,sdcc-pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
149 qcom,sdcc-pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
150 qcom,sdcc-pad-drv-on = <0x7 0x4 0x4>; /* 16mA, 10mA, 10mA */
151 qcom,sdcc-pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
152
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530153 qcom,sdcc-clk-rates = <400000 25000000 50000000 100000000 200000000>;
154 qcom,sdcc-sup-voltages = <2950 2950>;
155 qcom,sdcc-bus-width = <4>;
Sujit Reddy Thumma824b7522012-05-30 13:04:34 +0530156 qcom,sdcc-xpc;
157 qcom,sdcc-bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
158 qcom,sdcc-current-limit = <800>;
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530159 };
160
Krishna Kondab6da6932012-08-19 12:04:05 -0700161 sdcc3: qcom,sdcc@f9864000 {
Sujit Reddy Thumma38459152012-06-26 00:07:59 +0530162 cell-index = <3>; /* SDC3 SDIO slot */
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530163 compatible = "qcom,msm-sdcc";
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530164 reg = <0xf9864000 0x1000>;
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530165 reg-names = "core_mem";
Michael Bohanc7224532012-01-06 16:02:52 -0800166 interrupts = <0 127 0>;
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530167 interrupt-names = "core_irq";
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530168
Sujit Reddy Thumma38459152012-06-26 00:07:59 +0530169 gpios = <&msmgpio 40 0>, /* CLK */
170 <&msmgpio 39 0>, /* CMD */
171 <&msmgpio 38 0>, /* DATA0 */
172 <&msmgpio 37 0>, /* DATA1 */
173 <&msmgpio 36 0>, /* DATA2 */
174 <&msmgpio 35 0>; /* DATA3 */
175 qcom,sdcc-gpio-names = "CLK", "CMD", "DAT0", "DAT1", "DAT2", "DAT3";
176
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530177 qcom,sdcc-clk-rates = <400000 25000000 50000000 100000000>;
178 qcom,sdcc-sup-voltages = <1800 1800>;
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530179 qcom,sdcc-bus-width = <4>;
Sujit Reddy Thumma824b7522012-05-30 13:04:34 +0530180 qcom,sdcc-bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50";
Sujit Reddy Thumma7138b3e2012-06-04 09:10:11 +0530181 status = "disable";
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530182 };
183
Krishna Kondab6da6932012-08-19 12:04:05 -0700184 sdcc4: qcom,sdcc@f98e4000 {
Sujit Reddy Thumma38459152012-06-26 00:07:59 +0530185 cell-index = <4>; /* SDC4 SDIO slot */
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530186 compatible = "qcom,msm-sdcc";
187 reg = <0xf98e4000 0x1000>;
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530188 reg-names = "core_mem";
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530189 interrupts = <0 129 0>;
Sujit Reddy Thumma1dfac2c2012-07-30 10:15:39 +0530190 interrupt-names = "core_irq";
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530191
Sujit Reddy Thumma38459152012-06-26 00:07:59 +0530192 gpios = <&msmgpio 93 0>, /* CLK */
193 <&msmgpio 91 0>, /* CMD */
194 <&msmgpio 96 0>, /* DATA0 */
195 <&msmgpio 95 0>, /* DATA1 */
196 <&msmgpio 94 0>, /* DATA2 */
197 <&msmgpio 92 0>; /* DATA3 */
198 qcom,sdcc-gpio-names = "CLK", "CMD", "DAT0", "DAT1", "DAT2", "DAT3";
199
Sujit Reddy Thumma85fc52c2012-05-02 12:53:45 +0530200 qcom,sdcc-clk-rates = <400000 25000000 50000000 100000000>;
201 qcom,sdcc-sup-voltages = <1800 1800>;
202 qcom,sdcc-bus-width = <4>;
Sujit Reddy Thumma824b7522012-05-30 13:04:34 +0530203 qcom,sdcc-bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50";
Sujit Reddy Thumma7138b3e2012-06-04 09:10:11 +0530204 status = "disable";
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530205 };
Yan He1466daa2011-11-30 17:25:38 -0800206
David Brown225abee2012-02-09 22:28:50 -0800207 qcom,sps@f9980000 {
Yan He1466daa2011-11-30 17:25:38 -0800208 compatible = "qcom,msm_sps";
David Brown225abee2012-02-09 22:28:50 -0800209 reg = <0xf9984000 0x15000>,
210 <0xf9999000 0xb000>;
Michael Bohanc7224532012-01-06 16:02:52 -0800211 interrupts = <0 94 0>;
Yan He1466daa2011-11-30 17:25:38 -0800212
213 qcom,bam-dma-res-pipes = <6>;
214 };
215
Hariprasad Dhalinarasimhade991f02012-05-31 13:15:51 -0700216
Sagar Dhariaa316a962012-03-21 16:13:22 -0600217 slim@fe12f000 {
218 cell-index = <1>;
219 compatible = "qcom,slim-msm";
220 reg = <0xfe12f000 0x35000>,
221 <0xfe104000 0x20000>;
222 reg-names = "slimbus_physical", "slimbus_bam_physical";
223 interrupts = <0 163 0 0 164 0>;
224 interrupt-names = "slimbus_irq", "slimbus_bam_irq";
225 qcom,min-clk-gear = <10>;
Sagar Dhariac0d6cf52012-07-31 19:17:26 -0600226 qcom,rxreg-access;
Kiran Kandie8bf5d52012-08-06 16:03:16 -0700227
228 taiko_codec {
229 compatible = "qcom,taiko-slim-pgd";
230 elemental-addr = [00 01 A0 00 17 02];
231
232 qcom,cdc-reset-gpio = <&msmgpio 63 0>;
233
234 cdc-vdd-buck-supply = <&pm8941_s2>;
235 qcom,cdc-vdd-buck-voltage = <2150000 2150000>;
236 qcom,cdc-vdd-buck-current = <650000>;
237
238 cdc-vdd-tx-h-supply = <&pm8941_s3>;
239 qcom,cdc-vdd-tx-h-voltage = <1800000 1800000>;
240 qcom,cdc-vdd-tx-h-current = <25000>;
241
242 cdc-vdd-rx-h-supply = <&pm8941_s3>;
243 qcom,cdc-vdd-rx-h-voltage = <1800000 1800000>;
244 qcom,cdc-vdd-rx-h-current = <25000>;
245
246 cdc-vddpx-1-supply = <&pm8941_s3>;
247 qcom,cdc-vddpx-1-voltage = <1800000 1800000>;
248 qcom,cdc-vddpx-1-current = <10000>;
249
250 cdc-vdd-a-1p2v-supply = <&pm8941_l1>;
251 qcom,cdc-vdd-a-1p2v-voltage = <1225000 1225000>;
252 qcom,cdc-vdd-a-1p2v-current = <10000>;
253
254 cdc-vddcx-1-supply = <&pm8941_l1>;
255 qcom,cdc-vddcx-1-voltage = <1225000 1225000>;
256 qcom,cdc-vddcx-1-current = <10000>;
257
258 cdc-vddcx-2-supply = <&pm8941_l1>;
259 qcom,cdc-vddcx-2-voltage = <1225000 1225000>;
260 qcom,cdc-vddcx-2-current = <10000>;
261
262 qcom,cdc-micbias-ldoh-v = <0x3>;
263 qcom,cdc-micbias-cfilt1-mv = <1800>;
264 qcom,cdc-micbias-cfilt2-mv = <2700>;
265 qcom,cdc-micbias-cfilt3-mv = <1800>;
266 qcom,cdc-micbias1-cfilt-sel = <0x0>;
267 qcom,cdc-micbias2-cfilt-sel = <0x1>;
268 qcom,cdc-micbias3-cfilt-sel = <0x2>;
269 qcom,cdc-micbias4-cfilt-sel = <0x2>;
270
271 qcom,cdc-slim-ifd = "taiko-slim-ifd";
272 qcom,cdc-slim-ifd-elemental-addr = [00 00 A0 00 17 02];
273 };
Sagar Dhariaa316a962012-03-21 16:13:22 -0600274 };
275
Varad Deshmukh18057ed2012-07-03 16:34:53 -0700276 spmi_bus: qcom,spmi@fc4c0000 {
Kenneth Heitkef3c829c2012-01-13 17:02:43 -0700277 cell-index = <0>;
278 compatible = "qcom,spmi-pmic-arb";
279 reg = <0xfc4cf000 0x1000>,
280 <0Xfc4cb000 0x1000>;
281 /* 190,ee0_krait_hlos_spmi_periph_irq */
282 /* 187,channel_0_krait_hlos_trans_done_irq */
283 interrupts = <0 190 0 0 187 0>;
284 qcom,pmic-arb-ee = <0>;
285 qcom,pmic-arb-channel = <0>;
Gilad Avidov1d175ba2012-08-06 17:05:22 -0600286 qcom,pmic-arb-ppid-map = <0x40400000>, /* BUS */
287 <0x40500001>, /* INT */
288 <0x40600002>, /* SPMI */
289 <0x40800003>, /* PON */
290 <0x42400004>, /* TEMP_ALARM */
291 <0x47000005>, /* PBS_CORE */
292 <0x47100006>, /* PBS_CLIENT0 */
293 <0x47200007>, /* PBS_CLIENT1 */
294 <0x47300008>, /* PBS_CLIENT2 */
295 <0x47400009>, /* PBS_CLIENT3 */
296 <0x4750000a>, /* PBS_CLIENT4 */
297 <0x4760000b>, /* PBS_CLIENT5 */
298 <0x4770000c>, /* PBS_CLIENT6 */
299 <0x4780000d>, /* PBS_CLIENT7 */
300 <0x4a00000e>, /* MPP1 */
301 <0x4a100021>, /* MPP2 */
302 <0x4a20000f>, /* MPP3 */
303 <0x4a300010>, /* MPP4 */
304 <0x51000011>, /* BCLK_GEN_MAIN */
305 <0x51d00012>, /* S4_CTRL */
306 <0x51e00013>, /* S4_PS */
307 <0x51f00014>, /* S4_FREQ */
308 <0x52000015>, /* S5_CTRL */
309 <0x52100016>, /* S5_PS */
310 <0x52200017>, /* S5_FREQ */
311 <0x52300018>, /* S6_CTRL */
312 <0x52400019>, /* S6_PS */
313 <0x5250001a>, /* S6_FREQ */
314 <0x5260001b>, /* S7_CTRL */
315 <0x5270001c>, /* S7_PS */
316 <0x5280001d>, /* S7_FREQ */
317 <0x5290001e>, /* S8_CTRL */
318 <0x52a0001f>, /* S8_PS */
319 <0x52b00020>, /* S8_FREQ */
320 <0x00400022>, /* BUS */
321 <0x00500023>, /* INT */
322 <0x00600024>, /* SPMI */
323 <0x00800025>, /* PON */
324 <0x00b00027>, /* VREG_TFT */
325 <0x01000028>, /* SMBB_CHGR */
326 <0x01100029>, /* SMBB_BUCK */
327 <0x0120002a>, /* SMBB_BAT_IF */
328 <0x0130002b>, /* SMBB_USB_CHGPTH */
329 <0x0140002c>, /* SMBB_DC_CHGPTH */
330 <0x0150002d>, /* SMBB_BOOST */
331 <0x0160002e>, /* SMBB_MISC */
332 <0x0170002f>, /* SMBB_FREQ */
333 <0x02400030>, /* TEMP_ALARM */
334 <0x02800031>, /* COIN */
335 <0x03100032>, /* VADC1_USR */
336 <0x03300033>, /* VADC1_BMS */
337 <0x03400034>, /* VADC2_BTM */
338 <0x03600035>, /* IADC1_USR */
339 <0x03800036>, /* IADC1_BMS */
340 <0x04000037>, /* BMS1 */
341 <0x05700039>, /* DIFF_CLK1 */
342 <0x05c0003b>, /* DIV_CLK2 */
343 <0x0610003d>, /* RTC_ALARM */
344 <0x0620003e>, /* RTC_TIMER */
345 <0x07100040>, /* PBS_CLIENT0 */
346 <0x07200041>, /* PBS_CLIENT1 */
347 <0x07300042>, /* PBS_CLIENT2 */
348 <0x07400043>, /* PBS_CLIENT3 */
349 <0x07500044>, /* PBS_CLIENT4 */
350 <0x07600045>, /* PBS_CLIENT5 */
351 <0x07700046>, /* PBS_CLIENT6 */
352 <0x07800047>, /* PBS_CLIENT7 */
353 <0x07900048>, /* PBS_CLIENT8 */
354 <0x07a00049>, /* PBS_CLIENT9 */
355 <0x07b0004a>, /* PBS_CLIENT10 */
356 <0x07c0004b>, /* PBS_CLIENT11 */
357 <0x07d0004c>, /* PBS_CLIENT12 */
358 <0x07e0004d>, /* PBS_CLIENT13 */
359 <0x07f0004e>, /* PBS_CLIENT14 */
360 <0x0800004f>, /* PBS_CLIENT15 */
361 <0x0a100050>, /* MPP2 */
362 <0x0a300051>, /* MPP4 */
363 <0x0a400052>, /* MPP5 */
364 <0x0a500053>, /* MPP6 */
365 <0x0a600054>, /* MPP7 */
366 <0x0a700055>, /* MPP8 */
367 <0x0c000056>, /* GPIO1 */
368 <0x0c100057>, /* GPIO2 */
369 <0x0c200058>, /* GPIO3 */
370 <0x0c300059>, /* GPIO4 */
371 <0x0c40005a>, /* GPIO5 */
372 <0x0c50005b>, /* GPIO6 */
373 <0x0c60005c>, /* GPIO7 */
374 <0x0c70005d>, /* GPIO8 */
375 <0x0c80005e>, /* GPIO9 */
376 <0x0c90005f>, /* GPIO10 */
377 <0x0ca00060>, /* GPIO11 */
378 <0x0cb00061>, /* GPIO12 */
379 <0x0cc00062>, /* GPIO13 */
380 <0x0cd00063>, /* GPIO14 */
381 <0x0ce00064>, /* GPIO15 */
382 <0x0cf00065>, /* GPIO16 */
383 <0x0d200066>, /* GPIO19 */
384 <0x0d300067>, /* GPIO20 */
385 <0x0d500068>, /* GPIO22 */
386 <0x0d600069>, /* GPIO23 */
387 <0x0d70006a>, /* GPIO24 */
388 <0x0d80006b>, /* GPIO25 */
389 <0x0d90006c>, /* GPIO26 */
390 <0x0da0006d>, /* GPIO27 */
391 <0x0dc0006e>, /* GPIO29 */
392 <0x0dd0006f>, /* GPIO30 */
393 <0x0df00070>, /* GPIO32 */
394 <0x0e000071>, /* GPIO33 */
395 <0x0e100072>, /* GPIO34 */
396 <0x0e200073>, /* GPIO35 */
397 <0x0e300074>, /* GPIO36 */
398 <0x11000075>, /* BUCK_CMN */
399 <0x1a000076>, /* BOOST */
400 <0x1a100077>, /* BOOST_FREQ */
401 <0x1a800078>, /* KEYPAD1 */
402 <0x1b000079>, /* LPG_LUT */
403 <0x1b10007a>, /* LPG_CHAN1 */
404 <0x1b20007b>, /* LPG_CHAN2 */
405 <0x1b30007c>, /* LPG_CHAN3 */
406 <0x1b40007d>, /* LPG_CHAN4 */
407 <0x1b50007e>, /* LPG_CHAN5 */
408 <0x1b60007f>, /* LPG_CHAN6 */
409 <0x1b700080>, /* LPG_CHAN7 */
410 <0x1b800081>, /* LPG_CHAN8 */
411 <0x1bc00082>, /* PWM_3D */
412 <0x1c000083>, /* VIB1 */
413 <0x1d000084>, /* TRI_LED */
414 <0x1d300085>, /* FLASH1 */
415 <0x1d800086>, /* WLED1 */
416 <0x1e200087>, /* KPDBL_MAIN */
417 <0x1e300088>, /* KPDBL_LUT */
418 <0x1e400089>, /* LPG_CHAN9 */
419 <0x1e50008a>, /* LPG_CHAN10 */
420 <0x1e60008b>, /* LPG_CHAN11 */
421 <0x1e70008c>; /* LPG_CHAN12 */
Kenneth Heitkef3c829c2012-01-13 17:02:43 -0700422 };
Sagar Dharia218edb92012-01-15 18:03:01 -0700423
424 i2c@f9966000 {
425 cell-index = <0>;
426 compatible = "qcom,i2c-qup";
427 reg = <0Xf9966000 0x1000>;
428 reg-names = "qup_phys_addr";
429 interrupts = <0 104 0>;
430 interrupt-names = "qup_err_intr";
431 qcom,i2c-bus-freq = <100000>;
432 qcom,i2c-src-freq = <24000000>;
433 };
Matt Wagantalle9b715a2012-01-04 18:16:14 -0800434
Amy Malochebc7e9672012-08-15 10:30:40 -0700435 i2c@f9924000 {
436 cell-index = <2>;
437 compatible = "qcom,i2c-qup";
438 reg = <0xf9924000 0x1000>;
439 #address-cells = <1>;
440 #size-cells = <0>;
441 reg-names = "qup_phys_addr";
442 interrupts = <0 96 0>;
443 interrupt-names = "qup_err_intr";
444 qcom,i2c-bus-freq = <100000>;
445 qcom,i2c-src-freq = <24000000>;
Amy Maloche47996f82012-08-15 23:23:27 -0700446
447 atmel_mxt_ts@4a {
448 compatible = "atmel,mxt-ts";
449 reg = <0x4a>;
450 interrupt-parent = <&msmgpio>;
451 interrupts = <61 0x2>;
452 vdd_ana-supply = <&pm8941_l18>;
453 vcc_i2c-supply = <&pm8941_lvs1>;
454 atmel,reset-gpio = <&msmgpio 60 0x00>;
455 atmel,irq-gpio = <&msmgpio 61 0x00>;
456 atmel,panel-coords = <0 0 760 1424>;
457 atmel,display-coords = <0 0 720 1280>;
458 atmel,i2c-pull-up = <1>;
459 atmel,cfg_1 {
460 atmel,family-id = <0x82>;
461 atmel,variant-id = <0x19>;
462 atmel,version = <0x10>;
463 atmel,build = <0xaa>;
464 atmel,config = [
465 /* Object 6, Instance = 0 */
466 00 00 00 00 00 00
467 /* Object 38, Instance = 0 */
468 15 00 02 10 08 0C 00 00
469 /* Object 7, Instance = 0 */
470 FF FF 32 03
471 /* Object 8, Instance = 0 */
472 0F 00 0A 0A 00 00 0A 00 00 00
473 /* Object 9, Instance = 0 */
474 83 00 00 18 0E 00 70 32 02 01
475 00 03 01 01 05 0A 0A 0A 90 05
476 F8 02 00 00 0F 0F 00 00 48 2D
477 07 0C 00 00 00 00
478 /* Object 15, Instance = 0 */
479 00 00 00 00 00 00 00 00 00 00
480 00
481 /* Object 18, Instance = 0 */
482 00 00
483 /* Object 19, Instance = 0 */
484 00 00 00 00 00 00
485 /* Object 23, Instance = 0 */
486 00 00 00 00 00 00 00 00 00 00
487 00 00 00 00 00
488 /* Object 25, Instance = 0 */
489 00 00 00 00 00 00 00 00 00 00
490 00 00 00 00 00
491 /* Object 40, Instance = 0 */
492 00 00 00 00 00
493 /* Object 42, Instance = 0 */
494 00 00 00 00 00 00 00 00 00 00
495 /* Object 46, Instance = 0 */
496 00 00 10 10 00 00 03 00 00 01
497 /* Object 47, Instance = 0 */
498 08 0A 28 0A 02 0A 00 8C 00 20
499 00 00 00
500 /* Object 55, Instance = 0 */
501 00 00 00 00 00 00
502 /* Object 56, Instance = 0 */
503 03 00 01 18 05 05 05 05 05 05
504 05 05 05 05 05 05 05 05 05 05
505 05 05 05 05 05 05 05 05 00 00
506 00 00 00 00 00 00 00 00 00 00
507 00 00
508 /* Object 57, Instance = 0 */
509 00 00 00
510 /* Object 61, Instance = 0 */
511 00 00 00 00 00
512 /* Object 61, Instance = 1 */
513 00 00 00 00 00
514 /* Object 62, Instance = 0 */
515 7F 03 00 16 00 00 00 00 00 00
516 04 08 10 18 05 00 0A 05 05 50
517 14 19 34 1A 64 00 00 04 40 00
518 00 00 00 00 30 32 02 00 01 00
519 05 00 00 00 00 00 00 00 00 00
520 00 00 0C 00
521 ];
522 };
523 };
Amy Malochebc7e9672012-08-15 10:30:40 -0700524 };
525
Matt Wagantall48523022012-04-23 13:28:42 -0700526 qcom,acpuclk@f9000000 {
Abhimanyu Kapur90ced6e2012-06-26 17:41:25 -0700527 compatible = "qcom,acpuclk-8974";
Matt Wagantallbf9eb2c2012-05-31 09:44:22 -0700528 krait0-supply = <&krait0_vreg>;
529 krait1-supply = <&krait1_vreg>;
530 krait2-supply = <&krait2_vreg>;
531 krait3-supply = <&krait3_vreg>;
David Collins1c91ea72012-05-03 16:17:35 -0700532 krait0_mem-supply = <&pm8841_s1_ao>;
533 krait1_mem-supply = <&pm8841_s1_ao>;
534 krait2_mem-supply = <&pm8841_s1_ao>;
535 krait3_mem-supply = <&pm8841_s1_ao>;
536 krait0_dig-supply = <&pm8841_s2_corner_ao>;
537 krait1_dig-supply = <&pm8841_s2_corner_ao>;
538 krait2_dig-supply = <&pm8841_s2_corner_ao>;
539 krait3_dig-supply = <&pm8841_s2_corner_ao>;
Matt Wagantall337cdb72012-06-29 12:07:27 -0700540 krait0_hfpll_a-supply = <&pm8941_s2_ao>;
541 krait1_hfpll_a-supply = <&pm8941_s2_ao>;
542 krait2_hfpll_a-supply = <&pm8941_s2_ao>;
543 krait3_hfpll_a-supply = <&pm8941_s2_ao>;
544 l2_hfpll_a-supply = <&pm8941_s2_ao>;
545 krait0_hfpll_b-supply = <&pm8941_l12_ao>;
546 krait1_hfpll_b-supply = <&pm8941_l12_ao>;
547 krait2_hfpll_b-supply = <&pm8941_l12_ao>;
548 krait3_hfpll_b-supply = <&pm8941_l12_ao>;
549 l2_hfpll_b-supply = <&pm8941_l12_ao>;
Matt Wagantalle9b715a2012-01-04 18:16:14 -0800550 };
Ido Shayevitzef72ddd2012-03-28 18:55:55 +0200551
Shimrit Malichi57ae1492012-08-06 14:03:45 +0300552 qcom,ssusb@f9200000 {
Ido Shayevitzef72ddd2012-03-28 18:55:55 +0200553 compatible = "qcom,dwc-usb3-msm";
Ido Shayevitz7ad8ded2012-08-28 04:30:58 +0300554 reg = <0xf9200000 0xfc000>,
555 <0xfd4ab000 0x4>;
Manu Gautam17206c22012-06-21 10:17:53 +0530556 interrupts = <0 131 0 0 179 0>;
557 interrupt-names = "irq", "otg_irq";
Manu Gautam60e01352012-05-29 09:00:34 +0530558 SSUSB_VDDCX-supply = <&pm8841_s2>;
559 SSUSB_1p8-supply = <&pm8941_l6>;
560 HSUSB_VDDCX-supply = <&pm8841_s2>;
561 HSUSB_1p8-supply = <&pm8941_l6>;
562 HSUSB_3p3-supply = <&pm8941_l24>;
Ido Shayevitzef72ddd2012-03-28 18:55:55 +0200563 qcom,dwc-usb3-msm-dbm-eps = <4>;
564 };
Matt Wagantallc2bbdc32012-03-21 19:44:50 -0700565
Matt Wagantallfc727212012-01-06 18:18:25 -0800566 gdsc_oxili_gx: qcom,gdsc@fd8c4024 {
567 parent-supply = <&pm8841_s4>;
568 };
569
Matt Wagantallc2bbdc32012-03-21 19:44:50 -0700570 qcom,lpass@fe200000 {
571 compatible = "qcom,pil-q6v5-lpass";
572 reg = <0xfe200000 0x00100>,
Matt Wagantallc2bbdc32012-03-21 19:44:50 -0700573 <0xfd485100 0x00010>;
574
Matt Wagantall6e6b8cd2012-05-24 12:42:24 -0700575 qcom,firmware-name = "adsp";
Matt Wagantallc2bbdc32012-03-21 19:44:50 -0700576 };
Tianyi Gouc1e049f82011-11-23 14:20:16 -0800577
Joonwoo Park7ecf08d2012-08-17 11:35:12 -0700578 qcom,msm-adsp-loader {
579 compatible = "qcom,adsp-loader";
580 };
581
Phani Kumar Uppalapati87841c82012-06-14 21:28:43 -0700582 qcom,msm-pcm {
583 compatible = "qcom,msm-pcm-dsp";
584 };
Phani Kumar Uppalapatic6651692012-06-14 20:33:09 -0700585
Phani Kumar Uppalapati87841c82012-06-14 21:28:43 -0700586 qcom,msm-pcm-routing {
587 compatible = "qcom,msm-pcm-routing";
588 };
Phani Kumar Uppalapatic6651692012-06-14 20:33:09 -0700589
Phani Kumar Uppalapati87841c82012-06-14 21:28:43 -0700590 qcom,msm-pcm-lpa {
591 compatible = "qcom,msm-pcm-lpa";
592 };
Phani Kumar Uppalapatic6651692012-06-14 20:33:09 -0700593
Harmandeep Singha3453a72012-07-03 12:31:09 -0700594 qcom,msm-compr-dsp {
595 compatible = "qcom,msm-compr-dsp";
596 };
597
Phani Kumar Uppalapati87841c82012-06-14 21:28:43 -0700598 qcom,msm-voip-dsp {
599 compatible = "qcom,msm-voip-dsp";
600 };
Phani Kumar Uppalapatic6651692012-06-14 20:33:09 -0700601
Phani Kumar Uppalapati9fbe9462012-08-24 15:09:36 -0700602 qcom,msm-pcm-voice {
603 compatible = "qcom,msm-pcm-voice";
604 };
605
Phani Kumar Uppalapati87841c82012-06-14 21:28:43 -0700606 qcom,msm-stub-codec {
607 compatible = "qcom,msm-stub-codec";
608 };
Phani Kumar Uppalapatic6651692012-06-14 20:33:09 -0700609
Phani Kumar Uppalapati87841c82012-06-14 21:28:43 -0700610 qcom,msm-dai-fe {
611 compatible = "qcom,msm-dai-fe";
612 };
Phani Kumar Uppalapatic6651692012-06-14 20:33:09 -0700613
Joonwoo Park6572ac52012-07-10 17:17:00 -0700614 qcom,msm-dai-q6 {
615 compatible = "qcom,msm-dai-q6";
616 qcom,msm-dai-q6-sb-0-rx {
617 compatible = "qcom,msm-dai-q6-dev";
618 qcom,msm-dai-q6-dev-id = <16384>;
619 };
620
621 qcom,msm-dai-q6-sb-0-tx {
622 compatible = "qcom,msm-dai-q6-dev";
623 qcom,msm-dai-q6-dev-id = <16385>;
624 };
625 };
626
Phani Kumar Uppalapati87841c82012-06-14 21:28:43 -0700627 qcom,msm-auxpcm {
628 compatible = "qcom,msm-auxpcm-resource";
629 qcom,msm-cpudai-auxpcm-clk = "pcm_clk";
630 qcom,msm-cpudai-auxpcm-mode = <0>;
631 qcom,msm-cpudai-auxpcm-sync = <1>;
632 qcom,msm-cpudai-auxpcm-frame = <5>;
633 qcom,msm-cpudai-auxpcm-quant = <2>;
634 qcom,msm-cpudai-auxpcm-slot = <1>;
635 qcom,msm-cpudai-auxpcm-data = <0>;
636 qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>;
Phani Kumar Uppalapatic6651692012-06-14 20:33:09 -0700637
Phani Kumar Uppalapati87841c82012-06-14 21:28:43 -0700638 qcom,msm-auxpcm-rx {
639 qcom,msm-auxpcm-dev-id = <4106>;
640 compatible = "qcom,msm-auxpcm-dev";
641 };
Phani Kumar Uppalapatic6651692012-06-14 20:33:09 -0700642
Phani Kumar Uppalapati87841c82012-06-14 21:28:43 -0700643 qcom,msm-auxpcm-tx {
644 qcom,msm-auxpcm-dev-id = <4107>;
645 compatible = "qcom,msm-auxpcm-dev";
646 };
647 };
648
649 qcom,msm-pcm-hostless {
650 compatible = "qcom,msm-pcm-hostless";
651 };
Phani Kumar Uppalapatic6651692012-06-14 20:33:09 -0700652
Phani Kumar Uppalapati8b3a1bb2012-06-26 19:56:58 -0700653 qcom,msm-ocmem-audio {
654 compatible = "qcom,msm-ocmem-audio";
655 qcom,msm-ocmem-audio-src-id = <11>;
656 qcom,msm-ocmem-audio-dst-id = <604>;
657 qcom,msm-ocmem-audio-ab = <32505856>;
658 qcom,msm-ocmem-audio-ib = <32505856>;
659 };
660
Matt Wagantall4e2599e2012-03-21 22:31:35 -0700661 qcom,mss@fc880000 {
662 compatible = "qcom,pil-q6v5-mss";
663 reg = <0xfc880000 0x100>,
664 <0xfd485000 0x400>,
665 <0xfc820000 0x020>,
Matt Wagantall16bc5cc2012-08-09 21:33:23 -0700666 <0xfc401680 0x004>,
667 <0xfc980008 0x004>;
Matt Wagantall4e2599e2012-03-21 22:31:35 -0700668 vdd_mss-supply = <&pm8841_s3>;
669
670 qcom,firmware-name = "mba";
671 qcom,pil-self-auth = <1>;
672 };
673
Matt Wagantalle6e00d52012-03-08 17:39:07 -0800674 qcom,mba@fc820000 {
675 compatible = "qcom,pil-mba";
676 reg = <0xfc820000 0x0020>,
677 <0x0d1fc000 0x4000>;
678
679 qcom,firmware-name = "modem";
680 qcom,depends-on = "mba";
681 };
682
Tianyi Gouc1e049f82011-11-23 14:20:16 -0800683 qcom,pronto@fb21b000 {
684 compatible = "qcom,pil-pronto";
685 reg = <0xfb21b000 0x3000>,
686 <0xfc401700 0x4>,
687 <0xfd485300 0xc>;
688 vdd_pronto_pll-supply = <&pm8941_l12>;
689
690 qcom,firmware-name = "wcnss";
691 };
Naveen Ramaraj51f5e8b2012-04-09 15:58:40 -0700692
693 qcom,ocmem@fdd00000 {
Naveen Ramaraj94455a42012-07-05 16:01:40 -0700694 compatible = "qcom,msm-ocmem";
695 reg = <0xfdd00000 0x2000>,
696 <0xfdd02000 0x2000>,
697 <0xfe039000 0x400>,
698 <0xfec00000 0x180000>;
699 reg-names = "ocmem_ctrl_physical", "dm_ctrl_physical", "br_ctrl_physical", "ocmem_physical";
700 interrupts = <0 76 0 0 77 0>;
701 interrupt-names = "ocmem_irq", "dm_irq";
702 qcom,ocmem-num-regions = <0x3>;
Naveen Ramarajba3a6262012-08-02 17:14:27 -0700703 qcom,resource-type = <0x706d636f>;
Naveen Ramaraj94455a42012-07-05 16:01:40 -0700704 #address-cells = <1>;
705 #size-cells = <1>;
706 ranges = <0x0 0xfec00000 0x180000>;
707
708 partition@0 {
709 reg = <0x0 0x100000>;
710 qcom,ocmem-part-name = "graphics";
711 qcom,ocmem-part-min = <0x80000>;
712 };
713
714 partition@80000 {
715 reg = <0x80000 0xA0000>;
716 qcom,ocmem-part-name = "lp_audio";
717 qcom,ocmem-part-min = <0xA0000>;
718 };
719
720 partition@E0000 {
721 reg = <0x120000 0x20000>;
Naveen Ramarajcc4ec152012-05-14 09:55:29 -0700722 qcom,ocmem-part-name = "other_os";
Naveen Ramaraj94455a42012-07-05 16:01:40 -0700723 qcom,ocmem-part-min = <0x20000>;
724 };
725
726 partition@100000 {
727 reg = <0x100000 0x80000>;
728 qcom,ocmem-part-name = "video";
729 qcom,ocmem-part-min = <0x55000>;
730 };
731
732 partition@140000 {
733 reg = <0x140000 0x40000>;
734 qcom,ocmem-part-name = "sensors";
735 qcom,ocmem-part-min = <0x40000>;
736 };
Naveen Ramaraj51f5e8b2012-04-09 15:58:40 -0700737 };
Mahesh Sivasubramanian3f0d0c72012-05-04 17:35:55 -0600738
Varad Deshmukh18057ed2012-07-03 16:34:53 -0700739 rpm_bus: qcom,rpm-smd {
Mahesh Sivasubramanian3f0d0c72012-05-04 17:35:55 -0600740 compatible = "qcom,rpm-smd";
741 rpm-channel-name = "rpm_requests";
742 rpm-channel-type = <15>; /* SMD_APPS_RPM */
743 };
Hariprasad Dhalinarasimhade991f02012-05-31 13:15:51 -0700744
745 qcom,msm-rng@f9bff000 {
746 compatible = "qcom,msm-rng";
747 reg = <0xf9bff000 0x200>;
748 };
Ramesh Masavarapufb1f01e2012-06-14 09:40:40 -0700749
750 qcom,qseecom@fe806000 {
751 compatible = "qcom,qseecom";
752 };
Adrian Salido-Moreno5ef3ac02012-05-14 18:40:47 -0700753
Hanumant72aec702012-06-25 11:51:07 -0700754 qcom,wdt@f9017000 {
755 compatible = "qcom,msm-watchdog";
756 reg = <0xf9017000 0x1000>;
757 interrupts = <0 3 0 0 4 0>;
758 qcom,bark-time = <11000>;
759 qcom,pet-time = <10000>;
760 qcom,ipi-ping = <1>;
761 };
Hariprasad Dhalinarasimha0fc258f2012-07-05 13:01:29 -0700762
763 qcom,tz-log@fe805720 {
764 compatible = "qcom,tz-log";
765 reg = <0xfe805720 0x1000>;
766 };
Tianyi Gou828798d2012-05-02 21:12:38 -0700767
768 qcom,venus@fdce0000 {
769 compatible = "qcom,pil-venus";
770 reg = <0xfdce0000 0x4000>,
771 <0xfdc80208 0x8>;
772 vdd-supply = <&gdsc_venus>;
773
774 qcom,firmware-name = "venus";
775 qcom,firmware-min-paddr = <0xF500000>;
776 qcom,firmware-max-paddr = <0xFA00000>;
777 };
Siddartha Mohanadoss05a6e382012-05-14 15:13:37 -0700778
Stepan Moskovchenkoc79a7382012-07-19 17:24:32 -0700779 qcom,cache_erp {
780 compatible = "qcom,cache_erp";
781 interrupts = <1 9 0>, <0 2 0>;
782 interrupt-names = "l1_irq", "l2_irq";
783 };
784
Siddartha Mohanadoss05a6e382012-05-14 15:13:37 -0700785 tsens@fc4a8000 {
786 compatible = "qcom,msm-tsens";
787 reg = <0xfc4a8000 0x2000>,
788 <0xfc4b80d0 0x5>;
789 reg-names = "tsens_physical", "tsens_eeprom_physical";
790 interrupts = <0 184 0>;
791 qcom,sensors = <11>;
Siddartha Mohanadoss205bce62012-07-27 17:17:18 -0700792 qcom,slope = <3200 3200 3200 3200 3200 3200 3200 3200 3200
793 3200 3200>;
Siddartha Mohanadoss05a6e382012-05-14 15:13:37 -0700794 };
Laura Abbottf7e44042012-06-22 12:50:32 -0700795
796 qcom,msm-rtb {
797 compatible = "qcom,msm-rtb";
798 qcom,memory-reservation-type = "EBI1";
799 qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */
800 };
Mona Hossainb43e94b2012-05-07 08:52:06 -0700801
802 qcom,qcedev@fd440000 {
803 compatible = "qcom,qcedev";
804 reg = <0xfd440000 0x20000>,
805 <0xfd444000 0x8000>;
Ramesh Masavarapu97ad00d2012-08-06 16:47:26 -0700806 reg-names = "crypto-base","crypto-bam-base";
Mona Hossainb43e94b2012-05-07 08:52:06 -0700807 interrupts = <0 235 0>;
Ramesh Masavarapu97ad00d2012-08-06 16:47:26 -0700808 qcom,bam-pipe-pair = <0>;
Mona Hossainb43e94b2012-05-07 08:52:06 -0700809 };
810
811 qcom,qcrypto@fd444000 {
812 compatible = "qcom,qcrypto";
813 reg = <0xfd440000 0x20000>,
814 <0xfd444000 0x8000>;
Ramesh Masavarapu97ad00d2012-08-06 16:47:26 -0700815 reg-names = "crypto-base","crypto-bam-base";
Mona Hossainb43e94b2012-05-07 08:52:06 -0700816 interrupts = <0 235 0>;
Ramesh Masavarapu97ad00d2012-08-06 16:47:26 -0700817 qcom,bam-pipe-pair = <1>;
Mona Hossainb43e94b2012-05-07 08:52:06 -0700818 };
Shimrit Malichi57ae1492012-08-06 14:03:45 +0300819
820 qcom,usbbam@f9304000 {
821 compatible = "qcom,usb-bam-msm";
Manu Gautam6afd5872012-07-25 09:16:55 +0530822 reg = <0xf9304000 0x5000>,
Manu Gautam4658d892012-08-20 18:24:52 -0700823 <0xf9a44000 0x11000>,
824 <0xf92f880c 0x4>;
825 reg-names = "ssusb", "hsusb", "qscratch_ram1_reg";
Manu Gautam6afd5872012-07-25 09:16:55 +0530826 interrupts = <0 132 0 0 135 0>;
827 interrupt-names = "ssusb", "hsusb";
Shimrit Malichi57ae1492012-08-06 14:03:45 +0300828 qcom,usb-active-bam = <0>;
Manu Gautam6afd5872012-07-25 09:16:55 +0530829 qcom,usb-total-bam-num = <2>;
Shimrit Malichi57ae1492012-08-06 14:03:45 +0300830 qcom,usb-bam-num-pipes = <16>;
831 qcom,usb-base-address = <0xf9200000>;
832
833 qcom,pipe1 {
834 label = "usb-to-peri-qdss-dwc3";
835 qcom,usb-bam-type = <0>;
Manu Gautam6afd5872012-07-25 09:16:55 +0530836 qcom,usb-bam-mem-type = <1>;
Shimrit Malichi57ae1492012-08-06 14:03:45 +0300837 qcom,src-bam-physical-address = <0>;
838 qcom,src-bam-pipe-index = <0>;
839 qcom,dst-bam-physical-address = <0>;
840 qcom,dst-bam-pipe-index = <0>;
841 qcom,data-fifo-offset = <0>;
842 qcom,data-fifo-size = <0>;
843 qcom,descriptor-fifo-offset = <0>;
844 qcom,descriptor-fifo-size = <0>;
845 };
846
847 qcom,pipe2 {
848 label = "peri-to-usb-qdss-dwc3";
849 qcom,usb-bam-type = <0>;
Manu Gautam6afd5872012-07-25 09:16:55 +0530850 qcom,usb-bam-mem-type = <1>;
Shimrit Malichi57ae1492012-08-06 14:03:45 +0300851 qcom,src-bam-physical-address = <0xfc37C000>;
852 qcom,src-bam-pipe-index = <0>;
853 qcom,dst-bam-physical-address = <0xf9304000>;
854 qcom,dst-bam-pipe-index = <2>;
855 qcom,data-fifo-offset = <0xf0000>;
856 qcom,data-fifo-size = <0x4000>;
857 qcom,descriptor-fifo-offset = <0xf4000>;
858 qcom,descriptor-fifo-size = <0x1400>;
859 };
Manu Gautam6afd5872012-07-25 09:16:55 +0530860
861 qcom,pipe3 {
862 label = "usb-to-peri-qdss-hsusb";
863 qcom,usb-bam-type = <1>;
Manu Gautam4658d892012-08-20 18:24:52 -0700864 qcom,usb-bam-mem-type = <1>;
Manu Gautam6afd5872012-07-25 09:16:55 +0530865 qcom,src-bam-physical-address = <0>;
866 qcom,src-bam-pipe-index = <0>;
867 qcom,dst-bam-physical-address = <0>;
868 qcom,dst-bam-pipe-index = <0>;
869 qcom,data-fifo-offset = <0>;
870 qcom,data-fifo-size = <0>;
871 qcom,descriptor-fifo-offset = <0>;
872 qcom,descriptor-fifo-size = <0>;
873 };
874
875 qcom,pipe4 {
876 label = "peri-to-usb-qdss-hsusb";
877 qcom,usb-bam-type = <1>;
Manu Gautam4658d892012-08-20 18:24:52 -0700878 qcom,usb-bam-mem-type = <1>;
Manu Gautam6afd5872012-07-25 09:16:55 +0530879 qcom,src-bam-physical-address = <0xfc37c000>;
880 qcom,src-bam-pipe-index = <0>;
881 qcom,dst-bam-physical-address = <0xf9a44000>;
882 qcom,dst-bam-pipe-index = <2>;
Manu Gautam4658d892012-08-20 18:24:52 -0700883 qcom,data-fifo-offset = <0xf4000>;
884 qcom,data-fifo-size = <0x1000>;
885 qcom,descriptor-fifo-offset = <0xf5000>;
886 qcom,descriptor-fifo-size = <0x400>;
Manu Gautam6afd5872012-07-25 09:16:55 +0530887 };
Shimrit Malichi57ae1492012-08-06 14:03:45 +0300888 };
Eugene Seahce52ef22012-07-12 12:40:38 -0600889
890 qcom,msm-thermal {
891 compatible = "qcom,msm-thermal";
892 qcom,sensor-id = <0>;
893 qcom,poll-ms = <250>;
894 qcom,limit-temp = <60>;
895 qcom,temp-hysteresis = <10>;
896 qcom,freq-step = <2>;
897 };
Anirudh Ghayalb70740f2012-08-01 09:00:49 +0530898
899 gpio_keys {
900 compatible = "gpio-keys";
901
902 camera_snapshot {
903 label = "camera_snapshot";
904 gpios = <&pm8941_gpios 3 0x1>;
905 linux,input-type = <1>;
906 linux,code = <0x2fe>;
907 gpio-key,wakeup;
908 debounce-interval = <15>;
909 };
910
911 camera_focus {
912 label = "camera_focus";
913 gpios = <&pm8941_gpios 4 0x1>;
914 linux,input-type = <1>;
915 linux,code = <0x210>;
916 gpio-key,wakeup;
917 debounce-interval = <15>;
918 };
919
920 vol_up {
921 label = "volume_up";
922 gpios = <&pm8941_gpios 5 0x1>;
923 linux,input-type = <1>;
924 linux,code = <115>;
925 gpio-key,wakeup;
926 debounce-interval = <15>;
927 };
928 };
Sathish Ambley4df614c2011-10-07 16:30:46 -0700929};
Varad Deshmukh18057ed2012-07-03 16:34:53 -0700930
931/include/ "msm-pm8x41-rpm-regulator.dtsi"
932/include/ "msm-pm8841.dtsi"
933/include/ "msm-pm8941.dtsi"
934/include/ "msm8974-regulator.dtsi"
935/include/ "msm8974-gpio.dtsi"
Michael Bohanee1f8fe2012-08-03 18:32:16 -0700936/include/ "msm8974-clock.dtsi"