Ben Dooks | 992426b | 2010-02-20 23:01:33 +0000 | [diff] [blame] | 1 | /* linux/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h |
Ben Dooks | 505788c | 2006-09-15 23:42:24 +0100 | [diff] [blame] | 2 | * |
| 3 | * Copyright (C) 2006 Simtec Electronics |
| 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * |
Ben Dooks | 992426b | 2010-02-20 23:01:33 +0000 | [diff] [blame] | 6 | * Samsung S3C24XX DMA support - per SoC functions |
Ben Dooks | 505788c | 2006-09-15 23:42:24 +0100 | [diff] [blame] | 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | */ |
| 12 | |
Ben Dooks | 97c1b14 | 2009-03-19 15:02:39 +0000 | [diff] [blame] | 13 | #include <plat/dma-core.h> |
| 14 | |
Ben Dooks | 505788c | 2006-09-15 23:42:24 +0100 | [diff] [blame] | 15 | extern struct sysdev_class dma_sysclass; |
Ben Dooks | 97c1b14 | 2009-03-19 15:02:39 +0000 | [diff] [blame] | 16 | extern struct s3c2410_dma_chan s3c2410_chans[S3C_DMA_CHANNELS]; |
Ben Dooks | 505788c | 2006-09-15 23:42:24 +0100 | [diff] [blame] | 17 | |
| 18 | #define DMA_CH_VALID (1<<31) |
Ben Dooks | 0c6022d | 2007-02-13 13:02:52 +0100 | [diff] [blame] | 19 | #define DMA_CH_NEVER (1<<30) |
Ben Dooks | 505788c | 2006-09-15 23:42:24 +0100 | [diff] [blame] | 20 | |
| 21 | struct s3c24xx_dma_addr { |
| 22 | unsigned long from; |
| 23 | unsigned long to; |
| 24 | }; |
| 25 | |
| 26 | /* struct s3c24xx_dma_map |
| 27 | * |
| 28 | * this holds the mapping information for the channel selected |
| 29 | * to be connected to the specified device |
| 30 | */ |
| 31 | |
| 32 | struct s3c24xx_dma_map { |
| 33 | const char *name; |
| 34 | struct s3c24xx_dma_addr hw_addr; |
| 35 | |
Ben Dooks | 97c1b14 | 2009-03-19 15:02:39 +0000 | [diff] [blame] | 36 | unsigned long channels[S3C_DMA_CHANNELS]; |
| 37 | unsigned long channels_rx[S3C_DMA_CHANNELS]; |
Ben Dooks | 505788c | 2006-09-15 23:42:24 +0100 | [diff] [blame] | 38 | }; |
| 39 | |
| 40 | struct s3c24xx_dma_selection { |
| 41 | struct s3c24xx_dma_map *map; |
| 42 | unsigned long map_size; |
| 43 | unsigned long dcon_mask; |
| 44 | |
| 45 | void (*select)(struct s3c2410_dma_chan *chan, |
| 46 | struct s3c24xx_dma_map *map); |
Ben Dooks | c6709e8 | 2008-01-28 13:01:20 +0100 | [diff] [blame] | 47 | |
| 48 | void (*direction)(struct s3c2410_dma_chan *chan, |
| 49 | struct s3c24xx_dma_map *map, |
| 50 | enum s3c2410_dmasrc dir); |
Ben Dooks | 505788c | 2006-09-15 23:42:24 +0100 | [diff] [blame] | 51 | }; |
| 52 | |
| 53 | extern int s3c24xx_dma_init_map(struct s3c24xx_dma_selection *sel); |
Ben Dooks | 0c6022d | 2007-02-13 13:02:52 +0100 | [diff] [blame] | 54 | |
| 55 | /* struct s3c24xx_dma_order_ch |
| 56 | * |
| 57 | * channel map for one of the `enum dma_ch` dma channels. the list |
| 58 | * entry contains a set of low-level channel numbers, orred with |
| 59 | * DMA_CH_VALID, which are checked in the order in the array. |
| 60 | */ |
| 61 | |
| 62 | struct s3c24xx_dma_order_ch { |
Ben Dooks | 97c1b14 | 2009-03-19 15:02:39 +0000 | [diff] [blame] | 63 | unsigned int list[S3C_DMA_CHANNELS]; /* list of channels */ |
Ben Dooks | 0c6022d | 2007-02-13 13:02:52 +0100 | [diff] [blame] | 64 | unsigned int flags; /* flags */ |
| 65 | }; |
| 66 | |
| 67 | /* struct s3c24xx_dma_order |
| 68 | * |
| 69 | * information provided by either the core or the board to give the |
| 70 | * dma system a hint on how to allocate channels |
| 71 | */ |
| 72 | |
| 73 | struct s3c24xx_dma_order { |
| 74 | struct s3c24xx_dma_order_ch channels[DMACH_MAX]; |
| 75 | }; |
| 76 | |
| 77 | extern int s3c24xx_dma_order_set(struct s3c24xx_dma_order *map); |
Ben Dooks | 48adbcf | 2007-02-17 15:37:14 +0100 | [diff] [blame] | 78 | |
| 79 | /* DMA init code, called from the cpu support code */ |
| 80 | |
| 81 | extern int s3c2410_dma_init(void); |
| 82 | |
| 83 | extern int s3c24xx_dma_init(unsigned int channels, unsigned int irq, |
| 84 | unsigned int stride); |