blob: c92dad930c5d6b9123a50817f6445ade79dcc7d4 [file] [log] [blame]
Gilad Avidov289d0fc2012-08-08 14:06:24 -06001/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Ravi Kumar Vf4d78d22012-09-12 13:45:00 +05302 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13/include/ "skeleton.dtsi"
Chintan Pandyaf6ddea22012-09-14 19:26:03 +053014/include/ "mpq8092-iommu.dtsi"
15/include/ "msm-gdsc.dtsi"
Utsab Bose4bb94652012-09-28 15:07:35 +053016/include/ "mpq8092-ion.dtsi"
Ravi Kumar Vf4d78d22012-09-12 13:45:00 +053017
18/ {
19 model = "Qualcomm MPQ8092";
20 compatible = "qcom,mpq8092";
21 interrupt-parent = <&intc>;
22
23 intc: interrupt-controller@f9000000 {
24 compatible = "qcom,msm-qgic2";
25 interrupt-controller;
26 #interrupt-cells = <3>;
27 reg = <0xf9000000 0x1000>,
28 <0xf9002000 0x1000>;
29 };
30
Ravi Kumar V57f65f52012-09-12 14:39:23 +053031 msmgpio: gpio@fd510000 {
32 compatible = "qcom,msm-gpio";
33 gpio-controller;
34 #gpio-cells = <2>;
35 interrupt-controller;
36 #interrupt-cells = <2>;
37 reg = <0xfd510000 0x4000>;
Rohit Vaswani341c2032012-11-08 18:49:29 -080038 ngpio = <146>;
Rohit Vaswanid2001522012-12-05 19:23:44 -080039 interrupts = <0 208 0>;
Rohit Vaswanied0a4ef2012-12-11 15:14:42 -080040 qcom,direct-connect-irqs = <8>;
Ravi Kumar V57f65f52012-09-12 14:39:23 +053041 };
42
Ravi Kumar Vf4d78d22012-09-12 13:45:00 +053043 timer {
Syed Rameez Mustafa0824d6c2012-11-29 18:53:56 -080044 compatible = "arm,armv7-timer";
Ravi Kumar Vf4d78d22012-09-12 13:45:00 +053045 interrupts = <1 2 0>, <1 3 0>;
46 clock-frequency = <19200000>;
47 };
48
49 serial@f991f000 {
50 compatible = "qcom,msm-lsuart-v14";
51 reg = <0xf991f000 0x1000>;
52 interrupts = <0 109 0>;
53 status = "disabled";
54 };
55
56 serial@f995e000 {
57 compatible = "qcom,msm-lsuart-v14";
58 reg = <0xf995e000 0x1000>;
59 interrupts = <0 114 0>;
60 status = "disabled";
61 };
Ravi Kumar V73e5cbc2012-09-10 20:22:39 +053062
63 spmi_bus: qcom,spmi@fc4c0000 {
64 cell-index = <0>;
65 compatible = "qcom,spmi-pmic-arb";
Kenneth Heitke366b8a42012-12-18 13:51:37 -070066 reg-names = "core", "intr", "cnfg";
Ravi Kumar V73e5cbc2012-09-10 20:22:39 +053067 reg = <0xfc4cf000 0x1000>,
Kenneth Heitke366b8a42012-12-18 13:51:37 -070068 <0Xfc4cb000 0x1000>,
69 <0Xfc4ca000 0x1000>;
Ravi Kumar V73e5cbc2012-09-10 20:22:39 +053070 /* 190,ee0_krait_hlos_spmi_periph_irq */
71 /* 187,channel_0_krait_hlos_trans_done_irq */
72 interrupts = <0 190 0 0 187 0>;
Sujit Reddy Thumma397dffd2012-10-29 13:38:49 +053073 qcom,not-wakeup;
Ravi Kumar V73e5cbc2012-09-10 20:22:39 +053074 qcom,pmic-arb-ee = <0>;
75 qcom,pmic-arb-channel = <0>;
Ravi Kumar V73e5cbc2012-09-10 20:22:39 +053076 };
Sujit Reddy Thumma2330f3a372012-10-18 10:28:51 +053077
78 sdcc1: qcom,sdcc@f9824000 {
79 cell-index = <1>; /* SDC1 eMMC slot */
80 compatible = "qcom,msm-sdcc";
81 reg = <0xf9824000 0x800>;
82 reg-names = "core_mem";
83 interrupts = <0 123 0>;
84 interrupt-names = "core_irq";
85
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -070086 qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
87 qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
Krishna Konda6c5d0f42013-04-12 16:44:26 -070088 qcom,pad-drv-on = <0x4 0x4 0x4>; /* 10mA, 10mA, 10mA */
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -070089 qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
Sujit Reddy Thumma2330f3a372012-10-18 10:28:51 +053090
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -070091 qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
92 qcom,sup-voltages = <2950 2950>;
93 qcom,bus-width = <8>;
94 qcom,nonremovable;
95 qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v";
Sujit Reddy Thumma2330f3a372012-10-18 10:28:51 +053096 };
97
98 sdcc2: qcom,sdcc@f98a4000 {
99 cell-index = <2>; /* SDC2 SD card slot */
100 compatible = "qcom,msm-sdcc";
101 reg = <0xf98a4000 0x800>;
102 reg-names = "core_mem";
103 interrupts = <0 125 0>;
104 interrupt-names = "core_irq";
105
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700106 qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
107 qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
Krishna Konda6c5d0f42013-04-12 16:44:26 -0700108 qcom,pad-drv-on = <0x4 0x4 0x4>; /* 10mA, 10mA, 10mA */
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700109 qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
Sujit Reddy Thumma2330f3a372012-10-18 10:28:51 +0530110
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700111 qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
112 qcom,sup-voltages = <2950 2950>;
113 qcom,bus-width = <4>;
114 qcom,xpc;
115 qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
116 qcom,current-limit = <800>;
Sujit Reddy Thumma2330f3a372012-10-18 10:28:51 +0530117 };
Sujit Reddy Thumma35106382012-10-12 20:36:53 +0530118
119 sata: sata@fc580000 {
120 compatible = "qcom,msm-ahci";
121 reg = <0xfc580000 0x17c>;
122 interrupts = <0 243 0>;
123 };
Ravi Kumar Vf4d78d22012-09-12 13:45:00 +0530124};
Ravi Kumar V605f1cd2012-09-10 20:43:17 +0530125
Patrick Dalye8977aa2012-11-06 15:25:58 -0800126&gdsc_venus {
127 status = "ok";
128};
129
130&gdsc_mdss {
131 status = "ok";
132};
133
134&gdsc_jpeg {
135 status = "ok";
136};
137
138&gdsc_vfe {
139 status = "ok";
140};
141
142&gdsc_oxili_gx {
143 status = "ok";
144};
145
146&gdsc_oxili_cx {
147 status = "ok";
148};
149
150&gdsc_usb_hsic {
151 status = "ok";
152};
153
David Collins819bebf2013-04-22 14:55:19 -0700154/include/ "msm-pma8084.dtsi"
Ravi Kumar Vd9e522c2012-10-03 12:52:14 +0530155/include/ "mpq8092-regulator.dtsi"