Thomas Mingarelli | 7f4da47 | 2007-12-04 17:41:54 +0000 | [diff] [blame^] | 1 | /* |
| 2 | * HP WatchDog Driver |
| 3 | * based on |
| 4 | * |
| 5 | * SoftDog 0.05: A Software Watchdog Device |
| 6 | * |
| 7 | * (c) Copyright 2007 Hewlett-Packard Development Company, L.P. |
| 8 | * Thomas Mingarelli <thomas.mingarelli@hp.com> |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or |
| 11 | * modify it under the terms of the GNU General Public License |
| 12 | * version 2 as published by the Free Software Foundation |
| 13 | * |
| 14 | */ |
| 15 | |
| 16 | #include <linux/device.h> |
| 17 | #include <linux/fs.h> |
| 18 | #include <linux/init.h> |
| 19 | #include <linux/interrupt.h> |
| 20 | #include <linux/io.h> |
| 21 | #include <linux/irq.h> |
| 22 | #include <linux/kernel.h> |
| 23 | #include <linux/miscdevice.h> |
| 24 | #include <linux/mm.h> |
| 25 | #include <linux/module.h> |
| 26 | #include <linux/kdebug.h> |
| 27 | #include <linux/moduleparam.h> |
| 28 | #include <linux/notifier.h> |
| 29 | #include <linux/pci.h> |
| 30 | #include <linux/pci_ids.h> |
| 31 | #include <linux/reboot.h> |
| 32 | #include <linux/sched.h> |
| 33 | #include <linux/timer.h> |
| 34 | #include <linux/types.h> |
| 35 | #include <linux/uaccess.h> |
| 36 | #include <linux/watchdog.h> |
| 37 | #include <linux/dmi.h> |
| 38 | #include <linux/efi.h> |
| 39 | #include <linux/string.h> |
| 40 | #include <linux/bootmem.h> |
| 41 | #include <linux/slab.h> |
| 42 | #include <asm/dmi.h> |
| 43 | #include <asm/desc.h> |
| 44 | #include <asm/kdebug.h> |
| 45 | |
| 46 | #define PCI_BIOS32_SD_VALUE 0x5F32335F /* "_32_" */ |
| 47 | #define CRU_BIOS_SIGNATURE_VALUE 0x55524324 |
| 48 | #define PCI_BIOS32_PARAGRAPH_LEN 16 |
| 49 | #define PCI_ROM_BASE1 0x000F0000 |
| 50 | #define ROM_SIZE 0x10000 |
| 51 | |
| 52 | struct bios32_service_dir { |
| 53 | u32 signature; |
| 54 | u32 entry_point; |
| 55 | u8 revision; |
| 56 | u8 length; |
| 57 | u8 checksum; |
| 58 | u8 reserved[5]; |
| 59 | }; |
| 60 | |
| 61 | /* |
| 62 | * smbios_entry_point - defines SMBIOS entry point structure |
| 63 | * |
| 64 | * anchor[4] - anchor string (_SM_) |
| 65 | * checksum - checksum of the entry point structure |
| 66 | * length - length of the entry point structure |
| 67 | * major_ver - major version (02h for revision 2.1) |
| 68 | * minor_ver - minor version (01h for revision 2.1) |
| 69 | * max_struct_size - size of the largest SMBIOS structure |
| 70 | * revision - entry point structure revision implemented |
| 71 | * formatted_area[5] - reserved |
| 72 | * intermediate_anchor[5] - intermediate anchor string (_DMI_) |
| 73 | * intermediate_checksum - intermediate checksum |
| 74 | * table_length - structure table length |
| 75 | * table_address - structure table address |
| 76 | * table_num_structs - number of SMBIOS structures present |
| 77 | * bcd_revision - BCD revision |
| 78 | */ |
| 79 | struct smbios_entry_point { |
| 80 | u8 anchor[4]; |
| 81 | u8 checksum; |
| 82 | u8 length; |
| 83 | u8 major_ver; |
| 84 | u8 minor_ver; |
| 85 | u16 max_struct_size; |
| 86 | u8 revision; |
| 87 | u8 formatted_area[5]; |
| 88 | u8 intermediate_anchor[5]; |
| 89 | u8 intermediate_checksum; |
| 90 | u16 table_length; |
| 91 | u64 table_address; |
| 92 | u16 table_num_structs; |
| 93 | u8 bcd_revision; |
| 94 | }; |
| 95 | |
| 96 | /* type 212 */ |
| 97 | struct smbios_cru64_info { |
| 98 | u8 type; |
| 99 | u8 byte_length; |
| 100 | u16 handle; |
| 101 | u32 signature; |
| 102 | u64 physical_address; |
| 103 | u32 double_length; |
| 104 | u32 double_offset; |
| 105 | }; |
| 106 | #define SMBIOS_CRU64_INFORMATION 212 |
| 107 | |
| 108 | struct cmn_registers { |
| 109 | union { |
| 110 | struct { |
| 111 | u8 ral; |
| 112 | u8 rah; |
| 113 | u16 rea2; |
| 114 | }; |
| 115 | u32 reax; |
| 116 | } u1; |
| 117 | union { |
| 118 | struct { |
| 119 | u8 rbl; |
| 120 | u8 rbh; |
| 121 | u8 reb2l; |
| 122 | u8 reb2h; |
| 123 | }; |
| 124 | u32 rebx; |
| 125 | } u2; |
| 126 | union { |
| 127 | struct { |
| 128 | u8 rcl; |
| 129 | u8 rch; |
| 130 | u16 rec2; |
| 131 | }; |
| 132 | u32 recx; |
| 133 | } u3; |
| 134 | union { |
| 135 | struct { |
| 136 | u8 rdl; |
| 137 | u8 rdh; |
| 138 | u16 red2; |
| 139 | }; |
| 140 | u32 redx; |
| 141 | } u4; |
| 142 | |
| 143 | u32 resi; |
| 144 | u32 redi; |
| 145 | u16 rds; |
| 146 | u16 res; |
| 147 | u32 reflags; |
| 148 | } __attribute__((packed)); |
| 149 | |
| 150 | #define DEFAULT_MARGIN 30 |
| 151 | static unsigned int soft_margin = DEFAULT_MARGIN; /* in seconds */ |
| 152 | static unsigned int reload; /* the computed soft_margin */ |
| 153 | static int nowayout = WATCHDOG_NOWAYOUT; |
| 154 | static char expect_release; |
| 155 | static unsigned long hpwdt_is_open; |
| 156 | |
| 157 | static void __iomem *pci_mem_addr; /* the PCI-memory address */ |
| 158 | static unsigned long __iomem *hpwdt_timer_reg; |
| 159 | static unsigned long __iomem *hpwdt_timer_con; |
| 160 | |
| 161 | static DEFINE_SPINLOCK(rom_lock); |
| 162 | |
| 163 | static void *cru_rom_addr; |
| 164 | |
| 165 | static struct cmn_registers cmn_regs; |
| 166 | |
| 167 | static struct pci_device_id hpwdt_devices[] = { |
| 168 | { |
| 169 | .vendor = PCI_VENDOR_ID_COMPAQ, |
| 170 | .device = 0xB203, |
| 171 | .subvendor = PCI_ANY_ID, |
| 172 | .subdevice = PCI_ANY_ID, |
| 173 | }, |
| 174 | {0}, /* terminate list */ |
| 175 | }; |
| 176 | MODULE_DEVICE_TABLE(pci, hpwdt_devices); |
| 177 | |
| 178 | /* |
| 179 | * bios_checksum |
| 180 | */ |
| 181 | static int __devinit bios_checksum(const char __iomem *ptr, int len) |
| 182 | { |
| 183 | char sum = 0; |
| 184 | int i; |
| 185 | |
| 186 | /* |
| 187 | * calculate checksum of size bytes. This should add up |
| 188 | * to zero if we have a valid header. |
| 189 | */ |
| 190 | for (i = 0; i < len; i++) |
| 191 | sum += ptr[i]; |
| 192 | |
| 193 | return ((sum == 0) && (len > 0)); |
| 194 | } |
| 195 | |
| 196 | #ifndef CONFIG_X86_64 |
| 197 | /* --32 Bit Bios------------------------------------------------------------ */ |
| 198 | |
| 199 | #define HPWDT_ARCH 32 |
| 200 | |
| 201 | asmlinkage void asminline_call(struct cmn_registers *pi86Regs, |
| 202 | unsigned long *pRomEntry) |
| 203 | { |
| 204 | asm("pushl %ebp \n\t" |
| 205 | "movl %esp, %ebp \n\t" |
| 206 | "pusha \n\t" |
| 207 | "pushf \n\t" |
| 208 | "push %es \n\t" |
| 209 | "push %ds \n\t" |
| 210 | "pop %es \n\t" |
| 211 | "movl 8(%ebp),%eax \n\t" |
| 212 | "movl 4(%eax),%ebx \n\t" |
| 213 | "movl 8(%eax),%ecx \n\t" |
| 214 | "movl 12(%eax),%edx \n\t" |
| 215 | "movl 16(%eax),%esi \n\t" |
| 216 | "movl 20(%eax),%edi \n\t" |
| 217 | "movl (%eax),%eax \n\t" |
| 218 | "push %cs \n\t" |
| 219 | "call *12(%ebp) \n\t" |
| 220 | "pushf \n\t" |
| 221 | "pushl %eax \n\t" |
| 222 | "movl 8(%ebp),%eax \n\t" |
| 223 | "movl %ebx,4(%eax) \n\t" |
| 224 | "movl %ecx,8(%eax) \n\t" |
| 225 | "movl %edx,12(%eax) \n\t" |
| 226 | "movl %esi,16(%eax) \n\t" |
| 227 | "movl %edi,20(%eax) \n\t" |
| 228 | "movw %ds,24(%eax) \n\t" |
| 229 | "movw %es,26(%eax) \n\t" |
| 230 | "popl %ebx \n\t" |
| 231 | "movl %ebx,(%eax) \n\t" |
| 232 | "popl %ebx \n\t" |
| 233 | "movl %ebx,28(%eax) \n\t" |
| 234 | "pop %es \n\t" |
| 235 | "popf \n\t" |
| 236 | "popa \n\t" |
| 237 | "leave \n\t" "ret"); |
| 238 | } |
| 239 | |
| 240 | /* |
| 241 | * cru_detect |
| 242 | * |
| 243 | * Routine Description: |
| 244 | * This function uses the 32-bit BIOS Service Directory record to |
| 245 | * search for a $CRU record. |
| 246 | * |
| 247 | * Return Value: |
| 248 | * 0 : SUCCESS |
| 249 | * <0 : FAILURE |
| 250 | */ |
| 251 | static int __devinit cru_detect(unsigned long map_entry, |
| 252 | unsigned long map_offset) |
| 253 | { |
| 254 | void *bios32_map; |
| 255 | unsigned long *bios32_entrypoint; |
| 256 | unsigned long cru_physical_address; |
| 257 | unsigned long cru_length; |
| 258 | unsigned long physical_bios_base = 0; |
| 259 | unsigned long physical_bios_offset = 0; |
| 260 | int retval = -ENODEV; |
| 261 | |
| 262 | bios32_map = ioremap(map_entry, (2 * PAGE_SIZE)); |
| 263 | |
| 264 | if (bios32_map == NULL) |
| 265 | return -ENODEV; |
| 266 | |
| 267 | bios32_entrypoint = bios32_map + map_offset; |
| 268 | |
| 269 | cmn_regs.u1.reax = CRU_BIOS_SIGNATURE_VALUE; |
| 270 | |
| 271 | asminline_call(&cmn_regs, bios32_entrypoint); |
| 272 | |
| 273 | if (cmn_regs.u1.ral != 0) { |
| 274 | printk(KERN_WARNING |
| 275 | "hpwdt: Call succeeded but with an error: 0x%x\n", |
| 276 | cmn_regs.u1.ral); |
| 277 | } else { |
| 278 | physical_bios_base = cmn_regs.u2.rebx; |
| 279 | physical_bios_offset = cmn_regs.u4.redx; |
| 280 | cru_length = cmn_regs.u3.recx; |
| 281 | cru_physical_address = |
| 282 | physical_bios_base + physical_bios_offset; |
| 283 | |
| 284 | /* If the values look OK, then map it in. */ |
| 285 | if ((physical_bios_base + physical_bios_offset)) { |
| 286 | cru_rom_addr = |
| 287 | ioremap(cru_physical_address, cru_length); |
| 288 | if (cru_rom_addr) |
| 289 | retval = 0; |
| 290 | } |
| 291 | |
| 292 | printk(KERN_DEBUG "hpwdt: CRU Base Address: 0x%lx\n", |
| 293 | physical_bios_base); |
| 294 | printk(KERN_DEBUG "hpwdt: CRU Offset Address: 0x%lx\n", |
| 295 | physical_bios_offset); |
| 296 | printk(KERN_DEBUG "hpwdt: CRU Length: 0x%lx\n", |
| 297 | cru_length); |
| 298 | printk(KERN_DEBUG "hpwdt: CRU Mapped Address: 0x%x\n", |
| 299 | (unsigned int)&cru_rom_addr); |
| 300 | } |
| 301 | iounmap(bios32_map); |
| 302 | return retval; |
| 303 | } |
| 304 | |
| 305 | /* |
| 306 | * bios32_present |
| 307 | * |
| 308 | * Routine Description: |
| 309 | * This function finds the 32-bit BIOS Service Directory |
| 310 | * |
| 311 | * Return Value: |
| 312 | * 0 : SUCCESS |
| 313 | * <0 : FAILURE |
| 314 | */ |
| 315 | static int __devinit bios32_present(const char __iomem *p) |
| 316 | { |
| 317 | struct bios32_service_dir *bios_32_ptr; |
| 318 | int length; |
| 319 | unsigned long map_entry, map_offset; |
| 320 | |
| 321 | bios_32_ptr = (struct bios32_service_dir *) p; |
| 322 | |
| 323 | /* |
| 324 | * Search for signature by checking equal to the swizzled value |
| 325 | * instead of calling another routine to perform a strcmp. |
| 326 | */ |
| 327 | if (bios_32_ptr->signature == PCI_BIOS32_SD_VALUE) { |
| 328 | length = bios_32_ptr->length * PCI_BIOS32_PARAGRAPH_LEN; |
| 329 | if (bios_checksum(p, length)) { |
| 330 | /* |
| 331 | * According to the spec, we're looking for the |
| 332 | * first 4KB-aligned address below the entrypoint |
| 333 | * listed in the header. The Service Directory code |
| 334 | * is guaranteed to occupy no more than 2 4KB pages. |
| 335 | */ |
| 336 | map_entry = bios_32_ptr->entry_point & ~(PAGE_SIZE - 1); |
| 337 | map_offset = bios_32_ptr->entry_point - map_entry; |
| 338 | |
| 339 | return cru_detect(map_entry, map_offset); |
| 340 | } |
| 341 | } |
| 342 | return -ENODEV; |
| 343 | } |
| 344 | |
| 345 | static int __devinit detect_cru_service(void) |
| 346 | { |
| 347 | char __iomem *p, *q; |
| 348 | int rc = -1; |
| 349 | |
| 350 | /* |
| 351 | * Search from 0x0f0000 through 0x0fffff, inclusive. |
| 352 | */ |
| 353 | p = ioremap(PCI_ROM_BASE1, ROM_SIZE); |
| 354 | if (p == NULL) |
| 355 | return -ENOMEM; |
| 356 | |
| 357 | for (q = p; q < p + ROM_SIZE; q += 16) { |
| 358 | rc = bios32_present(q); |
| 359 | if (!rc) |
| 360 | break; |
| 361 | } |
| 362 | iounmap(p); |
| 363 | return rc; |
| 364 | } |
| 365 | |
| 366 | #else |
| 367 | /* --64 Bit Bios------------------------------------------------------------ */ |
| 368 | |
| 369 | #define HPWDT_ARCH 64 |
| 370 | |
| 371 | asmlinkage void asminline_call(struct cmn_registers *pi86Regs, |
| 372 | unsigned long *pRomEntry) |
| 373 | { |
| 374 | asm("pushq %rbp \n\t" |
| 375 | "movq %rsp, %rbp \n\t" |
| 376 | "pushq %rax \n\t" |
| 377 | "pushq %rbx \n\t" |
| 378 | "pushq %rdx \n\t" |
| 379 | "pushq %r12 \n\t" |
| 380 | "pushq %r9 \n\t" |
| 381 | "movq %rsi, %r12 \n\t" |
| 382 | "movq %rdi, %r9 \n\t" |
| 383 | "movl 4(%r9),%ebx \n\t" |
| 384 | "movl 8(%r9),%ecx \n\t" |
| 385 | "movl 12(%r9),%edx \n\t" |
| 386 | "movl 16(%r9),%esi \n\t" |
| 387 | "movl 20(%r9),%edi \n\t" |
| 388 | "movl (%r9),%eax \n\t" |
| 389 | "call *%r12 \n\t" |
| 390 | "pushfq \n\t" |
| 391 | "popq %r12 \n\t" |
| 392 | "popfq \n\t" |
| 393 | "movl %eax, (%r9) \n\t" |
| 394 | "movl %ebx, 4(%r9) \n\t" |
| 395 | "movl %ecx, 8(%r9) \n\t" |
| 396 | "movl %edx, 12(%r9) \n\t" |
| 397 | "movl %esi, 16(%r9) \n\t" |
| 398 | "movl %edi, 20(%r9) \n\t" |
| 399 | "movq %r12, %rax \n\t" |
| 400 | "movl %eax, 28(%r9) \n\t" |
| 401 | "popq %r9 \n\t" |
| 402 | "popq %r12 \n\t" |
| 403 | "popq %rdx \n\t" |
| 404 | "popq %rbx \n\t" |
| 405 | "popq %rax \n\t" |
| 406 | "leave \n\t" "ret"); |
| 407 | } |
| 408 | |
| 409 | /* |
| 410 | * dmi_find_cru |
| 411 | * |
| 412 | * Routine Description: |
| 413 | * This function checks wether or not a SMBIOS/DMI record is |
| 414 | * the 64bit CRU info or not |
| 415 | * |
| 416 | * Return Value: |
| 417 | * 0 : SUCCESS - if record found |
| 418 | * <0 : FAILURE - if record not found |
| 419 | */ |
| 420 | static void __devinit dmi_find_cru(const struct dmi_header *dm) |
| 421 | { |
| 422 | struct smbios_cru64_info *smbios_cru64_ptr; |
| 423 | unsigned long cru_physical_address; |
| 424 | |
| 425 | if (dm->type == SMBIOS_CRU64_INFORMATION) { |
| 426 | smbios_cru64_ptr = (struct smbios_cru64_info *) dm; |
| 427 | if (smbios_cru64_ptr->signature == CRU_BIOS_SIGNATURE_VALUE) { |
| 428 | cru_physical_address = |
| 429 | smbios_cru64_ptr->physical_address + |
| 430 | smbios_cru64_ptr->double_offset; |
| 431 | cru_rom_addr = ioremap(cru_physical_address, |
| 432 | smbios_cru64_ptr->double_length); |
| 433 | } |
| 434 | } |
| 435 | } |
| 436 | |
| 437 | /* |
| 438 | * dmi_table |
| 439 | * |
| 440 | * Routine Description: |
| 441 | * Decode the SMBIOS/DMI table and check if we have a 64bit CRU record |
| 442 | * or not. |
| 443 | * |
| 444 | * We have to be cautious here. We have seen BIOSes with DMI pointers |
| 445 | * pointing to completely the wrong place for example |
| 446 | */ |
| 447 | static void __devinit dmi_table(u8 *buf, int len, int num, |
| 448 | void (*decode)(const struct dmi_header *)) |
| 449 | { |
| 450 | u8 *data = buf; |
| 451 | int i = 0; |
| 452 | |
| 453 | /* |
| 454 | * Stop when we see all the items the table claimed to have |
| 455 | * OR we run off the end of the table (also happens) |
| 456 | */ |
| 457 | while ((i < num) && (data - buf + sizeof(struct dmi_header)) <= len) { |
| 458 | const struct dmi_header *dm = (const struct dmi_header *)data; |
| 459 | |
| 460 | /* |
| 461 | * We want to know the total length (formated area and strings) |
| 462 | * before decoding to make sure we won't run off the table in |
| 463 | * dmi_decode or dmi_string |
| 464 | */ |
| 465 | data += dm->length; |
| 466 | while ((data - buf < len - 1) && (data[0] || data[1])) |
| 467 | data++; |
| 468 | if (data - buf < len - 1) |
| 469 | decode(dm); |
| 470 | data += 2; |
| 471 | i++; |
| 472 | } |
| 473 | } |
| 474 | |
| 475 | /* |
| 476 | * smbios_present |
| 477 | * |
| 478 | * Routine Description: |
| 479 | * This function parses the SMBIOS entry point table to retrieve |
| 480 | * the 64 bit CRU Service. |
| 481 | * |
| 482 | * Return Value: |
| 483 | * 0 : SUCCESS |
| 484 | * <0 : FAILURE |
| 485 | */ |
| 486 | static int __devinit smbios_present(const char __iomem *p) |
| 487 | { |
| 488 | struct smbios_entry_point *eps = |
| 489 | (struct smbios_entry_point *) p; |
| 490 | int length; |
| 491 | u8 *buf; |
| 492 | |
| 493 | /* check if we have indeed the SMBIOS table entry point */ |
| 494 | if ((strncmp((char *)eps->anchor, "_SM_", |
| 495 | sizeof(eps->anchor))) == 0) { |
| 496 | length = eps->length; |
| 497 | |
| 498 | /* SMBIOS v2.1 implementation might use 0x1e */ |
| 499 | if ((length == 0x1e) && |
| 500 | (eps->major_ver == 2) && |
| 501 | (eps->minor_ver == 1)) |
| 502 | length = 0x1f; |
| 503 | |
| 504 | /* |
| 505 | * Now we will check: |
| 506 | * - SMBIOS checksum must be 0 |
| 507 | * - intermediate anchor should be _DMI_ |
| 508 | * - intermediate checksum should be 0 |
| 509 | */ |
| 510 | if ((bios_checksum(p, length)) && |
| 511 | (strncmp((char *)eps->intermediate_anchor, "_DMI_", |
| 512 | sizeof(eps->intermediate_anchor)) == 0) && |
| 513 | (bios_checksum(p+0x10, 15))) { |
| 514 | buf = ioremap(eps->table_address, eps->table_length); |
| 515 | if (buf == NULL) |
| 516 | return -ENODEV; |
| 517 | |
| 518 | |
| 519 | /* Scan the DMI table for the 64 bit CRU service */ |
| 520 | dmi_table(buf, eps->table_length, |
| 521 | eps->table_num_structs, dmi_find_cru); |
| 522 | |
| 523 | iounmap(buf); |
| 524 | return 0; |
| 525 | } |
| 526 | } |
| 527 | |
| 528 | return -ENODEV; |
| 529 | } |
| 530 | |
| 531 | static int __devinit smbios_scan_machine(void) |
| 532 | { |
| 533 | char __iomem *p, *q; |
| 534 | int rc; |
| 535 | |
| 536 | if (efi_enabled) { |
| 537 | if (efi.smbios == EFI_INVALID_TABLE_ADDR) |
| 538 | return -ENODEV; |
| 539 | |
| 540 | p = ioremap(efi.smbios, 32); |
| 541 | if (p == NULL) |
| 542 | return -ENOMEM; |
| 543 | |
| 544 | rc = smbios_present(p); |
| 545 | iounmap(p); |
| 546 | } else { |
| 547 | /* |
| 548 | * Search from 0x0f0000 through 0x0fffff, inclusive. |
| 549 | */ |
| 550 | p = ioremap(PCI_ROM_BASE1, ROM_SIZE); |
| 551 | if (p == NULL) |
| 552 | return -ENOMEM; |
| 553 | |
| 554 | for (q = p; q < p + ROM_SIZE; q += 16) { |
| 555 | rc = smbios_present(q); |
| 556 | if (!rc) { |
| 557 | break; |
| 558 | } |
| 559 | } |
| 560 | iounmap(p); |
| 561 | } |
| 562 | } |
| 563 | |
| 564 | static int __devinit detect_cru_service(void) |
| 565 | { |
| 566 | cru_rom_addr = NULL; |
| 567 | |
| 568 | smbios_scan_machine(); /* will become dmi_walk(dmi_find_cru); */ |
| 569 | |
| 570 | /* if cru_rom_addr has been set then we found a CRU service */ |
| 571 | return ((cru_rom_addr != NULL)? 0: -ENODEV); |
| 572 | } |
| 573 | |
| 574 | /* ------------------------------------------------------------------------- */ |
| 575 | |
| 576 | #endif |
| 577 | |
| 578 | /* |
| 579 | * NMI Handler |
| 580 | */ |
| 581 | static int hpwdt_pretimeout(struct notifier_block *nb, unsigned long ulReason, |
| 582 | void *data) |
| 583 | { |
| 584 | static unsigned long rom_pl; |
| 585 | static int die_nmi_called; |
| 586 | |
| 587 | if (ulReason != DIE_NMI && ulReason != DIE_NMI_IPI) |
| 588 | return NOTIFY_OK; |
| 589 | |
| 590 | spin_lock_irqsave(&rom_lock, rom_pl); |
| 591 | if (!die_nmi_called) |
| 592 | asminline_call(&cmn_regs, cru_rom_addr); |
| 593 | die_nmi_called = 1; |
| 594 | spin_unlock_irqrestore(&rom_lock, rom_pl); |
| 595 | if (cmn_regs.u1.ral == 0) { |
| 596 | printk(KERN_WARNING "hpwdt: An NMI occurred, " |
| 597 | "but unable to determine source.\n"); |
| 598 | } else { |
| 599 | panic("An NMI occurred, please see the Integrated " |
| 600 | "Management Log for details.\n"); |
| 601 | } |
| 602 | |
| 603 | return NOTIFY_STOP; |
| 604 | } |
| 605 | |
| 606 | /* |
| 607 | * Watchdog operations |
| 608 | */ |
| 609 | static void hpwdt_start(void) |
| 610 | { |
| 611 | reload = (soft_margin * 1000) / 128; |
| 612 | iowrite16(reload, hpwdt_timer_reg); |
| 613 | iowrite16(0x85, hpwdt_timer_con); |
| 614 | } |
| 615 | |
| 616 | static void hpwdt_stop(void) |
| 617 | { |
| 618 | unsigned long data; |
| 619 | |
| 620 | data = ioread16(hpwdt_timer_con); |
| 621 | data &= 0xFE; |
| 622 | iowrite16(data, hpwdt_timer_con); |
| 623 | } |
| 624 | |
| 625 | static void hpwdt_ping(void) |
| 626 | { |
| 627 | iowrite16(reload, hpwdt_timer_reg); |
| 628 | } |
| 629 | |
| 630 | static int hpwdt_change_timer(int new_margin) |
| 631 | { |
| 632 | /* Arbitrary, can't find the card's limits */ |
| 633 | if (new_margin < 30 || new_margin > 600) { |
| 634 | printk(KERN_WARNING |
| 635 | "hpwdt: New value passed in is invalid: %d seconds.\n", |
| 636 | new_margin); |
| 637 | return -EINVAL; |
| 638 | } |
| 639 | |
| 640 | soft_margin = new_margin; |
| 641 | printk(KERN_DEBUG |
| 642 | "hpwdt: New timer passed in is %d seconds.\n", |
| 643 | new_margin); |
| 644 | reload = (soft_margin * 1000) / 128; |
| 645 | |
| 646 | return 0; |
| 647 | } |
| 648 | |
| 649 | /* |
| 650 | * /dev/watchdog handling |
| 651 | */ |
| 652 | static int hpwdt_open(struct inode *inode, struct file *file) |
| 653 | { |
| 654 | /* /dev/watchdog can only be opened once */ |
| 655 | if (test_and_set_bit(0, &hpwdt_is_open)) |
| 656 | return -EBUSY; |
| 657 | |
| 658 | /* Start the watchdog */ |
| 659 | hpwdt_start(); |
| 660 | hpwdt_ping(); |
| 661 | |
| 662 | return nonseekable_open(inode, file); |
| 663 | } |
| 664 | |
| 665 | static int hpwdt_release(struct inode *inode, struct file *file) |
| 666 | { |
| 667 | /* Stop the watchdog */ |
| 668 | if (expect_release == 42) { |
| 669 | hpwdt_stop(); |
| 670 | } else { |
| 671 | printk(KERN_CRIT |
| 672 | "hpwdt: Unexpected close, not stopping watchdog!\n"); |
| 673 | hpwdt_ping(); |
| 674 | } |
| 675 | |
| 676 | expect_release = 0; |
| 677 | |
| 678 | /* /dev/watchdog is being closed, make sure it can be re-opened */ |
| 679 | clear_bit(0, &hpwdt_is_open); |
| 680 | |
| 681 | return 0; |
| 682 | } |
| 683 | |
| 684 | static ssize_t hpwdt_write(struct file *file, const char __user *data, |
| 685 | size_t len, loff_t *ppos) |
| 686 | { |
| 687 | /* See if we got the magic character 'V' and reload the timer */ |
| 688 | if (len) { |
| 689 | if (!nowayout) { |
| 690 | size_t i; |
| 691 | |
| 692 | /* note: just in case someone wrote the magic character |
| 693 | * five months ago... */ |
| 694 | expect_release = 0; |
| 695 | |
| 696 | /* scan to see whether or not we got the magic char. */ |
| 697 | for (i = 0; i != len; i++) { |
| 698 | char c; |
| 699 | if (get_user(c, data+i)) |
| 700 | return -EFAULT; |
| 701 | if (c == 'V') |
| 702 | expect_release = 42; |
| 703 | } |
| 704 | } |
| 705 | |
| 706 | /* someone wrote to us, we should reload the timer */ |
| 707 | hpwdt_ping(); |
| 708 | } |
| 709 | |
| 710 | return len; |
| 711 | } |
| 712 | |
| 713 | static struct watchdog_info ident = { |
| 714 | .options = WDIOF_SETTIMEOUT | |
| 715 | WDIOF_KEEPALIVEPING | |
| 716 | WDIOF_MAGICCLOSE, |
| 717 | .identity = "HP iLO2 HW Watchdog Timer", |
| 718 | }; |
| 719 | |
| 720 | static long hpwdt_ioctl(struct file *file, unsigned int cmd, |
| 721 | unsigned long arg) |
| 722 | { |
| 723 | void __user *argp = (void __user *)arg; |
| 724 | int __user *p = argp; |
| 725 | int new_margin; |
| 726 | int ret = -ENOTTY; |
| 727 | |
| 728 | switch (cmd) { |
| 729 | case WDIOC_GETSUPPORT: |
| 730 | ret = 0; |
| 731 | if (copy_to_user(argp, &ident, sizeof(ident))) |
| 732 | ret = -EFAULT; |
| 733 | break; |
| 734 | |
| 735 | case WDIOC_GETSTATUS: |
| 736 | case WDIOC_GETBOOTSTATUS: |
| 737 | ret = put_user(0, p); |
| 738 | break; |
| 739 | |
| 740 | case WDIOC_KEEPALIVE: |
| 741 | hpwdt_ping(); |
| 742 | ret = 0; |
| 743 | break; |
| 744 | |
| 745 | case WDIOC_SETTIMEOUT: |
| 746 | ret = get_user(new_margin, p); |
| 747 | if (ret) |
| 748 | break; |
| 749 | |
| 750 | ret = hpwdt_change_timer(new_margin); |
| 751 | if (ret) |
| 752 | break; |
| 753 | |
| 754 | hpwdt_ping(); |
| 755 | /* Fall */ |
| 756 | case WDIOC_GETTIMEOUT: |
| 757 | ret = put_user(soft_margin, p); |
| 758 | break; |
| 759 | } |
| 760 | return ret; |
| 761 | } |
| 762 | |
| 763 | /* |
| 764 | * Kernel interfaces |
| 765 | */ |
| 766 | static struct file_operations hpwdt_fops = { |
| 767 | .owner = THIS_MODULE, |
| 768 | .llseek = no_llseek, |
| 769 | .write = hpwdt_write, |
| 770 | .unlocked_ioctl = hpwdt_ioctl, |
| 771 | .open = hpwdt_open, |
| 772 | .release = hpwdt_release, |
| 773 | }; |
| 774 | |
| 775 | static struct miscdevice hpwdt_miscdev = { |
| 776 | .minor = WATCHDOG_MINOR, |
| 777 | .name = "watchdog", |
| 778 | .fops = &hpwdt_fops, |
| 779 | }; |
| 780 | |
| 781 | static struct notifier_block die_notifier = { |
| 782 | .notifier_call = hpwdt_pretimeout, |
| 783 | .priority = 0x7FFFFFFF, |
| 784 | }; |
| 785 | |
| 786 | /* |
| 787 | * Init & Exit |
| 788 | */ |
| 789 | |
| 790 | static int __devinit hpwdt_init_one(struct pci_dev *dev, |
| 791 | const struct pci_device_id *ent) |
| 792 | { |
| 793 | int retval; |
| 794 | |
| 795 | /* |
| 796 | * First let's find out if we are on an iLO2 server. We will |
| 797 | * not run on a legacy ASM box. |
| 798 | */ |
| 799 | if (dev->subsystem_vendor != PCI_VENDOR_ID_HP) { |
| 800 | dev_warn(&dev->dev, |
| 801 | "This server does not have an iLO2 ASIC.\n"); |
| 802 | return -ENODEV; |
| 803 | } |
| 804 | |
| 805 | if (pci_enable_device(dev)) { |
| 806 | dev_warn(&dev->dev, |
| 807 | "Not possible to enable PCI Device: 0x%x:0x%x.\n", |
| 808 | ent->vendor, ent->device); |
| 809 | return -ENODEV; |
| 810 | } |
| 811 | |
| 812 | pci_mem_addr = pci_iomap(dev, 1, 0x80); |
| 813 | if (!pci_mem_addr) { |
| 814 | dev_warn(&dev->dev, |
| 815 | "Unable to detect the iLO2 server memory.\n"); |
| 816 | retval = -ENOMEM; |
| 817 | goto error_pci_iomap; |
| 818 | } |
| 819 | hpwdt_timer_reg = pci_mem_addr + 0x70; |
| 820 | hpwdt_timer_con = pci_mem_addr + 0x72; |
| 821 | |
| 822 | /* Make sure that we have a valid soft_margin */ |
| 823 | if (hpwdt_change_timer(soft_margin)) |
| 824 | hpwdt_change_timer(DEFAULT_MARGIN); |
| 825 | |
| 826 | /* |
| 827 | * We need to map the ROM to get the CRU service. |
| 828 | * For 32 bit Operating Systems we need to go through the 32 Bit |
| 829 | * BIOS Service Directory |
| 830 | * For 64 bit Operating Systems we get that service through SMBIOS. |
| 831 | */ |
| 832 | retval = detect_cru_service(); |
| 833 | if (retval < 0) { |
| 834 | dev_warn(&dev->dev, |
| 835 | "Unable to detect the %d Bit CRU Service.\n", |
| 836 | HPWDT_ARCH); |
| 837 | goto error_get_cru; |
| 838 | } |
| 839 | |
| 840 | /* |
| 841 | * We know this is the only CRU call we need to make so lets keep as |
| 842 | * few instructions as possible once the NMI comes in. |
| 843 | */ |
| 844 | cmn_regs.u1.rah = 0x0D; |
| 845 | cmn_regs.u1.ral = 0x02; |
| 846 | |
| 847 | retval = register_die_notifier(&die_notifier); |
| 848 | if (retval != 0) { |
| 849 | dev_warn(&dev->dev, |
| 850 | "Unable to register a die notifier (err=%d).\n", |
| 851 | retval); |
| 852 | goto error_die_notifier; |
| 853 | } |
| 854 | |
| 855 | retval = misc_register(&hpwdt_miscdev); |
| 856 | if (retval < 0) { |
| 857 | dev_warn(&dev->dev, |
| 858 | "Unable to register miscdev on minor=%d (err=%d).\n", |
| 859 | WATCHDOG_MINOR, retval); |
| 860 | goto error_misc_register; |
| 861 | } |
| 862 | |
| 863 | printk(KERN_INFO |
| 864 | "hp Watchdog Timer Driver: 1.00" |
| 865 | ", timer margin: %d seconds( nowayout=%d).\n", |
| 866 | soft_margin, nowayout); |
| 867 | |
| 868 | return 0; |
| 869 | |
| 870 | error_misc_register: |
| 871 | unregister_die_notifier(&die_notifier); |
| 872 | error_die_notifier: |
| 873 | if (cru_rom_addr) |
| 874 | iounmap(cru_rom_addr); |
| 875 | error_get_cru: |
| 876 | pci_iounmap(dev, pci_mem_addr); |
| 877 | error_pci_iomap: |
| 878 | pci_disable_device(dev); |
| 879 | return retval; |
| 880 | } |
| 881 | |
| 882 | static void __devexit hpwdt_exit(struct pci_dev *dev) |
| 883 | { |
| 884 | if (!nowayout) |
| 885 | hpwdt_stop(); |
| 886 | |
| 887 | misc_deregister(&hpwdt_miscdev); |
| 888 | unregister_die_notifier(&die_notifier); |
| 889 | |
| 890 | if (cru_rom_addr) |
| 891 | iounmap(cru_rom_addr); |
| 892 | pci_iounmap(dev, pci_mem_addr); |
| 893 | pci_disable_device(dev); |
| 894 | } |
| 895 | |
| 896 | static struct pci_driver hpwdt_driver = { |
| 897 | .name = "hpwdt", |
| 898 | .id_table = hpwdt_devices, |
| 899 | .probe = hpwdt_init_one, |
| 900 | .remove = __devexit_p(hpwdt_exit), |
| 901 | }; |
| 902 | |
| 903 | static void __exit hpwdt_cleanup(void) |
| 904 | { |
| 905 | pci_unregister_driver(&hpwdt_driver); |
| 906 | } |
| 907 | |
| 908 | static int __init hpwdt_init(void) |
| 909 | { |
| 910 | return pci_register_driver(&hpwdt_driver); |
| 911 | } |
| 912 | |
| 913 | MODULE_AUTHOR("Tom Mingarelli"); |
| 914 | MODULE_DESCRIPTION("hp watchdog driver"); |
| 915 | MODULE_LICENSE("GPL"); |
| 916 | MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); |
| 917 | |
| 918 | module_param(soft_margin, int, 0); |
| 919 | MODULE_PARM_DESC(soft_margin, "Watchdog timeout in seconds"); |
| 920 | |
| 921 | module_param(nowayout, int, 0); |
| 922 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" |
| 923 | __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
| 924 | |
| 925 | module_init(hpwdt_init); |
| 926 | module_exit(hpwdt_cleanup); |