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gerrit-public.fairphone.software / kernel / msm / 7fca5dc8aa7aaa6a1023bd3587901b88ebfe8154 / . / arch / arm / mach-omap1 / clock.h
blob: 75d0d7d90bff6b08fbd6e5d6ff8e8496a5680d96 [file] [log] [blame]
Tony Lindgren3179a012005-11-10 14:26:48 +0000[diff] [blame]1/*
2 * linux/arch/arm/mach-omap1/clock.h
3 *
Paul Walmsley52650502009-12-08 16:29:38 -0700[diff] [blame]4 * Copyright (C) 2004 - 2005, 2009 Nokia corporation
Tony Lindgren3179a012005-11-10 14:26:48 +0000[diff] [blame]5 * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
6 * Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __ARCH_ARM_MACH_OMAP1_CLOCK_H
14#define __ARCH_ARM_MACH_OMAP1_CLOCK_H
15
Paul Walmsley52650502009-12-08 16:29:38 -0700[diff] [blame]16#include <linux/clk.h>
Tony Lindgren3179a012005-11-10 14:26:48 +0000[diff] [blame]17
Paul Walmsley52650502009-12-08 16:29:38 -0700[diff] [blame]18#include <plat/clock.h>
Russell Kingd5e60722009-02-08 16:07:46 +0000[diff] [blame]19
Paul Walmsley52650502009-12-08 16:29:38 -0700[diff] [blame]20extern int __init omap1_clk_init(void);
21extern int omap1_clk_enable(struct clk *clk);
22extern void omap1_clk_disable(struct clk *clk);
23extern long omap1_clk_round_rate(struct clk *clk, unsigned long rate);
24extern int omap1_clk_set_rate(struct clk *clk, unsigned long rate);
25extern unsigned long omap1_ckctl_recalc(struct clk *clk);
26extern int omap1_set_sossi_rate(struct clk *clk, unsigned long rate);
27extern unsigned long omap1_sossi_recalc(struct clk *clk);
28extern unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk);
29extern int omap1_clk_set_rate_dsp_domain(struct clk *clk, unsigned long rate);
30extern int omap1_set_uart_rate(struct clk *clk, unsigned long rate);
31extern unsigned long omap1_uart_recalc(struct clk *clk);
32extern int omap1_set_ext_clk_rate(struct clk *clk, unsigned long rate);
33extern long omap1_round_ext_clk_rate(struct clk *clk, unsigned long rate);
34extern void omap1_init_ext_clk(struct clk *clk);
35extern int omap1_select_table_rate(struct clk *clk, unsigned long rate);
36extern long omap1_round_to_table_rate(struct clk *clk, unsigned long rate);
37extern int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate);
38extern long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate);
39extern unsigned long omap1_watchdog_recalc(struct clk *clk);
40
41#ifdef CONFIG_OMAP_RESET_CLOCKS
Felipe Balbi5838bb62010-05-20 12:31:04 -0600[diff] [blame]42extern void omap1_clk_disable_unused(struct clk *clk);
Paul Walmsley52650502009-12-08 16:29:38 -0700[diff] [blame]43#else
44#define omap1_clk_disable_unused NULL
45#endif
Tony Lindgren3179a012005-11-10 14:26:48 +0000[diff] [blame]46
47struct uart_clk {
48 struct clk clk;
49 unsigned long sysc_addr;
50};
51
52/* Provide a method for preventing idling some ARM IDLECT clocks */
53struct arm_idlect1_clk {
54 struct clk clk;
55 unsigned long no_idle_count;
56 __u8 idlect_shift;
57};
58
59/* ARM_CKCTL bit shifts */
60#define CKCTL_PERDIV_OFFSET 0
61#define CKCTL_LCDDIV_OFFSET 2
62#define CKCTL_ARMDIV_OFFSET 4
63#define CKCTL_DSPDIV_OFFSET 6
64#define CKCTL_TCDIV_OFFSET 8
65#define CKCTL_DSPMMUDIV_OFFSET 10
66/*#define ARM_TIMXO 12*/
67#define EN_DSPCK 13
68/*#define ARM_INTHCK_SEL 14*/ /* Divide-by-2 for mpu inth_ck */
69/* DSP_CKCTL bit shifts */
70#define CKCTL_DSPPERDIV_OFFSET 0
71
72/* ARM_IDLECT2 bit shifts */
73#define EN_WDTCK 0
74#define EN_XORPCK 1
75#define EN_PERCK 2
76#define EN_LCDCK 3
77#define EN_LBCK 4 /* Not on 1610/1710 */
78/*#define EN_HSABCK 5*/
79#define EN_APICK 6
80#define EN_TIMCK 7
81#define DMACK_REQ 8
82#define EN_GPIOCK 9 /* Not on 1610/1710 */
83/*#define EN_LBFREECK 10*/
84#define EN_CKOUT_ARM 11
85
86/* ARM_IDLECT3 bit shifts */
87#define EN_OCPI_CK 0
88#define EN_TC1_CK 2
89#define EN_TC2_CK 4
90
91/* DSP_IDLECT2 bit shifts (0,1,2 are same as for ARM_IDLECT2) */
92#define EN_DSPTIMCK 5
93
94/* Various register defines for clock controls scattered around OMAP chip */
Tony Lindgren90afd5c2006-09-25 13:27:20 +0300[diff] [blame]95#define SDW_MCLK_INV_BIT 2 /* In ULPD_CLKC_CTRL */
Tony Lindgren3179a012005-11-10 14:26:48 +0000[diff] [blame]96#define USB_MCLK_EN_BIT 4 /* In ULPD_CLKC_CTRL */
97#define USB_HOST_HHC_UHOST_EN 9 /* In MOD_CONF_CTRL_0 */
98#define SWD_ULPD_PLL_CLK_REQ 1 /* In SWD_CLK_DIV_CTRL_SEL */
99#define COM_ULPD_PLL_CLK_REQ 1 /* In COM_CLK_DIV_CTRL_SEL */
100#define SWD_CLK_DIV_CTRL_SEL 0xfffe0874
101#define COM_CLK_DIV_CTRL_SEL 0xfffe0878
102#define SOFT_REQ_REG 0xfffe0834
103#define SOFT_REQ_REG2 0xfffe0880
104
Paul Walmsley52650502009-12-08 16:29:38 -0700[diff] [blame]105extern __u32 arm_idlect1_mask;
106extern struct clk *api_ck_p, *ck_dpll1_p, *ck_ref_p;
Tony Lindgren3179a012005-11-10 14:26:48 +0000[diff] [blame]107
Paul Walmsley52650502009-12-08 16:29:38 -0700[diff] [blame]108extern const struct clkops clkops_dspck;
109extern const struct clkops clkops_dummy;
110extern const struct clkops clkops_uart;
111extern const struct clkops clkops_generic;
Tony Lindgren90afd5c2006-09-25 13:27:20 +0300[diff] [blame]112
Tony Lindgren3179a012005-11-10 14:26:48 +0000[diff] [blame]113#endif