Mohan Pallaka | 033deb8 | 2012-09-12 19:13:57 +0530 | [diff] [blame] | 1 | /* Copyright (c) 2012, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | #include <linux/init.h> |
| 14 | #include <linux/module.h> |
| 15 | #include <linux/gpio.h> |
| 16 | #include <linux/i2c.h> |
| 17 | #include <linux/pm.h> |
| 18 | #include <linux/err.h> |
| 19 | #include <linux/of.h> |
| 20 | #include <linux/regulator/consumer.h> |
| 21 | #include <linux/i2c/ti_drv2667.h> |
| 22 | #include "../staging/android/timed_output.h" |
| 23 | |
| 24 | #ifdef CONFIG_HAS_EARLYSUSPEND |
| 25 | #include <linux/earlysuspend.h> |
| 26 | #define DRV2667_SUS_LEVEL 1 |
| 27 | #endif |
| 28 | |
| 29 | #define DRV2667_STATUS_REG 0x00 |
| 30 | #define DRV2667_CNTL1_REG 0x01 |
| 31 | #define DRV2667_CNTL2_REG 0x02 |
| 32 | #define DRV2667_WAV_SEQ3_REG 0x03 |
| 33 | #define DRV2667_FIFO_REG 0x0B |
| 34 | #define DRV2667_PAGE_REG 0xFF |
| 35 | |
| 36 | #define DRV2667_STANDBY_MASK 0xBF |
| 37 | #define DRV2667_INPUT_MUX_MASK 0x04 |
| 38 | #define DRV2667_GAIN_MASK 0xFC |
| 39 | #define DRV2667_GAIN_SHIFT 0 |
| 40 | #define DRV2667_TIMEOUT_MASK 0xF3 |
| 41 | #define DRV2667_TIMEOUT_SHIFT 2 |
| 42 | #define DRV2667_GO_MASK 0x01 |
| 43 | #define DRV2667_FIFO_SIZE 100 |
| 44 | #define DRV2667_VIB_START_VAL 0x7F |
| 45 | #define DRV2667_REG_PAGE_ID 0x00 |
| 46 | #define DRV2667_FIFO_CHUNK_MS 10 |
| 47 | #define DRV2667_BYTES_PER_MS 8 |
| 48 | |
Mohan Pallaka | f66e713 | 2012-12-06 16:58:53 +0530 | [diff] [blame] | 49 | #define DRV2667_WAV_SEQ_ID_IDX 0 |
Mohan Pallaka | 033deb8 | 2012-09-12 19:13:57 +0530 | [diff] [blame] | 50 | #define DRV2667_WAV_SEQ_REP_IDX 6 |
| 51 | #define DRV2667_WAV_SEQ_FREQ_IDX 8 |
| 52 | #define DRV2667_WAV_SEQ_FREQ_MIN 8 |
| 53 | #define DRV2667_WAV_SEQ_DUR_IDX 9 |
| 54 | |
| 55 | #define DRV2667_MIN_IDLE_TIMEOUT_MS 5 |
| 56 | #define DRV2667_MAX_IDLE_TIMEOUT_MS 20 |
| 57 | |
| 58 | #define DRV2667_VTG_MIN_UV 3000000 |
| 59 | #define DRV2667_VTG_MAX_UV 5500000 |
| 60 | #define DRV2667_VTG_CURR_UA 24000 |
| 61 | #define DRV2667_I2C_VTG_MIN_UV 1800000 |
| 62 | #define DRV2667_I2C_VTG_MAX_UV 1800000 |
| 63 | #define DRV2667_I2C_CURR_UA 9630 |
| 64 | |
| 65 | /* supports 3 modes in digital - fifo, ram and wave */ |
| 66 | enum drv2667_modes { |
| 67 | FIFO_MODE = 0, |
| 68 | RAM_SEQ_MODE, |
| 69 | WAV_SEQ_MODE, |
| 70 | ANALOG_MODE, |
| 71 | }; |
| 72 | |
| 73 | struct drv2667_data { |
| 74 | struct i2c_client *client; |
| 75 | struct timed_output_dev dev; |
| 76 | struct hrtimer timer; |
| 77 | struct work_struct work; |
| 78 | struct mutex lock; |
| 79 | struct regulator *vdd; |
| 80 | struct regulator *vdd_i2c; |
| 81 | u32 max_runtime_ms; |
| 82 | u32 runtime_left; |
| 83 | u8 buf[DRV2667_FIFO_SIZE + 1]; |
| 84 | u8 cntl2_val; |
| 85 | enum drv2667_modes mode; |
| 86 | u32 time_chunk_ms; |
| 87 | #ifdef CONFIG_HAS_EARLYSUSPEND |
| 88 | struct early_suspend es; |
| 89 | #endif |
| 90 | }; |
| 91 | |
| 92 | static int drv2667_read_reg(struct i2c_client *client, u32 reg) |
| 93 | { |
| 94 | int rc; |
| 95 | |
| 96 | rc = i2c_smbus_read_byte_data(client, reg); |
| 97 | if (rc < 0) |
| 98 | dev_err(&client->dev, "i2c reg read for 0x%x failed\n", reg); |
| 99 | return rc; |
| 100 | } |
| 101 | |
| 102 | static int drv2667_write_reg(struct i2c_client *client, u32 reg, u8 val) |
| 103 | { |
| 104 | int rc; |
| 105 | |
| 106 | rc = i2c_smbus_write_byte_data(client, reg, val); |
| 107 | if (rc < 0) |
| 108 | dev_err(&client->dev, "i2c reg write for 0x%xfailed\n", reg); |
| 109 | |
| 110 | return rc; |
| 111 | } |
| 112 | |
| 113 | static void drv2667_dump_regs(struct drv2667_data *data, char *label) |
| 114 | { |
| 115 | dev_dbg(&data->client->dev, |
| 116 | "%s: reg0x00 = 0x%x, reg0x01 = 0x%x reg0x02 = 0x%x", label, |
| 117 | drv2667_read_reg(data->client, DRV2667_STATUS_REG), |
| 118 | drv2667_read_reg(data->client, DRV2667_CNTL1_REG), |
| 119 | drv2667_read_reg(data->client, DRV2667_CNTL2_REG)); |
| 120 | } |
| 121 | |
| 122 | static void drv2667_worker(struct work_struct *work) |
| 123 | { |
| 124 | struct drv2667_data *data; |
| 125 | int rc = 0; |
| 126 | u8 val; |
| 127 | |
| 128 | data = container_of(work, struct drv2667_data, work); |
| 129 | |
| 130 | if (data->mode == WAV_SEQ_MODE) { |
Mohan Pallaka | f66e713 | 2012-12-06 16:58:53 +0530 | [diff] [blame] | 131 | /* clear go bit */ |
| 132 | val = data->cntl2_val & ~DRV2667_GO_MASK; |
Mohan Pallaka | 033deb8 | 2012-09-12 19:13:57 +0530 | [diff] [blame] | 133 | rc = drv2667_write_reg(data->client, DRV2667_CNTL2_REG, val); |
Mohan Pallaka | f66e713 | 2012-12-06 16:58:53 +0530 | [diff] [blame] | 134 | if (rc < 0) { |
| 135 | dev_err(&data->client->dev, "i2c send msg failed\n"); |
| 136 | return; |
| 137 | } |
| 138 | /* restart wave if runtime is left */ |
| 139 | if (data->runtime_left) { |
| 140 | val = data->cntl2_val | DRV2667_GO_MASK; |
| 141 | rc = drv2667_write_reg(data->client, |
| 142 | DRV2667_CNTL2_REG, val); |
| 143 | } |
Mohan Pallaka | 033deb8 | 2012-09-12 19:13:57 +0530 | [diff] [blame] | 144 | } else if (data->mode == FIFO_MODE) { |
| 145 | /* data is played at 8khz */ |
| 146 | if (data->runtime_left < data->time_chunk_ms) |
| 147 | val = data->runtime_left * DRV2667_BYTES_PER_MS; |
| 148 | else |
| 149 | val = data->time_chunk_ms * DRV2667_BYTES_PER_MS; |
| 150 | |
| 151 | rc = i2c_master_send(data->client, data->buf, val + 1); |
| 152 | } |
| 153 | |
| 154 | if (rc < 0) |
| 155 | dev_err(&data->client->dev, "i2c send message failed\n"); |
| 156 | } |
| 157 | |
| 158 | static void drv2667_enable(struct timed_output_dev *dev, int runtime) |
| 159 | { |
| 160 | struct drv2667_data *data = container_of(dev, struct drv2667_data, dev); |
| 161 | unsigned long time_ms; |
| 162 | |
| 163 | if (runtime > data->max_runtime_ms) { |
| 164 | dev_dbg(&data->client->dev, "Invalid runtime\n"); |
| 165 | runtime = data->max_runtime_ms; |
| 166 | } |
| 167 | |
| 168 | mutex_lock(&data->lock); |
| 169 | hrtimer_cancel(&data->timer); |
| 170 | data->runtime_left = runtime; |
| 171 | if (data->runtime_left < data->time_chunk_ms) |
| 172 | time_ms = runtime * NSEC_PER_MSEC; |
| 173 | else |
| 174 | time_ms = data->time_chunk_ms * NSEC_PER_MSEC; |
| 175 | hrtimer_start(&data->timer, ktime_set(0, time_ms), HRTIMER_MODE_REL); |
| 176 | schedule_work(&data->work); |
| 177 | mutex_unlock(&data->lock); |
| 178 | } |
| 179 | |
| 180 | static int drv2667_get_time(struct timed_output_dev *dev) |
| 181 | { |
| 182 | struct drv2667_data *data = container_of(dev, struct drv2667_data, dev); |
| 183 | |
| 184 | if (hrtimer_active(&data->timer)) |
| 185 | return data->runtime_left + |
| 186 | ktime_to_ms(hrtimer_get_remaining(&data->timer)); |
| 187 | return 0; |
| 188 | } |
| 189 | |
| 190 | static enum hrtimer_restart drv2667_timer(struct hrtimer *timer) |
| 191 | { |
| 192 | struct drv2667_data *data; |
| 193 | int time_ms; |
| 194 | |
| 195 | data = container_of(timer, struct drv2667_data, timer); |
| 196 | if (data->runtime_left <= data->time_chunk_ms) { |
| 197 | data->runtime_left = 0; |
| 198 | schedule_work(&data->work); |
| 199 | return HRTIMER_NORESTART; |
| 200 | } |
| 201 | |
| 202 | data->runtime_left -= data->time_chunk_ms; |
| 203 | if (data->runtime_left < data->time_chunk_ms) |
| 204 | time_ms = data->runtime_left * NSEC_PER_MSEC; |
| 205 | else |
| 206 | time_ms = data->time_chunk_ms * NSEC_PER_MSEC; |
| 207 | |
| 208 | hrtimer_forward_now(&data->timer, ktime_set(0, time_ms)); |
| 209 | schedule_work(&data->work); |
| 210 | return HRTIMER_RESTART; |
| 211 | } |
| 212 | |
| 213 | static int drv2667_vreg_config(struct drv2667_data *data, bool on) |
| 214 | { |
| 215 | int rc = 0; |
| 216 | |
| 217 | if (!on) |
| 218 | goto deconfig_vreg; |
| 219 | |
| 220 | data->vdd = regulator_get(&data->client->dev, "vdd"); |
| 221 | if (IS_ERR(data->vdd)) { |
| 222 | rc = PTR_ERR(data->vdd); |
| 223 | dev_err(&data->client->dev, "unable to request vdd\n"); |
| 224 | return rc; |
| 225 | } |
| 226 | |
| 227 | if (regulator_count_voltages(data->vdd) > 0) { |
| 228 | rc = regulator_set_voltage(data->vdd, |
| 229 | DRV2667_VTG_MIN_UV, DRV2667_VTG_MAX_UV); |
| 230 | if (rc < 0) { |
| 231 | dev_err(&data->client->dev, |
| 232 | "vdd set voltage failed(%d)\n", rc); |
| 233 | goto put_vdd; |
| 234 | } |
| 235 | } |
| 236 | |
| 237 | data->vdd_i2c = regulator_get(&data->client->dev, "vdd-i2c"); |
| 238 | if (IS_ERR(data->vdd_i2c)) { |
| 239 | rc = PTR_ERR(data->vdd_i2c); |
| 240 | dev_err(&data->client->dev, "unable to request vdd for i2c\n"); |
| 241 | goto reset_vdd_volt; |
| 242 | } |
| 243 | |
| 244 | if (regulator_count_voltages(data->vdd_i2c) > 0) { |
| 245 | rc = regulator_set_voltage(data->vdd_i2c, |
| 246 | DRV2667_I2C_VTG_MIN_UV, DRV2667_I2C_VTG_MAX_UV); |
| 247 | if (rc < 0) { |
| 248 | dev_err(&data->client->dev, |
| 249 | "vdd_i2c set voltage failed(%d)\n", rc); |
| 250 | goto put_vdd_i2c; |
| 251 | } |
| 252 | } |
| 253 | |
| 254 | return rc; |
| 255 | |
| 256 | deconfig_vreg: |
| 257 | if (regulator_count_voltages(data->vdd_i2c) > 0) |
| 258 | regulator_set_voltage(data->vdd_i2c, 0, DRV2667_I2C_VTG_MAX_UV); |
| 259 | put_vdd_i2c: |
| 260 | regulator_put(data->vdd_i2c); |
| 261 | reset_vdd_volt: |
| 262 | if (regulator_count_voltages(data->vdd) > 0) |
| 263 | regulator_set_voltage(data->vdd, 0, DRV2667_VTG_MAX_UV); |
| 264 | put_vdd: |
| 265 | regulator_put(data->vdd); |
| 266 | return rc; |
| 267 | } |
| 268 | |
| 269 | static int reg_set_optimum_mode_check(struct regulator *reg, int load_uA) |
| 270 | { |
| 271 | return (regulator_count_voltages(reg) > 0) ? |
| 272 | regulator_set_optimum_mode(reg, load_uA) : 0; |
| 273 | } |
| 274 | |
| 275 | |
| 276 | static int drv2667_vreg_on(struct drv2667_data *data, bool on) |
| 277 | { |
| 278 | int rc = 0; |
| 279 | |
| 280 | if (!on) |
| 281 | goto vreg_off; |
| 282 | |
| 283 | rc = reg_set_optimum_mode_check(data->vdd, DRV2667_VTG_CURR_UA); |
| 284 | if (rc < 0) { |
| 285 | dev_err(&data->client->dev, |
| 286 | "Regulator vdd set_opt failed rc=%d\n", rc); |
| 287 | return rc; |
| 288 | } |
| 289 | |
| 290 | rc = regulator_enable(data->vdd); |
| 291 | if (rc < 0) { |
| 292 | dev_err(&data->client->dev, "enable vdd failed\n"); |
| 293 | return rc; |
| 294 | } |
| 295 | |
| 296 | rc = reg_set_optimum_mode_check(data->vdd_i2c, DRV2667_I2C_CURR_UA); |
| 297 | if (rc < 0) { |
| 298 | dev_err(&data->client->dev, |
| 299 | "Regulator vdd_i2c set_opt failed rc=%d\n", rc); |
| 300 | return rc; |
| 301 | } |
| 302 | |
| 303 | rc = regulator_enable(data->vdd_i2c); |
| 304 | if (rc < 0) { |
| 305 | dev_err(&data->client->dev, "enable vdd_i2c failed\n"); |
| 306 | goto disable_vdd; |
| 307 | } |
| 308 | |
| 309 | return rc; |
| 310 | vreg_off: |
| 311 | regulator_disable(data->vdd_i2c); |
| 312 | disable_vdd: |
| 313 | regulator_disable(data->vdd); |
| 314 | return rc; |
| 315 | } |
| 316 | |
| 317 | #ifdef CONFIG_PM |
| 318 | static int drv2667_suspend(struct device *dev) |
| 319 | { |
| 320 | struct drv2667_data *data = dev_get_drvdata(dev); |
| 321 | u8 val; |
| 322 | int rc; |
| 323 | |
| 324 | hrtimer_cancel(&data->timer); |
| 325 | cancel_work_sync(&data->work); |
| 326 | |
| 327 | /* set standby */ |
| 328 | val = data->cntl2_val | ~DRV2667_STANDBY_MASK; |
| 329 | rc = drv2667_write_reg(data->client, DRV2667_CNTL2_REG, val); |
| 330 | if (rc < 0) |
| 331 | dev_err(dev, "unable to set standby\n"); |
| 332 | |
| 333 | /* turn regulators off */ |
| 334 | drv2667_vreg_on(data, false); |
| 335 | return 0; |
| 336 | } |
| 337 | |
| 338 | static int drv2667_resume(struct device *dev) |
| 339 | { |
| 340 | struct drv2667_data *data = dev_get_drvdata(dev); |
| 341 | int rc; |
| 342 | |
| 343 | /* turn regulators on */ |
| 344 | rc = drv2667_vreg_on(data, true); |
| 345 | if (rc < 0) { |
| 346 | dev_err(dev, "unable to turn regulators on\n"); |
| 347 | return rc; |
| 348 | } |
| 349 | |
| 350 | /* clear standby */ |
| 351 | rc = drv2667_write_reg(data->client, |
| 352 | DRV2667_CNTL2_REG, data->cntl2_val); |
| 353 | if (rc < 0) { |
| 354 | dev_err(dev, "unable to clear standby\n"); |
| 355 | goto vreg_off; |
| 356 | } |
| 357 | |
| 358 | return 0; |
| 359 | vreg_off: |
| 360 | drv2667_vreg_on(data, false); |
| 361 | return rc; |
| 362 | } |
| 363 | |
| 364 | #ifdef CONFIG_HAS_EARLYSUSPEND |
| 365 | static void drv2667_early_suspend(struct early_suspend *es) |
| 366 | { |
| 367 | struct drv2667_data *data = container_of(es, struct drv2667_data, es); |
| 368 | |
| 369 | drv2667_suspend(&data->client->dev); |
| 370 | } |
| 371 | |
| 372 | static void drv2667_late_resume(struct early_suspend *es) |
| 373 | { |
| 374 | struct drv2667_data *data = container_of(es, struct drv2667_data, es); |
| 375 | |
| 376 | drv2667_resume(&data->client->dev); |
| 377 | } |
| 378 | #endif |
| 379 | |
| 380 | static const struct dev_pm_ops drv2667_pm_ops = { |
| 381 | #ifndef CONFIG_HAS_EARLYSUSPEND |
| 382 | .suspend = drv2667_suspend, |
| 383 | .resume = drv2667_resume, |
| 384 | #endif |
| 385 | }; |
| 386 | #endif |
| 387 | |
| 388 | #ifdef CONFIG_OF |
| 389 | static int drv2667_parse_dt(struct device *dev, struct drv2667_pdata *pdata) |
| 390 | { |
| 391 | struct property *prop; |
| 392 | int rc; |
| 393 | u32 temp; |
| 394 | |
| 395 | rc = of_property_read_string(dev->of_node, "ti,label", &pdata->name); |
| 396 | /* set vibrator as default name */ |
| 397 | if (rc < 0) |
| 398 | pdata->name = "vibrator"; |
| 399 | |
| 400 | rc = of_property_read_u32(dev->of_node, "ti,gain", &temp); |
| 401 | /* set gain as 0 */ |
| 402 | if (rc < 0) |
| 403 | pdata->gain = 0; |
| 404 | else |
| 405 | pdata->gain = (u8) temp; |
| 406 | |
| 407 | rc = of_property_read_u32(dev->of_node, "ti,mode", &temp); |
| 408 | /* set FIFO mode as default */ |
| 409 | if (rc < 0) |
| 410 | pdata->mode = FIFO_MODE; |
| 411 | else |
| 412 | pdata->mode = (u8) temp; |
| 413 | |
| 414 | /* read wave sequence */ |
| 415 | if (pdata->mode == WAV_SEQ_MODE) { |
| 416 | prop = of_find_property(dev->of_node, "ti,wav-seq", &temp); |
| 417 | if (!prop) { |
| 418 | dev_err(dev, "wav seq data not found"); |
| 419 | return -ENODEV; |
| 420 | } else if (temp != DRV2667_WAV_SEQ_LEN) { |
| 421 | dev_err(dev, "Invalid length of wav seq data\n"); |
| 422 | return -EINVAL; |
| 423 | } |
| 424 | memcpy(pdata->wav_seq, prop->value, DRV2667_WAV_SEQ_LEN); |
| 425 | } |
| 426 | |
| 427 | rc = of_property_read_u32(dev->of_node, "ti,idle-timeout-ms", &temp); |
| 428 | /* configure minimum idle timeout */ |
| 429 | if (rc < 0) |
| 430 | pdata->idle_timeout_ms = DRV2667_MIN_IDLE_TIMEOUT_MS; |
| 431 | else |
| 432 | pdata->idle_timeout_ms = (u8) temp; |
| 433 | |
| 434 | rc = of_property_read_u32(dev->of_node, "ti,max-runtime-ms", |
| 435 | &pdata->max_runtime_ms); |
| 436 | /* configure one sec as default time */ |
| 437 | if (rc < 0) |
| 438 | pdata->max_runtime_ms = MSEC_PER_SEC; |
| 439 | |
| 440 | return 0; |
| 441 | } |
| 442 | #else |
| 443 | static int drv2667_parse_dt(struct device *dev, struct drv2667_pdata *pdata) |
| 444 | { |
| 445 | return -ENODEV; |
| 446 | } |
| 447 | #endif |
| 448 | |
| 449 | static int __devinit drv2667_probe(struct i2c_client *client, |
| 450 | const struct i2c_device_id *id) |
| 451 | { |
| 452 | struct drv2667_data *data; |
| 453 | struct drv2667_pdata *pdata; |
| 454 | int rc, i; |
| 455 | u8 val, fifo_seq_val, reg; |
| 456 | |
| 457 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { |
| 458 | dev_err(&client->dev, "i2c is not supported\n"); |
| 459 | return -EIO; |
| 460 | } |
| 461 | |
| 462 | if (client->dev.of_node) { |
| 463 | pdata = devm_kzalloc(&client->dev, |
| 464 | sizeof(struct drv2667_pdata), GFP_KERNEL); |
| 465 | if (!pdata) { |
| 466 | dev_err(&client->dev, "unable to allocate pdata\n"); |
| 467 | return -ENOMEM; |
| 468 | } |
| 469 | /* parse DT */ |
| 470 | rc = drv2667_parse_dt(&client->dev, pdata); |
| 471 | if (rc) { |
| 472 | dev_err(&client->dev, "DT parsing failed\n"); |
| 473 | return rc; |
| 474 | } |
| 475 | } else { |
| 476 | pdata = client->dev.platform_data; |
| 477 | if (!pdata) { |
| 478 | dev_err(&client->dev, "invalid pdata\n"); |
| 479 | return -EINVAL; |
| 480 | } |
| 481 | } |
| 482 | |
| 483 | data = devm_kzalloc(&client->dev, sizeof(struct drv2667_data), |
| 484 | GFP_KERNEL); |
| 485 | if (!data) { |
| 486 | dev_err(&client->dev, "unable to allocate memory\n"); |
| 487 | return -ENOMEM; |
| 488 | } |
| 489 | |
| 490 | i2c_set_clientdata(client, data); |
| 491 | |
| 492 | data->client = client; |
| 493 | data->max_runtime_ms = pdata->max_runtime_ms; |
| 494 | mutex_init(&data->lock); |
| 495 | INIT_WORK(&data->work, drv2667_worker); |
| 496 | hrtimer_init(&data->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); |
| 497 | data->timer.function = drv2667_timer; |
| 498 | data->mode = pdata->mode; |
| 499 | |
| 500 | /* configure voltage regulators */ |
| 501 | rc = drv2667_vreg_config(data, true); |
| 502 | if (rc) { |
| 503 | dev_err(&client->dev, "unable to configure regulators\n"); |
| 504 | goto destroy_mutex; |
| 505 | } |
| 506 | |
| 507 | /* turn on voltage regulators */ |
| 508 | rc = drv2667_vreg_on(data, true); |
| 509 | if (rc) { |
| 510 | dev_err(&client->dev, "unable to turn on regulators\n"); |
| 511 | goto deconfig_vreg; |
| 512 | } |
| 513 | |
| 514 | rc = drv2667_read_reg(client, DRV2667_CNTL2_REG); |
| 515 | if (rc < 0) |
| 516 | goto vreg_off; |
| 517 | |
| 518 | /* set timeout, clear standby */ |
| 519 | val = (u8) rc; |
| 520 | |
| 521 | if (pdata->idle_timeout_ms < DRV2667_MIN_IDLE_TIMEOUT_MS || |
| 522 | pdata->idle_timeout_ms > DRV2667_MAX_IDLE_TIMEOUT_MS || |
| 523 | (pdata->idle_timeout_ms % DRV2667_MIN_IDLE_TIMEOUT_MS)) { |
| 524 | dev_err(&client->dev, "Invalid idle timeout\n"); |
| 525 | goto vreg_off; |
| 526 | } |
| 527 | |
| 528 | val = (val & DRV2667_TIMEOUT_MASK) | |
| 529 | ((pdata->idle_timeout_ms / DRV2667_MIN_IDLE_TIMEOUT_MS - 1) << |
| 530 | DRV2667_TIMEOUT_SHIFT); |
| 531 | |
| 532 | val &= DRV2667_STANDBY_MASK; |
| 533 | |
| 534 | rc = drv2667_write_reg(client, DRV2667_CNTL2_REG, val); |
| 535 | if (rc < 0) |
| 536 | goto vreg_off; |
| 537 | |
| 538 | /* cache control2 val */ |
| 539 | data->cntl2_val = val; |
| 540 | |
| 541 | /* program drv2667 registers */ |
| 542 | rc = drv2667_read_reg(client, DRV2667_CNTL1_REG); |
| 543 | if (rc < 0) |
| 544 | goto vreg_off; |
| 545 | |
| 546 | /* gain and input mode */ |
| 547 | val = (u8) rc; |
| 548 | |
| 549 | /* remove this check after adding support for these modes */ |
| 550 | if (data->mode == ANALOG_MODE || data->mode == RAM_SEQ_MODE) { |
| 551 | dev_err(&data->client->dev, "Mode not supported\n"); |
| 552 | goto vreg_off; |
| 553 | } else |
| 554 | val &= ~DRV2667_INPUT_MUX_MASK; /* set digital mode */ |
| 555 | |
| 556 | val = (val & DRV2667_GAIN_MASK) | (pdata->gain << DRV2667_GAIN_SHIFT); |
| 557 | |
| 558 | rc = drv2667_write_reg(client, DRV2667_CNTL1_REG, val); |
| 559 | if (rc < 0) |
| 560 | goto vreg_off; |
| 561 | |
| 562 | if (data->mode == FIFO_MODE) { |
| 563 | /* Load a predefined pattern for FIFO mode */ |
| 564 | data->buf[0] = DRV2667_FIFO_REG; |
| 565 | fifo_seq_val = DRV2667_VIB_START_VAL; |
| 566 | |
| 567 | for (i = 1; i < DRV2667_FIFO_SIZE - 1; i++, fifo_seq_val++) |
| 568 | data->buf[i] = fifo_seq_val; |
| 569 | |
| 570 | data->time_chunk_ms = DRV2667_FIFO_CHUNK_MS; |
| 571 | } else if (data->mode == WAV_SEQ_MODE) { |
| 572 | u8 freq, rep, dur; |
| 573 | |
| 574 | /* program wave sequence from pdata */ |
| 575 | /* id to wave sequence 3, set page */ |
| 576 | rc = drv2667_write_reg(client, DRV2667_WAV_SEQ3_REG, |
| 577 | pdata->wav_seq[DRV2667_WAV_SEQ_ID_IDX]); |
| 578 | if (rc < 0) |
| 579 | goto vreg_off; |
| 580 | |
| 581 | /* set page to wave form sequence */ |
| 582 | rc = drv2667_write_reg(client, DRV2667_PAGE_REG, |
| 583 | pdata->wav_seq[DRV2667_WAV_SEQ_ID_IDX]); |
| 584 | if (rc < 0) |
| 585 | goto vreg_off; |
| 586 | |
| 587 | /* program waveform sequence */ |
Mohan Pallaka | f66e713 | 2012-12-06 16:58:53 +0530 | [diff] [blame] | 588 | for (reg = 0, i = 0; i < DRV2667_WAV_SEQ_LEN - 1; i++, reg++) { |
| 589 | rc = drv2667_write_reg(client, reg, |
| 590 | pdata->wav_seq[i+1]); |
Mohan Pallaka | 033deb8 | 2012-09-12 19:13:57 +0530 | [diff] [blame] | 591 | if (rc < 0) |
| 592 | goto vreg_off; |
| 593 | } |
| 594 | |
| 595 | /* set page back to normal register space */ |
| 596 | rc = drv2667_write_reg(client, DRV2667_PAGE_REG, |
| 597 | DRV2667_REG_PAGE_ID); |
| 598 | if (rc < 0) |
| 599 | goto vreg_off; |
| 600 | |
| 601 | freq = pdata->wav_seq[DRV2667_WAV_SEQ_FREQ_IDX]; |
| 602 | rep = pdata->wav_seq[DRV2667_WAV_SEQ_REP_IDX]; |
| 603 | dur = pdata->wav_seq[DRV2667_WAV_SEQ_DUR_IDX]; |
| 604 | |
| 605 | data->time_chunk_ms = (rep * dur * MSEC_PER_SEC) / |
| 606 | (freq * DRV2667_WAV_SEQ_FREQ_MIN); |
| 607 | } |
| 608 | |
| 609 | drv2667_dump_regs(data, "new"); |
| 610 | |
| 611 | /* register with timed output class */ |
| 612 | data->dev.name = pdata->name; |
| 613 | data->dev.get_time = drv2667_get_time; |
| 614 | data->dev.enable = drv2667_enable; |
| 615 | |
| 616 | rc = timed_output_dev_register(&data->dev); |
| 617 | if (rc) { |
| 618 | dev_err(&client->dev, "unable to register with timed_output\n"); |
| 619 | goto vreg_off; |
| 620 | } |
| 621 | |
| 622 | #ifdef CONFIG_HAS_EARLYSUSPEND |
| 623 | data->es.level = EARLY_SUSPEND_LEVEL_BLANK_SCREEN + DRV2667_SUS_LEVEL; |
| 624 | data->es.suspend = drv2667_early_suspend; |
| 625 | data->es.resume = drv2667_late_resume; |
| 626 | register_early_suspend(&data->es); |
| 627 | #endif |
| 628 | return 0; |
| 629 | |
| 630 | vreg_off: |
| 631 | drv2667_vreg_on(data, false); |
| 632 | deconfig_vreg: |
| 633 | drv2667_vreg_config(data, false); |
| 634 | destroy_mutex: |
| 635 | mutex_destroy(&data->lock); |
| 636 | return rc; |
| 637 | } |
| 638 | |
| 639 | static int __devexit drv2667_remove(struct i2c_client *client) |
| 640 | { |
| 641 | struct drv2667_data *data = i2c_get_clientdata(client); |
| 642 | |
| 643 | #ifdef CONFIG_HAS_EARLYSUSPEND |
| 644 | unregister_early_suspend(&data->es); |
| 645 | #endif |
| 646 | mutex_destroy(&data->lock); |
| 647 | timed_output_dev_unregister(&data->dev); |
| 648 | hrtimer_cancel(&data->timer); |
| 649 | cancel_work_sync(&data->work); |
| 650 | drv2667_vreg_on(data, false); |
| 651 | drv2667_vreg_config(data, false); |
| 652 | |
| 653 | return 0; |
| 654 | } |
| 655 | |
| 656 | static const struct i2c_device_id drv2667_id_table[] = { |
| 657 | {"drv2667", 0}, |
| 658 | { }, |
| 659 | }; |
| 660 | MODULE_DEVICE_TABLE(i2c, drv2667_id_table); |
| 661 | |
| 662 | #ifdef CONFIG_OF |
| 663 | static const struct of_device_id drv2667_of_id_table[] = { |
| 664 | {.compatible = "ti, drv2667"}, |
| 665 | { }, |
| 666 | }; |
| 667 | #else |
| 668 | #define drv2667_of_id_table NULL |
| 669 | #endif |
| 670 | |
| 671 | static struct i2c_driver drv2667_i2c_driver = { |
| 672 | .driver = { |
| 673 | .name = "drv2667", |
| 674 | .owner = THIS_MODULE, |
| 675 | .of_match_table = drv2667_of_id_table, |
| 676 | #ifdef CONFIG_PM |
| 677 | .pm = &drv2667_pm_ops, |
| 678 | #endif |
| 679 | }, |
| 680 | .probe = drv2667_probe, |
| 681 | .remove = __devexit_p(drv2667_remove), |
| 682 | .id_table = drv2667_id_table, |
| 683 | }; |
| 684 | |
| 685 | module_i2c_driver(drv2667_i2c_driver); |
| 686 | |
| 687 | MODULE_LICENSE("GPL v2"); |
| 688 | MODULE_DESCRIPTION("TI DRV2667 chip driver"); |