Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 1 | /* |
| 2 | * arch/arm/mach-footbridge/include/mach/memory.h |
| 3 | * |
| 4 | * Copyright (C) 1996-1999 Russell King. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | * |
| 10 | * Changelog: |
| 11 | * 20-Oct-1996 RMK Created |
| 12 | * 31-Dec-1997 RMK Fixed definitions to reduce warnings. |
| 13 | * 17-May-1998 DAG Added __virt_to_bus and __bus_to_virt functions. |
| 14 | * 21-Nov-1998 RMK Changed __virt_to_bus and __bus_to_virt to macros. |
| 15 | * 21-Mar-1999 RMK Added PAGE_OFFSET for co285 architecture. |
| 16 | * Renamed to memory.h |
| 17 | * Moved PAGE_OFFSET and TASK_SIZE here |
| 18 | */ |
| 19 | #ifndef __ASM_ARCH_MEMORY_H |
| 20 | #define __ASM_ARCH_MEMORY_H |
| 21 | |
| 22 | |
| 23 | #if defined(CONFIG_FOOTBRIDGE_ADDIN) |
| 24 | /* |
| 25 | * If we may be using add-in footbridge mode, then we must |
| 26 | * use the out-of-line translation that makes use of the |
| 27 | * PCI BAR |
| 28 | */ |
| 29 | #ifndef __ASSEMBLY__ |
| 30 | extern unsigned long __virt_to_bus(unsigned long); |
| 31 | extern unsigned long __bus_to_virt(unsigned long); |
Russell King | c7baab5 | 2009-12-12 14:53:08 +0000 | [diff] [blame] | 32 | extern unsigned long __pfn_to_bus(unsigned long); |
| 33 | extern unsigned long __bus_to_pfn(unsigned long); |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 34 | #endif |
Nicolas Pitre | b5ee900 | 2008-09-05 21:53:30 -0400 | [diff] [blame] | 35 | #define __virt_to_bus __virt_to_bus |
| 36 | #define __bus_to_virt __bus_to_virt |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 37 | |
| 38 | #elif defined(CONFIG_FOOTBRIDGE_HOST) |
| 39 | |
Nicolas Pitre | b5ee900 | 2008-09-05 21:53:30 -0400 | [diff] [blame] | 40 | /* |
Russell King | c7baab5 | 2009-12-12 14:53:08 +0000 | [diff] [blame] | 41 | * The footbridge is programmed to expose the system RAM at 0xe0000000. |
| 42 | * The requirement is that the RAM isn't placed at bus address 0, which |
Nicolas Pitre | b5ee900 | 2008-09-05 21:53:30 -0400 | [diff] [blame] | 43 | * would clash with VGA cards. |
| 44 | */ |
Russell King | c7baab5 | 2009-12-12 14:53:08 +0000 | [diff] [blame] | 45 | #define BUS_OFFSET 0xe0000000 |
| 46 | #define __virt_to_bus(x) ((x) + (BUS_OFFSET - PAGE_OFFSET)) |
| 47 | #define __bus_to_virt(x) ((x) - (BUS_OFFSET - PAGE_OFFSET)) |
| 48 | #define __pfn_to_bus(x) (__pfn_to_phys(x) + (BUS_OFFSET - PHYS_OFFSET)) |
| 49 | #define __bus_to_pfn(x) __phys_to_pfn((x) - (BUS_OFFSET - PHYS_OFFSET)) |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 50 | |
| 51 | #else |
| 52 | |
| 53 | #error "Undefined footbridge mode" |
| 54 | |
| 55 | #endif |
| 56 | |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 57 | /* |
| 58 | * Cache flushing area. |
| 59 | */ |
| 60 | #define FLUSH_BASE 0xf9000000 |
| 61 | |
| 62 | /* |
| 63 | * Physical DRAM offset. |
| 64 | */ |
Russell King | f4117ac | 2011-01-04 18:07:14 +0000 | [diff] [blame] | 65 | #define PLAT_PHYS_OFFSET UL(0x00000000) |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 66 | |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 67 | #define FLUSH_BASE_PHYS 0x50000000 |
| 68 | |
| 69 | #endif |