Santosh Shilimkar | fbc9be1 | 2010-05-14 12:05:26 -0700 | [diff] [blame] | 1 | /* |
| 2 | * OMAP4 specific common source file. |
| 3 | * |
| 4 | * Copyright (C) 2010 Texas Instruments, Inc. |
| 5 | * Author: |
| 6 | * Santosh Shilimkar <santosh.shilimkar@ti.com> |
| 7 | * |
| 8 | * |
| 9 | * This program is free software,you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License version 2 as |
| 11 | * published by the Free Software Foundation. |
| 12 | */ |
| 13 | |
| 14 | #include <linux/kernel.h> |
| 15 | #include <linux/init.h> |
| 16 | #include <linux/io.h> |
| 17 | #include <linux/platform_device.h> |
Santosh Shilimkar | 137d105 | 2011-06-25 18:04:31 -0700 | [diff] [blame] | 18 | #include <linux/memblock.h> |
Santosh Shilimkar | fbc9be1 | 2010-05-14 12:05:26 -0700 | [diff] [blame] | 19 | |
| 20 | #include <asm/hardware/gic.h> |
| 21 | #include <asm/hardware/cache-l2x0.h> |
Santosh Shilimkar | 137d105 | 2011-06-25 18:04:31 -0700 | [diff] [blame] | 22 | #include <asm/mach/map.h> |
Russell King | 716a3dc | 2012-01-13 15:00:51 +0000 | [diff] [blame] | 23 | #include <asm/memblock.h> |
Santosh Shilimkar | fbc9be1 | 2010-05-14 12:05:26 -0700 | [diff] [blame] | 24 | |
Tony Lindgren | 741e3a8 | 2011-05-17 03:51:26 -0700 | [diff] [blame] | 25 | #include <plat/irqs.h> |
Santosh Shilimkar | 137d105 | 2011-06-25 18:04:31 -0700 | [diff] [blame] | 26 | #include <plat/sram.h> |
Tony Lindgren | 741e3a8 | 2011-05-17 03:51:26 -0700 | [diff] [blame] | 27 | |
Santosh Shilimkar | fbc9be1 | 2010-05-14 12:05:26 -0700 | [diff] [blame] | 28 | #include <mach/hardware.h> |
Santosh Shilimkar | fcf6efa | 2010-06-16 22:19:47 +0530 | [diff] [blame] | 29 | #include <mach/omap-wakeupgen.h> |
Tony Lindgren | 4e65331 | 2011-11-10 22:45:17 +0100 | [diff] [blame] | 30 | |
| 31 | #include "common.h" |
Santosh Shilimkar | 501f0c7 | 2011-01-01 19:56:04 +0530 | [diff] [blame] | 32 | #include "omap4-sar-layout.h" |
Santosh Shilimkar | fbc9be1 | 2010-05-14 12:05:26 -0700 | [diff] [blame] | 33 | |
| 34 | #ifdef CONFIG_CACHE_L2X0 |
Santosh Shilimkar | 02afe8a | 2011-03-03 18:03:25 +0530 | [diff] [blame] | 35 | static void __iomem *l2cache_base; |
Santosh Shilimkar | fbc9be1 | 2010-05-14 12:05:26 -0700 | [diff] [blame] | 36 | #endif |
| 37 | |
Santosh Shilimkar | 501f0c7 | 2011-01-01 19:56:04 +0530 | [diff] [blame] | 38 | static void __iomem *sar_ram_base; |
| 39 | |
Santosh Shilimkar | 137d105 | 2011-06-25 18:04:31 -0700 | [diff] [blame] | 40 | #ifdef CONFIG_OMAP4_ERRATA_I688 |
| 41 | /* Used to implement memory barrier on DRAM path */ |
| 42 | #define OMAP4_DRAM_BARRIER_VA 0xfe600000 |
| 43 | |
| 44 | void __iomem *dram_sync, *sram_sync; |
| 45 | |
| 46 | void omap_bus_sync(void) |
| 47 | { |
| 48 | if (dram_sync && sram_sync) { |
| 49 | writel_relaxed(readl_relaxed(dram_sync), dram_sync); |
| 50 | writel_relaxed(readl_relaxed(sram_sync), sram_sync); |
| 51 | isb(); |
| 52 | } |
| 53 | } |
| 54 | |
| 55 | static int __init omap_barriers_init(void) |
| 56 | { |
| 57 | struct map_desc dram_io_desc[1]; |
| 58 | phys_addr_t paddr; |
| 59 | u32 size; |
| 60 | |
| 61 | if (!cpu_is_omap44xx()) |
| 62 | return -ENODEV; |
| 63 | |
| 64 | size = ALIGN(PAGE_SIZE, SZ_1M); |
Russell King | 716a3dc | 2012-01-13 15:00:51 +0000 | [diff] [blame] | 65 | paddr = arm_memblock_steal(size, SZ_1M); |
| 66 | |
Santosh Shilimkar | 137d105 | 2011-06-25 18:04:31 -0700 | [diff] [blame] | 67 | dram_io_desc[0].virtual = OMAP4_DRAM_BARRIER_VA; |
| 68 | dram_io_desc[0].pfn = __phys_to_pfn(paddr); |
| 69 | dram_io_desc[0].length = size; |
| 70 | dram_io_desc[0].type = MT_MEMORY_SO; |
| 71 | iotable_init(dram_io_desc, ARRAY_SIZE(dram_io_desc)); |
| 72 | dram_sync = (void __iomem *) dram_io_desc[0].virtual; |
| 73 | sram_sync = (void __iomem *) OMAP4_SRAM_VA; |
| 74 | |
| 75 | pr_info("OMAP4: Map 0x%08llx to 0x%08lx for dram barrier\n", |
| 76 | (long long) paddr, dram_io_desc[0].virtual); |
| 77 | |
| 78 | return 0; |
| 79 | } |
| 80 | core_initcall(omap_barriers_init); |
| 81 | #endif |
| 82 | |
Santosh Shilimkar | fbc9be1 | 2010-05-14 12:05:26 -0700 | [diff] [blame] | 83 | void __init gic_init_irq(void) |
| 84 | { |
Marc Zyngier | ab65be2 | 2011-11-15 17:22:45 +0000 | [diff] [blame] | 85 | void __iomem *omap_irq_base; |
| 86 | void __iomem *gic_dist_base_addr; |
| 87 | |
Santosh Shilimkar | fbc9be1 | 2010-05-14 12:05:26 -0700 | [diff] [blame] | 88 | /* Static mapping, never released */ |
| 89 | gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K); |
| 90 | BUG_ON(!gic_dist_base_addr); |
Santosh Shilimkar | fbc9be1 | 2010-05-14 12:05:26 -0700 | [diff] [blame] | 91 | |
| 92 | /* Static mapping, never released */ |
Tony Lindgren | 741e3a8 | 2011-05-17 03:51:26 -0700 | [diff] [blame] | 93 | omap_irq_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512); |
| 94 | BUG_ON(!omap_irq_base); |
Russell King | b580b89 | 2010-12-04 15:55:14 +0000 | [diff] [blame] | 95 | |
Santosh Shilimkar | fcf6efa | 2010-06-16 22:19:47 +0530 | [diff] [blame] | 96 | omap_wakeupgen_init(); |
| 97 | |
Tony Lindgren | 741e3a8 | 2011-05-17 03:51:26 -0700 | [diff] [blame] | 98 | gic_init(0, 29, gic_dist_base_addr, omap_irq_base); |
Santosh Shilimkar | fbc9be1 | 2010-05-14 12:05:26 -0700 | [diff] [blame] | 99 | } |
| 100 | |
| 101 | #ifdef CONFIG_CACHE_L2X0 |
Santosh Shilimkar | 4e803c4 | 2010-07-31 21:40:10 +0530 | [diff] [blame] | 102 | |
Santosh Shilimkar | 02afe8a | 2011-03-03 18:03:25 +0530 | [diff] [blame] | 103 | void __iomem *omap4_get_l2cache_base(void) |
| 104 | { |
| 105 | return l2cache_base; |
| 106 | } |
| 107 | |
Santosh Shilimkar | 4e803c4 | 2010-07-31 21:40:10 +0530 | [diff] [blame] | 108 | static void omap4_l2x0_disable(void) |
| 109 | { |
| 110 | /* Disable PL310 L2 Cache controller */ |
| 111 | omap_smc1(0x102, 0x0); |
| 112 | } |
| 113 | |
Santosh Shilimkar | 4bdb157 | 2011-02-22 10:00:44 +0100 | [diff] [blame] | 114 | static void omap4_l2x0_set_debug(unsigned long val) |
| 115 | { |
| 116 | /* Program PL310 L2 Cache controller debug register */ |
| 117 | omap_smc1(0x100, val); |
| 118 | } |
| 119 | |
Santosh Shilimkar | fbc9be1 | 2010-05-14 12:05:26 -0700 | [diff] [blame] | 120 | static int __init omap_l2_cache_init(void) |
| 121 | { |
Santosh Shilimkar | 1773e60 | 2010-11-19 23:01:03 +0530 | [diff] [blame] | 122 | u32 aux_ctrl = 0; |
| 123 | |
Santosh Shilimkar | fbc9be1 | 2010-05-14 12:05:26 -0700 | [diff] [blame] | 124 | /* |
| 125 | * To avoid code running on other OMAPs in |
| 126 | * multi-omap builds |
| 127 | */ |
| 128 | if (!cpu_is_omap44xx()) |
| 129 | return -ENODEV; |
| 130 | |
| 131 | /* Static mapping, never released */ |
| 132 | l2cache_base = ioremap(OMAP44XX_L2CACHE_BASE, SZ_4K); |
Santosh Shilimkar | 0db1803 | 2011-03-03 17:36:52 +0530 | [diff] [blame] | 133 | if (WARN_ON(!l2cache_base)) |
| 134 | return -ENOMEM; |
Santosh Shilimkar | fbc9be1 | 2010-05-14 12:05:26 -0700 | [diff] [blame] | 135 | |
Santosh Shilimkar | fbc9be1 | 2010-05-14 12:05:26 -0700 | [diff] [blame] | 136 | /* |
Santosh Shilimkar | a777b72 | 2010-09-16 18:44:47 +0530 | [diff] [blame] | 137 | * 16-way associativity, parity disabled |
| 138 | * Way size - 32KB (es1.0) |
| 139 | * Way size - 64KB (es2.0 +) |
Santosh Shilimkar | fbc9be1 | 2010-05-14 12:05:26 -0700 | [diff] [blame] | 140 | */ |
Santosh Shilimkar | 1773e60 | 2010-11-19 23:01:03 +0530 | [diff] [blame] | 141 | aux_ctrl = ((1 << L2X0_AUX_CTRL_ASSOCIATIVITY_SHIFT) | |
| 142 | (0x1 << 25) | |
| 143 | (0x1 << L2X0_AUX_CTRL_NS_LOCKDOWN_SHIFT) | |
| 144 | (0x1 << L2X0_AUX_CTRL_NS_INT_CTRL_SHIFT)); |
| 145 | |
Mans Rullgard | 11e0264 | 2010-11-19 23:01:04 +0530 | [diff] [blame] | 146 | if (omap_rev() == OMAP4430_REV_ES1_0) { |
Santosh Shilimkar | 1773e60 | 2010-11-19 23:01:03 +0530 | [diff] [blame] | 147 | aux_ctrl |= 0x2 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT; |
Mans Rullgard | 11e0264 | 2010-11-19 23:01:04 +0530 | [diff] [blame] | 148 | } else { |
| 149 | aux_ctrl |= ((0x3 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT) | |
Santosh Shilimkar | b0f20ff | 2010-11-19 23:01:05 +0530 | [diff] [blame] | 150 | (1 << L2X0_AUX_CTRL_SHARE_OVERRIDE_SHIFT) | |
Mans Rullgard | 11e0264 | 2010-11-19 23:01:04 +0530 | [diff] [blame] | 151 | (1 << L2X0_AUX_CTRL_DATA_PREFETCH_SHIFT) | |
Santosh Shilimkar | b89cd71 | 2010-11-19 23:01:06 +0530 | [diff] [blame] | 152 | (1 << L2X0_AUX_CTRL_INSTR_PREFETCH_SHIFT) | |
| 153 | (1 << L2X0_AUX_CTRL_EARLY_BRESP_SHIFT)); |
Mans Rullgard | 11e0264 | 2010-11-19 23:01:04 +0530 | [diff] [blame] | 154 | } |
| 155 | if (omap_rev() != OMAP4430_REV_ES1_0) |
| 156 | omap_smc1(0x109, aux_ctrl); |
| 157 | |
| 158 | /* Enable PL310 L2 Cache controller */ |
| 159 | omap_smc1(0x102, 0x1); |
Santosh Shilimkar | 1773e60 | 2010-11-19 23:01:03 +0530 | [diff] [blame] | 160 | |
| 161 | l2x0_init(l2cache_base, aux_ctrl, L2X0_AUX_CTRL_MASK); |
Santosh Shilimkar | fbc9be1 | 2010-05-14 12:05:26 -0700 | [diff] [blame] | 162 | |
Santosh Shilimkar | 4e803c4 | 2010-07-31 21:40:10 +0530 | [diff] [blame] | 163 | /* |
| 164 | * Override default outer_cache.disable with a OMAP4 |
| 165 | * specific one |
| 166 | */ |
| 167 | outer_cache.disable = omap4_l2x0_disable; |
Santosh Shilimkar | 4bdb157 | 2011-02-22 10:00:44 +0100 | [diff] [blame] | 168 | outer_cache.set_debug = omap4_l2x0_set_debug; |
Santosh Shilimkar | 4e803c4 | 2010-07-31 21:40:10 +0530 | [diff] [blame] | 169 | |
Santosh Shilimkar | fbc9be1 | 2010-05-14 12:05:26 -0700 | [diff] [blame] | 170 | return 0; |
| 171 | } |
| 172 | early_initcall(omap_l2_cache_init); |
| 173 | #endif |
Santosh Shilimkar | 501f0c7 | 2011-01-01 19:56:04 +0530 | [diff] [blame] | 174 | |
| 175 | void __iomem *omap4_get_sar_ram_base(void) |
| 176 | { |
| 177 | return sar_ram_base; |
| 178 | } |
| 179 | |
| 180 | /* |
| 181 | * SAR RAM used to save and restore the HW |
| 182 | * context in low power modes |
| 183 | */ |
| 184 | static int __init omap4_sar_ram_init(void) |
| 185 | { |
| 186 | /* |
| 187 | * To avoid code running on other OMAPs in |
| 188 | * multi-omap builds |
| 189 | */ |
| 190 | if (!cpu_is_omap44xx()) |
| 191 | return -ENOMEM; |
| 192 | |
| 193 | /* Static mapping, never released */ |
| 194 | sar_ram_base = ioremap(OMAP44XX_SAR_RAM_BASE, SZ_16K); |
| 195 | if (WARN_ON(!sar_ram_base)) |
| 196 | return -ENOMEM; |
| 197 | |
| 198 | return 0; |
| 199 | } |
| 200 | early_initcall(omap4_sar_ram_init); |