Uwe Kleine-König | 5886269 | 2007-05-09 07:51:49 +0200 | [diff] [blame] | 1 | /* linux/arch/arm/plat-s3c24xx/sleep.S |
Ben Dooks | a21765a | 2007-02-11 18:31:01 +0100 | [diff] [blame] | 2 | * |
| 3 | * Copyright (c) 2004 Simtec Electronics |
| 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * |
| 6 | * S3C2410 Power Manager (Suspend-To-RAM) support |
| 7 | * |
| 8 | * Based on PXA/SA1100 sleep code by: |
| 9 | * Nicolas Pitre, (c) 2002 Monta Vista Software Inc |
| 10 | * Cliff Brake, (c) 2001 |
| 11 | * |
| 12 | * This program is free software; you can redistribute it and/or modify |
| 13 | * it under the terms of the GNU General Public License as published by |
| 14 | * the Free Software Foundation; either version 2 of the License, or |
| 15 | * (at your option) any later version. |
| 16 | * |
| 17 | * This program is distributed in the hope that it will be useful, |
| 18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 20 | * GNU General Public License for more details. |
| 21 | * |
| 22 | * You should have received a copy of the GNU General Public License |
| 23 | * along with this program; if not, write to the Free Software |
| 24 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 25 | */ |
| 26 | |
| 27 | #include <linux/linkage.h> |
| 28 | #include <asm/assembler.h> |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 29 | #include <mach/hardware.h> |
| 30 | #include <mach/map.h> |
Ben Dooks | a21765a | 2007-02-11 18:31:01 +0100 | [diff] [blame] | 31 | |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 32 | #include <mach/regs-gpio.h> |
| 33 | #include <mach/regs-clock.h> |
| 34 | #include <mach/regs-mem.h> |
Ben Dooks | a2b7ba9 | 2008-10-07 22:26:09 +0100 | [diff] [blame] | 35 | #include <plat/regs-serial.h> |
Ben Dooks | a21765a | 2007-02-11 18:31:01 +0100 | [diff] [blame] | 36 | |
| 37 | /* CONFIG_DEBUG_RESUME is dangerous if your bootloader does not |
| 38 | * reset the UART configuration, only enable if you really need this! |
| 39 | */ |
| 40 | //#define CONFIG_DEBUG_RESUME |
| 41 | |
| 42 | .text |
| 43 | |
Ben Dooks | ef30e14 | 2008-12-12 00:24:19 +0000 | [diff] [blame] | 44 | /* s3c_cpu_save |
Ben Dooks | a21765a | 2007-02-11 18:31:01 +0100 | [diff] [blame] | 45 | * |
Ben Dooks | a21765a | 2007-02-11 18:31:01 +0100 | [diff] [blame] | 46 | * entry: |
Ben Dooks | fff94cd | 2009-03-10 11:48:07 +0000 | [diff] [blame] | 47 | * r0 = save address (virtual addr of s3c_sleep_save_phys) |
Ben Dooks | a21765a | 2007-02-11 18:31:01 +0100 | [diff] [blame] | 48 | */ |
| 49 | |
Ben Dooks | ef30e14 | 2008-12-12 00:24:19 +0000 | [diff] [blame] | 50 | ENTRY(s3c_cpu_save) |
Ben Dooks | a21765a | 2007-02-11 18:31:01 +0100 | [diff] [blame] | 51 | stmfd sp!, { r4 - r12, lr } |
| 52 | |
| 53 | @@ store co-processor registers |
| 54 | |
Matt Reimer | 07b0459 | 2007-02-12 21:05:02 +0100 | [diff] [blame] | 55 | mrc p15, 0, r4, c13, c0, 0 @ PID |
| 56 | mrc p15, 0, r5, c3, c0, 0 @ Domain ID |
| 57 | mrc p15, 0, r6, c2, c0, 0 @ translation table base address |
| 58 | mrc p15, 0, r7, c1, c0, 0 @ control register |
Ben Dooks | a21765a | 2007-02-11 18:31:01 +0100 | [diff] [blame] | 59 | |
| 60 | stmia r0, { r4 - r13 } |
| 61 | |
Ben Dooks | fff94cd | 2009-03-10 11:48:07 +0000 | [diff] [blame] | 62 | @@ write our state back to RAM |
| 63 | bl s3c_pm_cb_flushcache |
Ben Dooks | a21765a | 2007-02-11 18:31:01 +0100 | [diff] [blame] | 64 | |
Ben Dooks | fff94cd | 2009-03-10 11:48:07 +0000 | [diff] [blame] | 65 | @@ jump to final code to send system to sleep |
| 66 | ldr r0, =pm_cpu_sleep |
| 67 | @@ldr pc, [ r0 ] |
| 68 | ldr r0, [ r0 ] |
| 69 | mov pc, r0 |
| 70 | |
Ben Dooks | a21765a | 2007-02-11 18:31:01 +0100 | [diff] [blame] | 71 | @@ return to the caller, after having the MMU |
| 72 | @@ turned on, this restores the last bits from the |
| 73 | @@ stack |
| 74 | resume_with_mmu: |
Ben Dooks | a21765a | 2007-02-11 18:31:01 +0100 | [diff] [blame] | 75 | ldmfd sp!, { r4 - r12, pc } |
| 76 | |
| 77 | .ltorg |
| 78 | |
| 79 | @@ the next bits sit in the .data segment, even though they |
Ben Dooks | 6419711 | 2008-12-12 00:24:06 +0000 | [diff] [blame] | 80 | @@ happen to be code... the s3c_sleep_save_phys needs to be |
Ben Dooks | a21765a | 2007-02-11 18:31:01 +0100 | [diff] [blame] | 81 | @@ accessed by the resume code before it can restore the MMU. |
| 82 | @@ This means that the variable has to be close enough for the |
| 83 | @@ code to read it... since the .text segment needs to be RO, |
| 84 | @@ the data segment can be the only place to put this code. |
| 85 | |
| 86 | .data |
| 87 | |
Ben Dooks | 6419711 | 2008-12-12 00:24:06 +0000 | [diff] [blame] | 88 | .global s3c_sleep_save_phys |
| 89 | s3c_sleep_save_phys: |
Ben Dooks | a21765a | 2007-02-11 18:31:01 +0100 | [diff] [blame] | 90 | .word 0 |
| 91 | |
Ben Dooks | 6c729af | 2007-09-30 09:59:15 +0100 | [diff] [blame] | 92 | |
| 93 | /* sleep magic, to allow the bootloader to check for an valid |
| 94 | * image to resume to. Must be the first word before the |
Ben Dooks | ef30e14 | 2008-12-12 00:24:19 +0000 | [diff] [blame] | 95 | * s3c_cpu_resume entry. |
Ben Dooks | 6c729af | 2007-09-30 09:59:15 +0100 | [diff] [blame] | 96 | */ |
| 97 | |
| 98 | .word 0x2bedf00d |
| 99 | |
Ben Dooks | ef30e14 | 2008-12-12 00:24:19 +0000 | [diff] [blame] | 100 | /* s3c_cpu_resume |
Ben Dooks | a21765a | 2007-02-11 18:31:01 +0100 | [diff] [blame] | 101 | * |
| 102 | * resume code entry for bootloader to call |
| 103 | * |
| 104 | * we must put this code here in the data segment as we have no |
| 105 | * other way of restoring the stack pointer after sleep, and we |
| 106 | * must not write to the code segment (code is read-only) |
| 107 | */ |
| 108 | |
Ben Dooks | ef30e14 | 2008-12-12 00:24:19 +0000 | [diff] [blame] | 109 | ENTRY(s3c_cpu_resume) |
Ben Dooks | a21765a | 2007-02-11 18:31:01 +0100 | [diff] [blame] | 110 | mov r0, #PSR_I_BIT | PSR_F_BIT | SVC_MODE |
| 111 | msr cpsr_c, r0 |
| 112 | |
| 113 | @@ load UART to allow us to print the two characters for |
| 114 | @@ resume debug |
| 115 | |
| 116 | mov r2, #S3C24XX_PA_UART & 0xff000000 |
| 117 | orr r2, r2, #S3C24XX_PA_UART & 0xff000 |
| 118 | |
| 119 | #if 0 |
| 120 | /* SMDK2440 LED set */ |
| 121 | mov r14, #S3C24XX_PA_GPIO |
| 122 | ldr r12, [ r14, #0x54 ] |
| 123 | bic r12, r12, #3<<4 |
| 124 | orr r12, r12, #1<<7 |
| 125 | str r12, [ r14, #0x54 ] |
| 126 | #endif |
| 127 | |
| 128 | #ifdef CONFIG_DEBUG_RESUME |
| 129 | mov r3, #'L' |
| 130 | strb r3, [ r2, #S3C2410_UTXH ] |
| 131 | 1001: |
| 132 | ldrb r14, [ r3, #S3C2410_UTRSTAT ] |
| 133 | tst r14, #S3C2410_UTRSTAT_TXE |
| 134 | beq 1001b |
| 135 | #endif /* CONFIG_DEBUG_RESUME */ |
| 136 | |
| 137 | mov r1, #0 |
| 138 | mcr p15, 0, r1, c8, c7, 0 @@ invalidate I & D TLBs |
| 139 | mcr p15, 0, r1, c7, c7, 0 @@ invalidate I & D caches |
| 140 | |
Ben Dooks | 6419711 | 2008-12-12 00:24:06 +0000 | [diff] [blame] | 141 | ldr r0, s3c_sleep_save_phys @ address of restore block |
Ben Dooks | a21765a | 2007-02-11 18:31:01 +0100 | [diff] [blame] | 142 | ldmia r0, { r4 - r13 } |
| 143 | |
Matt Reimer | 07b0459 | 2007-02-12 21:05:02 +0100 | [diff] [blame] | 144 | mcr p15, 0, r4, c13, c0, 0 @ PID |
| 145 | mcr p15, 0, r5, c3, c0, 0 @ Domain ID |
| 146 | mcr p15, 0, r6, c2, c0, 0 @ translation table base |
Ben Dooks | a21765a | 2007-02-11 18:31:01 +0100 | [diff] [blame] | 147 | |
| 148 | #ifdef CONFIG_DEBUG_RESUME |
| 149 | mov r3, #'R' |
| 150 | strb r3, [ r2, #S3C2410_UTXH ] |
| 151 | #endif |
| 152 | |
| 153 | ldr r2, =resume_with_mmu |
Matt Reimer | 07b0459 | 2007-02-12 21:05:02 +0100 | [diff] [blame] | 154 | mcr p15, 0, r7, c1, c0, 0 @ turn on MMU, etc |
Ben Dooks | a21765a | 2007-02-11 18:31:01 +0100 | [diff] [blame] | 155 | nop @ second-to-last before mmu |
| 156 | mov pc, r2 @ go back to virtual address |
| 157 | |
| 158 | .ltorg |