blob: 3b3fc417510d2c516dd8f97db55d0de33dde683a [file] [log] [blame]
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08001/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -080012 */
13#include <linux/kernel.h>
14#include <linux/platform_device.h>
15#include <linux/io.h>
16#include <linux/irq.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070017#include <linux/i2c.h>
18#include <linux/gpio.h>
19#include <linux/msm_ssbi.h>
20#include <linux/regulator/gpio-regulator.h>
21#include <linux/mfd/pm8xxx/pm8921.h>
22#include <linux/regulator/consumer.h>
23#include <linux/spi/spi.h>
24#include <linux/slimbus/slimbus.h>
25#include <linux/bootmem.h>
26#ifdef CONFIG_ANDROID_PMEM
27#include <linux/android_pmem.h>
28#endif
29#include <linux/cyttsp.h>
30#include <linux/dma-mapping.h>
31#include <linux/platform_data/qcom_crypto_device.h>
32#include <linux/leds.h>
33#include <linux/leds-pm8xxx.h>
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -080034
35#include <asm/mach-types.h>
36#include <asm/mach/arch.h>
37#include <asm/hardware/gic.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070038#include <asm/mach/mmc.h>
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -080039
40#include <mach/board.h>
41#include <mach/msm_iomap.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070042#include <mach/msm_spi.h>
43#ifdef CONFIG_USB_MSM_OTG_72K
44#include <mach/msm_hsusb.h>
45#else
46#include <linux/usb/msm_hsusb.h>
47#endif
48#include <linux/usb/android.h>
49#include <mach/usbdiag.h>
50#include <mach/socinfo.h>
51#include <mach/rpm.h>
52#include <mach/gpio.h>
53#include <mach/msm_bus_board.h>
54#include <mach/msm_memtypes.h>
55#include <mach/dma.h>
56#include <mach/msm_dsps.h>
57#include <mach/msm_xo.h>
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -080058
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070059#ifdef CONFIG_WCD9310_CODEC
60#include <linux/slimbus/slimbus.h>
61#include <linux/mfd/wcd9310/core.h>
62#include <linux/mfd/wcd9310/pdata.h>
63#endif
64
65#include "timer.h"
66#include "gpiomux.h"
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -080067#include "devices.h"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070068#include "devices-msm8x60.h"
69#include "gpiomux.h"
70#include "spm.h"
71#include "board-msm8960.h"
72#include "pm.h"
73#include "cpuidle.h"
74#include "rpm_resources.h"
75#include "mpm.h"
76
77static struct platform_device msm_fm_platform_init = {
78 .name = "iris_fm",
79 .id = -1,
80};
81
82struct pm8xxx_gpio_init {
83 unsigned gpio;
84 struct pm_gpio config;
85};
86
87struct pm8xxx_mpp_init {
88 unsigned mpp;
89 struct pm8xxx_mpp_config_data config;
90};
91
92#define PM8XXX_GPIO_INIT(_gpio, _dir, _buf, _val, _pull, _vin, _out_strength, \
93 _func, _inv, _disable) \
94{ \
95 .gpio = PM8921_GPIO_PM_TO_SYS(_gpio), \
96 .config = { \
97 .direction = _dir, \
98 .output_buffer = _buf, \
99 .output_value = _val, \
100 .pull = _pull, \
101 .vin_sel = _vin, \
102 .out_strength = _out_strength, \
103 .function = _func, \
104 .inv_int_pol = _inv, \
105 .disable_pin = _disable, \
106 } \
107}
108
109#define PM8XXX_MPP_INIT(_mpp, _type, _level, _control) \
110{ \
111 .mpp = PM8921_MPP_PM_TO_SYS(_mpp), \
112 .config = { \
113 .type = PM8XXX_MPP_TYPE_##_type, \
114 .level = _level, \
115 .control = PM8XXX_MPP_##_control, \
116 } \
117}
118
119#define PM8XXX_GPIO_DISABLE(_gpio) \
120 PM8XXX_GPIO_INIT(_gpio, PM_GPIO_DIR_IN, 0, 0, 0, PM_GPIO_VIN_S4, \
121 0, 0, 0, 1)
122
123#define PM8XXX_GPIO_OUTPUT(_gpio, _val) \
124 PM8XXX_GPIO_INIT(_gpio, PM_GPIO_DIR_OUT, PM_GPIO_OUT_BUF_CMOS, _val, \
125 PM_GPIO_PULL_NO, PM_GPIO_VIN_S4, \
126 PM_GPIO_STRENGTH_HIGH, \
127 PM_GPIO_FUNC_NORMAL, 0, 0)
128
129#define PM8XXX_GPIO_INPUT(_gpio, _pull) \
130 PM8XXX_GPIO_INIT(_gpio, PM_GPIO_DIR_IN, PM_GPIO_OUT_BUF_CMOS, 0, \
131 _pull, PM_GPIO_VIN_S4, \
132 PM_GPIO_STRENGTH_NO, \
133 PM_GPIO_FUNC_NORMAL, 0, 0)
134
135#define PM8XXX_GPIO_OUTPUT_FUNC(_gpio, _val, _func) \
136 PM8XXX_GPIO_INIT(_gpio, PM_GPIO_DIR_OUT, PM_GPIO_OUT_BUF_CMOS, _val, \
137 PM_GPIO_PULL_NO, PM_GPIO_VIN_S4, \
138 PM_GPIO_STRENGTH_HIGH, \
139 _func, 0, 0)
140
141/* Initial PM8921 GPIO configurations */
142static struct pm8xxx_gpio_init pm8921_gpios[] __initdata = {
143 PM8XXX_GPIO_DISABLE(6), /* Disable unused */
144 PM8XXX_GPIO_DISABLE(7), /* Disable NFC */
145 PM8XXX_GPIO_INPUT(16, PM_GPIO_PULL_UP_30), /* SD_CARD_WP */
146 PM8XXX_GPIO_DISABLE(22), /* Disable NFC */
147 PM8XXX_GPIO_OUTPUT_FUNC(24, 0, PM_GPIO_FUNC_1), /* Bl: Off, PWM mode */
148 PM8XXX_GPIO_INPUT(26, PM_GPIO_PULL_UP_30), /* SD_CARD_DET_N */
149 PM8XXX_GPIO_OUTPUT(43, 0), /* DISP_RESET_N */
150};
151
152/* Initial PM8921 MPP configurations */
153static struct pm8xxx_mpp_init pm8921_mpps[] __initdata = {
154 /* External 5V regulator enable; shared by HDMI and USB_OTG switches. */
155 PM8XXX_MPP_INIT(7, D_INPUT, PM8921_MPP_DIG_LEVEL_VPH, DIN_TO_INT),
156 PM8XXX_MPP_INIT(PM8921_AMUX_MPP_3, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH6,
157 DOUT_CTRL_LOW),
158 PM8XXX_MPP_INIT(PM8921_AMUX_MPP_8, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH8,
159 DOUT_CTRL_LOW),
160};
161
162static void __init pm8921_gpio_mpp_init(void)
163{
164 int i, rc;
165
166 for (i = 0; i < ARRAY_SIZE(pm8921_gpios); i++) {
167 rc = pm8xxx_gpio_config(pm8921_gpios[i].gpio,
168 &pm8921_gpios[i].config);
169 if (rc) {
170 pr_err("%s: pm8xxx_gpio_config: rc=%d\n", __func__, rc);
171 break;
172 }
173 }
174
175 for (i = 0; i < ARRAY_SIZE(pm8921_mpps); i++) {
176 rc = pm8xxx_mpp_config(pm8921_mpps[i].mpp,
177 &pm8921_mpps[i].config);
178 if (rc) {
179 pr_err("%s: pm8xxx_mpp_config: rc=%d\n", __func__, rc);
180 break;
181 }
182 }
183}
184
185#define FPGA_CS_GPIO 14
186#define KS8851_RST_GPIO 89
187#define KS8851_IRQ_GPIO 90
188
189/* Macros assume PMIC GPIOs and MPPs start at 1 */
190#define PM8921_GPIO_BASE NR_GPIO_IRQS
191#define PM8921_GPIO_PM_TO_SYS(pm_gpio) (pm_gpio - 1 + PM8921_GPIO_BASE)
192#define PM8921_MPP_BASE (PM8921_GPIO_BASE + PM8921_NR_GPIOS)
193#define PM8921_MPP_PM_TO_SYS(pm_gpio) (pm_gpio - 1 + PM8921_MPP_BASE)
194#define PM8921_IRQ_BASE (NR_MSM_IRQS + NR_GPIO_IRQS)
195#define PM8921_MPP_IRQ_BASE (PM8921_IRQ_BASE + NR_GPIO_IRQS)
196
197static struct gpiomux_setting gsbi1 = {
198 .func = GPIOMUX_FUNC_1,
199 .drv = GPIOMUX_DRV_8MA,
200 .pull = GPIOMUX_PULL_NONE,
201};
202
203static struct gpiomux_setting gsbi3 = {
204 .func = GPIOMUX_FUNC_1,
205 .drv = GPIOMUX_DRV_8MA,
206 .pull = GPIOMUX_PULL_NONE,
207};
208
209static struct gpiomux_setting gsbi4 = {
210 .func = GPIOMUX_FUNC_1,
211 .drv = GPIOMUX_DRV_8MA,
212 .pull = GPIOMUX_PULL_NONE,
213};
214
215static struct gpiomux_setting gsbi5 = {
216 .func = GPIOMUX_FUNC_1,
217 .drv = GPIOMUX_DRV_8MA,
218 .pull = GPIOMUX_PULL_NONE,
219};
220
221static struct gpiomux_setting gsbi10 = {
222 .func = GPIOMUX_FUNC_2,
223 .drv = GPIOMUX_DRV_8MA,
224 .pull = GPIOMUX_PULL_NONE,
225};
226
227static struct gpiomux_setting gsbi12 = {
228 .func = GPIOMUX_FUNC_1,
229 .drv = GPIOMUX_DRV_8MA,
230 .pull = GPIOMUX_PULL_NONE,
231};
232
233static struct gpiomux_setting cdc_mclk = {
234 .func = GPIOMUX_FUNC_1,
235 .drv = GPIOMUX_DRV_8MA,
236 .pull = GPIOMUX_PULL_NONE,
237};
238
239static struct gpiomux_setting gpio_eth_config = {
240 .pull = GPIOMUX_PULL_NONE,
241 .drv = GPIOMUX_DRV_8MA,
242 .func = GPIOMUX_FUNC_GPIO,
243};
244
245static struct gpiomux_setting slimbus = {
246 .func = GPIOMUX_FUNC_1,
247 .drv = GPIOMUX_DRV_8MA,
248 .pull = GPIOMUX_PULL_KEEPER,
249};
250
251struct msm_gpiomux_config msm8960_gpiomux_configs[NR_GPIO_IRQS] = {
252 {
253 .gpio = KS8851_IRQ_GPIO,
254 .settings = {
255 [GPIOMUX_SUSPENDED] = &gpio_eth_config,
256 }
257 },
258 {
259 .gpio = KS8851_RST_GPIO,
260 .settings = {
261 [GPIOMUX_SUSPENDED] = &gpio_eth_config,
262 }
263 },
264 {
265 .gpio = FPGA_CS_GPIO,
266 .settings = {
267 [GPIOMUX_SUSPENDED] = &gpio_eth_config,
268 }
269 },
270};
271
272static struct msm_gpiomux_config msm8960_gsbi_configs[] __initdata = {
273 {
274 .gpio = 6, /* GSBI1 QUP SPI_DATA_MOSI */
275 .settings = {
276 [GPIOMUX_SUSPENDED] = &gsbi1,
277 },
278 },
279 {
280 .gpio = 7, /* GSBI1 QUP SPI_DATA_MISO */
281 .settings = {
282 [GPIOMUX_SUSPENDED] = &gsbi1,
283 },
284 },
285 {
286 .gpio = 8, /* GSBI1 QUP SPI_CS_N */
287 .settings = {
288 [GPIOMUX_SUSPENDED] = &gsbi1,
289 },
290 },
291 {
292 .gpio = 9, /* GSBI1 QUP SPI_CLK */
293 .settings = {
294 [GPIOMUX_SUSPENDED] = &gsbi1,
295 },
296 },
297 {
298 .gpio = 16, /* GSBI3 I2C QUP SDA */
299 .settings = {
300 [GPIOMUX_SUSPENDED] = &gsbi3,
301 },
302 },
303 {
304 .gpio = 17, /* GSBI3 I2C QUP SCL */
305 .settings = {
306 [GPIOMUX_SUSPENDED] = &gsbi3,
307 },
308 },
309 {
310 .gpio = 20, /* GSBI4 I2C QUP SDA */
311 .settings = {
312 [GPIOMUX_SUSPENDED] = &gsbi4,
313 },
314 },
315 {
316 .gpio = 21, /* GSBI4 I2C QUP SCL */
317 .settings = {
318 [GPIOMUX_SUSPENDED] = &gsbi4,
319 },
320 },
321 {
322 .gpio = 22, /* GSBI5 UART2 */
323 .settings = {
324 [GPIOMUX_SUSPENDED] = &gsbi5,
325 },
326 },
327 {
328 .gpio = 23, /* GSBI5 UART2 */
329 .settings = {
330 [GPIOMUX_SUSPENDED] = &gsbi5,
331 },
332 },
333 {
334 .gpio = 24, /* GSBI5 UART2 */
335 .settings = {
336 [GPIOMUX_SUSPENDED] = &gsbi5,
337 },
338 },
339 {
340 .gpio = 25, /* GSBI5 UART2 */
341 .settings = {
342 [GPIOMUX_SUSPENDED] = &gsbi5,
343 },
344 },
345 {
346 .gpio = 44, /* GSBI12 I2C QUP SDA */
347 .settings = {
348 [GPIOMUX_SUSPENDED] = &gsbi12,
349 },
350 },
351 {
352 .gpio = 45, /* GSBI12 I2C QUP SCL */
353 .settings = {
354 [GPIOMUX_SUSPENDED] = &gsbi12,
355 },
356 },
357 {
358 .gpio = 73, /* GSBI10 I2C QUP SDA */
359 .settings = {
360 [GPIOMUX_SUSPENDED] = &gsbi10,
361 },
362 },
363 {
364 .gpio = 74, /* GSBI10 I2C QUP SCL */
365 .settings = {
366 [GPIOMUX_SUSPENDED] = &gsbi10,
367 },
368 },
369};
370
371static struct msm_gpiomux_config msm8960_slimbus_config[] __initdata = {
372 {
373 .gpio = 60, /* slimbus data */
374 .settings = {
375 [GPIOMUX_SUSPENDED] = &slimbus,
376 },
377 },
378 {
379 .gpio = 61, /* slimbus clk */
380 .settings = {
381 [GPIOMUX_SUSPENDED] = &slimbus,
382 },
383 },
384};
385
386static struct msm_gpiomux_config msm8960_audio_codec_configs[] __initdata = {
387 {
388 .gpio = 59,
389 .settings = {
390 [GPIOMUX_SUSPENDED] = &cdc_mclk,
391 },
392 },
393};
394static struct gpiomux_setting wcnss_5wire_suspend_cfg = {
395 .func = GPIOMUX_FUNC_GPIO,
396 .drv = GPIOMUX_DRV_2MA,
397 .pull = GPIOMUX_PULL_NONE,
398};
399
400static struct gpiomux_setting wcnss_5wire_active_cfg = {
401 .func = GPIOMUX_FUNC_1,
402 .drv = GPIOMUX_DRV_6MA,
403 .pull = GPIOMUX_PULL_DOWN,
404};
405
406static struct msm_gpiomux_config wcnss_5wire_interface[] = {
407 {
408 .gpio = 84,
409 .settings = {
410 [GPIOMUX_ACTIVE] = &wcnss_5wire_active_cfg,
411 [GPIOMUX_SUSPENDED] = &wcnss_5wire_suspend_cfg,
412 },
413 },
414 {
415 .gpio = 85,
416 .settings = {
417 [GPIOMUX_ACTIVE] = &wcnss_5wire_active_cfg,
418 [GPIOMUX_SUSPENDED] = &wcnss_5wire_suspend_cfg,
419 },
420 },
421 {
422 .gpio = 86,
423 .settings = {
424 [GPIOMUX_ACTIVE] = &wcnss_5wire_active_cfg,
425 [GPIOMUX_SUSPENDED] = &wcnss_5wire_suspend_cfg,
426 },
427 },
428 {
429 .gpio = 87,
430 .settings = {
431 [GPIOMUX_ACTIVE] = &wcnss_5wire_active_cfg,
432 [GPIOMUX_SUSPENDED] = &wcnss_5wire_suspend_cfg,
433 },
434 },
435 {
436 .gpio = 88,
437 .settings = {
438 [GPIOMUX_ACTIVE] = &wcnss_5wire_active_cfg,
439 [GPIOMUX_SUSPENDED] = &wcnss_5wire_suspend_cfg,
440 },
441 },
442};
443
444static struct gpiomux_setting cam_suspend_cfg = {
445 .func = GPIOMUX_FUNC_GPIO,
446 .drv = GPIOMUX_DRV_2MA,
447 .pull = GPIOMUX_PULL_DOWN,
448};
449
450static struct gpiomux_setting cam_active_1_cfg = {
451 .func = GPIOMUX_FUNC_1,
452 .drv = GPIOMUX_DRV_2MA,
453 .pull = GPIOMUX_PULL_NONE,
454};
455
456static struct gpiomux_setting cam_active_2_cfg = {
457 .func = GPIOMUX_FUNC_GPIO,
458 .drv = GPIOMUX_DRV_2MA,
459 .pull = GPIOMUX_PULL_NONE,
460};
461
462static struct gpiomux_setting cam_active_3_cfg = {
463 .func = GPIOMUX_FUNC_1,
464 .drv = GPIOMUX_DRV_8MA,
465 .pull = GPIOMUX_PULL_UP,
466};
467
468static struct msm_gpiomux_config msm8960_cam_configs[] __initdata = {
469 {
470 .gpio = 2,
471 .settings = {
472 [GPIOMUX_ACTIVE] = &cam_active_2_cfg,
473 [GPIOMUX_SUSPENDED] = &cam_suspend_cfg,
474 },
475 },
476 {
477 .gpio = 3,
478 .settings = {
479 [GPIOMUX_ACTIVE] = &cam_active_1_cfg,
480 [GPIOMUX_SUSPENDED] = &cam_suspend_cfg,
481 },
482 },
483 {
484 .gpio = 4,
485 .settings = {
486 [GPIOMUX_ACTIVE] = &cam_active_1_cfg,
487 [GPIOMUX_SUSPENDED] = &cam_suspend_cfg,
488 },
489 },
490 {
491 .gpio = 5,
492 .settings = {
493 [GPIOMUX_ACTIVE] = &cam_active_1_cfg,
494 [GPIOMUX_SUSPENDED] = &cam_suspend_cfg,
495 },
496 },
497 {
498 .gpio = 18,
499 .settings = {
500 [GPIOMUX_ACTIVE] = &cam_active_3_cfg,
501 [GPIOMUX_SUSPENDED] = &cam_suspend_cfg,
502 },
503 },
504 {
505 .gpio = 19,
506 .settings = {
507 [GPIOMUX_ACTIVE] = &cam_active_3_cfg,
508 [GPIOMUX_SUSPENDED] = &cam_suspend_cfg,
509 },
510 },
511 {
512 .gpio = 20,
513 .settings = {
514 [GPIOMUX_ACTIVE] = &cam_active_3_cfg,
515 [GPIOMUX_SUSPENDED] = &cam_suspend_cfg,
516 },
517 },
518 {
519 .gpio = 21,
520 .settings = {
521 [GPIOMUX_ACTIVE] = &cam_active_3_cfg,
522 [GPIOMUX_SUSPENDED] = &cam_suspend_cfg,
523 },
524 },
525 {
526 .gpio = 76,
527 .settings = {
528 [GPIOMUX_ACTIVE] = &cam_active_2_cfg,
529 [GPIOMUX_SUSPENDED] = &cam_suspend_cfg,
530 },
531 },
532 {
533 .gpio = 107,
534 .settings = {
535 [GPIOMUX_ACTIVE] = &cam_active_2_cfg,
536 [GPIOMUX_SUSPENDED] = &cam_suspend_cfg,
537 },
538 },
539};
540
541static struct gpiomux_setting cyts_resout_sus_cfg = {
542 .func = GPIOMUX_FUNC_GPIO,
543 .drv = GPIOMUX_DRV_6MA,
544 .pull = GPIOMUX_PULL_UP,
545};
546
547static struct gpiomux_setting cyts_resout_act_cfg = {
548 .func = GPIOMUX_FUNC_GPIO,
549 .drv = GPIOMUX_DRV_6MA,
550 .pull = GPIOMUX_PULL_UP,
551};
552
553static struct gpiomux_setting cyts_sleep_sus_cfg = {
554 .func = GPIOMUX_FUNC_GPIO,
555 .drv = GPIOMUX_DRV_6MA,
556 .pull = GPIOMUX_PULL_DOWN,
557};
558
559static struct gpiomux_setting cyts_sleep_act_cfg = {
560 .func = GPIOMUX_FUNC_GPIO,
561 .drv = GPIOMUX_DRV_6MA,
562 .pull = GPIOMUX_PULL_DOWN,
563};
564
565static struct gpiomux_setting cyts_int_act_cfg = {
566 .func = GPIOMUX_FUNC_GPIO,
567 .drv = GPIOMUX_DRV_8MA,
568 .pull = GPIOMUX_PULL_UP,
569};
570
571static struct gpiomux_setting cyts_int_sus_cfg = {
572 .func = GPIOMUX_FUNC_GPIO,
573 .drv = GPIOMUX_DRV_2MA,
574 .pull = GPIOMUX_PULL_UP,
575};
576
577
578static struct msm_gpiomux_config msm8960_cyts_configs[] __initdata = {
579 { /* TS INTERRUPT */
580 .gpio = 11,
581 .settings = {
582 [GPIOMUX_ACTIVE] = &cyts_int_act_cfg,
583 [GPIOMUX_SUSPENDED] = &cyts_int_sus_cfg,
584 },
585 },
586 { /* TS SLEEP */
587 .gpio = 50,
588 .settings = {
589 [GPIOMUX_ACTIVE] = &cyts_sleep_act_cfg,
590 [GPIOMUX_SUSPENDED] = &cyts_sleep_sus_cfg,
591 },
592 },
593 { /* TS RESOUT */
594 .gpio = 52,
595 .settings = {
596 [GPIOMUX_ACTIVE] = &cyts_resout_act_cfg,
597 [GPIOMUX_SUSPENDED] = &cyts_resout_sus_cfg,
598 },
599 },
600};
601
602#define MSM_PMEM_KERNEL_EBI1_SIZE 0x110C000
603#define MSM_PMEM_ADSP_SIZE 0x3800000
604#define MSM_PMEM_AUDIO_SIZE 0x279000
605#define MSM_PMEM_SIZE 0x1800000 /* 24 Mbytes */
606
607#ifdef CONFIG_KERNEL_PMEM_EBI_REGION
608static unsigned pmem_kernel_ebi1_size = MSM_PMEM_KERNEL_EBI1_SIZE;
609static int __init pmem_kernel_ebi1_size_setup(char *p)
610{
611 pmem_kernel_ebi1_size = memparse(p, NULL);
612 return 0;
613}
614early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
615#endif
616
617#ifdef CONFIG_ANDROID_PMEM
618static unsigned pmem_size = MSM_PMEM_SIZE;
619static int __init pmem_size_setup(char *p)
620{
621 pmem_size = memparse(p, NULL);
622 return 0;
623}
624early_param("pmem_size", pmem_size_setup);
625
626static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
627
628static int __init pmem_adsp_size_setup(char *p)
629{
630 pmem_adsp_size = memparse(p, NULL);
631 return 0;
632}
633early_param("pmem_adsp_size", pmem_adsp_size_setup);
634
635static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
636
637static int __init pmem_audio_size_setup(char *p)
638{
639 pmem_audio_size = memparse(p, NULL);
640 return 0;
641}
642early_param("pmem_audio_size", pmem_audio_size_setup);
643#endif
644
645#ifdef CONFIG_ANDROID_PMEM
646static struct android_pmem_platform_data android_pmem_pdata = {
647 .name = "pmem",
648 .allocator_type = PMEM_ALLOCATORTYPE_ALLORNOTHING,
649 .cached = 1,
650 .memory_type = MEMTYPE_EBI1,
651};
652
653static struct platform_device android_pmem_device = {
654 .name = "android_pmem",
655 .id = 0,
656 .dev = {.platform_data = &android_pmem_pdata},
657};
658
659static struct android_pmem_platform_data android_pmem_adsp_pdata = {
660 .name = "pmem_adsp",
661 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
662 .cached = 0,
663 .memory_type = MEMTYPE_EBI1,
664};
665static struct platform_device android_pmem_adsp_device = {
666 .name = "android_pmem",
667 .id = 2,
668 .dev = { .platform_data = &android_pmem_adsp_pdata },
669};
670
671static struct android_pmem_platform_data android_pmem_audio_pdata = {
672 .name = "pmem_audio",
673 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
674 .cached = 0,
675 .memory_type = MEMTYPE_EBI1,
676};
677
678static struct platform_device android_pmem_audio_device = {
679 .name = "android_pmem",
680 .id = 4,
681 .dev = { .platform_data = &android_pmem_audio_pdata },
682};
683#endif
684
685static struct memtype_reserve msm8960_reserve_table[] __initdata = {
686 [MEMTYPE_SMI] = {
687 },
688 [MEMTYPE_EBI0] = {
689 .flags = MEMTYPE_FLAGS_1M_ALIGN,
690 },
691 [MEMTYPE_EBI1] = {
692 .flags = MEMTYPE_FLAGS_1M_ALIGN,
693 },
694};
695
696static void __init size_pmem_devices(void)
697{
698#ifdef CONFIG_ANDROID_PMEM
699 android_pmem_adsp_pdata.size = pmem_adsp_size;
700 android_pmem_pdata.size = pmem_size;
701 android_pmem_audio_pdata.size = MSM_PMEM_AUDIO_SIZE;
702#endif
703}
704
705static void __init reserve_memory_for(struct android_pmem_platform_data *p)
706{
707 msm8960_reserve_table[p->memory_type].size += p->size;
708}
709
710static void __init reserve_pmem_memory(void)
711{
712#ifdef CONFIG_ANDROID_PMEM
713 reserve_memory_for(&android_pmem_adsp_pdata);
714 reserve_memory_for(&android_pmem_pdata);
715 reserve_memory_for(&android_pmem_audio_pdata);
716 msm8960_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
717#endif
718}
719
720static void __init msm8960_calculate_reserve_sizes(void)
721{
722 size_pmem_devices();
723 reserve_pmem_memory();
724}
725
726static int msm8960_paddr_to_memtype(unsigned int paddr)
727{
728 return MEMTYPE_EBI1;
729}
730
731static struct reserve_info msm8960_reserve_info __initdata = {
732 .memtype_reserve_table = msm8960_reserve_table,
733 .calculate_reserve_sizes = msm8960_calculate_reserve_sizes,
734 .paddr_to_memtype = msm8960_paddr_to_memtype,
735};
736
737static void __init msm8960_reserve(void)
738{
739 reserve_info = &msm8960_reserve_info;
740 msm_reserve();
741}
742
743#ifdef CONFIG_MSM_CAMERA
744
745static int msm_cam_gpio_tbl[] = {
746 5, /*CAMIF_MCLK*/
747 20, /*CAMIF_I2C_DATA*/
748 21, /*CAMIF_I2C_CLK*/
749};
750
751#define VFE_CAMIF_TIMER1_GPIO 2
752#define VFE_CAMIF_TIMER2_GPIO 3
753#define VFE_CAMIF_TIMER3_GPIO_INT 4
754struct msm_camera_sensor_strobe_flash_data strobe_flash_xenon = {
755 .flash_trigger = VFE_CAMIF_TIMER2_GPIO,
756 .flash_charge = VFE_CAMIF_TIMER1_GPIO,
757 .flash_charge_done = VFE_CAMIF_TIMER3_GPIO_INT,
758 .flash_recharge_duration = 50000,
759 .irq = MSM_GPIO_TO_INT(VFE_CAMIF_TIMER3_GPIO_INT),
760};
761
762#ifdef CONFIG_IMX074
763static struct msm_camera_sensor_platform_info sensor_board_info = {
764 .mount_angle = 0
765};
766#endif
767
768static int config_gpio_table(int gpio_en)
769{
770 int rc = 0, i = 0;
771 if (gpio_en) {
772 for (i = 0; i < ARRAY_SIZE(msm_cam_gpio_tbl); i++) {
773 rc = gpio_request(msm_cam_gpio_tbl[i], "CAM_GPIO");
774 if (rc < 0) {
775 pr_err("%s not able to get gpio\n", __func__);
776 for (i--; i >= 0; i--)
777 gpio_free(msm_cam_gpio_tbl[i]);
778 break;
779 }
780 }
781 } else {
782 for (i = 0; i < ARRAY_SIZE(msm_cam_gpio_tbl); i++)
783 gpio_free(msm_cam_gpio_tbl[i]);
784 }
785 return rc;
786}
787
788static int config_camera_on_gpios(void)
789{
790 int rc = 0;
791
792 rc = config_gpio_table(1);
793 if (rc < 0) {
794 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
795 "failed\n", __func__);
796 return rc;
797 }
798 return rc;
799}
800
801static void config_camera_off_gpios(void)
802{
803 config_gpio_table(0);
804}
805
806struct msm_camera_device_platform_data msm_camera_csi0_device_data = {
807 .camera_gpio_on = config_camera_on_gpios,
808 .camera_gpio_off = config_camera_off_gpios,
809 .ioclk.mclk_clk_rate = 24000000,
810 .ioclk.vfe_clk_rate = 228570000,
811 .csid_core = 0,
812};
813
814struct msm_camera_device_platform_data msm_camera_csi1_device_data = {
815 .camera_gpio_on = config_camera_on_gpios,
816 .camera_gpio_off = config_camera_off_gpios,
817 .ioclk.mclk_clk_rate = 24000000,
818 .ioclk.vfe_clk_rate = 228570000,
819 .csid_core = 1,
820};
821
822#ifdef CONFIG_IMX074
823static struct msm_camera_sensor_flash_data flash_imx074 = {
824 .flash_type = MSM_CAMERA_FLASH_LED,
825};
826
827static struct msm_camera_sensor_info msm_camera_sensor_imx074_data = {
828 .sensor_name = "imx074",
829 .sensor_reset = 107,
830 .sensor_pwd = 85,
831 .vcm_pwd = 0,
832 .vcm_enable = 1,
833 .pdata = &msm_camera_csi0_device_data,
834 .flash_data = &flash_imx074,
835 .strobe_flash_data = &strobe_flash_xenon,
836 .sensor_platform_info = &sensor_board_info,
837 .csi_if = 1
838};
839
840struct platform_device msm8960_camera_sensor_imx074 = {
841 .name = "msm_camera_imx074",
842 .dev = {
843 .platform_data = &msm_camera_sensor_imx074_data,
844 },
845};
846#endif
847#ifdef CONFIG_OV2720
848static struct msm_camera_sensor_flash_data flash_ov2720 = {
849 .flash_type = MSM_CAMERA_FLASH_LED,
850};
851
852static struct msm_camera_sensor_info msm_camera_sensor_ov2720_data = {
853 .sensor_name = "ov2720",
854 .sensor_reset = 76,
855 .sensor_pwd = 85,
856 .vcm_pwd = 0,
857 .vcm_enable = 1,
858 .pdata = &msm_camera_csi1_device_data,
859 .flash_data = &flash_ov2720,
860 .csi_if = 1
861};
862
863struct platform_device msm8960_camera_sensor_ov2720 = {
864 .name = "msm_camera_ov2720",
865 .dev = {
866 .platform_data = &msm_camera_sensor_ov2720_data,
867 },
868};
869#endif
Kevin Chandfecce22011-07-13 10:52:41 -0700870
871static struct msm_camera_sensor_flash_data flash_qs_mt9p017 = {
872 .flash_type = MSM_CAMERA_FLASH_LED,
873};
874
875static struct msm_camera_sensor_info msm_camera_sensor_qs_mt9p017_data = {
876 .sensor_name = "qs_mt9p017",
877 .sensor_reset = 107,
878 .sensor_pwd = 85,
879 .vcm_pwd = 0,
880 .vcm_enable = 1,
881 .pdata = &msm_camera_csi0_device_data,
882 .flash_data = &flash_qs_mt9p017,
883 .sensor_platform_info = &sensor_board_info,
884 .csi_if = 1
885};
886
887struct platform_device msm8960_camera_sensor_qs_mt9p017 = {
888 .name = "msm_camera_qs_mt9p017",
889 .dev = {
890 .platform_data = &msm_camera_sensor_qs_mt9p017_data,
891 },
892};
893
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700894static void __init msm8960_init_cam(void)
895{
896 int i;
897 struct platform_device *cam_dev[] = {
898 &msm8960_camera_sensor_imx074,
899 &msm8960_camera_sensor_ov2720,
Kevin Chandfecce22011-07-13 10:52:41 -0700900 &msm8960_camera_sensor_qs_mt9p017,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700901 };
902
903 for (i = 0; i < ARRAY_SIZE(cam_dev); i++) {
904 struct msm_camera_sensor_info *s_info;
905 s_info = cam_dev[i]->dev.platform_data;
906 msm_get_cam_resources(s_info);
907 platform_device_register(cam_dev[i]);
908 }
909}
910#endif
911
912#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
913/* prim = 608 x 1024 x 4(bpp) x 3(pages) */
914#define MSM_FB_PRIM_BUF_SIZE 0x720000
915#else
916/* prim = 608 x 1024 x 4(bpp) x 2(pages) */
917#define MSM_FB_PRIM_BUF_SIZE 0x4C0000
918#endif
919
920#ifdef CONFIG_FB_MSM_MIPI_DSI
921/* 960 x 540 x 3 x 2 */
922#define MIPI_DSI_WRITEBACK_SIZE 0x300000
923#else
924#define MIPI_DSI_WRITEBACK_SIZE 0
925#endif
926
927#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
928/* hdmi = 1920 x 1088 x 2(bpp) x 1(page) */
929#define MSM_FB_EXT_BUF_SIZE 0x3FC000
930#elif defined(CONFIG_FB_MSM_TVOUT)
931/* tvout = 720 x 576 x 2(bpp) x 2(pages) */
932#define MSM_FB_EXT_BUF_SIZE 0x195000
933#else /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
934#define MSM_FB_EXT_BUF_SIZE 0
935#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
936
937#define MSM_FB_SIZE roundup(MSM_FB_PRIM_BUF_SIZE + MSM_FB_EXT_BUF_SIZE +\
938 MIPI_DSI_WRITEBACK_SIZE, 4096)
939
940#define MDP_VSYNC_GPIO 0
941
942static struct resource msm_fb_resources[] = {
943 {
944 .flags = IORESOURCE_DMA,
945 }
946};
947
948static struct platform_device msm_fb_device = {
949 .name = "msm_fb",
950 .id = 0,
951 .num_resources = ARRAY_SIZE(msm_fb_resources),
952 .resource = msm_fb_resources,
953};
954
955static bool dsi_power_on;
956
957static int mipi_dsi_panel_power(int on)
958{
959 static struct regulator *reg_l8, *reg_l23, *reg_l2;
960 static int gpio24, gpio43;
961 int rc;
962
963 struct pm_gpio gpio43_param = {
964 .direction = PM_GPIO_DIR_OUT,
965 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
966 .output_value = 0,
967 .pull = PM_GPIO_PULL_NO,
968 .vin_sel = 2,
969 .out_strength = PM_GPIO_STRENGTH_HIGH,
970 .function = PM_GPIO_FUNC_PAIRED,
971 .inv_int_pol = 0,
972 .disable_pin = 0,
973 };
974
975 struct pm_gpio gpio24_param = {
976 .direction = PM_GPIO_DIR_OUT,
977 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
978 .output_value = 1,
979 .pull = PM_GPIO_PULL_NO,
980 .vin_sel = 2,
981 .out_strength = PM_GPIO_STRENGTH_HIGH,
982 .function = PM_GPIO_FUNC_NORMAL,
983 .inv_int_pol = 0,
984 .disable_pin = 0,
985 };
986
987 pr_info("%s: state : %d\n", __func__, on);
988
989 if (!dsi_power_on) {
990
991 reg_l8 = regulator_get(&msm_mipi_dsi1_device.dev,
992 "dsi_vdc");
993 if (IS_ERR(reg_l8)) {
994 pr_err("could not get 8921_l8, rc = %ld\n",
995 PTR_ERR(reg_l8));
996 return -ENODEV;
997 }
998
999 reg_l23 = regulator_get(&msm_mipi_dsi1_device.dev,
1000 "dsi_vddio");
1001 if (IS_ERR(reg_l23)) {
1002 pr_err("could not get 8921_l23, rc = %ld\n",
1003 PTR_ERR(reg_l23));
1004 return -ENODEV;
1005 }
1006
1007 reg_l2 = regulator_get(&msm_mipi_dsi1_device.dev,
1008 "dsi_vdda");
1009 if (IS_ERR(reg_l2)) {
1010 pr_err("could not get 8921_l2, rc = %ld\n",
1011 PTR_ERR(reg_l2));
1012 return -ENODEV;
1013 }
1014
1015 rc = regulator_set_voltage(reg_l8, 2800000, 3000000);
1016 if (rc) {
1017 pr_err("set_voltage l8 failed, rc=%d\n", rc);
1018 return -EINVAL;
1019 }
1020 rc = regulator_set_voltage(reg_l23, 1800000, 1800000);
1021 if (rc) {
1022 pr_err("set_voltage l23 failed, rc=%d\n", rc);
1023 return -EINVAL;
1024 }
1025 rc = regulator_set_voltage(reg_l2, 1200000, 1200000);
1026 if (rc) {
1027 pr_err("set_voltage l2 failed, rc=%d\n", rc);
1028 return -EINVAL;
1029 }
1030
1031 gpio43 = PM8921_GPIO_PM_TO_SYS(43);
1032 rc = gpio_request(gpio43, "disp_rst_n");
1033 if (rc) {
1034 pr_err("request gpio 43 failed, rc=%d\n", rc);
1035 return -ENODEV;
1036 }
1037
1038 gpio24 = PM8921_GPIO_PM_TO_SYS(24);
1039 rc = gpio_request(gpio24, "disp_backlight");
1040 if (rc) {
1041 pr_err("request gpio 24 failed, rc=%d\n", rc);
1042 return -EINVAL;
1043 }
1044 dsi_power_on = true;
1045 }
1046
1047 if (on) {
1048 rc = regulator_set_optimum_mode(reg_l8, 100000);
1049 if (rc < 0) {
1050 pr_err("set_optimum_mode l8 failed, rc=%d\n", rc);
1051 return -EINVAL;
1052 }
1053 rc = regulator_set_optimum_mode(reg_l23, 100000);
1054 if (rc < 0) {
1055 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
1056 return -EINVAL;
1057 }
1058 rc = regulator_set_optimum_mode(reg_l2, 100000);
1059 if (rc < 0) {
1060 pr_err("set_optimum_mode l2 failed, rc=%d\n", rc);
1061 return -EINVAL;
1062 }
1063 rc = regulator_enable(reg_l8);
1064 if (rc) {
1065 pr_err("enable l8 failed, rc=%d\n", rc);
1066 return -ENODEV;
1067 }
1068 rc = regulator_enable(reg_l23);
1069 if (rc) {
1070 pr_err("enable l8 failed, rc=%d\n", rc);
1071 return -ENODEV;
1072 }
1073 rc = regulator_enable(reg_l2);
1074 if (rc) {
1075 pr_err("enable l2 failed, rc=%d\n", rc);
1076 return -ENODEV;
1077 }
1078
1079 gpio43_param.pull = PM_GPIO_PULL_NO;
1080 rc = pm8xxx_gpio_config(gpio43, &gpio43_param);
1081 if (rc) {
1082 pr_err("gpio_config 43 failed (1), rc=%d\n", rc);
1083 return -EINVAL;
1084 }
1085 gpio43_param.pull = PM_GPIO_PULL_UP_30;
1086 rc = pm8xxx_gpio_config(gpio43, &gpio43_param);
1087 if (rc) {
1088 pr_err("gpio_config 43 failed (2), rc=%d\n", rc);
1089 return -EINVAL;
1090 }
1091 gpio43_param.pull = PM_GPIO_PULL_NO;
1092 rc = pm8xxx_gpio_config(gpio43, &gpio43_param);
1093 if (rc) {
1094 pr_err("gpio_config 43 failed (3), rc=%d\n", rc);
1095 return -EINVAL;
1096 }
1097 gpio43_param.pull = PM_GPIO_PULL_UP_30;
1098 rc = pm8xxx_gpio_config(gpio43, &gpio43_param);
1099 if (rc) {
1100 pr_err("gpio_config 43 failed (4), rc=%d\n", rc);
1101 return -EINVAL;
1102 }
1103
1104 rc = pm8xxx_gpio_config(gpio24, &gpio24_param);
1105 if (rc) {
1106 pr_err("gpio_config 24 failed, rc=%d\n", rc);
1107 return -EINVAL;
1108 }
1109
1110 gpio_set_value_cansleep(gpio43, 1);
1111 } else {
1112 rc = regulator_set_optimum_mode(reg_l8, 100);
1113 if (rc < 0) {
1114 pr_err("set_optimum_mode l8 failed, rc=%d\n", rc);
1115 return -EINVAL;
1116 }
1117 rc = regulator_set_optimum_mode(reg_l23, 100);
1118 if (rc < 0) {
1119 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
1120 return -EINVAL;
1121 }
1122 rc = regulator_set_optimum_mode(reg_l2, 100);
1123 if (rc < 0) {
1124 pr_err("set_optimum_mode l2 failed, rc=%d\n", rc);
1125 return -EINVAL;
1126 }
1127 gpio_set_value_cansleep(gpio43, 0);
1128 }
1129 return 0;
1130}
1131
1132static struct mipi_dsi_platform_data mipi_dsi_pdata = {
1133 .vsync_gpio = MDP_VSYNC_GPIO,
1134 .dsi_power_save = mipi_dsi_panel_power,
1135};
1136
1137#ifdef CONFIG_MSM_BUS_SCALING
1138
1139static struct msm_bus_vectors mdp_init_vectors[] = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001140 {
1141 .src = MSM_BUS_MASTER_MDP_PORT0,
1142 .dst = MSM_BUS_SLAVE_EBI_CH0,
1143 .ab = 0,
1144 .ib = 0,
1145 },
Ravishangar Kalyanam882930f2011-07-08 17:51:52 -07001146};
1147
1148static struct msm_bus_vectors mdp_ui_vectors[] = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001149 {
1150 .src = MSM_BUS_MASTER_MDP_PORT0,
1151 .dst = MSM_BUS_SLAVE_EBI_CH0,
Ravishangar Kalyanam882930f2011-07-08 17:51:52 -07001152 .ab = 216000000 * 2,
1153 .ib = 270000000 * 2,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001154 },
1155};
1156
1157static struct msm_bus_vectors mdp_vga_vectors[] = {
1158 /* VGA and less video */
1159 {
1160 .src = MSM_BUS_MASTER_MDP_PORT0,
1161 .dst = MSM_BUS_SLAVE_EBI_CH0,
Ravishangar Kalyanam882930f2011-07-08 17:51:52 -07001162 .ab = 216000000 * 2,
1163 .ib = 270000000 * 2,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001164 },
1165};
1166
1167static struct msm_bus_vectors mdp_720p_vectors[] = {
1168 /* 720p and less video */
1169 {
1170 .src = MSM_BUS_MASTER_MDP_PORT0,
1171 .dst = MSM_BUS_SLAVE_EBI_CH0,
Ravishangar Kalyanam882930f2011-07-08 17:51:52 -07001172 .ab = 230400000 * 2,
1173 .ib = 288000000 * 2,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001174 },
1175};
1176
1177static struct msm_bus_vectors mdp_1080p_vectors[] = {
1178 /* 1080p and less video */
1179 {
1180 .src = MSM_BUS_MASTER_MDP_PORT0,
1181 .dst = MSM_BUS_SLAVE_EBI_CH0,
Ravishangar Kalyanam882930f2011-07-08 17:51:52 -07001182 .ab = 334080000 * 2,
1183 .ib = 417600000 * 2,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001184 },
1185};
1186
1187static struct msm_bus_paths mdp_bus_scale_usecases[] = {
1188 {
1189 ARRAY_SIZE(mdp_init_vectors),
1190 mdp_init_vectors,
1191 },
1192 {
Ravishangar Kalyanam882930f2011-07-08 17:51:52 -07001193 ARRAY_SIZE(mdp_ui_vectors),
1194 mdp_ui_vectors,
1195 },
1196 {
1197 ARRAY_SIZE(mdp_ui_vectors),
1198 mdp_ui_vectors,
1199 },
1200 {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001201 ARRAY_SIZE(mdp_vga_vectors),
1202 mdp_vga_vectors,
1203 },
1204 {
1205 ARRAY_SIZE(mdp_720p_vectors),
1206 mdp_720p_vectors,
1207 },
1208 {
1209 ARRAY_SIZE(mdp_1080p_vectors),
1210 mdp_1080p_vectors,
1211 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001212};
1213
1214static struct msm_bus_scale_pdata mdp_bus_scale_pdata = {
1215 mdp_bus_scale_usecases,
1216 ARRAY_SIZE(mdp_bus_scale_usecases),
1217 .name = "mdp",
1218};
1219
1220#endif
1221
1222int mdp_core_clk_rate_table[] = {
1223 85330000,
1224 85330000,
1225 128000000,
1226 200000000,
1227 200000000,
1228};
1229
1230static struct msm_panel_common_pdata mdp_pdata = {
1231 .gpio = MDP_VSYNC_GPIO,
1232 .mdp_core_clk_rate = 85330000,
1233 .mdp_core_clk_table = mdp_core_clk_rate_table,
1234 .num_mdp_clk = ARRAY_SIZE(mdp_core_clk_rate_table),
1235#ifdef CONFIG_MSM_BUS_SCALING
1236 .mdp_bus_scale_table = &mdp_bus_scale_pdata,
1237#endif
1238 .mdp_rev = MDP_REV_42,
1239};
1240
1241static struct platform_device mipi_dsi_renesas_panel_device = {
1242 .name = "mipi_renesas",
1243 .id = 0,
1244};
1245
1246static struct platform_device mipi_dsi_simulator_panel_device = {
1247 .name = "mipi_simulator",
1248 .id = 0,
1249};
1250
1251static struct platform_device mipi_dsi_toshiba_panel_device = {
1252 .name = "mipi_toshiba",
1253 .id = 0,
1254};
1255
1256#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
1257static struct resource hdmi_msm_resources[] = {
1258 {
1259 .name = "hdmi_msm_qfprom_addr",
1260 .start = 0x00700000,
1261 .end = 0x007060FF,
1262 .flags = IORESOURCE_MEM,
1263 },
1264 {
1265 .name = "hdmi_msm_hdmi_addr",
1266 .start = 0x04A00000,
1267 .end = 0x04A00FFF,
1268 .flags = IORESOURCE_MEM,
1269 },
1270 {
1271 .name = "hdmi_msm_irq",
1272 .start = HDMI_IRQ,
1273 .end = HDMI_IRQ,
1274 .flags = IORESOURCE_IRQ,
1275 },
1276};
1277
1278static int hdmi_enable_5v(int on);
1279static int hdmi_core_power(int on, int show);
1280static int hdmi_cec_power(int on);
1281
1282static struct msm_hdmi_platform_data hdmi_msm_data = {
1283 .irq = HDMI_IRQ,
1284 .enable_5v = hdmi_enable_5v,
1285 .core_power = hdmi_core_power,
1286 .cec_power = hdmi_cec_power,
1287};
1288
1289static struct platform_device hdmi_msm_device = {
1290 .name = "hdmi_msm",
1291 .id = 0,
1292 .num_resources = ARRAY_SIZE(hdmi_msm_resources),
1293 .resource = hdmi_msm_resources,
1294 .dev.platform_data = &hdmi_msm_data,
1295};
1296#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
1297
Ravishangar Kalyanam882930f2011-07-08 17:51:52 -07001298#ifdef CONFIG_MSM_BUS_SCALING
1299static struct msm_bus_vectors dtv_bus_init_vectors[] = {
1300 {
1301 .src = MSM_BUS_MASTER_MDP_PORT0,
1302 .dst = MSM_BUS_SLAVE_EBI_CH0,
1303 .ab = 0,
1304 .ib = 0,
1305 },
1306};
1307static struct msm_bus_vectors dtv_bus_def_vectors[] = {
1308 {
1309 .src = MSM_BUS_MASTER_MDP_PORT0,
1310 .dst = MSM_BUS_SLAVE_EBI_CH0,
1311 .ab = 566092800 * 2,
1312 .ib = 707616000 * 2,
1313 },
1314};
1315static struct msm_bus_paths dtv_bus_scale_usecases[] = {
1316 {
1317 ARRAY_SIZE(dtv_bus_init_vectors),
1318 dtv_bus_init_vectors,
1319 },
1320 {
1321 ARRAY_SIZE(dtv_bus_def_vectors),
1322 dtv_bus_def_vectors,
1323 },
1324};
1325static struct msm_bus_scale_pdata dtv_bus_scale_pdata = {
1326 dtv_bus_scale_usecases,
1327 ARRAY_SIZE(dtv_bus_scale_usecases),
1328 .name = "dtv",
1329};
1330
1331static struct lcdc_platform_data dtv_pdata = {
1332 .bus_scale_table = &dtv_bus_scale_pdata,
1333};
1334#endif
1335
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001336static void __init msm_fb_add_devices(void)
1337{
1338 if (machine_is_msm8x60_rumi3()) {
1339 msm_fb_register_device("mdp", NULL);
1340 mipi_dsi_pdata.target_type = 1;
1341 } else
1342 msm_fb_register_device("mdp", &mdp_pdata);
1343 msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
Ravishangar Kalyanam882930f2011-07-08 17:51:52 -07001344#ifdef CONFIG_MSM_BUS_SCALING
1345 msm_fb_register_device("dtv", &dtv_pdata);
1346#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001347}
1348
1349#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
1350static struct gpiomux_setting hdmi_suspend_cfg = {
1351 .func = GPIOMUX_FUNC_GPIO,
1352 .drv = GPIOMUX_DRV_2MA,
1353 .pull = GPIOMUX_PULL_DOWN,
1354};
1355
1356static struct gpiomux_setting hdmi_active_1_cfg = {
1357 .func = GPIOMUX_FUNC_1,
1358 .drv = GPIOMUX_DRV_2MA,
1359 .pull = GPIOMUX_PULL_UP,
1360};
1361
1362static struct gpiomux_setting hdmi_active_2_cfg = {
1363 .func = GPIOMUX_FUNC_1,
1364 .drv = GPIOMUX_DRV_2MA,
1365 .pull = GPIOMUX_PULL_DOWN,
1366};
1367
1368static struct msm_gpiomux_config msm8960_hdmi_configs[] __initdata = {
1369 {
1370 .gpio = 99,
1371 .settings = {
1372 [GPIOMUX_ACTIVE] = &hdmi_active_1_cfg,
1373 [GPIOMUX_SUSPENDED] = &hdmi_suspend_cfg,
1374 },
1375 },
1376 {
1377 .gpio = 100,
1378 .settings = {
1379 [GPIOMUX_ACTIVE] = &hdmi_active_1_cfg,
1380 [GPIOMUX_SUSPENDED] = &hdmi_suspend_cfg,
1381 },
1382 },
1383 {
1384 .gpio = 101,
1385 .settings = {
1386 [GPIOMUX_ACTIVE] = &hdmi_active_1_cfg,
1387 [GPIOMUX_SUSPENDED] = &hdmi_suspend_cfg,
1388 },
1389 },
1390 {
1391 .gpio = 102,
1392 .settings = {
1393 [GPIOMUX_ACTIVE] = &hdmi_active_2_cfg,
1394 [GPIOMUX_SUSPENDED] = &hdmi_suspend_cfg,
1395 },
1396 },
1397};
1398
1399static int hdmi_enable_5v(int on)
1400{
1401 /* TBD: PM8921 regulator instead of 8901 */
1402 static struct regulator *reg_8921_hdmi_mvs; /* HDMI_5V */
1403 static int prev_on;
1404 int rc;
1405
1406 if (on == prev_on)
1407 return 0;
1408
1409 if (!reg_8921_hdmi_mvs)
1410 reg_8921_hdmi_mvs = regulator_get(&hdmi_msm_device.dev,
1411 "hdmi_mvs");
1412
1413 if (on) {
1414 rc = regulator_enable(reg_8921_hdmi_mvs);
1415 if (rc) {
1416 pr_err("'%s' regulator enable failed, rc=%d\n",
1417 "8921_hdmi_mvs", rc);
1418 return rc;
1419 }
1420 pr_debug("%s(on): success\n", __func__);
1421 } else {
1422 rc = regulator_disable(reg_8921_hdmi_mvs);
1423 if (rc)
1424 pr_warning("'%s' regulator disable failed, rc=%d\n",
1425 "8921_hdmi_mvs", rc);
1426 pr_debug("%s(off): success\n", __func__);
1427 }
1428
1429 prev_on = on;
1430
1431 return 0;
1432}
1433
1434static int hdmi_core_power(int on, int show)
1435{
1436 static struct regulator *reg_8921_l23, *reg_8921_s4;
1437 static int prev_on;
1438 int rc;
1439
1440 if (on == prev_on)
1441 return 0;
1442
1443 /* TBD: PM8921 regulator instead of 8901 */
1444 if (!reg_8921_l23)
1445 reg_8921_l23 = regulator_get(&hdmi_msm_device.dev, "hdmi_avdd");
1446
1447 if (!reg_8921_s4)
1448 reg_8921_s4 = regulator_get(&hdmi_msm_device.dev, "hdmi_vcc");
1449
1450 if (on) {
1451 rc = regulator_set_optimum_mode(reg_8921_l23, 100000);
1452 if (rc < 0) {
1453 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
1454 return -EINVAL;
1455 }
1456
1457 rc = regulator_set_voltage(reg_8921_l23, 1800000, 1800000);
1458 if (!rc)
1459 rc = regulator_enable(reg_8921_l23);
1460 if (rc) {
1461 pr_err("'%s' regulator enable failed, rc=%d\n",
1462 "hdmi_avdd", rc);
1463 return rc;
1464 }
1465 rc = regulator_set_voltage(reg_8921_s4, 1800000, 1800000);
1466 if (!rc)
1467 rc = regulator_enable(reg_8921_s4);
1468 if (rc) {
1469 pr_err("'%s' regulator enable failed, rc=%d\n",
1470 "hdmi_vcc", rc);
1471 return rc;
1472 }
1473
1474 rc = gpio_request(100, "HDMI_DDC_CLK");
1475 if (rc) {
1476 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
1477 "HDMI_DDC_CLK", 100, rc);
1478 goto error1;
1479 }
1480 rc = gpio_request(101, "HDMI_DDC_DATA");
1481 if (rc) {
1482 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
1483 "HDMI_DDC_DATA", 101, rc);
1484 goto error2;
1485 }
1486 rc = gpio_request(102, "HDMI_HPD");
1487 if (rc) {
1488 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
1489 "HDMI_HPD", 102, rc);
1490 goto error3;
1491 }
1492 pr_debug("%s(on): success\n", __func__);
1493 } else {
1494 gpio_free(100);
1495 gpio_free(101);
1496 gpio_free(102);
1497
1498 rc = regulator_set_optimum_mode(reg_8921_l23, 100);
1499 if (rc < 0) {
1500 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
1501 return -EINVAL;
1502 }
1503
1504 pr_debug("%s(off): success\n", __func__);
1505 }
1506
1507 prev_on = on;
1508
1509 return 0;
1510
1511error3:
1512 gpio_free(101);
1513error2:
1514 gpio_free(100);
1515error1:
1516 regulator_disable(reg_8921_l23);
1517 return rc;
1518}
1519
1520static int hdmi_cec_power(int on)
1521{
1522 static int prev_on;
1523 int rc;
1524
1525 if (on == prev_on)
1526 return 0;
1527
1528 if (on) {
1529 rc = gpio_request(99, "HDMI_CEC_VAR");
1530 if (rc) {
1531 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
1532 "HDMI_CEC_VAR", 99, rc);
1533 goto error;
1534 }
1535 pr_debug("%s(on): success\n", __func__);
1536 } else {
1537 gpio_free(99);
1538 pr_debug("%s(off): success\n", __func__);
1539 }
1540
1541 prev_on = on;
1542
1543 return 0;
1544error:
1545 return rc;
1546}
1547#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
1548
1549static void __init msm8960_allocate_memory_regions(void)
1550{
1551 void *addr;
1552 unsigned long size;
1553
1554 size = MSM_FB_SIZE;
1555 addr = alloc_bootmem_align(size, 0x1000);
1556 msm_fb_resources[0].start = __pa(addr);
1557 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
1558 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
1559 size, addr, __pa(addr));
1560
1561}
1562#ifdef CONFIG_WCD9310_CODEC
1563
1564#define TABLA_INTERRUPT_BASE (NR_MSM_IRQS + NR_GPIO_IRQS + NR_PM8921_IRQS)
1565
1566static struct tabla_pdata tabla_platform_data = {
1567 .slimbus_slave_device = {
1568 .name = "tabla-slave",
1569 .e_addr = {0, 0, 0x10, 0, 0x17, 2},
1570 },
1571 .irq = MSM_GPIO_TO_INT(62),
1572 .irq_base = TABLA_INTERRUPT_BASE,
1573 .num_irqs = NR_TABLA_IRQS,
1574 .reset_gpio = PM8921_GPIO_PM_TO_SYS(34),
1575};
1576
1577static struct slim_device msm_slim_tabla = {
1578 .name = "tabla-slim",
1579 .e_addr = {0, 1, 0x10, 0, 0x17, 2},
1580 .dev = {
1581 .platform_data = &tabla_platform_data,
1582 },
1583};
1584#endif
1585
1586static struct slim_boardinfo msm_slim_devices[] = {
1587#ifdef CONFIG_WCD9310_CODEC
1588 {
1589 .bus_num = 1,
1590 .slim_slave = &msm_slim_tabla,
1591 },
1592#endif
1593 /* add more slimbus slaves as needed */
1594};
1595
Yunsen Wang5c1a7392011-07-09 19:10:16 -07001596#define MSM_WCNSS_PHYS 0x03000000
1597#define MSM_WCNSS_SIZE 0x280000
1598
1599static struct resource resources_wcnss_wlan[] = {
1600 {
1601 .start = RIVA_APPS_WLAN_RX_DATA_AVAIL_IRQ,
1602 .end = RIVA_APPS_WLAN_RX_DATA_AVAIL_IRQ,
1603 .name = "wcnss_wlanrx_irq",
1604 .flags = IORESOURCE_IRQ,
1605 },
1606 {
1607 .start = RIVA_APPS_WLAN_DATA_XFER_DONE_IRQ,
1608 .end = RIVA_APPS_WLAN_DATA_XFER_DONE_IRQ,
1609 .name = "wcnss_wlantx_irq",
1610 .flags = IORESOURCE_IRQ,
1611 },
1612 {
1613 .start = MSM_WCNSS_PHYS,
1614 .end = MSM_WCNSS_PHYS + MSM_WCNSS_SIZE - 1,
1615 .name = "wcnss_mmio",
1616 .flags = IORESOURCE_MEM,
1617 },
1618};
1619
1620static struct platform_device msm_device_wcnss_wlan = {
1621 .name = "wcnss_wlan",
1622 .id = 0,
1623 .num_resources = ARRAY_SIZE(resources_wcnss_wlan),
1624 .resource = resources_wcnss_wlan,
1625};
1626
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001627#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
1628 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE) || \
1629 defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
1630 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
1631
1632#define QCE_SIZE 0x10000
1633#define QCE_0_BASE 0x18500000
1634
1635#define QCE_HW_KEY_SUPPORT 0
1636#define QCE_SHA_HMAC_SUPPORT 1
1637#define QCE_SHARE_CE_RESOURCE 1
1638#define QCE_CE_SHARED 0
1639
1640static struct resource qcrypto_resources[] = {
1641 [0] = {
1642 .start = QCE_0_BASE,
1643 .end = QCE_0_BASE + QCE_SIZE - 1,
1644 .flags = IORESOURCE_MEM,
1645 },
1646 [1] = {
1647 .name = "crypto_channels",
1648 .start = DMOV_CE_IN_CHAN,
1649 .end = DMOV_CE_OUT_CHAN,
1650 .flags = IORESOURCE_DMA,
1651 },
1652 [2] = {
1653 .name = "crypto_crci_in",
1654 .start = DMOV_CE_IN_CRCI,
1655 .end = DMOV_CE_IN_CRCI,
1656 .flags = IORESOURCE_DMA,
1657 },
1658 [3] = {
1659 .name = "crypto_crci_out",
1660 .start = DMOV_CE_OUT_CRCI,
1661 .end = DMOV_CE_OUT_CRCI,
1662 .flags = IORESOURCE_DMA,
1663 },
1664};
1665
1666static struct resource qcedev_resources[] = {
1667 [0] = {
1668 .start = QCE_0_BASE,
1669 .end = QCE_0_BASE + QCE_SIZE - 1,
1670 .flags = IORESOURCE_MEM,
1671 },
1672 [1] = {
1673 .name = "crypto_channels",
1674 .start = DMOV_CE_IN_CHAN,
1675 .end = DMOV_CE_OUT_CHAN,
1676 .flags = IORESOURCE_DMA,
1677 },
1678 [2] = {
1679 .name = "crypto_crci_in",
1680 .start = DMOV_CE_IN_CRCI,
1681 .end = DMOV_CE_IN_CRCI,
1682 .flags = IORESOURCE_DMA,
1683 },
1684 [3] = {
1685 .name = "crypto_crci_out",
1686 .start = DMOV_CE_OUT_CRCI,
1687 .end = DMOV_CE_OUT_CRCI,
1688 .flags = IORESOURCE_DMA,
1689 },
1690};
1691
1692#endif
1693
1694#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
1695 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
1696
1697static struct msm_ce_hw_support qcrypto_ce_hw_suppport = {
1698 .ce_shared = QCE_CE_SHARED,
1699 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
1700 .hw_key_support = QCE_HW_KEY_SUPPORT,
1701 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
1702};
1703
1704static struct platform_device qcrypto_device = {
1705 .name = "qcrypto",
1706 .id = 0,
1707 .num_resources = ARRAY_SIZE(qcrypto_resources),
1708 .resource = qcrypto_resources,
1709 .dev = {
1710 .coherent_dma_mask = DMA_BIT_MASK(32),
1711 .platform_data = &qcrypto_ce_hw_suppport,
1712 },
1713};
1714#endif
1715
1716#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
1717 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
1718
1719static struct msm_ce_hw_support qcedev_ce_hw_suppport = {
1720 .ce_shared = QCE_CE_SHARED,
1721 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
1722 .hw_key_support = QCE_HW_KEY_SUPPORT,
1723 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
1724};
1725
1726static struct platform_device qcedev_device = {
1727 .name = "qce",
1728 .id = 0,
1729 .num_resources = ARRAY_SIZE(qcedev_resources),
1730 .resource = qcedev_resources,
1731 .dev = {
1732 .coherent_dma_mask = DMA_BIT_MASK(32),
1733 .platform_data = &qcedev_ce_hw_suppport,
1734 },
1735};
1736#endif
1737
1738
1739static int __init gpiomux_init(void)
1740{
1741 int rc;
1742
1743 rc = msm_gpiomux_init(NR_GPIO_IRQS);
1744 if (rc) {
1745 pr_err(KERN_ERR "msm_gpiomux_init failed %d\n", rc);
1746 return rc;
1747 }
1748
1749 msm_gpiomux_install(msm8960_cam_configs,
1750 ARRAY_SIZE(msm8960_cam_configs));
1751
1752 msm_gpiomux_install(msm8960_gpiomux_configs,
1753 ARRAY_SIZE(msm8960_gsbi_configs));
1754
1755 msm_gpiomux_install(msm8960_gsbi_configs,
1756 ARRAY_SIZE(msm8960_gsbi_configs));
1757
1758 msm_gpiomux_install(msm8960_cyts_configs,
1759 ARRAY_SIZE(msm8960_cyts_configs));
1760
1761 msm_gpiomux_install(msm8960_slimbus_config,
1762 ARRAY_SIZE(msm8960_slimbus_config));
1763
1764 msm_gpiomux_install(msm8960_audio_codec_configs,
1765 ARRAY_SIZE(msm8960_audio_codec_configs));
1766
1767#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
1768 msm_gpiomux_install(msm8960_hdmi_configs,
1769 ARRAY_SIZE(msm8960_hdmi_configs));
1770#endif
1771
1772 msm_gpiomux_install(wcnss_5wire_interface,
1773 ARRAY_SIZE(wcnss_5wire_interface));
1774
1775 return 0;
1776}
1777
1778static struct msm_acpu_clock_platform_data msm8960_acpu_clock_data = {
1779 .acpu_switch_time_us = 0,
1780 .vdd_switch_time_us = 0,
1781};
1782
1783#define MSM_SHARED_RAM_PHYS 0x80000000
1784
1785static struct pm8921_adc_amux pm8921_adc_channels_data[] = {
1786 {"vcoin", CHANNEL_VCOIN, CHAN_PATH_SCALING2, AMUX_RSV1,
1787 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1788 {"vbat", CHANNEL_VBAT, CHAN_PATH_SCALING2, AMUX_RSV1,
1789 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1790 {"dcin", CHANNEL_DCIN, CHAN_PATH_SCALING4, AMUX_RSV1,
1791 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1792 {"ichg", CHANNEL_ICHG, CHAN_PATH_SCALING1, AMUX_RSV1,
1793 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1794 {"vph_pwr", CHANNEL_VPH_PWR, CHAN_PATH_SCALING2, AMUX_RSV1,
1795 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1796 {"ibat", CHANNEL_IBAT, CHAN_PATH_SCALING1, AMUX_RSV1,
1797 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1798 {"m4", CHANNEL_MPP_1, CHAN_PATH_SCALING1, AMUX_RSV1,
1799 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1800 {"m5", CHANNEL_MPP_2, CHAN_PATH_SCALING2, AMUX_RSV1,
1801 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1802 {"batt_therm", CHANNEL_BATT_THERM, CHAN_PATH_SCALING1, AMUX_RSV2,
1803 ADC_DECIMATION_TYPE2, ADC_SCALE_BATT_THERM},
1804 {"batt_id", CHANNEL_BATT_ID, CHAN_PATH_SCALING1, AMUX_RSV1,
1805 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1806 {"usbin", CHANNEL_USBIN, CHAN_PATH_SCALING3, AMUX_RSV1,
1807 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1808 {"pmic_therm", CHANNEL_DIE_TEMP, CHAN_PATH_SCALING1, AMUX_RSV1,
1809 ADC_DECIMATION_TYPE2, ADC_SCALE_PMIC_THERM},
1810 {"625mv", CHANNEL_625MV, CHAN_PATH_SCALING1, AMUX_RSV1,
1811 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1812 {"125v", CHANNEL_125V, CHAN_PATH_SCALING1, AMUX_RSV1,
1813 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1814 {"chg_temp", CHANNEL_CHG_TEMP, CHAN_PATH_SCALING1, AMUX_RSV1,
1815 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1816};
1817
1818static struct pm8921_adc_properties pm8921_adc_data = {
1819 .adc_vdd_reference = 1800, /* milli-voltage for this adc */
1820 .bitresolution = 15,
1821 .bipolar = 0,
1822};
1823
1824static struct pm8921_adc_platform_data pm8921_adc_pdata = {
1825 .adc_channel = pm8921_adc_channels_data,
1826 .adc_num_channel = ARRAY_SIZE(pm8921_adc_channels_data),
1827 .adc_prop = &pm8921_adc_data,
1828};
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08001829
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08001830static void __init msm8960_map_io(void)
1831{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001832 msm_shared_ram_phys = MSM_SHARED_RAM_PHYS;
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08001833 msm_map_msm8960_io();
1834}
1835
1836static void __init msm8960_init_irq(void)
1837{
1838 unsigned int i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001839
1840 msm_mpm_irq_extn_init();
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08001841 gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001842 (void *)MSM_QGIC_CPU_BASE);
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08001843
1844 /* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001845 writel_relaxed(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4);
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08001846
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001847 writel_relaxed(0x0000FFFF, MSM_QGIC_DIST_BASE + GIC_DIST_ENABLE_SET);
1848 mb();
Stepan Moskovchenko50ede4e2010-12-13 18:12:19 -08001849
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08001850 /* FIXME: Not installing AVS_SVICINT and AVS_SVICINTSWDONE yet
1851 * as they are configured as level, which does not play nice with
1852 * handle_percpu_irq.
1853 */
1854 for (i = GIC_PPI_START; i < GIC_SPI_START; i++) {
1855 if (i != AVS_SVICINT && i != AVS_SVICINTSWDONE)
Thomas Gleixner6845664a2011-03-24 13:25:22 +01001856 irq_set_handler(i, handle_percpu_irq);
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08001857 }
1858}
1859
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001860/* MSM8960 have 5 SDCC controllers */
1861enum sdcc_controllers {
1862 SDCC1,
1863 SDCC2,
1864 SDCC3,
1865 SDCC4,
1866 SDCC5,
1867 MAX_SDCC_CONTROLLER
1868};
1869
1870/* All SDCC controllers requires VDD/VCC voltage */
1871static struct msm_mmc_reg_data mmc_vdd_reg_data[MAX_SDCC_CONTROLLER] = {
1872 /* SDCC1 : eMMC card connected */
1873 [SDCC1] = {
1874 .name = "sdc_vdd",
1875 .set_voltage_sup = 1,
1876 .level = 2950000,
1877 .always_on = 1,
1878 .lpm_sup = 1,
1879 .lpm_uA = 9000,
1880 .hpm_uA = 200000, /* 200mA */
1881 },
1882 /* SDCC3 : External card slot connected */
1883 [SDCC3] = {
1884 .name = "sdc_vdd",
1885 .set_voltage_sup = 1,
1886 .level = 2950000,
1887 .hpm_uA = 600000, /* 600mA */
1888 }
1889};
1890
1891/* Only slots having eMMC card will require VCCQ voltage */
1892static struct msm_mmc_reg_data mmc_vccq_reg_data[1] = {
1893 /* SDCC1 : eMMC card connected */
1894 [SDCC1] = {
1895 .name = "sdc_vccq",
1896 .set_voltage_sup = 1,
1897 .always_on = 1,
1898 .level = 1800000,
1899 .hpm_uA = 200000, /* 200mA */
1900 }
1901};
1902
1903/* All SDCC controllers may require voting for VDD PAD voltage */
1904static struct msm_mmc_reg_data mmc_vddp_reg_data[MAX_SDCC_CONTROLLER] = {
1905 /* SDCC3 : External card slot connected */
1906 [SDCC3] = {
1907 .name = "sdc_vddp",
1908 .set_voltage_sup = 1,
1909 .level = 2950000,
1910 .always_on = 1,
1911 .lpm_sup = 1,
1912 /* Max. Active current required is 16 mA */
1913 .hpm_uA = 16000,
1914 /*
1915 * Sleep current required is ~300 uA. But min. vote can be
1916 * in terms of mA (min. 1 mA). So let's vote for 2 mA
1917 * during sleep.
1918 */
1919 .lpm_uA = 2000,
1920 }
1921};
1922
1923static struct msm_mmc_slot_reg_data mmc_slot_vreg_data[MAX_SDCC_CONTROLLER] = {
1924 /* SDCC1 : eMMC card connected */
1925 [SDCC1] = {
1926 .vdd_data = &mmc_vdd_reg_data[SDCC1],
1927 .vccq_data = &mmc_vccq_reg_data[SDCC1],
1928 },
1929 /* SDCC3 : External card slot connected */
1930 [SDCC3] = {
1931 .vdd_data = &mmc_vdd_reg_data[SDCC3],
1932 .vddp_data = &mmc_vddp_reg_data[SDCC3],
1933 }
1934};
1935
1936/* SDC1 pad data */
1937static struct msm_mmc_pad_drv sdc1_pad_drv_on_cfg[] = {
1938 {TLMM_HDRV_SDC1_CLK, GPIO_CFG_16MA},
1939 {TLMM_HDRV_SDC1_CMD, GPIO_CFG_10MA},
1940 {TLMM_HDRV_SDC1_DATA, GPIO_CFG_10MA}
1941};
1942
1943static struct msm_mmc_pad_drv sdc1_pad_drv_off_cfg[] = {
1944 {TLMM_HDRV_SDC1_CLK, GPIO_CFG_2MA},
1945 {TLMM_HDRV_SDC1_CMD, GPIO_CFG_2MA},
1946 {TLMM_HDRV_SDC1_DATA, GPIO_CFG_2MA}
1947};
1948
1949static struct msm_mmc_pad_pull sdc1_pad_pull_on_cfg[] = {
1950 {TLMM_PULL_SDC1_CMD, GPIO_CFG_PULL_UP},
1951 {TLMM_PULL_SDC1_DATA, GPIO_CFG_PULL_UP}
1952};
1953
1954static struct msm_mmc_pad_pull sdc1_pad_pull_off_cfg[] = {
1955 {TLMM_PULL_SDC1_CMD, GPIO_CFG_PULL_DOWN},
1956 {TLMM_PULL_SDC1_DATA, GPIO_CFG_PULL_DOWN}
1957};
1958
1959/* SDC3 pad data */
1960static struct msm_mmc_pad_drv sdc3_pad_drv_on_cfg[] = {
1961 {TLMM_HDRV_SDC3_CLK, GPIO_CFG_8MA},
1962 {TLMM_HDRV_SDC3_CMD, GPIO_CFG_8MA},
1963 {TLMM_HDRV_SDC3_DATA, GPIO_CFG_8MA}
1964};
1965
1966static struct msm_mmc_pad_drv sdc3_pad_drv_off_cfg[] = {
1967 {TLMM_HDRV_SDC3_CLK, GPIO_CFG_2MA},
1968 {TLMM_HDRV_SDC3_CMD, GPIO_CFG_2MA},
1969 {TLMM_HDRV_SDC3_DATA, GPIO_CFG_2MA}
1970};
1971
1972static struct msm_mmc_pad_pull sdc3_pad_pull_on_cfg[] = {
1973 {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_UP},
1974 {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_UP}
1975};
1976
1977static struct msm_mmc_pad_pull sdc3_pad_pull_off_cfg[] = {
1978 {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_DOWN},
1979 {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_DOWN}
1980};
1981
1982struct msm_mmc_pad_pull_data mmc_pad_pull_data[MAX_SDCC_CONTROLLER] = {
1983 [SDCC1] = {
1984 .on = sdc1_pad_pull_on_cfg,
1985 .off = sdc1_pad_pull_off_cfg,
1986 .size = ARRAY_SIZE(sdc1_pad_pull_on_cfg)
1987 },
1988 [SDCC3] = {
1989 .on = sdc3_pad_pull_on_cfg,
1990 .off = sdc3_pad_pull_off_cfg,
1991 .size = ARRAY_SIZE(sdc3_pad_pull_on_cfg)
1992 },
1993};
1994
1995struct msm_mmc_pad_drv_data mmc_pad_drv_data[MAX_SDCC_CONTROLLER] = {
1996 [SDCC1] = {
1997 .on = sdc1_pad_drv_on_cfg,
1998 .off = sdc1_pad_drv_off_cfg,
1999 .size = ARRAY_SIZE(sdc1_pad_drv_on_cfg)
2000 },
2001 [SDCC3] = {
2002 .on = sdc3_pad_drv_on_cfg,
2003 .off = sdc3_pad_drv_off_cfg,
2004 .size = ARRAY_SIZE(sdc3_pad_drv_on_cfg)
2005 },
2006};
2007
2008struct msm_mmc_pad_data mmc_pad_data[MAX_SDCC_CONTROLLER] = {
2009 [SDCC1] = {
2010 .pull = &mmc_pad_pull_data[SDCC1],
2011 .drv = &mmc_pad_drv_data[SDCC1]
2012 },
2013 [SDCC3] = {
2014 .pull = &mmc_pad_pull_data[SDCC3],
2015 .drv = &mmc_pad_drv_data[SDCC3]
2016 },
2017};
2018
2019struct msm_mmc_pin_data mmc_slot_pin_data[MAX_SDCC_CONTROLLER] = {
2020 [SDCC1] = {
2021 .pad_data = &mmc_pad_data[SDCC1],
2022 },
2023 [SDCC3] = {
2024 .pad_data = &mmc_pad_data[SDCC3],
2025 },
2026};
2027
2028static unsigned int sdc1_sup_clk_rates[] = {
2029 400000, 24000000, 48000000
2030};
2031
2032static unsigned int sdc3_sup_clk_rates[] = {
2033 400000, 24000000, 48000000, 96000000
2034};
2035
2036#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
2037static struct mmc_platform_data msm8960_sdc1_data = {
2038 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
2039#ifdef CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT
2040 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
2041#else
2042 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
2043#endif
2044 .sup_clk_table = sdc1_sup_clk_rates,
2045 .sup_clk_cnt = ARRAY_SIZE(sdc1_sup_clk_rates),
2046 .nonremovable = 1,
2047 .sdcc_v4_sup = true,
2048 .vreg_data = &mmc_slot_vreg_data[SDCC1],
2049 .pin_data = &mmc_slot_pin_data[SDCC1]
2050};
2051#endif
2052
2053#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
2054static struct mmc_platform_data msm8960_sdc3_data = {
2055 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
2056 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
2057 .sup_clk_table = sdc3_sup_clk_rates,
2058 .sup_clk_cnt = ARRAY_SIZE(sdc3_sup_clk_rates),
2059 .wpswitch_gpio = PM8921_GPIO_PM_TO_SYS(16),
2060 .sdcc_v4_sup = true,
2061 .vreg_data = &mmc_slot_vreg_data[SDCC3],
2062 .pin_data = &mmc_slot_pin_data[SDCC3],
2063#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
2064 .status_gpio = PM8921_GPIO_PM_TO_SYS(26),
2065 .status_irq = PM8921_GPIO_IRQ(PM8921_IRQ_BASE, 26),
2066 .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
2067#endif
2068 .xpc_cap = 1,
2069 .uhs_caps = (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 |
2070 MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_DDR50 |
2071 MMC_CAP_MAX_CURRENT_600)
2072};
2073#endif
2074
2075static void __init msm8960_init_mmc(void)
2076{
2077#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
2078 /* SDC1 : eMMC card connected */
2079 msm_add_sdcc(1, &msm8960_sdc1_data);
2080#endif
2081#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
2082 /* SDC3: External card slot */
2083 msm_add_sdcc(3, &msm8960_sdc3_data);
2084#endif
2085}
2086
2087static void __init msm8960_init_buses(void)
2088{
2089#ifdef CONFIG_MSM_BUS_SCALING
2090 msm_bus_apps_fabric_pdata.rpm_enabled = 1;
2091 msm_bus_sys_fabric_pdata.rpm_enabled = 1;
2092 msm_bus_mm_fabric_pdata.rpm_enabled = 1;
2093 msm_bus_sys_fpb_pdata.rpm_enabled = 1;
2094 msm_bus_cpss_fpb_pdata.rpm_enabled = 1;
2095 msm_bus_apps_fabric.dev.platform_data = &msm_bus_apps_fabric_pdata;
2096 msm_bus_sys_fabric.dev.platform_data = &msm_bus_sys_fabric_pdata;
2097 msm_bus_mm_fabric.dev.platform_data = &msm_bus_mm_fabric_pdata;
2098 msm_bus_sys_fpb.dev.platform_data = &msm_bus_sys_fpb_pdata;
2099 msm_bus_cpss_fpb.dev.platform_data = &msm_bus_cpss_fpb_pdata;
2100#endif
2101}
2102
2103static struct msm_spi_platform_data msm8960_qup_spi_gsbi1_pdata = {
2104 .max_clock_speed = 15060000,
2105};
2106
2107#ifdef CONFIG_USB_MSM_OTG_72K
2108static struct msm_otg_platform_data msm_otg_pdata;
2109#else
2110#define USB_5V_EN 42
2111static void msm_hsusb_vbus_power(bool on)
2112{
2113 int rc;
2114 static bool vbus_is_on;
2115 static struct regulator *mvs_otg_switch;
2116 struct pm_gpio param = {
2117 .direction = PM_GPIO_DIR_OUT,
2118 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
2119 .output_value = 1,
2120 .pull = PM_GPIO_PULL_NO,
2121 .vin_sel = PM_GPIO_VIN_S4,
2122 .out_strength = PM_GPIO_STRENGTH_MED,
2123 .function = PM_GPIO_FUNC_NORMAL,
2124 };
2125
2126 if (vbus_is_on == on)
2127 return;
2128
2129 if (on) {
2130 mvs_otg_switch = regulator_get(&msm_device_otg.dev, "vbus_otg");
2131 if (IS_ERR(mvs_otg_switch)) {
2132 pr_err("Unable to get mvs_otg_switch\n");
2133 return;
2134 }
2135
2136 rc = gpio_request(PM8921_GPIO_PM_TO_SYS(USB_5V_EN),
2137 "usb_5v_en");
2138 if (rc < 0) {
2139 pr_err("failed to request usb_5v_en gpio\n");
2140 goto put_mvs_otg;
2141 }
2142
2143 if (regulator_enable(mvs_otg_switch)) {
2144 pr_err("unable to enable mvs_otg_switch\n");
2145 goto free_usb_5v_en;
2146 }
2147
2148 rc = pm8xxx_gpio_config(PM8921_GPIO_PM_TO_SYS(USB_5V_EN),
2149 &param);
2150 if (rc < 0) {
2151 pr_err("failed to configure usb_5v_en gpio\n");
2152 goto disable_mvs_otg;
2153 }
2154 vbus_is_on = true;
2155 return;
2156 }
2157disable_mvs_otg:
2158 regulator_disable(mvs_otg_switch);
2159free_usb_5v_en:
2160 gpio_free(PM8921_GPIO_PM_TO_SYS(USB_5V_EN));
2161put_mvs_otg:
2162 regulator_put(mvs_otg_switch);
2163 vbus_is_on = false;
2164}
2165
2166static struct msm_otg_platform_data msm_otg_pdata = {
2167 .mode = USB_OTG,
2168 .otg_control = OTG_PMIC_CONTROL,
2169 .phy_type = SNPS_28NM_INTEGRATED_PHY,
2170 .pclk_src_name = "dfab_usb_hs_clk",
2171 .pmic_id_irq = PM8921_USB_ID_IN_IRQ(PM8921_IRQ_BASE),
2172 .vbus_power = msm_hsusb_vbus_power,
2173};
2174#endif
2175
2176#define PID_MAGIC_ID 0x71432909
2177#define SERIAL_NUM_MAGIC_ID 0x61945374
2178#define SERIAL_NUMBER_LENGTH 127
2179#define DLOAD_USB_BASE_ADD 0x2A03F0C8
2180
2181struct magic_num_struct {
2182 uint32_t pid;
2183 uint32_t serial_num;
2184};
2185
2186struct dload_struct {
2187 uint32_t reserved1;
2188 uint32_t reserved2;
2189 uint32_t reserved3;
2190 uint16_t reserved4;
2191 uint16_t pid;
2192 char serial_number[SERIAL_NUMBER_LENGTH];
2193 uint16_t reserved5;
2194 struct magic_num_struct magic_struct;
2195};
2196
2197static int usb_diag_update_pid_and_serial_num(uint32_t pid, const char *snum)
2198{
2199 struct dload_struct __iomem *dload = 0;
2200
2201 dload = ioremap(DLOAD_USB_BASE_ADD, sizeof(*dload));
2202 if (!dload) {
2203 pr_err("%s: cannot remap I/O memory region: %08x\n",
2204 __func__, DLOAD_USB_BASE_ADD);
2205 return -ENXIO;
2206 }
2207
2208 pr_debug("%s: dload:%p pid:%x serial_num:%s\n",
2209 __func__, dload, pid, snum);
2210 /* update pid */
2211 dload->magic_struct.pid = PID_MAGIC_ID;
2212 dload->pid = pid;
2213
2214 /* update serial number */
2215 dload->magic_struct.serial_num = 0;
2216 if (!snum) {
2217 memset(dload->serial_number, 0, SERIAL_NUMBER_LENGTH);
2218 goto out;
2219 }
2220
2221 dload->magic_struct.serial_num = SERIAL_NUM_MAGIC_ID;
2222 strncpy(dload->serial_number, snum, SERIAL_NUMBER_LENGTH);
2223 dload->serial_number[SERIAL_NUMBER_LENGTH - 1] = '\0';
2224out:
2225 iounmap(dload);
2226 return 0;
2227}
2228
2229static struct android_usb_platform_data android_usb_pdata = {
2230 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
2231};
2232
2233struct platform_device android_usb_device = {
2234 .name = "android_usb",
2235 .id = -1,
2236 .dev = {
2237 .platform_data = &android_usb_pdata,
2238 },
2239};
2240
2241static uint8_t spm_wfi_cmd_sequence[] __initdata = {
2242 0x03, 0x0f,
2243};
2244
2245static uint8_t spm_power_collapse_without_rpm[] __initdata = {
2246 0x00, 0x24, 0x54, 0x10,
2247 0x09, 0x03, 0x01,
2248 0x10, 0x54, 0x30, 0x0C,
2249 0x24, 0x30, 0x0f,
2250};
2251
2252static uint8_t spm_power_collapse_with_rpm[] __initdata = {
2253 0x00, 0x24, 0x54, 0x10,
2254 0x09, 0x07, 0x01, 0x0B,
2255 0x10, 0x54, 0x30, 0x0C,
2256 0x24, 0x30, 0x0f,
2257};
2258
2259static struct msm_spm_seq_entry msm_spm_seq_list[] __initdata = {
2260 [0] = {
2261 .mode = MSM_SPM_MODE_CLOCK_GATING,
2262 .notify_rpm = false,
2263 .cmd = spm_wfi_cmd_sequence,
2264 },
2265 [1] = {
2266 .mode = MSM_SPM_MODE_POWER_COLLAPSE,
2267 .notify_rpm = false,
2268 .cmd = spm_power_collapse_without_rpm,
2269 },
2270 [2] = {
2271 .mode = MSM_SPM_MODE_POWER_COLLAPSE,
2272 .notify_rpm = true,
2273 .cmd = spm_power_collapse_with_rpm,
2274 },
2275};
2276
2277static struct msm_spm_platform_data msm_spm_data[] __initdata = {
2278 [0] = {
2279 .reg_base_addr = MSM_SAW0_BASE,
2280 .reg_init_values[MSM_SPM_REG_SAW2_SECURE] = 0x00,
2281 .reg_init_values[MSM_SPM_REG_SAW2_CFG] = 0x1F,
2282 .reg_init_values[MSM_SPM_REG_SAW2_VCTL] = 0x9C,
2283#if defined(CONFIG_MSM_AVS_HW)
2284 .reg_init_values[MSM_SPM_REG_SAW2_AVS_CTL] = 0x00,
2285 .reg_init_values[MSM_SPM_REG_SAW2_AVS_HYSTERESIS] = 0x00,
2286#endif
2287 .reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x01,
2288 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020202,
2289 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_0] = 0x0060009C,
2290 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_1] = 0x0000001C,
2291 .vctl_timeout_us = 50,
2292 .num_modes = ARRAY_SIZE(msm_spm_seq_list),
2293 .modes = msm_spm_seq_list,
2294 },
2295 [1] = {
2296 .reg_base_addr = MSM_SAW1_BASE,
2297 .reg_init_values[MSM_SPM_REG_SAW2_SECURE] = 0x00,
2298 .reg_init_values[MSM_SPM_REG_SAW2_CFG] = 0x1F,
2299 .reg_init_values[MSM_SPM_REG_SAW2_VCTL] = 0x9C,
2300#if defined(CONFIG_MSM_AVS_HW)
2301 .reg_init_values[MSM_SPM_REG_SAW2_AVS_CTL] = 0x00,
2302 .reg_init_values[MSM_SPM_REG_SAW2_AVS_HYSTERESIS] = 0x00,
2303#endif
2304 .reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x01,
2305 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020202,
2306 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_0] = 0x0060009C,
2307 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_1] = 0x0000001C,
2308 .vctl_timeout_us = 50,
2309 .num_modes = ARRAY_SIZE(msm_spm_seq_list),
2310 .modes = msm_spm_seq_list,
2311 },
2312};
2313
2314static uint8_t l2_spm_wfi_cmd_sequence[] __initdata = {
2315 0x00, 0x20, 0x03, 0x20,
2316 0x00, 0x0f,
2317};
2318
2319static uint8_t l2_spm_gdhs_cmd_sequence[] __initdata = {
2320 0x00, 0x20, 0x34, 0x64,
2321 0x48, 0x07, 0x48, 0x20,
2322 0x50, 0x64, 0x04, 0x34,
2323 0x50, 0x0f,
2324};
2325static uint8_t l2_spm_power_off_cmd_sequence[] __initdata = {
2326 0x00, 0x10, 0x34, 0x64,
2327 0x48, 0x07, 0x48, 0x10,
2328 0x50, 0x64, 0x04, 0x34,
2329 0x50, 0x0F,
2330};
2331
2332static struct msm_spm_seq_entry msm_spm_l2_seq_list[] __initdata = {
2333 [0] = {
2334 .mode = MSM_SPM_L2_MODE_RETENTION,
2335 .notify_rpm = false,
2336 .cmd = l2_spm_wfi_cmd_sequence,
2337 },
2338 [1] = {
2339 .mode = MSM_SPM_L2_MODE_GDHS,
2340 .notify_rpm = true,
2341 .cmd = l2_spm_gdhs_cmd_sequence,
2342 },
2343 [2] = {
2344 .mode = MSM_SPM_L2_MODE_POWER_COLLAPSE,
2345 .notify_rpm = true,
2346 .cmd = l2_spm_power_off_cmd_sequence,
2347 },
2348};
2349
2350
2351static struct msm_spm_platform_data msm_spm_l2_data[] __initdata = {
2352 [0] = {
2353 .reg_base_addr = MSM_SAW_L2_BASE,
2354 .reg_init_values[MSM_SPM_REG_SAW2_SECURE] = 0x00,
2355 .reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x00,
2356 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020202,
2357 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_0] = 0x00A000AE,
2358 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_1] = 0x00A00020,
2359 .modes = msm_spm_l2_seq_list,
2360 .num_modes = ARRAY_SIZE(msm_spm_l2_seq_list),
2361 },
2362};
2363
2364#define CYTTSP_TS_GPIO_IRQ 11
2365#define CYTTSP_TS_SLEEP_GPIO 50
2366#define CYTTSP_TS_RESOUT_N_GPIO 52
2367
2368/*virtual key support */
2369static ssize_t tma340_vkeys_show(struct kobject *kobj,
2370 struct kobj_attribute *attr, char *buf)
2371{
2372 return snprintf(buf, 200,
2373 __stringify(EV_KEY) ":" __stringify(KEY_BACK) ":73:1120:97:97"
2374 ":" __stringify(EV_KEY) ":" __stringify(KEY_MENU) ":230:1120:97:97"
2375 ":" __stringify(EV_KEY) ":" __stringify(KEY_HOME) ":389:1120:97:97"
2376 ":" __stringify(EV_KEY) ":" __stringify(KEY_SEARCH) ":544:1120:97:97"
2377 "\n");
2378}
2379
2380static struct kobj_attribute tma340_vkeys_attr = {
2381 .attr = {
2382 .mode = S_IRUGO,
2383 },
2384 .show = &tma340_vkeys_show,
2385};
2386
2387static struct attribute *tma340_properties_attrs[] = {
2388 &tma340_vkeys_attr.attr,
2389 NULL
2390};
2391
2392static struct attribute_group tma340_properties_attr_group = {
2393 .attrs = tma340_properties_attrs,
2394};
2395
2396
2397static int cyttsp_platform_init(struct i2c_client *client)
2398{
2399 int rc = 0;
2400 static struct kobject *tma340_properties_kobj;
2401
2402 tma340_vkeys_attr.attr.name = "virtualkeys.cyttsp-i2c";
2403 tma340_properties_kobj = kobject_create_and_add("board_properties",
2404 NULL);
2405 if (tma340_properties_kobj)
2406 rc = sysfs_create_group(tma340_properties_kobj,
2407 &tma340_properties_attr_group);
2408 if (!tma340_properties_kobj || rc)
2409 pr_err("%s: failed to create board_properties\n",
2410 __func__);
2411
2412 return 0;
2413}
2414
2415static struct cyttsp_regulator regulator_data[] = {
2416 {
2417 .name = "vdd",
2418 .min_uV = CY_TMA300_VTG_MIN_UV,
2419 .max_uV = CY_TMA300_VTG_MAX_UV,
2420 .load_uA = CY_TMA300_CURR_24HZ_UA,
2421 },
2422 /* TODO: Remove after runtime PM is enabled in I2C driver */
2423 {
2424 .name = "vcc_i2c",
2425 .min_uV = CY_I2C_VTG_MIN_UV,
2426 .max_uV = CY_I2C_VTG_MAX_UV,
2427 .load_uA = CY_I2C_CURR_UA,
2428 },
2429};
2430
2431static struct cyttsp_platform_data cyttsp_pdata = {
2432 .panel_maxx = 634,
2433 .panel_maxy = 1166,
2434 .disp_maxx = 616,
2435 .disp_maxy = 1023,
2436 .disp_minx = 0,
2437 .disp_miny = 16,
2438 .flags = 0x01,
2439 .gen = CY_GEN3, /* or */
2440 .use_st = CY_USE_ST,
2441 .use_mt = CY_USE_MT,
2442 .use_hndshk = CY_SEND_HNDSHK,
2443 .use_trk_id = CY_USE_TRACKING_ID,
Anirudh Ghayal15187772011-06-22 17:39:41 +05302444 .use_sleep = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002445 .use_gestures = CY_USE_GESTURES,
2446 .fw_fname = "cyttsp_8960_cdp.hex",
2447 /* activate up to 4 groups
2448 * and set active distance
2449 */
2450 .gest_set = CY_GEST_GRP1 | CY_GEST_GRP2 |
2451 CY_GEST_GRP3 | CY_GEST_GRP4 |
2452 CY_ACT_DIST,
2453 /* change act_intrvl to customize the Active power state
2454 * scanning/processing refresh interval for Operating mode
2455 */
2456 .act_intrvl = CY_ACT_INTRVL_DFLT,
2457 /* change tch_tmout to customize the touch timeout for the
2458 * Active power state for Operating mode
2459 */
2460 .tch_tmout = CY_TCH_TMOUT_DFLT,
2461 /* change lp_intrvl to customize the Low Power power state
2462 * scanning/processing refresh interval for Operating mode
2463 */
2464 .lp_intrvl = CY_LP_INTRVL_DFLT,
2465 .sleep_gpio = CYTTSP_TS_SLEEP_GPIO,
2466 .resout_gpio = CYTTSP_TS_RESOUT_N_GPIO,
2467 .irq_gpio = CYTTSP_TS_GPIO_IRQ,
2468 .regulator_info = regulator_data,
2469 .num_regulators = ARRAY_SIZE(regulator_data),
2470 .init = cyttsp_platform_init,
2471};
2472
2473static struct i2c_board_info cyttsp_info[] __initdata = {
2474 {
2475 I2C_BOARD_INFO(CY_I2C_NAME, 0x24),
2476 .platform_data = &cyttsp_pdata,
2477#ifndef CY_USE_TIMER
2478 .irq = MSM_GPIO_TO_INT(CYTTSP_TS_GPIO_IRQ),
2479#endif /* CY_USE_TIMER */
2480 },
2481};
2482
2483static void gsbi_qup_i2c_gpio_config(int adap_id, int config_type)
2484{
2485}
2486
2487static struct msm_i2c_platform_data msm8960_i2c_qup_gsbi4_pdata = {
2488 .clk_freq = 100000,
2489 .src_clk_rate = 24000000,
2490 .clk = "gsbi_qup_clk",
2491 .pclk = "gsbi_pclk",
2492 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2493};
2494
2495static struct msm_i2c_platform_data msm8960_i2c_qup_gsbi3_pdata = {
2496 .clk_freq = 100000,
2497 .src_clk_rate = 24000000,
2498 .clk = "gsbi_qup_clk",
2499 .pclk = "gsbi_pclk",
2500 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2501};
2502
2503static struct msm_i2c_platform_data msm8960_i2c_qup_gsbi10_pdata = {
2504 .clk_freq = 100000,
2505 .src_clk_rate = 24000000,
2506 .clk = "gsbi_qup_clk",
2507 .pclk = "gsbi_pclk",
2508 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2509};
2510
2511static struct msm_i2c_platform_data msm8960_i2c_qup_gsbi12_pdata = {
2512 .clk_freq = 100000,
2513 .src_clk_rate = 24000000,
2514 .clk = "gsbi_qup_clk",
2515 .pclk = "gsbi_pclk",
2516 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2517};
2518
2519static struct msm_rpm_platform_data msm_rpm_data = {
2520 .reg_base_addrs = {
2521 [MSM_RPM_PAGE_STATUS] = MSM_RPM_BASE,
2522 [MSM_RPM_PAGE_CTRL] = MSM_RPM_BASE + 0x400,
2523 [MSM_RPM_PAGE_REQ] = MSM_RPM_BASE + 0x600,
2524 [MSM_RPM_PAGE_ACK] = MSM_RPM_BASE + 0xa00,
2525 },
2526
2527 .irq_ack = RPM_APCC_CPU0_GP_HIGH_IRQ,
2528 .irq_err = RPM_APCC_CPU0_GP_LOW_IRQ,
2529 .irq_vmpm = RPM_APCC_CPU0_GP_MEDIUM_IRQ,
2530 .msm_apps_ipc_rpm_reg = MSM_APCS_GCC_BASE + 0x008,
2531 .msm_apps_ipc_rpm_val = 4,
2532};
2533
2534static struct spi_board_info spi_board_info[] __initdata = {
2535 {
2536 .modalias = "ks8851",
2537 .irq = MSM_GPIO_TO_INT(KS8851_IRQ_GPIO),
2538 .max_speed_hz = 19200000,
2539 .bus_num = 0,
2540 .chip_select = 0,
2541 .mode = SPI_MODE_0,
2542 },
2543};
2544
2545static struct platform_device msm_device_saw_core0 = {
2546 .name = "saw-regulator",
2547 .id = 0,
2548 .dev = {
2549 .platform_data = &msm_saw_regulator_pdata_s5,
2550 },
2551};
2552
2553static struct platform_device msm_device_saw_core1 = {
2554 .name = "saw-regulator",
2555 .id = 1,
2556 .dev = {
2557 .platform_data = &msm_saw_regulator_pdata_s6,
2558 },
2559};
2560
2561#ifdef CONFIG_MSM_FAKE_BATTERY
2562static struct platform_device fish_battery_device = {
2563 .name = "fish_battery",
2564};
2565#endif
2566
2567struct platform_device msm8960_device_ext_5v_vreg __devinitdata = {
2568 .name = GPIO_REGULATOR_DEV_NAME,
2569 .id = PM8921_MPP_PM_TO_SYS(7),
2570 .dev = {
2571 .platform_data = &msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V],
2572 },
2573};
2574
2575struct platform_device msm8960_device_ext_l2_vreg __devinitdata = {
2576 .name = GPIO_REGULATOR_DEV_NAME,
2577 .id = 91,
2578 .dev = {
2579 .platform_data = &msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_L2],
2580 },
2581};
2582
2583static struct platform_device *common_devices[] __initdata = {
2584 &msm_device_dmov,
2585 &msm_device_smd,
2586 &msm8960_device_uart_gsbi5,
2587 &msm_device_saw_core0,
2588 &msm_device_saw_core1,
2589 &msm8960_device_ext_5v_vreg,
2590 &msm8960_device_ext_l2_vreg,
2591 &msm8960_device_ssbi_pm8921,
2592 &msm8960_device_qup_spi_gsbi1,
2593 &msm8960_device_qup_i2c_gsbi3,
2594 &msm8960_device_qup_i2c_gsbi4,
2595 &msm8960_device_qup_i2c_gsbi10,
2596#ifndef CONFIG_MSM_DSPS
2597 &msm8960_device_qup_i2c_gsbi12,
2598#endif
2599 &msm_slim_ctrl,
2600 &msm_device_wcnss_wlan,
2601#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
2602 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
2603 &qcrypto_device,
2604#endif
2605
2606#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
2607 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
2608 &qcedev_device,
2609#endif
2610#ifdef CONFIG_MSM_ROTATOR
2611 &msm_rotator_device,
2612#endif
2613 &msm_device_sps,
2614#ifdef CONFIG_MSM_FAKE_BATTERY
2615 &fish_battery_device,
2616#endif
2617#ifdef CONFIG_ANDROID_PMEM
2618 &android_pmem_device,
2619 &android_pmem_adsp_device,
2620 &android_pmem_audio_device,
2621#endif
2622 &msm_fb_device,
2623 &msm_device_vidc,
2624 &msm_device_bam_dmux,
2625 &msm_fm_platform_init,
2626};
2627
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08002628static struct platform_device *sim_devices[] __initdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002629 &msm_device_otg,
2630 &msm_device_gadget_peripheral,
2631 &msm_device_hsusb_host,
2632 &android_usb_device,
2633 &msm_device_vidc,
2634 &mipi_dsi_simulator_panel_device,
2635 &msm_bus_apps_fabric,
2636 &msm_bus_sys_fabric,
2637 &msm_bus_mm_fabric,
2638 &msm_bus_sys_fpb,
2639 &msm_bus_cpss_fpb,
2640 &msm_pcm,
2641 &msm_pcm_routing,
2642 &msm_cpudai0,
2643 &msm_cpudai1,
2644 &msm_cpudai_hdmi_rx,
2645 &msm_cpudai_bt_rx,
2646 &msm_cpudai_bt_tx,
2647 &msm_cpudai_fm_rx,
2648 &msm_cpudai_fm_tx,
2649 &msm_cpu_fe,
2650 &msm_stub_codec,
2651 &msm_voice,
2652 &msm_voip,
2653 &msm_lpa_pcm,
2654
2655#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
2656 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
2657 &qcrypto_device,
2658#endif
2659
2660#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
2661 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
2662 &qcedev_device,
2663#endif
2664
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08002665};
2666
2667static struct platform_device *rumi3_devices[] __initdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002668 &msm_kgsl_3d0,
2669 &msm_kgsl_2d0,
2670 &msm_kgsl_2d1,
2671 &mipi_dsi_renesas_panel_device,
2672#ifdef CONFIG_MSM_GEMINI
2673 &msm8960_gemini_device,
2674#endif
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08002675};
2676
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002677static struct platform_device *cdp_devices[] __initdata = {
2678 &msm_device_otg,
2679 &msm_device_gadget_peripheral,
2680 &msm_device_hsusb_host,
2681 &android_usb_device,
2682 &msm_pcm,
2683 &msm_pcm_routing,
2684 &msm_cpudai0,
2685 &msm_cpudai1,
2686 &msm_cpudai_hdmi_rx,
2687 &msm_cpudai_bt_rx,
2688 &msm_cpudai_bt_tx,
2689 &msm_cpudai_fm_rx,
2690 &msm_cpudai_fm_tx,
2691 &msm_cpu_fe,
2692 &msm_stub_codec,
2693 &msm_kgsl_3d0,
2694#ifdef CONFIG_MSM_KGSL_2D
2695 &msm_kgsl_2d0,
2696 &msm_kgsl_2d1,
2697#endif
2698 &mipi_dsi_toshiba_panel_device,
2699#ifdef CONFIG_MSM_GEMINI
2700 &msm8960_gemini_device,
2701#endif
2702 &msm_voice,
2703 &msm_voip,
2704 &msm_lpa_pcm,
2705#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
2706 &hdmi_msm_device,
2707#endif
2708 &msm_pcm_hostless,
2709 &msm_bus_apps_fabric,
2710 &msm_bus_sys_fabric,
2711 &msm_bus_mm_fabric,
2712 &msm_bus_sys_fpb,
2713 &msm_bus_cpss_fpb,
2714};
2715
2716static void __init msm8960_i2c_init(void)
2717{
2718 msm8960_device_qup_i2c_gsbi4.dev.platform_data =
2719 &msm8960_i2c_qup_gsbi4_pdata;
2720
2721 msm8960_device_qup_i2c_gsbi3.dev.platform_data =
2722 &msm8960_i2c_qup_gsbi3_pdata;
2723
2724 msm8960_device_qup_i2c_gsbi10.dev.platform_data =
2725 &msm8960_i2c_qup_gsbi10_pdata;
2726
2727 msm8960_device_qup_i2c_gsbi12.dev.platform_data =
2728 &msm8960_i2c_qup_gsbi12_pdata;
2729}
2730
2731static struct pm8xxx_irq_platform_data pm8xxx_irq_pdata __devinitdata = {
2732 .irq_base = PM8921_IRQ_BASE,
2733 .devirq = MSM_GPIO_TO_INT(104),
2734 .irq_trigger_flag = IRQF_TRIGGER_LOW,
2735};
2736
2737static struct pm8xxx_gpio_platform_data pm8xxx_gpio_pdata __devinitdata = {
2738 .gpio_base = PM8921_GPIO_PM_TO_SYS(1),
2739};
2740
2741static struct pm8xxx_mpp_platform_data pm8xxx_mpp_pdata __devinitdata = {
2742 .mpp_base = PM8921_MPP_PM_TO_SYS(1),
2743};
2744
2745static struct pm8xxx_rtc_platform_data pm8xxx_rtc_pdata __devinitdata = {
2746 .rtc_write_enable = false,
2747};
2748
2749static struct pm8xxx_pwrkey_platform_data pm8xxx_pwrkey_pdata = {
2750 .pull_up = 1,
2751 .kpd_trigger_delay_us = 970,
2752 .wakeup = 1,
2753};
2754
2755static const unsigned int keymap[] = {
2756 KEY(0, 0, KEY_VOLUMEUP),
2757 KEY(0, 1, KEY_VOLUMEDOWN),
2758 KEY(0, 2, KEY_CAMERA_SNAPSHOT),
2759 KEY(0, 3, KEY_CAMERA_FOCUS),
2760};
2761
2762static struct matrix_keymap_data keymap_data = {
2763 .keymap_size = ARRAY_SIZE(keymap),
2764 .keymap = keymap,
2765};
2766
2767static struct pm8xxx_keypad_platform_data keypad_data = {
2768 .input_name = "keypad_8960",
2769 .input_phys_device = "keypad_8960/input0",
2770 .num_rows = 1,
2771 .num_cols = 5,
2772 .rows_gpio_start = PM8921_GPIO_PM_TO_SYS(9),
2773 .cols_gpio_start = PM8921_GPIO_PM_TO_SYS(1),
2774 .debounce_ms = 15,
2775 .scan_delay_ms = 32,
2776 .row_hold_ns = 91500,
2777 .wakeup = 1,
2778 .keymap_data = &keymap_data,
2779};
2780
2781static const unsigned int keymap_sim[] = {
2782 KEY(0, 0, KEY_7),
2783 KEY(0, 1, KEY_DOWN),
2784 KEY(0, 2, KEY_UP),
2785 KEY(0, 3, KEY_RIGHT),
2786 KEY(0, 4, KEY_ENTER),
2787 KEY(0, 5, KEY_L),
2788 KEY(0, 6, KEY_BACK),
2789 KEY(0, 7, KEY_M),
2790
2791 KEY(1, 0, KEY_LEFT),
2792 KEY(1, 1, KEY_SEND),
2793 KEY(1, 2, KEY_1),
2794 KEY(1, 3, KEY_4),
2795 KEY(1, 4, KEY_CLEAR),
2796 KEY(1, 5, KEY_MSDOS),
2797 KEY(1, 6, KEY_SPACE),
2798 KEY(1, 7, KEY_COMMA),
2799
2800 KEY(2, 0, KEY_6),
2801 KEY(2, 1, KEY_5),
2802 KEY(2, 2, KEY_8),
2803 KEY(2, 3, KEY_3),
2804 KEY(2, 4, KEY_NUMERIC_STAR),
2805 KEY(2, 5, KEY_UP),
2806 KEY(2, 6, KEY_DOWN),
2807 KEY(2, 7, KEY_LEFTSHIFT),
2808
2809 KEY(3, 0, KEY_9),
2810 KEY(3, 1, KEY_NUMERIC_POUND),
2811 KEY(3, 2, KEY_0),
2812 KEY(3, 3, KEY_2),
2813 KEY(3, 4, KEY_SLEEP),
2814 KEY(3, 5, KEY_F1),
2815 KEY(3, 6, KEY_F2),
2816 KEY(3, 7, KEY_F3),
2817
2818 KEY(4, 0, KEY_BACK),
2819 KEY(4, 1, KEY_HOME),
2820 KEY(4, 2, KEY_MENU),
2821 KEY(4, 3, KEY_VOLUMEUP),
2822 KEY(4, 4, KEY_VOLUMEDOWN),
2823 KEY(4, 5, KEY_F4),
2824 KEY(4, 6, KEY_F5),
2825 KEY(4, 7, KEY_F6),
2826
2827 KEY(5, 0, KEY_R),
2828 KEY(5, 1, KEY_T),
2829 KEY(5, 2, KEY_Y),
2830 KEY(5, 3, KEY_LEFTALT),
2831 KEY(5, 4, KEY_KPENTER),
2832 KEY(5, 5, KEY_Q),
2833 KEY(5, 6, KEY_W),
2834 KEY(5, 7, KEY_E),
2835
2836 KEY(6, 0, KEY_F),
2837 KEY(6, 1, KEY_G),
2838 KEY(6, 2, KEY_H),
2839 KEY(6, 3, KEY_CAPSLOCK),
2840 KEY(6, 4, KEY_PAGEUP),
2841 KEY(6, 5, KEY_A),
2842 KEY(6, 6, KEY_S),
2843 KEY(6, 7, KEY_D),
2844
2845 KEY(7, 0, KEY_V),
2846 KEY(7, 1, KEY_B),
2847 KEY(7, 2, KEY_N),
2848 KEY(7, 3, KEY_MENU),
2849 KEY(7, 4, KEY_PAGEDOWN),
2850 KEY(7, 5, KEY_Z),
2851 KEY(7, 6, KEY_X),
2852 KEY(7, 7, KEY_C),
2853
2854 KEY(8, 0, KEY_P),
2855 KEY(8, 1, KEY_J),
2856 KEY(8, 2, KEY_K),
2857 KEY(8, 3, KEY_INSERT),
2858 KEY(8, 4, KEY_LINEFEED),
2859 KEY(8, 5, KEY_U),
2860 KEY(8, 6, KEY_I),
2861 KEY(8, 7, KEY_O),
2862
2863 KEY(9, 0, KEY_4),
2864 KEY(9, 1, KEY_5),
2865 KEY(9, 2, KEY_6),
2866 KEY(9, 3, KEY_7),
2867 KEY(9, 4, KEY_8),
2868 KEY(9, 5, KEY_1),
2869 KEY(9, 6, KEY_2),
2870 KEY(9, 7, KEY_3),
2871
2872 KEY(10, 0, KEY_F7),
2873 KEY(10, 1, KEY_F8),
2874 KEY(10, 2, KEY_F9),
2875 KEY(10, 3, KEY_F10),
2876 KEY(10, 4, KEY_FN),
2877 KEY(10, 5, KEY_9),
2878 KEY(10, 6, KEY_0),
2879 KEY(10, 7, KEY_DOT),
2880
2881 KEY(11, 0, KEY_LEFTCTRL),
2882 KEY(11, 1, KEY_F11),
2883 KEY(11, 2, KEY_ENTER),
2884 KEY(11, 3, KEY_SEARCH),
2885 KEY(11, 4, KEY_DELETE),
2886 KEY(11, 5, KEY_RIGHT),
2887 KEY(11, 6, KEY_LEFT),
2888 KEY(11, 7, KEY_RIGHTSHIFT),
2889 KEY(0, 0, KEY_VOLUMEUP),
2890 KEY(0, 1, KEY_VOLUMEDOWN),
2891 KEY(0, 2, KEY_CAMERA_SNAPSHOT),
2892 KEY(0, 3, KEY_CAMERA_FOCUS),
2893};
2894
2895static struct matrix_keymap_data keymap_data_sim = {
2896 .keymap_size = ARRAY_SIZE(keymap_sim),
2897 .keymap = keymap_sim,
2898};
2899
2900static struct pm8xxx_keypad_platform_data keypad_data_sim = {
2901 .input_name = "keypad_8960",
2902 .input_phys_device = "keypad_8960/input0",
2903 .num_rows = 12,
2904 .num_cols = 8,
2905 .rows_gpio_start = PM8921_GPIO_PM_TO_SYS(9),
2906 .cols_gpio_start = PM8921_GPIO_PM_TO_SYS(1),
2907 .debounce_ms = 15,
2908 .scan_delay_ms = 32,
2909 .row_hold_ns = 91500,
2910 .wakeup = 1,
2911 .keymap_data = &keymap_data_sim,
2912};
2913
2914static struct pm8921_charger_platform_data pm8921_chg_pdata __devinitdata = {
2915 .safety_time = 180,
2916 .update_time = 1,
2917 .max_voltage = 4200,
2918 .min_voltage = 3200,
2919 .resume_voltage = 4100,
2920 .term_current = 100,
2921};
2922
2923static struct pm8xxx_misc_platform_data pm8xxx_misc_pdata = {
2924 .priority = 0,
2925};
2926
2927static struct pm8921_bms_platform_data pm8921_bms_pdata __devinitdata = {
2928 .r_sense = 10,
2929 .i_test = 2500,
2930 .v_failure = 3000,
2931 .calib_delay_ms = 600000,
2932 .batt_data = &palladium_1500_data,
2933};
2934
2935static struct led_info pm8921_led_info[] = {
2936 [0] = {
2937 .name = "led:drv1",
2938 .flags = PM8XXX_ID_LED_1,
2939 },
2940};
2941
2942static struct led_platform_data pm8xxx_leds_pdata = {
2943 .num_leds = ARRAY_SIZE(pm8921_led_info),
2944 .leds = pm8921_led_info,
2945};
2946
2947static struct pm8921_platform_data pm8921_platform_data __devinitdata = {
2948 .irq_pdata = &pm8xxx_irq_pdata,
2949 .gpio_pdata = &pm8xxx_gpio_pdata,
2950 .mpp_pdata = &pm8xxx_mpp_pdata,
2951 .rtc_pdata = &pm8xxx_rtc_pdata,
2952 .pwrkey_pdata = &pm8xxx_pwrkey_pdata,
2953 .keypad_pdata = &keypad_data,
2954 .misc_pdata = &pm8xxx_misc_pdata,
2955 .regulator_pdatas = msm_pm8921_regulator_pdata,
2956 .charger_pdata = &pm8921_chg_pdata,
2957 .bms_pdata = &pm8921_bms_pdata,
2958 .adc_pdata = &pm8921_adc_pdata,
2959 .leds_pdata = &pm8xxx_leds_pdata,
2960};
2961
2962static struct msm_ssbi_platform_data msm8960_ssbi_pm8921_pdata __devinitdata = {
2963 .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
2964 .slave = {
2965 .name = "pm8921-core",
2966 .platform_data = &pm8921_platform_data,
2967 },
2968};
2969
2970static void msm8960_wcnss_init(void)
2971{
2972 int i, ret, j;
2973
2974 for (i = 0; i < ARRAY_SIZE(wcnss_5wire_interface); i++) {
2975 ret = gpio_request(wcnss_5wire_interface[i].gpio,
2976 "wcnss_5_wire");
2977 if (ret) {
2978 pr_err("wcnss_5_wire gpio %d failed: %d\n",
2979 wcnss_5wire_interface[i].gpio, ret);
2980 goto fail;
2981 }
2982 }
2983
2984 pr_info("%s: Iris 5-wire gpios configured\n", __func__);
2985
2986 return;
2987
2988fail:
2989 for (j = 0; j < i; j++)
2990 gpio_free(wcnss_5wire_interface[j].gpio);
2991}
2992
2993static int ethernet_init(void)
2994{
2995 int ret;
2996 ret = gpio_request(KS8851_IRQ_GPIO, "ks8851_irq");
2997 if (ret) {
2998 pr_err("ks8851 gpio_request failed: %d\n", ret);
2999 goto fail;
3000 }
3001
3002 ret = gpio_request(KS8851_RST_GPIO, "ks8851_rst");
3003 if (ret) {
3004 pr_err("ks8851 gpio_request failed: %d\n", ret);
3005 goto fail_rst;
3006 }
3007
3008 ret = gpio_request(FPGA_CS_GPIO, "fpga_cs");
3009 if (ret) {
3010 pr_err("ks8851 gpio_request failed: %d\n", ret);
3011 goto fail_cs;
3012 }
3013
3014 gpio_direction_output(FPGA_CS_GPIO, 1);
3015 gpio_direction_output(KS8851_RST_GPIO, 1);
3016 return 0;
3017fail_cs:
3018 gpio_free(KS8851_RST_GPIO);
3019fail_rst:
3020 gpio_free(KS8851_IRQ_GPIO);
3021fail:
3022 return ret;
3023}
3024
3025static struct msm_cpuidle_state msm_cstates[] __initdata = {
3026 {0, 0, "C0", "WFI",
3027 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
3028
3029 {0, 1, "C1", "STANDALONE_POWER_COLLAPSE",
3030 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
3031
3032 {0, 2, "C2", "POWER_COLLAPSE",
3033 MSM_PM_SLEEP_MODE_POWER_COLLAPSE},
3034
3035 {1, 0, "C0", "WFI",
3036 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
3037
3038 {1, 1, "C1", "STANDALONE_POWER_COLLAPSE",
3039 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
3040};
3041
3042static struct msm_pm_platform_data msm_pm_data[MSM_PM_SLEEP_MODE_NR * 2] = {
3043 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
3044 .idle_supported = 1,
3045 .suspend_supported = 1,
3046 .idle_enabled = 0,
3047 .suspend_enabled = 0,
3048 .latency = 4000,
3049 .residency = 13000,
3050 },
3051
3052 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
3053 .idle_supported = 1,
3054 .suspend_supported = 1,
3055 .idle_enabled = 0,
3056 .suspend_enabled = 0,
3057 .latency = 500,
3058 .residency = 6000,
3059 },
3060
3061 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
3062 .idle_supported = 1,
3063 .suspend_supported = 1,
3064 .idle_enabled = 1,
3065 .suspend_enabled = 1,
3066 .latency = 2,
3067 .residency = 0,
3068 },
3069
3070 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
3071 .idle_supported = 0,
3072 .suspend_supported = 1,
3073 .idle_enabled = 0,
3074 .suspend_enabled = 0,
3075 .latency = 600,
3076 .residency = 7200,
3077 },
3078
3079 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
3080 .idle_supported = 1,
3081 .suspend_supported = 1,
3082 .idle_enabled = 0,
3083 .suspend_enabled = 0,
3084 .latency = 500,
3085 .residency = 6000,
3086 },
3087
3088 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
3089 .idle_supported = 1,
3090 .suspend_supported = 0,
3091 .idle_enabled = 1,
3092 .suspend_enabled = 0,
3093 .latency = 2,
3094 .residency = 0,
3095 },
3096};
3097
3098static struct msm_rpmrs_level msm_rpmrs_levels[] __initdata = {
3099 {
3100 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT,
3101 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
3102 true,
3103 1, 8000, 100000, 1,
3104 },
3105
3106 {
3107 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE,
3108 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
3109 true,
3110 1500, 5000, 60100000, 3000,
3111 },
3112
3113 {
3114 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
3115 MSM_RPMRS_LIMITS(ON, GDHS, MAX, ACTIVE),
3116 false,
3117 1800, 5000, 60350000, 3500,
3118 },
3119
3120 {
3121 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
3122 MSM_RPMRS_LIMITS(ON, HSFS_OPEN, MAX, ACTIVE),
3123 false,
3124 2800, 2500, 65350000, 4800,
3125 },
3126
3127 {
3128 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
3129 MSM_RPMRS_LIMITS(OFF, GDHS, MAX, ACTIVE),
3130 false,
3131 3800, 4500, 67850000, 5500,
3132 },
3133
3134 {
3135 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
3136 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, MAX, ACTIVE),
3137 false,
3138 4800, 2000, 71850000, 6800,
3139 },
3140
3141 {
3142 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
3143 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, ACTIVE, RET_HIGH),
3144 false,
3145 6800, 500, 75850000, 8800,
3146 },
3147
3148 {
3149 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
3150 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, RET_HIGH, RET_LOW),
3151 false,
3152 7800, 0, 76350000, 9800,
3153 },
3154};
3155
3156#ifdef CONFIG_I2C
3157#define I2C_SURF 1
3158#define I2C_FFA (1 << 1)
3159#define I2C_RUMI (1 << 2)
3160#define I2C_SIM (1 << 3)
3161#define I2C_FLUID (1 << 4)
3162#define MSM_8960_GSBI4_QUP_I2C_BUS_ID 4
3163#define MSM_8960_GSBI3_QUP_I2C_BUS_ID 3
3164
3165struct i2c_registry {
3166 u8 machs;
3167 int bus;
3168 struct i2c_board_info *info;
3169 int len;
3170};
3171
3172#ifdef CONFIG_MSM_CAMERA
3173static struct i2c_board_info msm_camera_boardinfo[] __initdata = {
3174#ifdef CONFIG_IMX074
3175 {
3176 I2C_BOARD_INFO("imx074", 0x1A),
3177 },
3178#endif
3179#ifdef CONFIG_OV2720
3180 {
3181 I2C_BOARD_INFO("ov2720", 0x6C),
3182 },
3183#endif
Kevin Chandfecce22011-07-13 10:52:41 -07003184 {
3185 I2C_BOARD_INFO("qs_mt9p017", 0x6C >> 1),
3186 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003187};
3188#endif
3189
3190/* Sensors DSPS platform data */
3191#ifdef CONFIG_MSM_DSPS
3192#define DSPS_PIL_GENERIC_NAME "dsps"
3193#endif /* CONFIG_MSM_DSPS */
3194
3195static void __init msm8960_init_dsps(void)
3196{
3197#ifdef CONFIG_MSM_DSPS
3198 struct msm_dsps_platform_data *pdata =
3199 msm_dsps_device.dev.platform_data;
3200 pdata->pil_name = DSPS_PIL_GENERIC_NAME;
3201 pdata->gpios = NULL;
3202 pdata->gpios_num = 0;
3203
3204 platform_device_register(&msm_dsps_device);
3205#endif /* CONFIG_MSM_DSPS */
3206}
3207
3208static struct i2c_registry msm8960_i2c_devices[] __initdata = {
3209#ifdef CONFIG_MSM_CAMERA
3210 {
3211 I2C_SURF | I2C_FFA | I2C_FLUID | I2C_RUMI,
3212 MSM_8960_GSBI4_QUP_I2C_BUS_ID,
3213 msm_camera_boardinfo,
3214 ARRAY_SIZE(msm_camera_boardinfo),
3215 },
3216#endif
3217 {
3218 I2C_SURF | I2C_FFA | I2C_FLUID,
3219 MSM_8960_GSBI3_QUP_I2C_BUS_ID,
3220 cyttsp_info,
3221 ARRAY_SIZE(cyttsp_info),
3222 }
3223};
3224#endif /* CONFIG_I2C */
3225
3226static void __init register_i2c_devices(void)
3227{
3228#ifdef CONFIG_I2C
3229 u8 mach_mask = 0;
3230 int i;
3231
3232 /* Build the matching 'supported_machs' bitmask */
3233 if (machine_is_msm8960_cdp())
3234 mach_mask = I2C_SURF;
3235 else if (machine_is_msm8960_rumi3())
3236 mach_mask = I2C_RUMI;
3237 else if (machine_is_msm8960_sim())
3238 mach_mask = I2C_SIM;
3239 else
3240 pr_err("unmatched machine ID in register_i2c_devices\n");
3241
3242 /* Run the array and install devices as appropriate */
3243 for (i = 0; i < ARRAY_SIZE(msm8960_i2c_devices); ++i) {
3244 if (msm8960_i2c_devices[i].machs & mach_mask)
3245 i2c_register_board_info(msm8960_i2c_devices[i].bus,
3246 msm8960_i2c_devices[i].info,
3247 msm8960_i2c_devices[i].len);
3248 }
3249#endif
3250}
3251
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08003252static void __init msm8960_sim_init(void)
3253{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003254 if (socinfo_init() < 0)
3255 pr_err("socinfo_init() failed!\n");
3256
3257 BUG_ON(msm_rpm_init(&msm_rpm_data));
3258 BUG_ON(msm_rpmrs_levels_init(msm_rpmrs_levels,
3259 ARRAY_SIZE(msm_rpmrs_levels)));
3260 regulator_suppress_info_printing();
3261 msm8960_clock_init();
3262 msm8960_device_ssbi_pm8921.dev.platform_data =
3263 &msm8960_ssbi_pm8921_pdata;
3264 pm8921_platform_data.num_regulators = msm_pm8921_regulator_pdata_len;
3265 msm8960_device_qup_spi_gsbi1.dev.platform_data =
3266 &msm8960_qup_spi_gsbi1_pdata;
3267
3268 /* Simulator supports a QWERTY keypad */
3269 pm8921_platform_data.keypad_pdata = &keypad_data_sim;
3270
3271 msm_device_otg.dev.platform_data = &msm_otg_pdata;
3272 msm_device_gadget_peripheral.dev.parent = &msm_device_otg.dev;
3273 msm_device_hsusb_host.dev.parent = &msm_device_otg.dev;
3274 gpiomux_init();
3275 ethernet_init();
3276 msm8960_i2c_init();
3277 msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
3278 msm_spm_l2_init(msm_spm_l2_data);
3279 msm8960_init_buses();
3280 platform_add_devices(common_devices, ARRAY_SIZE(common_devices));
3281 pm8921_gpio_mpp_init();
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08003282 platform_add_devices(sim_devices, ARRAY_SIZE(sim_devices));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003283 msm_acpu_clock_init(&msm8960_acpu_clock_data);
3284
3285 msm8960_device_qup_spi_gsbi1.dev.platform_data =
3286 &msm8960_qup_spi_gsbi1_pdata;
3287 spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
3288
3289 msm8960_init_mmc();
3290 msm_fb_add_devices();
3291 slim_register_board_info(msm_slim_devices,
3292 ARRAY_SIZE(msm_slim_devices));
3293 msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
3294 msm_pm_set_rpm_wakeup_irq(RPM_APCC_CPU0_WAKE_UP_IRQ);
3295 msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
3296 msm_pm_data);
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08003297}
3298
3299static void __init msm8960_rumi3_init(void)
3300{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003301 if (socinfo_init() < 0)
3302 pr_err("socinfo_init() failed!\n");
3303
3304 BUG_ON(msm_rpm_init(&msm_rpm_data));
3305 BUG_ON(msm_rpmrs_levels_init(msm_rpmrs_levels,
3306 ARRAY_SIZE(msm_rpmrs_levels)));
3307 regulator_suppress_info_printing();
3308 msm8960_clock_init_dummy();
3309 gpiomux_init();
3310 ethernet_init();
3311 msm8960_device_ssbi_pm8921.dev.platform_data =
3312 &msm8960_ssbi_pm8921_pdata;
3313 pm8921_platform_data.num_regulators = msm_pm8921_regulator_pdata_len;
3314 msm8960_device_qup_spi_gsbi1.dev.platform_data =
3315 &msm8960_qup_spi_gsbi1_pdata;
3316 spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
3317 msm8960_i2c_init();
3318 msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
3319 msm_spm_l2_init(msm_spm_l2_data);
3320 platform_add_devices(common_devices, ARRAY_SIZE(common_devices));
3321 pm8921_gpio_mpp_init();
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08003322 platform_add_devices(rumi3_devices, ARRAY_SIZE(rumi3_devices));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003323 msm8960_init_mmc();
3324
3325 register_i2c_devices();
3326 msm_fb_add_devices();
3327 slim_register_board_info(msm_slim_devices,
3328 ARRAY_SIZE(msm_slim_devices));
3329 msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
3330 msm_pm_set_rpm_wakeup_irq(RPM_APCC_CPU0_WAKE_UP_IRQ);
3331 msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
3332 msm_pm_data);
3333}
3334
3335static void __init msm8960_cdp_init(void)
3336{
3337 if (socinfo_init() < 0)
3338 pr_err("socinfo_init() failed!\n");
3339
3340 BUG_ON(msm_rpm_init(&msm_rpm_data));
3341 BUG_ON(msm_rpmrs_levels_init(msm_rpmrs_levels,
3342 ARRAY_SIZE(msm_rpmrs_levels)));
3343 regulator_suppress_info_printing();
3344 if (msm_xo_init())
3345 pr_err("Failed to initialize XO votes\n");
3346 msm8960_clock_init();
3347 msm_device_otg.dev.platform_data = &msm_otg_pdata;
3348 msm_device_gadget_peripheral.dev.parent = &msm_device_otg.dev;
3349 msm_device_hsusb_host.dev.parent = &msm_device_otg.dev;
3350 gpiomux_init();
3351 ethernet_init();
3352 msm8960_device_qup_spi_gsbi1.dev.platform_data =
3353 &msm8960_qup_spi_gsbi1_pdata;
3354 spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
3355 msm8960_device_ssbi_pm8921.dev.platform_data =
3356 &msm8960_ssbi_pm8921_pdata;
3357 pm8921_platform_data.num_regulators = msm_pm8921_regulator_pdata_len;
3358 msm8960_i2c_init();
3359 msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
3360 msm_spm_l2_init(msm_spm_l2_data);
3361 msm8960_init_buses();
3362 platform_add_devices(msm_footswitch_devices,
3363 msm_num_footswitch_devices);
3364 platform_add_devices(common_devices, ARRAY_SIZE(common_devices));
3365 pm8921_gpio_mpp_init();
3366 platform_add_devices(cdp_devices, ARRAY_SIZE(cdp_devices));
3367 msm8960_init_cam();
3368 msm8960_init_mmc();
3369 msm_acpu_clock_init(&msm8960_acpu_clock_data);
3370 register_i2c_devices();
3371 msm8960_wcnss_init();
3372 msm_fb_add_devices();
3373 slim_register_board_info(msm_slim_devices,
3374 ARRAY_SIZE(msm_slim_devices));
3375 msm8960_init_dsps();
3376 msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
3377 msm_pm_set_rpm_wakeup_irq(RPM_APCC_CPU0_WAKE_UP_IRQ);
3378 msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
3379 msm_pm_data);
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08003380}
3381
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08003382MACHINE_START(MSM8960_SIM, "QCT MSM8960 SIMULATOR")
3383 .map_io = msm8960_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003384 .reserve = msm8960_reserve,
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08003385 .init_irq = msm8960_init_irq,
3386 .timer = &msm_timer,
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08003387 .init_machine = msm8960_sim_init,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003388 .init_early = msm8960_allocate_memory_regions,
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08003389MACHINE_END
Stepan Moskovchenko50ede4e2010-12-13 18:12:19 -08003390
3391MACHINE_START(MSM8960_RUMI3, "QCT MSM8960 RUMI3")
3392 .map_io = msm8960_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003393 .reserve = msm8960_reserve,
Stepan Moskovchenko50ede4e2010-12-13 18:12:19 -08003394 .init_irq = msm8960_init_irq,
3395 .timer = &msm_timer,
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08003396 .init_machine = msm8960_rumi3_init,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003397 .init_early = msm8960_allocate_memory_regions,
Stepan Moskovchenko50ede4e2010-12-13 18:12:19 -08003398MACHINE_END
3399
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003400MACHINE_START(MSM8960_CDP, "QCT MSM8960 CDP")
3401 .map_io = msm8960_map_io,
3402 .reserve = msm8960_reserve,
3403 .init_irq = msm8960_init_irq,
3404 .timer = &msm_timer,
3405 .init_machine = msm8960_cdp_init,
3406 .init_early = msm8960_allocate_memory_regions,
3407MACHINE_END
3408
3409MACHINE_START(MSM8960_MTP, "QCT MSM8960 MTP")
3410 .map_io = msm8960_map_io,
3411 .reserve = msm8960_reserve,
3412 .init_irq = msm8960_init_irq,
3413 .timer = &msm_timer,
3414 .init_machine = msm8960_cdp_init,
3415 .init_early = msm8960_allocate_memory_regions,
3416MACHINE_END
3417
3418MACHINE_START(MSM8960_FLUID, "QCT MSM8960 FLUID")
3419 .map_io = msm8960_map_io,
3420 .reserve = msm8960_reserve,
3421 .init_irq = msm8960_init_irq,
3422 .timer = &msm_timer,
3423 .init_machine = msm8960_cdp_init,
3424 .init_early = msm8960_allocate_memory_regions,
3425MACHINE_END