Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/drivers/ide/pci/sl82c105.c |
| 3 | * |
| 4 | * SL82C105/Winbond 553 IDE driver |
| 5 | * |
| 6 | * Maintainer unknown. |
| 7 | * |
| 8 | * Drive tuning added from Rebel.com's kernel sources |
| 9 | * -- Russell King (15/11/98) linux@arm.linux.org.uk |
| 10 | * |
| 11 | * Merge in Russell's HW workarounds, fix various problems |
| 12 | * with the timing registers setup. |
| 13 | * -- Benjamin Herrenschmidt (01/11/03) benh@kernel.crashing.org |
Sergei Shtylyov | e93df70 | 2007-05-05 22:03:49 +0200 | [diff] [blame] | 14 | * |
| 15 | * Copyright (C) 2006-2007 MontaVista Software, Inc. <source@mvista.com> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 16 | */ |
| 17 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 18 | #include <linux/types.h> |
| 19 | #include <linux/module.h> |
| 20 | #include <linux/kernel.h> |
| 21 | #include <linux/timer.h> |
| 22 | #include <linux/mm.h> |
| 23 | #include <linux/ioport.h> |
| 24 | #include <linux/interrupt.h> |
| 25 | #include <linux/blkdev.h> |
| 26 | #include <linux/hdreg.h> |
| 27 | #include <linux/pci.h> |
| 28 | #include <linux/ide.h> |
| 29 | |
| 30 | #include <asm/io.h> |
| 31 | #include <asm/dma.h> |
| 32 | |
| 33 | #undef DEBUG |
| 34 | |
| 35 | #ifdef DEBUG |
| 36 | #define DBG(arg) printk arg |
| 37 | #else |
| 38 | #define DBG(fmt,...) |
| 39 | #endif |
| 40 | /* |
| 41 | * SL82C105 PCI config register 0x40 bits. |
| 42 | */ |
| 43 | #define CTRL_IDE_IRQB (1 << 30) |
| 44 | #define CTRL_IDE_IRQA (1 << 28) |
| 45 | #define CTRL_LEGIRQ (1 << 11) |
| 46 | #define CTRL_P1F16 (1 << 5) |
| 47 | #define CTRL_P1EN (1 << 4) |
| 48 | #define CTRL_P0F16 (1 << 1) |
| 49 | #define CTRL_P0EN (1 << 0) |
| 50 | |
| 51 | /* |
Sergei Shtylyov | e93df70 | 2007-05-05 22:03:49 +0200 | [diff] [blame] | 52 | * Convert a PIO mode and cycle time to the required on/off times |
| 53 | * for the interface. This has protection against runaway timings. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 54 | */ |
Bartlomiej Zolnierkiewicz | 7dd0008 | 2007-07-20 01:11:56 +0200 | [diff] [blame] | 55 | static unsigned int get_pio_timings(ide_drive_t *drive, u8 pio) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 56 | { |
Sergei Shtylyov | e93df70 | 2007-05-05 22:03:49 +0200 | [diff] [blame] | 57 | unsigned int cmd_on, cmd_off; |
Bartlomiej Zolnierkiewicz | 2229833 | 2007-07-20 01:11:55 +0200 | [diff] [blame] | 58 | u8 iordy = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 59 | |
Bartlomiej Zolnierkiewicz | 7dd0008 | 2007-07-20 01:11:56 +0200 | [diff] [blame] | 60 | cmd_on = (ide_pio_timings[pio].active_time + 29) / 30; |
| 61 | cmd_off = (ide_pio_cycle_time(drive, pio) - 30 * cmd_on + 29) / 30; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 62 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 63 | if (cmd_on == 0) |
| 64 | cmd_on = 1; |
| 65 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 66 | if (cmd_off == 0) |
| 67 | cmd_off = 1; |
| 68 | |
Bartlomiej Zolnierkiewicz | 7dd0008 | 2007-07-20 01:11:56 +0200 | [diff] [blame] | 69 | if (pio > 2 || ide_dev_has_iordy(drive->id)) |
Bartlomiej Zolnierkiewicz | 2229833 | 2007-07-20 01:11:55 +0200 | [diff] [blame] | 70 | iordy = 0x40; |
| 71 | |
| 72 | return (cmd_on - 1) << 8 | (cmd_off - 1) | iordy; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 73 | } |
| 74 | |
| 75 | /* |
Sergei Shtylyov | e93df70 | 2007-05-05 22:03:49 +0200 | [diff] [blame] | 76 | * Configure the chipset for PIO mode. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 77 | */ |
Bartlomiej Zolnierkiewicz | 88b2b32 | 2007-10-13 17:47:51 +0200 | [diff] [blame^] | 78 | static void sl82c105_set_pio_mode(ide_drive_t *drive, const u8 pio) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 79 | { |
Sergei Shtylyov | e93df70 | 2007-05-05 22:03:49 +0200 | [diff] [blame] | 80 | struct pci_dev *dev = HWIF(drive)->pci_dev; |
| 81 | int reg = 0x44 + drive->dn * 4; |
Sergei Shtylyov | e93df70 | 2007-05-05 22:03:49 +0200 | [diff] [blame] | 82 | u16 drv_ctrl; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 83 | |
Bartlomiej Zolnierkiewicz | 7dd0008 | 2007-07-20 01:11:56 +0200 | [diff] [blame] | 84 | drv_ctrl = get_pio_timings(drive, pio); |
Sergei Shtylyov | 46cedc9 | 2007-05-16 00:51:44 +0200 | [diff] [blame] | 85 | |
| 86 | /* |
| 87 | * Store the PIO timings so that we can restore them |
| 88 | * in case DMA will be turned off... |
| 89 | */ |
| 90 | drive->drive_data &= 0xffff0000; |
| 91 | drive->drive_data |= drv_ctrl; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 92 | |
Sergei Shtylyov | e93df70 | 2007-05-05 22:03:49 +0200 | [diff] [blame] | 93 | if (!drive->using_dma) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 94 | /* |
| 95 | * If we are actually using MW DMA, then we can not |
| 96 | * reprogram the interface drive control register. |
| 97 | */ |
Sergei Shtylyov | e93df70 | 2007-05-05 22:03:49 +0200 | [diff] [blame] | 98 | pci_write_config_word(dev, reg, drv_ctrl); |
| 99 | pci_read_config_word (dev, reg, &drv_ctrl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 100 | } |
Sergei Shtylyov | e93df70 | 2007-05-05 22:03:49 +0200 | [diff] [blame] | 101 | |
| 102 | printk(KERN_DEBUG "%s: selected %s (%dns) (%04X)\n", drive->name, |
Bartlomiej Zolnierkiewicz | 7dd0008 | 2007-07-20 01:11:56 +0200 | [diff] [blame] | 103 | ide_xfer_verbose(pio + XFER_PIO_0), |
| 104 | ide_pio_cycle_time(drive, pio), drv_ctrl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 105 | } |
| 106 | |
| 107 | /* |
Bartlomiej Zolnierkiewicz | 88b2b32 | 2007-10-13 17:47:51 +0200 | [diff] [blame^] | 108 | * Configure the chipset for DMA mode. |
Sergei Shtylyov | 46cedc9 | 2007-05-16 00:51:44 +0200 | [diff] [blame] | 109 | */ |
Bartlomiej Zolnierkiewicz | 88b2b32 | 2007-10-13 17:47:51 +0200 | [diff] [blame^] | 110 | static void sl82c105_set_dma_mode(ide_drive_t *drive, const u8 speed) |
Sergei Shtylyov | 46cedc9 | 2007-05-16 00:51:44 +0200 | [diff] [blame] | 111 | { |
| 112 | static u16 mwdma_timings[] = {0x0707, 0x0201, 0x0200}; |
| 113 | u16 drv_ctrl; |
| 114 | |
| 115 | DBG(("sl82c105_tune_chipset(drive:%s, speed:%s)\n", |
| 116 | drive->name, ide_xfer_verbose(speed))); |
| 117 | |
Sergei Shtylyov | 46cedc9 | 2007-05-16 00:51:44 +0200 | [diff] [blame] | 118 | switch (speed) { |
| 119 | case XFER_MW_DMA_2: |
| 120 | case XFER_MW_DMA_1: |
| 121 | case XFER_MW_DMA_0: |
| 122 | drv_ctrl = mwdma_timings[speed - XFER_MW_DMA_0]; |
| 123 | |
| 124 | /* |
| 125 | * Store the DMA timings so that we can actually program |
| 126 | * them when DMA will be turned on... |
| 127 | */ |
| 128 | drive->drive_data &= 0x0000ffff; |
| 129 | drive->drive_data |= (unsigned long)drv_ctrl << 16; |
| 130 | |
| 131 | /* |
| 132 | * If we are already using DMA, we just reprogram |
| 133 | * the drive control register. |
| 134 | */ |
| 135 | if (drive->using_dma) { |
| 136 | struct pci_dev *dev = HWIF(drive)->pci_dev; |
| 137 | int reg = 0x44 + drive->dn * 4; |
| 138 | |
| 139 | pci_write_config_word(dev, reg, drv_ctrl); |
| 140 | } |
| 141 | break; |
Sergei Shtylyov | 46cedc9 | 2007-05-16 00:51:44 +0200 | [diff] [blame] | 142 | default: |
Bartlomiej Zolnierkiewicz | 88b2b32 | 2007-10-13 17:47:51 +0200 | [diff] [blame^] | 143 | return; |
Sergei Shtylyov | 46cedc9 | 2007-05-16 00:51:44 +0200 | [diff] [blame] | 144 | } |
Sergei Shtylyov | 46cedc9 | 2007-05-16 00:51:44 +0200 | [diff] [blame] | 145 | } |
| 146 | |
| 147 | /* |
Sergei Shtylyov | 688a87d | 2007-05-05 22:03:49 +0200 | [diff] [blame] | 148 | * Check to see if the drive and chipset are capable of DMA mode. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 149 | */ |
Sergei Shtylyov | 688a87d | 2007-05-05 22:03:49 +0200 | [diff] [blame] | 150 | static int sl82c105_ide_dma_check(ide_drive_t *drive) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 151 | { |
Sergei Shtylyov | 688a87d | 2007-05-05 22:03:49 +0200 | [diff] [blame] | 152 | DBG(("sl82c105_ide_dma_check(drive:%s)\n", drive->name)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 153 | |
Bartlomiej Zolnierkiewicz | 4728d54 | 2007-05-16 00:51:46 +0200 | [diff] [blame] | 154 | if (ide_tune_dma(drive)) |
Sergei Shtylyov | 688a87d | 2007-05-05 22:03:49 +0200 | [diff] [blame] | 155 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 156 | |
Bartlomiej Zolnierkiewicz | 3608b5d | 2007-02-17 02:40:26 +0100 | [diff] [blame] | 157 | return -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 158 | } |
| 159 | |
| 160 | /* |
| 161 | * The SL82C105 holds off all IDE interrupts while in DMA mode until |
| 162 | * all DMA activity is completed. Sometimes this causes problems (eg, |
| 163 | * when the drive wants to report an error condition). |
| 164 | * |
| 165 | * 0x7e is a "chip testing" register. Bit 2 resets the DMA controller |
| 166 | * state machine. We need to kick this to work around various bugs. |
| 167 | */ |
| 168 | static inline void sl82c105_reset_host(struct pci_dev *dev) |
| 169 | { |
| 170 | u16 val; |
| 171 | |
| 172 | pci_read_config_word(dev, 0x7e, &val); |
| 173 | pci_write_config_word(dev, 0x7e, val | (1 << 2)); |
| 174 | pci_write_config_word(dev, 0x7e, val & ~(1 << 2)); |
| 175 | } |
| 176 | |
| 177 | /* |
| 178 | * If we get an IRQ timeout, it might be that the DMA state machine |
| 179 | * got confused. Fix from Todd Inglett. Details from Winbond. |
| 180 | * |
| 181 | * This function is called when the IDE timer expires, the drive |
| 182 | * indicates that it is READY, and we were waiting for DMA to complete. |
| 183 | */ |
Sergei Shtylyov | 841d2a9 | 2007-07-09 23:17:54 +0200 | [diff] [blame] | 184 | static void sl82c105_dma_lost_irq(ide_drive_t *drive) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 185 | { |
Sergei Shtylyov | 688a87d | 2007-05-05 22:03:49 +0200 | [diff] [blame] | 186 | ide_hwif_t *hwif = HWIF(drive); |
| 187 | struct pci_dev *dev = hwif->pci_dev; |
| 188 | u32 val, mask = hwif->channel ? CTRL_IDE_IRQB : CTRL_IDE_IRQA; |
| 189 | u8 dma_cmd; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 190 | |
Sergei Shtylyov | 688a87d | 2007-05-05 22:03:49 +0200 | [diff] [blame] | 191 | printk("sl82c105: lost IRQ, resetting host\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 192 | |
| 193 | /* |
| 194 | * Check the raw interrupt from the drive. |
| 195 | */ |
| 196 | pci_read_config_dword(dev, 0x40, &val); |
| 197 | if (val & mask) |
| 198 | printk("sl82c105: drive was requesting IRQ, but host lost it\n"); |
| 199 | |
| 200 | /* |
| 201 | * Was DMA enabled? If so, disable it - we're resetting the |
| 202 | * host. The IDE layer will be handling the drive for us. |
| 203 | */ |
Sergei Shtylyov | 688a87d | 2007-05-05 22:03:49 +0200 | [diff] [blame] | 204 | dma_cmd = inb(hwif->dma_command); |
| 205 | if (dma_cmd & 1) { |
| 206 | outb(dma_cmd & ~1, hwif->dma_command); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 207 | printk("sl82c105: DMA was enabled\n"); |
| 208 | } |
| 209 | |
| 210 | sl82c105_reset_host(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 211 | } |
| 212 | |
| 213 | /* |
| 214 | * ATAPI devices can cause the SL82C105 DMA state machine to go gaga. |
| 215 | * Winbond recommend that the DMA state machine is reset prior to |
| 216 | * setting the bus master DMA enable bit. |
| 217 | * |
| 218 | * The generic IDE core will have disabled the BMEN bit before this |
| 219 | * function is called. |
| 220 | */ |
Sergei Shtylyov | 688a87d | 2007-05-05 22:03:49 +0200 | [diff] [blame] | 221 | static void sl82c105_dma_start(ide_drive_t *drive) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 222 | { |
Sergei Shtylyov | 688a87d | 2007-05-05 22:03:49 +0200 | [diff] [blame] | 223 | ide_hwif_t *hwif = HWIF(drive); |
| 224 | struct pci_dev *dev = hwif->pci_dev; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 225 | |
| 226 | sl82c105_reset_host(dev); |
| 227 | ide_dma_start(drive); |
| 228 | } |
| 229 | |
Sergei Shtylyov | c283f5d | 2007-07-09 23:17:54 +0200 | [diff] [blame] | 230 | static void sl82c105_dma_timeout(ide_drive_t *drive) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 231 | { |
Sergei Shtylyov | c283f5d | 2007-07-09 23:17:54 +0200 | [diff] [blame] | 232 | DBG(("sl82c105_dma_timeout(drive:%s)\n", drive->name)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 233 | |
Sergei Shtylyov | c283f5d | 2007-07-09 23:17:54 +0200 | [diff] [blame] | 234 | sl82c105_reset_host(HWIF(drive)->pci_dev); |
| 235 | ide_dma_timeout(drive); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 236 | } |
| 237 | |
Sergei Shtylyov | 688a87d | 2007-05-05 22:03:49 +0200 | [diff] [blame] | 238 | static int sl82c105_ide_dma_on(ide_drive_t *drive) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 239 | { |
Sergei Shtylyov | 688a87d | 2007-05-05 22:03:49 +0200 | [diff] [blame] | 240 | struct pci_dev *dev = HWIF(drive)->pci_dev; |
| 241 | int rc, reg = 0x44 + drive->dn * 4; |
| 242 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 243 | DBG(("sl82c105_ide_dma_on(drive:%s)\n", drive->name)); |
| 244 | |
Sergei Shtylyov | 688a87d | 2007-05-05 22:03:49 +0200 | [diff] [blame] | 245 | rc = __ide_dma_on(drive); |
| 246 | if (rc == 0) { |
Sergei Shtylyov | 46cedc9 | 2007-05-16 00:51:44 +0200 | [diff] [blame] | 247 | pci_write_config_word(dev, reg, drive->drive_data >> 16); |
Sergei Shtylyov | 688a87d | 2007-05-05 22:03:49 +0200 | [diff] [blame] | 248 | |
| 249 | printk(KERN_INFO "%s: DMA enabled\n", drive->name); |
| 250 | } |
| 251 | return rc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 252 | } |
| 253 | |
Bartlomiej Zolnierkiewicz | 7469aaf | 2007-02-17 02:40:26 +0100 | [diff] [blame] | 254 | static void sl82c105_dma_off_quietly(ide_drive_t *drive) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 255 | { |
Sergei Shtylyov | e93df70 | 2007-05-05 22:03:49 +0200 | [diff] [blame] | 256 | struct pci_dev *dev = HWIF(drive)->pci_dev; |
| 257 | int reg = 0x44 + drive->dn * 4; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 258 | |
Bartlomiej Zolnierkiewicz | 7469aaf | 2007-02-17 02:40:26 +0100 | [diff] [blame] | 259 | DBG(("sl82c105_dma_off_quietly(drive:%s)\n", drive->name)); |
| 260 | |
Sergei Shtylyov | e93df70 | 2007-05-05 22:03:49 +0200 | [diff] [blame] | 261 | pci_write_config_word(dev, reg, drive->drive_data); |
| 262 | |
Bartlomiej Zolnierkiewicz | 7469aaf | 2007-02-17 02:40:26 +0100 | [diff] [blame] | 263 | ide_dma_off_quietly(drive); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 264 | } |
| 265 | |
| 266 | /* |
| 267 | * Ok, that is nasty, but we must make sure the DMA timings |
| 268 | * won't be used for a PIO access. The solution here is |
| 269 | * to make sure the 16 bits mode is diabled on the channel |
| 270 | * when DMA is enabled, thus causing the chip to use PIO0 |
| 271 | * timings for those operations. |
| 272 | */ |
| 273 | static void sl82c105_selectproc(ide_drive_t *drive) |
| 274 | { |
Sergei Shtylyov | 688a87d | 2007-05-05 22:03:49 +0200 | [diff] [blame] | 275 | ide_hwif_t *hwif = HWIF(drive); |
| 276 | struct pci_dev *dev = hwif->pci_dev; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 277 | u32 val, old, mask; |
| 278 | |
| 279 | //DBG(("sl82c105_selectproc(drive:%s)\n", drive->name)); |
| 280 | |
| 281 | mask = hwif->channel ? CTRL_P1F16 : CTRL_P0F16; |
Sergei Shtylyov | dd607d2 | 2006-12-08 02:40:01 -0800 | [diff] [blame] | 282 | old = val = (u32)pci_get_drvdata(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 283 | if (drive->using_dma) |
| 284 | val &= ~mask; |
| 285 | else |
| 286 | val |= mask; |
| 287 | if (old != val) { |
| 288 | pci_write_config_dword(dev, 0x40, val); |
Sergei Shtylyov | dd607d2 | 2006-12-08 02:40:01 -0800 | [diff] [blame] | 289 | pci_set_drvdata(dev, (void *)val); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 290 | } |
| 291 | } |
| 292 | |
| 293 | /* |
| 294 | * ATA reset will clear the 16 bits mode in the control |
| 295 | * register, we need to update our cache |
| 296 | */ |
| 297 | static void sl82c105_resetproc(ide_drive_t *drive) |
| 298 | { |
Sergei Shtylyov | dd607d2 | 2006-12-08 02:40:01 -0800 | [diff] [blame] | 299 | struct pci_dev *dev = HWIF(drive)->pci_dev; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 300 | u32 val; |
| 301 | |
| 302 | DBG(("sl82c105_resetproc(drive:%s)\n", drive->name)); |
| 303 | |
| 304 | pci_read_config_dword(dev, 0x40, &val); |
Sergei Shtylyov | dd607d2 | 2006-12-08 02:40:01 -0800 | [diff] [blame] | 305 | pci_set_drvdata(dev, (void *)val); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 306 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 307 | |
| 308 | /* |
| 309 | * Return the revision of the Winbond bridge |
| 310 | * which this function is part of. |
| 311 | */ |
| 312 | static unsigned int sl82c105_bridge_revision(struct pci_dev *dev) |
| 313 | { |
| 314 | struct pci_dev *bridge; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 315 | |
| 316 | /* |
| 317 | * The bridge should be part of the same device, but function 0. |
| 318 | */ |
Alan Cox | 640b31b | 2007-05-16 00:51:46 +0200 | [diff] [blame] | 319 | bridge = pci_get_bus_and_slot(dev->bus->number, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 320 | PCI_DEVFN(PCI_SLOT(dev->devfn), 0)); |
| 321 | if (!bridge) |
| 322 | return -1; |
| 323 | |
| 324 | /* |
| 325 | * Make sure it is a Winbond 553 and is an ISA bridge. |
| 326 | */ |
| 327 | if (bridge->vendor != PCI_VENDOR_ID_WINBOND || |
| 328 | bridge->device != PCI_DEVICE_ID_WINBOND_83C553 || |
Alan Cox | 640b31b | 2007-05-16 00:51:46 +0200 | [diff] [blame] | 329 | bridge->class >> 8 != PCI_CLASS_BRIDGE_ISA) { |
| 330 | pci_dev_put(bridge); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 331 | return -1; |
Alan Cox | 640b31b | 2007-05-16 00:51:46 +0200 | [diff] [blame] | 332 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 333 | /* |
| 334 | * We need to find function 0's revision, not function 1 |
| 335 | */ |
Alan Cox | 640b31b | 2007-05-16 00:51:46 +0200 | [diff] [blame] | 336 | pci_dev_put(bridge); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 337 | |
Auke Kok | 44c1013 | 2007-06-08 15:46:36 -0700 | [diff] [blame] | 338 | return bridge->revision; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 339 | } |
| 340 | |
| 341 | /* |
| 342 | * Enable the PCI device |
| 343 | * |
| 344 | * --BenH: It's arch fixup code that should enable channels that |
| 345 | * have not been enabled by firmware. I decided we can still enable |
| 346 | * channel 0 here at least, but channel 1 has to be enabled by |
| 347 | * firmware or arch code. We still set both to 16 bits mode. |
| 348 | */ |
Herbert Xu | 34a6224 | 2005-07-03 16:36:56 +0200 | [diff] [blame] | 349 | static unsigned int __devinit init_chipset_sl82c105(struct pci_dev *dev, const char *msg) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 350 | { |
| 351 | u32 val; |
| 352 | |
| 353 | DBG(("init_chipset_sl82c105()\n")); |
| 354 | |
| 355 | pci_read_config_dword(dev, 0x40, &val); |
| 356 | val |= CTRL_P0EN | CTRL_P0F16 | CTRL_P1F16; |
| 357 | pci_write_config_dword(dev, 0x40, val); |
Sergei Shtylyov | dd607d2 | 2006-12-08 02:40:01 -0800 | [diff] [blame] | 358 | pci_set_drvdata(dev, (void *)val); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 359 | |
| 360 | return dev->irq; |
| 361 | } |
| 362 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 363 | /* |
Sergei Shtylyov | 688a87d | 2007-05-05 22:03:49 +0200 | [diff] [blame] | 364 | * Initialise IDE channel |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 365 | */ |
Herbert Xu | 34a6224 | 2005-07-03 16:36:56 +0200 | [diff] [blame] | 366 | static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 367 | { |
Russell King | 9648f55 | 2005-11-12 16:57:29 +0000 | [diff] [blame] | 368 | unsigned int rev; |
Sergei Shtylyov | dd607d2 | 2006-12-08 02:40:01 -0800 | [diff] [blame] | 369 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 370 | DBG(("init_hwif_sl82c105(hwif: ide%d)\n", hwif->index)); |
| 371 | |
Bartlomiej Zolnierkiewicz | 26bcb87 | 2007-10-11 23:54:00 +0200 | [diff] [blame] | 372 | hwif->set_pio_mode = &sl82c105_set_pio_mode; |
Bartlomiej Zolnierkiewicz | 88b2b32 | 2007-10-13 17:47:51 +0200 | [diff] [blame^] | 373 | hwif->set_dma_mode = &sl82c105_set_dma_mode; |
Sergei Shtylyov | e93df70 | 2007-05-05 22:03:49 +0200 | [diff] [blame] | 374 | hwif->selectproc = &sl82c105_selectproc; |
| 375 | hwif->resetproc = &sl82c105_resetproc; |
Sergei Shtylyov | dd607d2 | 2006-12-08 02:40:01 -0800 | [diff] [blame] | 376 | |
| 377 | /* |
Sergei Shtylyov | e93df70 | 2007-05-05 22:03:49 +0200 | [diff] [blame] | 378 | * We support 32-bit I/O on this interface, and |
| 379 | * it doesn't have problems with interrupts. |
| 380 | */ |
| 381 | hwif->drives[0].io_32bit = hwif->drives[1].io_32bit = 1; |
| 382 | hwif->drives[0].unmask = hwif->drives[1].unmask = 1; |
| 383 | |
| 384 | /* |
Sergei Shtylyov | dd607d2 | 2006-12-08 02:40:01 -0800 | [diff] [blame] | 385 | * We always autotune PIO, this is done before DMA is checked, |
| 386 | * so there's no risk of accidentally disabling DMA |
| 387 | */ |
Sergei Shtylyov | e93df70 | 2007-05-05 22:03:49 +0200 | [diff] [blame] | 388 | hwif->drives[0].autotune = hwif->drives[1].autotune = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 389 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 390 | if (!hwif->dma_base) |
| 391 | return; |
| 392 | |
Russell King | 9648f55 | 2005-11-12 16:57:29 +0000 | [diff] [blame] | 393 | rev = sl82c105_bridge_revision(hwif->pci_dev); |
| 394 | if (rev <= 5) { |
| 395 | /* |
| 396 | * Never ever EVER under any circumstances enable |
| 397 | * DMA when the bridge is this old. |
| 398 | */ |
Sergei Shtylyov | 688a87d | 2007-05-05 22:03:49 +0200 | [diff] [blame] | 399 | printk(" %s: Winbond W83C553 bridge revision %d, " |
| 400 | "BM-DMA disabled\n", hwif->name, rev); |
| 401 | return; |
Russell King | 9648f55 | 2005-11-12 16:57:29 +0000 | [diff] [blame] | 402 | } |
Sergei Shtylyov | 688a87d | 2007-05-05 22:03:49 +0200 | [diff] [blame] | 403 | |
| 404 | hwif->atapi_dma = 1; |
Sergei Shtylyov | 46cedc9 | 2007-05-16 00:51:44 +0200 | [diff] [blame] | 405 | hwif->mwdma_mask = 0x07; |
Sergei Shtylyov | 688a87d | 2007-05-05 22:03:49 +0200 | [diff] [blame] | 406 | |
| 407 | hwif->ide_dma_check = &sl82c105_ide_dma_check; |
| 408 | hwif->ide_dma_on = &sl82c105_ide_dma_on; |
| 409 | hwif->dma_off_quietly = &sl82c105_dma_off_quietly; |
Sergei Shtylyov | 841d2a9 | 2007-07-09 23:17:54 +0200 | [diff] [blame] | 410 | hwif->dma_lost_irq = &sl82c105_dma_lost_irq; |
Sergei Shtylyov | 688a87d | 2007-05-05 22:03:49 +0200 | [diff] [blame] | 411 | hwif->dma_start = &sl82c105_dma_start; |
Sergei Shtylyov | c283f5d | 2007-07-09 23:17:54 +0200 | [diff] [blame] | 412 | hwif->dma_timeout = &sl82c105_dma_timeout; |
Sergei Shtylyov | 688a87d | 2007-05-05 22:03:49 +0200 | [diff] [blame] | 413 | |
| 414 | if (!noautodma) |
| 415 | hwif->autodma = 1; |
| 416 | hwif->drives[0].autodma = hwif->drives[1].autodma = hwif->autodma; |
| 417 | |
| 418 | if (hwif->mate) |
| 419 | hwif->serialized = hwif->mate->serialized = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 420 | } |
| 421 | |
| 422 | static ide_pci_device_t sl82c105_chipset __devinitdata = { |
| 423 | .name = "W82C105", |
| 424 | .init_chipset = init_chipset_sl82c105, |
| 425 | .init_hwif = init_hwif_sl82c105, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 426 | .autodma = NOAUTODMA, |
| 427 | .enablebits = {{0x40,0x01,0x01}, {0x40,0x10,0x10}}, |
| 428 | .bootable = ON_BOARD, |
Bartlomiej Zolnierkiewicz | 4099d14 | 2007-07-20 01:11:59 +0200 | [diff] [blame] | 429 | .pio_mask = ATA_PIO5, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 430 | }; |
| 431 | |
| 432 | static int __devinit sl82c105_init_one(struct pci_dev *dev, const struct pci_device_id *id) |
| 433 | { |
| 434 | return ide_setup_pci_device(dev, &sl82c105_chipset); |
| 435 | } |
| 436 | |
| 437 | static struct pci_device_id sl82c105_pci_tbl[] = { |
Alan Cox | f201f50 | 2006-06-28 04:27:02 -0700 | [diff] [blame] | 438 | { PCI_DEVICE(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105), 0}, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 439 | { 0, }, |
| 440 | }; |
| 441 | MODULE_DEVICE_TABLE(pci, sl82c105_pci_tbl); |
| 442 | |
| 443 | static struct pci_driver driver = { |
| 444 | .name = "W82C105_IDE", |
| 445 | .id_table = sl82c105_pci_tbl, |
| 446 | .probe = sl82c105_init_one, |
| 447 | }; |
| 448 | |
Bartlomiej Zolnierkiewicz | 82ab1ee | 2007-01-27 13:46:56 +0100 | [diff] [blame] | 449 | static int __init sl82c105_ide_init(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 450 | { |
| 451 | return ide_pci_register_driver(&driver); |
| 452 | } |
| 453 | |
| 454 | module_init(sl82c105_ide_init); |
| 455 | |
| 456 | MODULE_DESCRIPTION("PCI driver module for W82C105 IDE"); |
| 457 | MODULE_LICENSE("GPL"); |