blob: e22e398b2d20f1e9ce1ed871fef33d65be5c84cd [file] [log] [blame]
Xiaozhe Shifaa942c2013-02-21 10:52:03 -08001/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13&spmi_bus {
14 #address-cells = <1>;
15 #size-cells = <0>;
16 interrupt-controller;
17 #interrupt-cells = <3>;
Xiaozhe Shifaa942c2013-02-21 10:52:03 -080018
19 qcom,pm8110@0 {
20 spmi-slave-container;
21 reg = <0x0>;
22 #address-cells = <1>;
23 #size-cells = <1>;
Siddartha Mohanadoss0f664a82013-03-11 22:52:01 -070024
Amy Malochee4aaca22013-04-01 20:34:09 -070025 qcom,power-on@800 {
26 compatible = "qcom,qpnp-power-on";
27 reg = <0x800 0x100>;
28 interrupts = <0x0 0x8 0x0>,
29 <0x0 0x8 0x1>,
30 <0x0 0x8 0x4>;
31 interrupt-names = "kpdpwr", "resin", "resin-bark";
32 qcom,pon-dbc-delay = <15625>;
33 qcom,system-reset;
34
35 qcom,pon_1 {
36 qcom,pon-type = <0>;
37 qcom,pull-up = <1>;
38 linux,code = <116>;
39 };
40
41 qcom,pon_2 {
42 qcom,pon-type = <1>;
43 qcom,pull-up = <1>;
44 linux,code = <114>;
45 };
46 };
47
Xiaozhe Shif7d9daf2013-04-08 15:29:55 -070048 pm8110_chg: qcom,charger {
49 spmi-dev-container;
50 compatible = "qcom,qpnp-charger";
51 #address-cells = <1>;
52 #size-cells = <1>;
53 status = "disabled";
54
Xiaozhe Shi8bc042a2013-04-18 15:44:08 -070055 qcom,vddmax-mv = <4200>;
56 qcom,vddsafe-mv = <4200>;
57 qcom,vinmin-mv = <4200>;
58 qcom,vbatdet-mv = <4100>;
59 qcom,ibatmax-ma = <1500>;
60 qcom,ibatterm-ma = <200>;
61 qcom,ibatsafe-ma = <1500>;
62 qcom,thermal-mitigation = <1500 700 600 325>;
Xiaozhe Shi8b502bc2013-04-18 15:55:56 -070063 qcom,vbatdet-delta-mv = <350>;
64 qcom,tchg-mins = <150>;
Xiaozhe Shif7d9daf2013-04-08 15:29:55 -070065
Xiaozhe Shi8bc042a2013-04-18 15:44:08 -070066 qcom,chgr@1000 {
Xiaozhe Shif7d9daf2013-04-08 15:29:55 -070067 status = "disabled";
68 reg = <0x1000 0x100>;
69 interrupts = <0x0 0x10 0x0>,
70 <0x0 0x10 0x1>,
71 <0x0 0x10 0x2>,
72 <0x0 0x10 0x3>,
73 <0x0 0x10 0x4>,
74 <0x0 0x10 0x5>,
75 <0x0 0x10 0x6>,
76 <0x0 0x10 0x7>;
77
78 interrupt-names = "vbat-det-lo",
79 "vbat-det-hi",
80 "chgwdog",
81 "state-change",
82 "trkl-chg-on",
83 "fast-chg-on",
84 "chg-failed",
85 "chg-done";
86 };
87
Xiaozhe Shi8bc042a2013-04-18 15:44:08 -070088 qcom,buck@1100 {
Xiaozhe Shif7d9daf2013-04-08 15:29:55 -070089 status = "disabled";
90 reg = <0x1100 0x100>;
91 interrupts = <0x0 0x11 0x0>,
92 <0x0 0x11 0x1>,
93 <0x0 0x11 0x2>,
94 <0x0 0x11 0x3>,
95 <0x0 0x11 0x4>,
96 <0x0 0x11 0x5>,
97 <0x0 0x11 0x6>;
98
99 interrupt-names = "vbat-ov",
100 "vreg-ov",
101 "overtemp",
102 "vchg-loop",
103 "ichg-loop",
104 "ibat-loop",
105 "vdd-loop";
106 };
107
Xiaozhe Shi8bc042a2013-04-18 15:44:08 -0700108 qcom,bat-if@1200 {
Xiaozhe Shif7d9daf2013-04-08 15:29:55 -0700109 status = "disabled";
110 reg = <0x1200 0x100>;
111 interrupts = <0x0 0x12 0x0>,
112 <0x0 0x12 0x1>,
113 <0x0 0x12 0x2>,
114 <0x0 0x12 0x3>,
115 <0x0 0x12 0x4>;
116
117 interrupt-names = "batt-pres",
118 "bat-temp-ok",
119 "bat-fet-on",
120 "vcp-on",
121 "psi";
122 };
123
Xiaozhe Shi8bc042a2013-04-18 15:44:08 -0700124 qcom,usb-chgpth@1300 {
Xiaozhe Shif7d9daf2013-04-08 15:29:55 -0700125 status = "disabled";
126 reg = <0x1300 0x100>;
127 interrupts = <0 0x13 0x0>,
128 <0 0x13 0x1>,
129 <0x0 0x13 0x2>;
130
131 interrupt-names = "coarse-det-usb",
132 "usbin-valid",
133 "chg-gone";
134 };
135
136 qcom,chg-misc@1600 {
137 status = "disabled";
138 reg = <0x1600 0x100>;
139 };
140 };
141
Xiaozhe Shi67ba76b2013-04-18 18:20:05 -0700142 pm8110_gpios: gpios {
143 spmi-dev-container;
144 compatible = "qcom,qpnp-pin";
145 gpio-controller;
146 #gpio-cells = <2>;
147 #address-cells = <1>;
148 #size-cells = <1>;
149 label = "pm8110-gpio";
150
151 gpio@c000 {
152 reg = <0xc000 0x100>;
153 qcom,pin-num = <1>;
154 };
155
156 gpio@c100 {
157 reg = <0xc100 0x100>;
158 qcom,pin-num = <2>;
159 };
160
161 gpio@c200 {
162 reg = <0xc200 0x100>;
163 qcom,pin-num = <3>;
164 };
165
166 gpio@c300 {
167 reg = <0xc300 0x100>;
168 qcom,pin-num = <4>;
169 };
170 };
171
172 pm8110_mpps: mpps {
173 spmi-dev-container;
174 compatible = "qcom,qpnp-pin";
175 gpio-controller;
176 #gpio-cells = <2>;
177 #address-cells = <1>;
178 #size-cells = <1>;
179 label = "pm8110-mpp";
180
181 mpp@a000 {
182 reg = <0xa000 0x100>;
183 qcom,pin-num = <1>;
184 };
185
186 mpp@a100 {
187 reg = <0xa100 0x100>;
188 qcom,pin-num = <2>;
189 };
190
191 mpp@a200 {
192 reg = <0xa200 0x100>;
193 qcom,pin-num = <3>;
194 };
195
196 mpp@a300 {
197 reg = <0xa300 0x100>;
198 qcom,pin-num = <4>;
199 };
200 };
201
Siddartha Mohanadoss0f664a82013-03-11 22:52:01 -0700202 pm8110_vadc: vadc@3100 {
203 compatible = "qcom,qpnp-vadc";
204 reg = <0x3100 0x100>;
205 #address-cells = <1>;
206 #size-cells = <0>;
207 interrupts = <0x0 0x31 0x0>;
208 interrupt-names = "eoc-int-en-set";
209 qcom,adc-bit-resolution = <15>;
210 qcom,adc-vdd-reference = <1800>;
211
212 chan@8 {
213 label = "die_temp";
214 reg = <8>;
215 qcom,decimation = <0>;
216 qcom,pre-div-channel-scaling = <0>;
217 qcom,calibration-type = "absolute";
218 qcom,scale-function = <3>;
219 qcom,hw-settle-time = <0>;
220 qcom,fast-avg-setup = <0>;
221 };
222
223 chan@9 {
224 label = "ref_625mv";
225 reg = <9>;
226 qcom,decimation = <0>;
227 qcom,pre-div-channel-scaling = <0>;
228 qcom,calibration-type = "absolute";
229 qcom,scale-function = <0>;
230 qcom,hw-settle-time = <0>;
231 qcom,fast-avg-setup = <0>;
232 };
233
234 chan@a {
235 label = "ref_1250v";
236 reg = <0xa>;
237 qcom,decimation = <0>;
238 qcom,pre-div-channel-scaling = <0>;
239 qcom,calibration-type = "absolute";
240 qcom,scale-function = <0>;
241 qcom,hw-settle-time = <0>;
242 qcom,fast-avg-setup = <0>;
243 };
244 };
245
246 iadc@3600 {
247 compatible = "qcom,qpnp-iadc";
248 reg = <0x3600 0x100>;
249 #address-cells = <1>;
250 #size-cells = <0>;
251 interrupts = <0x0 0x36 0x0>;
252 interrupt-names = "eoc-int-en-set";
253 qcom,adc-bit-resolution = <16>;
254 qcom,adc-vdd-reference = <1800>;
Siddartha Mohanadoss0f664a82013-03-11 22:52:01 -0700255
256 chan@0 {
257 label = "internal_rsense";
258 reg = <0>;
259 qcom,decimation = <0>;
260 qcom,pre-div-channel-scaling = <1>;
261 qcom,calibration-type = "absolute";
262 qcom,scale-function = <0>;
263 qcom,hw-settle-time = <0>;
264 qcom,fast-avg-setup = <0>;
265 };
266 };
Ashay Jaiswalad1db362013-04-01 11:11:41 +0530267
Xiaozhe Shi294c7e22013-04-17 14:59:15 -0700268 pm8110_bms: qcom,bms {
269 spmi-dev-container;
270 compatible = "qcom,qpnp-bms";
271 #address-cells = <1>;
272 #size-cells = <1>;
273 status = "disabled";
274
275 qcom,r-sense-uohm = <10000>;
276 qcom,v-cutoff-uv = <3400000>;
277 qcom,max-voltage-uv = <4200000>;
278 qcom,r-conn-mohm = <0>;
279 qcom,shutdown-soc-valid-limit = <20>;
280 qcom,adjust-soc-low-threshold = <15>;
281 qcom,ocv-voltage-high-threshold-uv = <3750000>;
282 qcom,ocv-voltage-low-threshold-uv = <3650000>;
283 qcom,low-soc-calculate-soc-threshold = <15>;
284 qcom,low-soc-calculate-soc-ms = <5000>;
285 qcom,calculate-soc-ms = <20000>;
286 qcom,chg-term-ua = <100000>;
287 qcom,batt-type = <0>;
288 qcom,low-voltage-threshold = <3420000>;
289 qcom,low-ocv-correction-limit-uv = <100>;
290 qcom,high-ocv-correction-limit-uv = <50>;
291 qcom,hold-soc-est = <3>;
292
293 qcom,bms-iadc@3800 {
294 reg = <0x3800 0x100>;
295 };
296
297 qcom,bms-bms@4000 {
298 reg = <0x4000 0x100>;
299 interrupts = <0x0 0x40 0x0>,
300 <0x0 0x40 0x1>,
301 <0x0 0x40 0x2>,
302 <0x0 0x40 0x3>,
303 <0x0 0x40 0x4>,
304 <0x0 0x40 0x5>,
305 <0x0 0x40 0x6>,
306 <0x0 0x40 0x7>;
307
308 interrupt-names = "vsense_for_r",
309 "vsense_avg",
310 "sw_cc_thr",
311 "ocv_thr",
312 "charge_begin",
313 "good_ocv",
314 "ocv_for_r",
315 "cc_thr";
316 };
317 };
318
Ashay Jaiswalad1db362013-04-01 11:11:41 +0530319 qcom,pm8110_rtc {
320 spmi-dev-container;
321 compatible = "qcom,qpnp-rtc";
322 #address-cells = <1>;
323 #size-cells = <1>;
324 qcom,qpnp-rtc-write = <0>;
325 qcom,qpnp-rtc-alarm-pwrup = <0>;
326
327 qcom,pm8110_rtc_rw@6000 {
328 reg = <0x6000 0x100>;
329 };
330
331 qcom,pm8110_rtc_alarm@6100 {
332 reg = <0x6100 0x100>;
333 interrupts = <0x0 0x61 0x1>;
334 };
335 };
Amy Maloche9a113c12013-04-11 19:46:20 -0700336
Chun Zhang9e808b82013-04-18 15:38:18 -0700337 qcom,leds@a100 {
338 compatible = "qcom,leds-qpnp";
339 reg = <0xa100 0x100>;
340 label = "mpp";
341 };
342
Amy Maloche9a113c12013-04-11 19:46:20 -0700343 qcom,leds@a200 {
344 compatible = "qcom,leds-qpnp";
345 reg = <0xa200 0x100>;
346 label = "mpp";
347 };
Xiaozhe Shifaa942c2013-02-21 10:52:03 -0800348 };
349
350 qcom,pm8110@1 {
351 spmi-slave-container;
352 reg = <0x1>;
353 #address-cells = <1>;
354 #size-cells = <1>;
Xiaozhe Shia9571ca2013-02-21 10:52:03 -0800355
356 regulator@1400 {
357 compatible = "qcom,qpnp-regulator";
358 regulator-name = "8110_s1";
359 spmi-dev-container;
360 #address-cells = <1>;
361 #size-cells = <1>;
362 reg = <0x1400 0x300>;
363 status = "disabled";
364
365 qcom,ctl@1400 {
366 reg = <0x1400 0x100>;
367 };
368 qcom,ps@1500 {
369 reg = <0x1500 0x100>;
370 };
371 qcom,freq@1600 {
372 reg = <0x1600 0x100>;
373 };
374 };
375
376 regulator@1700 {
377 compatible = "qcom,qpnp-regulator";
378 regulator-name = "8110_s2";
379 spmi-dev-container;
380 #address-cells = <1>;
381 #size-cells = <1>;
382 reg = <0x1700 0x300>;
383 status = "disabled";
384
385 qcom,ctl@1700 {
386 reg = <0x1700 0x100>;
387 };
388 qcom,ps@1800 {
389 reg = <0x1800 0x100>;
390 };
391 qcom,freq@1900 {
392 reg = <0x1900 0x100>;
393 };
394 };
395
396 regulator@1a00 {
397 compatible = "qcom,qpnp-regulator";
398 regulator-name = "8110_s3";
399 spmi-dev-container;
400 #address-cells = <1>;
401 #size-cells = <1>;
402 reg = <0x1a00 0x300>;
403 status = "disabled";
404
405 qcom,ctl@1a00 {
406 reg = <0x1a00 0x100>;
407 };
408 qcom,ps@1b00 {
409 reg = <0x1b00 0x100>;
410 };
411 qcom,freq@1c00 {
412 reg = <0x1c00 0x100>;
413 };
414 };
415
416 regulator@1d00 {
417 compatible = "qcom,qpnp-regulator";
418 regulator-name = "8110_s4";
419 spmi-dev-container;
420 #address-cells = <1>;
421 #size-cells = <1>;
422 reg = <0x1d00 0x300>;
423 status = "disabled";
424
425 qcom,ctl@1d00 {
426 reg = <0x1d00 0x100>;
427 };
428 qcom,ps@1e00 {
429 reg = <0x1e00 0x100>;
430 };
431 qcom,freq@1f00 {
432 reg = <0x1f00 0x100>;
433 };
434 };
435
436 regulator@4000 {
437 compatible = "qcom,qpnp-regulator";
438 regulator-name = "8110_l1";
439 reg = <0x4000 0x100>;
440 status = "disabled";
441 };
442
443 regulator@4100 {
444 compatible = "qcom,qpnp-regulator";
445 regulator-name = "8110_l2";
446 reg = <0x4100 0x100>;
447 status = "disabled";
448 };
449
450 regulator@4200 {
451 compatible = "qcom,qpnp-regulator";
452 regulator-name = "8110_l3";
453 reg = <0x4200 0x100>;
454 status = "disabled";
455 };
456
457 regulator@4300 {
458 compatible = "qcom,qpnp-regulator";
459 regulator-name = "8110_l4";
460 reg = <0x4300 0x100>;
461 status = "disabled";
462 };
463
464 regulator@4400 {
465 compatible = "qcom,qpnp-regulator";
466 regulator-name = "8110_l5";
467 reg = <0x4400 0x100>;
468 status = "disabled";
469 };
470
471 regulator@4500 {
472 compatible = "qcom,qpnp-regulator";
473 regulator-name = "8110_l6";
474 reg = <0x4500 0x100>;
475 status = "disabled";
476 };
477
478 regulator@4600 {
479 compatible = "qcom,qpnp-regulator";
480 regulator-name = "8110_l7";
481 reg = <0x4600 0x100>;
482 status = "disabled";
483 };
484
485 regulator@4700 {
486 compatible = "qcom,qpnp-regulator";
487 regulator-name = "8110_l8";
488 reg = <0x4700 0x100>;
489 status = "disabled";
490 };
491
492 regulator@4800 {
493 compatible = "qcom,qpnp-regulator";
494 regulator-name = "8110_l9";
495 reg = <0x4800 0x100>;
496 status = "disabled";
497 };
498
499 regulator@4900 {
500 compatible = "qcom,qpnp-regulator";
501 regulator-name = "8110_l10";
502 reg = <0x4900 0x100>;
503 status = "disabled";
504 };
505
506 regulator@4b00 {
507 compatible = "qcom,qpnp-regulator";
508 regulator-name = "8110_l12";
509 reg = <0x4b00 0x100>;
510 status = "disabled";
511 };
512
513 regulator@4d00 {
514 compatible = "qcom,qpnp-regulator";
515 regulator-name = "8110_l14";
516 reg = <0x4d00 0x100>;
517 status = "disabled";
518 };
519
520 regulator@4e00 {
521 compatible = "qcom,qpnp-regulator";
522 regulator-name = "8110_l15";
523 reg = <0x4e00 0x100>;
524 status = "disabled";
525 };
526
527 regulator@4f00 {
528 compatible = "qcom,qpnp-regulator";
529 regulator-name = "8110_l16";
530 reg = <0x4f00 0x100>;
531 status = "disabled";
532 };
533
534 regulator@5000 {
535 compatible = "qcom,qpnp-regulator";
536 regulator-name = "8110_l17";
537 reg = <0x5000 0x100>;
538 status = "disabled";
539 };
540
541 regulator@5100 {
542 compatible = "qcom,qpnp-regulator";
543 regulator-name = "8110_l18";
544 reg = <0x5100 0x100>;
545 status = "disabled";
546 };
547
548 regulator@5200 {
549 compatible = "qcom,qpnp-regulator";
550 regulator-name = "8110_l19";
551 reg = <0x5200 0x100>;
552 status = "disabled";
553 };
554
555 regulator@5300 {
556 compatible = "qcom,qpnp-regulator";
557 regulator-name = "8110_l20";
558 reg = <0x5300 0x100>;
559 status = "disabled";
560 };
561
562 regulator@5400 {
563 compatible = "qcom,qpnp-regulator";
564 regulator-name = "8110_l21";
565 reg = <0x5400 0x100>;
566 status = "disabled";
567 };
568
569 regulator@5500 {
570 compatible = "qcom,qpnp-regulator";
571 regulator-name = "8110_l22";
572 reg = <0x5500 0x100>;
573 status = "disabled";
574 };
Chun Zhang3450f832013-04-15 11:46:29 -0700575
576 qcom,vibrator@c000 {
577 compatible = "qcom,qpnp-vibrator";
578 reg = <0xc000 0x100>;
579 label = "vibrator";
580 status = "disabled";
581 };
Xiaozhe Shifaa942c2013-02-21 10:52:03 -0800582 };
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700583};