Daniel Mack | a381934 | 2009-03-09 02:13:17 +0100 | [diff] [blame] | 1 | /* |
| 2 | * AK4104 ALSA SoC (ASoC) driver |
| 3 | * |
| 4 | * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms of the GNU General Public License as published by the |
| 8 | * Free Software Foundation; either version 2 of the License, or (at your |
| 9 | * option) any later version. |
| 10 | */ |
| 11 | |
| 12 | #include <linux/module.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 13 | #include <linux/slab.h> |
Daniel Mack | a381934 | 2009-03-09 02:13:17 +0100 | [diff] [blame] | 14 | #include <sound/core.h> |
| 15 | #include <sound/soc.h> |
| 16 | #include <sound/initval.h> |
| 17 | #include <linux/spi/spi.h> |
| 18 | #include <sound/asoundef.h> |
| 19 | |
Daniel Mack | a381934 | 2009-03-09 02:13:17 +0100 | [diff] [blame] | 20 | /* AK4104 registers addresses */ |
| 21 | #define AK4104_REG_CONTROL1 0x00 |
| 22 | #define AK4104_REG_RESERVED 0x01 |
| 23 | #define AK4104_REG_CONTROL2 0x02 |
| 24 | #define AK4104_REG_TX 0x03 |
| 25 | #define AK4104_REG_CHN_STATUS(x) ((x) + 0x04) |
| 26 | #define AK4104_NUM_REGS 10 |
| 27 | |
| 28 | #define AK4104_REG_MASK 0x1f |
| 29 | #define AK4104_READ 0xc0 |
| 30 | #define AK4104_WRITE 0xe0 |
| 31 | #define AK4104_RESERVED_VAL 0x5b |
| 32 | |
| 33 | /* Bit masks for AK4104 registers */ |
| 34 | #define AK4104_CONTROL1_RSTN (1 << 0) |
| 35 | #define AK4104_CONTROL1_PW (1 << 1) |
| 36 | #define AK4104_CONTROL1_DIF0 (1 << 2) |
| 37 | #define AK4104_CONTROL1_DIF1 (1 << 3) |
| 38 | |
| 39 | #define AK4104_CONTROL2_SEL0 (1 << 0) |
| 40 | #define AK4104_CONTROL2_SEL1 (1 << 1) |
| 41 | #define AK4104_CONTROL2_MODE (1 << 2) |
| 42 | |
| 43 | #define AK4104_TX_TXE (1 << 0) |
| 44 | #define AK4104_TX_V (1 << 1) |
| 45 | |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 46 | #define DRV_NAME "ak4104-codec" |
Daniel Mack | a381934 | 2009-03-09 02:13:17 +0100 | [diff] [blame] | 47 | |
| 48 | struct ak4104_private { |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 49 | enum snd_soc_control_type control_type; |
| 50 | void *control_data; |
Daniel Mack | a381934 | 2009-03-09 02:13:17 +0100 | [diff] [blame] | 51 | }; |
| 52 | |
| 53 | static int ak4104_fill_cache(struct snd_soc_codec *codec) |
| 54 | { |
| 55 | int i; |
| 56 | u8 *reg_cache = codec->reg_cache; |
| 57 | struct spi_device *spi = codec->control_data; |
| 58 | |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 59 | for (i = 0; i < codec->driver->reg_cache_size; i++) { |
Daniel Mack | a381934 | 2009-03-09 02:13:17 +0100 | [diff] [blame] | 60 | int ret = spi_w8r8(spi, i | AK4104_READ); |
| 61 | if (ret < 0) { |
| 62 | dev_err(&spi->dev, "SPI write failure\n"); |
| 63 | return ret; |
| 64 | } |
| 65 | |
| 66 | reg_cache[i] = ret; |
| 67 | } |
| 68 | |
| 69 | return 0; |
| 70 | } |
| 71 | |
| 72 | static unsigned int ak4104_read_reg_cache(struct snd_soc_codec *codec, |
| 73 | unsigned int reg) |
| 74 | { |
| 75 | u8 *reg_cache = codec->reg_cache; |
| 76 | |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 77 | if (reg >= codec->driver->reg_cache_size) |
Daniel Mack | a381934 | 2009-03-09 02:13:17 +0100 | [diff] [blame] | 78 | return -EINVAL; |
| 79 | |
| 80 | return reg_cache[reg]; |
| 81 | } |
| 82 | |
| 83 | static int ak4104_spi_write(struct snd_soc_codec *codec, unsigned int reg, |
| 84 | unsigned int value) |
| 85 | { |
| 86 | u8 *cache = codec->reg_cache; |
| 87 | struct spi_device *spi = codec->control_data; |
| 88 | |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 89 | if (reg >= codec->driver->reg_cache_size) |
Daniel Mack | a381934 | 2009-03-09 02:13:17 +0100 | [diff] [blame] | 90 | return -EINVAL; |
| 91 | |
Daniel Mack | a381934 | 2009-03-09 02:13:17 +0100 | [diff] [blame] | 92 | /* only write to the hardware if value has changed */ |
| 93 | if (cache[reg] != value) { |
Daniel Mack | e555317 | 2010-02-26 14:36:54 +0800 | [diff] [blame] | 94 | u8 tmp[2] = { (reg & AK4104_REG_MASK) | AK4104_WRITE, value }; |
| 95 | |
Daniel Mack | a381934 | 2009-03-09 02:13:17 +0100 | [diff] [blame] | 96 | if (spi_write(spi, tmp, sizeof(tmp))) { |
| 97 | dev_err(&spi->dev, "SPI write failed\n"); |
| 98 | return -EIO; |
| 99 | } |
| 100 | |
| 101 | cache[reg] = value; |
| 102 | } |
| 103 | |
| 104 | return 0; |
| 105 | } |
| 106 | |
| 107 | static int ak4104_set_dai_fmt(struct snd_soc_dai *codec_dai, |
| 108 | unsigned int format) |
| 109 | { |
| 110 | struct snd_soc_codec *codec = codec_dai->codec; |
| 111 | int val = 0; |
| 112 | |
| 113 | val = ak4104_read_reg_cache(codec, AK4104_REG_CONTROL1); |
| 114 | if (val < 0) |
| 115 | return val; |
| 116 | |
| 117 | val &= ~(AK4104_CONTROL1_DIF0 | AK4104_CONTROL1_DIF1); |
| 118 | |
| 119 | /* set DAI format */ |
| 120 | switch (format & SND_SOC_DAIFMT_FORMAT_MASK) { |
| 121 | case SND_SOC_DAIFMT_RIGHT_J: |
| 122 | break; |
| 123 | case SND_SOC_DAIFMT_LEFT_J: |
| 124 | val |= AK4104_CONTROL1_DIF0; |
| 125 | break; |
| 126 | case SND_SOC_DAIFMT_I2S: |
| 127 | val |= AK4104_CONTROL1_DIF0 | AK4104_CONTROL1_DIF1; |
| 128 | break; |
| 129 | default: |
| 130 | dev_err(codec->dev, "invalid dai format\n"); |
| 131 | return -EINVAL; |
| 132 | } |
| 133 | |
| 134 | /* This device can only be slave */ |
| 135 | if ((format & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS) |
| 136 | return -EINVAL; |
| 137 | |
| 138 | return ak4104_spi_write(codec, AK4104_REG_CONTROL1, val); |
| 139 | } |
| 140 | |
| 141 | static int ak4104_hw_params(struct snd_pcm_substream *substream, |
| 142 | struct snd_pcm_hw_params *params, |
| 143 | struct snd_soc_dai *dai) |
| 144 | { |
| 145 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 146 | struct snd_soc_codec *codec = rtd->codec; |
Daniel Mack | a381934 | 2009-03-09 02:13:17 +0100 | [diff] [blame] | 147 | int val = 0; |
| 148 | |
| 149 | /* set the IEC958 bits: consumer mode, no copyright bit */ |
| 150 | val |= IEC958_AES0_CON_NOT_COPYRIGHT; |
| 151 | ak4104_spi_write(codec, AK4104_REG_CHN_STATUS(0), val); |
| 152 | |
| 153 | val = 0; |
| 154 | |
| 155 | switch (params_rate(params)) { |
| 156 | case 44100: |
| 157 | val |= IEC958_AES3_CON_FS_44100; |
| 158 | break; |
| 159 | case 48000: |
| 160 | val |= IEC958_AES3_CON_FS_48000; |
| 161 | break; |
| 162 | case 32000: |
| 163 | val |= IEC958_AES3_CON_FS_32000; |
| 164 | break; |
| 165 | default: |
| 166 | dev_err(codec->dev, "unsupported sampling rate\n"); |
| 167 | return -EINVAL; |
| 168 | } |
| 169 | |
| 170 | return ak4104_spi_write(codec, AK4104_REG_CHN_STATUS(3), val); |
| 171 | } |
| 172 | |
Lars-Peter Clausen | 85e7652 | 2011-11-23 11:40:40 +0100 | [diff] [blame] | 173 | static const struct snd_soc_dai_ops ak4101_dai_ops = { |
Mark Brown | 65ec1cd | 2009-03-11 16:51:31 +0000 | [diff] [blame] | 174 | .hw_params = ak4104_hw_params, |
| 175 | .set_fmt = ak4104_set_dai_fmt, |
| 176 | }; |
| 177 | |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 178 | static struct snd_soc_dai_driver ak4104_dai = { |
| 179 | .name = "ak4104-hifi", |
Daniel Mack | a381934 | 2009-03-09 02:13:17 +0100 | [diff] [blame] | 180 | .playback = { |
| 181 | .stream_name = "Playback", |
| 182 | .channels_min = 2, |
| 183 | .channels_max = 2, |
Daniel Mack | 617b14c | 2010-01-13 11:25:05 +0100 | [diff] [blame] | 184 | .rates = SNDRV_PCM_RATE_8000_192000, |
Daniel Mack | a381934 | 2009-03-09 02:13:17 +0100 | [diff] [blame] | 185 | .formats = SNDRV_PCM_FMTBIT_S16_LE | |
| 186 | SNDRV_PCM_FMTBIT_S24_3LE | |
| 187 | SNDRV_PCM_FMTBIT_S24_LE |
| 188 | }, |
Mark Brown | 65ec1cd | 2009-03-11 16:51:31 +0000 | [diff] [blame] | 189 | .ops = &ak4101_dai_ops, |
Daniel Mack | a381934 | 2009-03-09 02:13:17 +0100 | [diff] [blame] | 190 | }; |
| 191 | |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 192 | static int ak4104_probe(struct snd_soc_codec *codec) |
| 193 | { |
| 194 | struct ak4104_private *ak4104 = snd_soc_codec_get_drvdata(codec); |
| 195 | int ret, val; |
| 196 | |
| 197 | codec->control_data = ak4104->control_data; |
| 198 | |
| 199 | /* read all regs and fill the cache */ |
| 200 | ret = ak4104_fill_cache(codec); |
| 201 | if (ret < 0) { |
| 202 | dev_err(codec->dev, "failed to fill register cache\n"); |
| 203 | return ret; |
| 204 | } |
| 205 | |
| 206 | /* read the 'reserved' register - according to the datasheet, it |
| 207 | * should contain 0x5b. Not a good way to verify the presence of |
| 208 | * the device, but there is no hardware ID register. */ |
| 209 | if (ak4104_read_reg_cache(codec, AK4104_REG_RESERVED) != |
| 210 | AK4104_RESERVED_VAL) |
| 211 | return -ENODEV; |
| 212 | |
| 213 | /* set power-up and non-reset bits */ |
| 214 | val = ak4104_read_reg_cache(codec, AK4104_REG_CONTROL1); |
| 215 | val |= AK4104_CONTROL1_PW | AK4104_CONTROL1_RSTN; |
| 216 | ret = ak4104_spi_write(codec, AK4104_REG_CONTROL1, val); |
| 217 | if (ret < 0) |
| 218 | return ret; |
| 219 | |
| 220 | /* enable transmitter */ |
| 221 | val = ak4104_read_reg_cache(codec, AK4104_REG_TX); |
| 222 | val |= AK4104_TX_TXE; |
| 223 | ret = ak4104_spi_write(codec, AK4104_REG_TX, val); |
| 224 | if (ret < 0) |
| 225 | return ret; |
| 226 | |
| 227 | dev_info(codec->dev, "SPI device initialized\n"); |
| 228 | return 0; |
| 229 | } |
| 230 | |
| 231 | static int ak4104_remove(struct snd_soc_codec *codec) |
| 232 | { |
| 233 | int val, ret; |
| 234 | |
| 235 | val = ak4104_read_reg_cache(codec, AK4104_REG_CONTROL1); |
| 236 | if (val < 0) |
| 237 | return val; |
| 238 | |
| 239 | /* clear power-up and non-reset bits */ |
| 240 | val &= ~(AK4104_CONTROL1_PW | AK4104_CONTROL1_RSTN); |
| 241 | ret = ak4104_spi_write(codec, AK4104_REG_CONTROL1, val); |
| 242 | |
| 243 | return ret; |
| 244 | } |
| 245 | |
| 246 | static struct snd_soc_codec_driver soc_codec_device_ak4104 = { |
| 247 | .probe = ak4104_probe, |
| 248 | .remove = ak4104_remove, |
| 249 | .reg_cache_size = AK4104_NUM_REGS, |
Axel Lin | cf0feaf | 2011-10-20 10:50:03 +0800 | [diff] [blame] | 250 | .reg_word_size = sizeof(u8), |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 251 | }; |
Daniel Mack | a381934 | 2009-03-09 02:13:17 +0100 | [diff] [blame] | 252 | |
| 253 | static int ak4104_spi_probe(struct spi_device *spi) |
| 254 | { |
Daniel Mack | a381934 | 2009-03-09 02:13:17 +0100 | [diff] [blame] | 255 | struct ak4104_private *ak4104; |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 256 | int ret; |
Daniel Mack | a381934 | 2009-03-09 02:13:17 +0100 | [diff] [blame] | 257 | |
| 258 | spi->bits_per_word = 8; |
| 259 | spi->mode = SPI_MODE_0; |
| 260 | ret = spi_setup(spi); |
| 261 | if (ret < 0) |
| 262 | return ret; |
| 263 | |
Axel Lin | 3922d51 | 2011-12-20 14:37:12 +0800 | [diff] [blame] | 264 | ak4104 = devm_kzalloc(&spi->dev, sizeof(struct ak4104_private), |
| 265 | GFP_KERNEL); |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 266 | if (ak4104 == NULL) |
Daniel Mack | a381934 | 2009-03-09 02:13:17 +0100 | [diff] [blame] | 267 | return -ENOMEM; |
Daniel Mack | a381934 | 2009-03-09 02:13:17 +0100 | [diff] [blame] | 268 | |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 269 | ak4104->control_data = spi; |
| 270 | ak4104->control_type = SND_SOC_SPI; |
Daniel Mack | a381934 | 2009-03-09 02:13:17 +0100 | [diff] [blame] | 271 | spi_set_drvdata(spi, ak4104); |
Daniel Mack | a381934 | 2009-03-09 02:13:17 +0100 | [diff] [blame] | 272 | |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 273 | ret = snd_soc_register_codec(&spi->dev, |
| 274 | &soc_codec_device_ak4104, &ak4104_dai, 1); |
Daniel Mack | a381934 | 2009-03-09 02:13:17 +0100 | [diff] [blame] | 275 | return ret; |
| 276 | } |
| 277 | |
| 278 | static int __devexit ak4104_spi_remove(struct spi_device *spi) |
| 279 | { |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 280 | snd_soc_unregister_codec(&spi->dev); |
Daniel Mack | a381934 | 2009-03-09 02:13:17 +0100 | [diff] [blame] | 281 | return 0; |
| 282 | } |
| 283 | |
Daniel Mack | a381934 | 2009-03-09 02:13:17 +0100 | [diff] [blame] | 284 | static struct spi_driver ak4104_spi_driver = { |
| 285 | .driver = { |
| 286 | .name = DRV_NAME, |
| 287 | .owner = THIS_MODULE, |
| 288 | }, |
| 289 | .probe = ak4104_spi_probe, |
| 290 | .remove = __devexit_p(ak4104_spi_remove), |
| 291 | }; |
| 292 | |
| 293 | static int __init ak4104_init(void) |
| 294 | { |
Daniel Mack | a381934 | 2009-03-09 02:13:17 +0100 | [diff] [blame] | 295 | return spi_register_driver(&ak4104_spi_driver); |
| 296 | } |
| 297 | module_init(ak4104_init); |
| 298 | |
| 299 | static void __exit ak4104_exit(void) |
| 300 | { |
| 301 | spi_unregister_driver(&ak4104_spi_driver); |
| 302 | } |
| 303 | module_exit(ak4104_exit); |
| 304 | |
| 305 | MODULE_AUTHOR("Daniel Mack <daniel@caiaq.de>"); |
| 306 | MODULE_DESCRIPTION("Asahi Kasei AK4104 ALSA SoC driver"); |
| 307 | MODULE_LICENSE("GPL"); |
| 308 | |