Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 1 | /* |
| 2 | * arch/arm/mach-ixp4xx/include/mach/irqs.h |
| 3 | * |
| 4 | * IRQ definitions for IXP4XX based systems |
| 5 | * |
| 6 | * Copyright (C) 2002 Intel Corporation. |
| 7 | * Copyright (C) 2003 MontaVista Software, Inc. |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License version 2 as |
| 11 | * published by the Free Software Foundation. |
| 12 | * |
| 13 | */ |
| 14 | |
| 15 | #ifndef _ARCH_IXP4XX_IRQS_H_ |
| 16 | #define _ARCH_IXP4XX_IRQS_H_ |
| 17 | |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 18 | #define IRQ_IXP4XX_NPEA 0 |
| 19 | #define IRQ_IXP4XX_NPEB 1 |
| 20 | #define IRQ_IXP4XX_NPEC 2 |
| 21 | #define IRQ_IXP4XX_QM1 3 |
| 22 | #define IRQ_IXP4XX_QM2 4 |
| 23 | #define IRQ_IXP4XX_TIMER1 5 |
| 24 | #define IRQ_IXP4XX_GPIO0 6 |
| 25 | #define IRQ_IXP4XX_GPIO1 7 |
| 26 | #define IRQ_IXP4XX_PCI_INT 8 |
| 27 | #define IRQ_IXP4XX_PCI_DMA1 9 |
| 28 | #define IRQ_IXP4XX_PCI_DMA2 10 |
| 29 | #define IRQ_IXP4XX_TIMER2 11 |
| 30 | #define IRQ_IXP4XX_USB 12 |
| 31 | #define IRQ_IXP4XX_UART2 13 |
| 32 | #define IRQ_IXP4XX_TIMESTAMP 14 |
| 33 | #define IRQ_IXP4XX_UART1 15 |
| 34 | #define IRQ_IXP4XX_WDOG 16 |
| 35 | #define IRQ_IXP4XX_AHB_PMU 17 |
| 36 | #define IRQ_IXP4XX_XSCALE_PMU 18 |
| 37 | #define IRQ_IXP4XX_GPIO2 19 |
| 38 | #define IRQ_IXP4XX_GPIO3 20 |
| 39 | #define IRQ_IXP4XX_GPIO4 21 |
| 40 | #define IRQ_IXP4XX_GPIO5 22 |
| 41 | #define IRQ_IXP4XX_GPIO6 23 |
| 42 | #define IRQ_IXP4XX_GPIO7 24 |
| 43 | #define IRQ_IXP4XX_GPIO8 25 |
| 44 | #define IRQ_IXP4XX_GPIO9 26 |
| 45 | #define IRQ_IXP4XX_GPIO10 27 |
| 46 | #define IRQ_IXP4XX_GPIO11 28 |
| 47 | #define IRQ_IXP4XX_GPIO12 29 |
| 48 | #define IRQ_IXP4XX_SW_INT1 30 |
| 49 | #define IRQ_IXP4XX_SW_INT2 31 |
| 50 | #define IRQ_IXP4XX_USB_HOST 32 |
| 51 | #define IRQ_IXP4XX_I2C 33 |
| 52 | #define IRQ_IXP4XX_SSP 34 |
| 53 | #define IRQ_IXP4XX_TSYNC 35 |
| 54 | #define IRQ_IXP4XX_EAU_DONE 36 |
| 55 | #define IRQ_IXP4XX_SHA_DONE 37 |
| 56 | #define IRQ_IXP4XX_SWCP_PE 58 |
| 57 | #define IRQ_IXP4XX_QM_PE 60 |
| 58 | #define IRQ_IXP4XX_MCU_ECC 61 |
| 59 | #define IRQ_IXP4XX_EXP_PE 62 |
| 60 | |
Krzysztof HaĆasa | 8d3fdf3 | 2009-11-17 18:48:23 +0100 | [diff] [blame^] | 61 | #define _IXP4XX_GPIO_IRQ(n) (IRQ_IXP4XX_GPIO ## n) |
| 62 | #define IXP4XX_GPIO_IRQ(n) _IXP4XX_GPIO_IRQ(n) |
| 63 | |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 64 | /* |
| 65 | * Only first 32 sources are valid if running on IXP42x systems |
| 66 | */ |
| 67 | #if defined(CONFIG_CPU_IXP46X) || defined(CONFIG_CPU_IXP43X) |
| 68 | #define NR_IRQS 64 |
| 69 | #else |
| 70 | #define NR_IRQS 32 |
| 71 | #endif |
| 72 | |
| 73 | #define XSCALE_PMU_IRQ (IRQ_IXP4XX_XSCALE_PMU) |
| 74 | |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 75 | #endif |