Pavankumar Kondeti | d860852 | 2011-05-04 10:19:47 +0530 | [diff] [blame] | 1 | /* Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved. |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | * |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 12 | */ |
| 13 | |
| 14 | #include <linux/module.h> |
| 15 | #include <linux/device.h> |
| 16 | #include <linux/platform_device.h> |
| 17 | #include <linux/clk.h> |
| 18 | #include <linux/slab.h> |
| 19 | #include <linux/interrupt.h> |
| 20 | #include <linux/err.h> |
| 21 | #include <linux/delay.h> |
| 22 | #include <linux/io.h> |
| 23 | #include <linux/ioport.h> |
| 24 | #include <linux/uaccess.h> |
| 25 | #include <linux/debugfs.h> |
| 26 | #include <linux/seq_file.h> |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 27 | #include <linux/pm_runtime.h> |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 28 | |
| 29 | #include <linux/usb.h> |
| 30 | #include <linux/usb/otg.h> |
| 31 | #include <linux/usb/ulpi.h> |
| 32 | #include <linux/usb/gadget.h> |
| 33 | #include <linux/usb/hcd.h> |
| 34 | #include <linux/usb/msm_hsusb.h> |
| 35 | #include <linux/usb/msm_hsusb_hw.h> |
Anji jonnala | 11aa5c4 | 2011-05-04 10:19:48 +0530 | [diff] [blame] | 36 | #include <linux/regulator/consumer.h> |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 37 | #include <linux/mfd/pm8xxx/pm8921-charger.h> |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 38 | |
| 39 | #include <mach/clk.h> |
| 40 | |
| 41 | #define MSM_USB_BASE (motg->regs) |
| 42 | #define DRIVER_NAME "msm_otg" |
| 43 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 44 | #ifdef CONFIG_USB_MSM_ACA |
| 45 | static void msm_chg_enable_aca_det(struct msm_otg *motg); |
| 46 | static void msm_chg_enable_aca_intr(struct msm_otg *motg); |
| 47 | #else |
| 48 | static inline bool msm_chg_aca_detect(struct msm_otg *motg) |
| 49 | { |
| 50 | return false; |
| 51 | } |
| 52 | |
| 53 | static inline void msm_chg_enable_aca_det(struct msm_otg *motg) |
| 54 | { |
| 55 | } |
| 56 | static inline void msm_chg_enable_aca_intr(struct msm_otg *motg) |
| 57 | { |
| 58 | } |
| 59 | static inline bool msm_chg_check_aca_intr(struct msm_otg *motg) |
| 60 | { |
| 61 | return false; |
| 62 | } |
| 63 | #endif |
| 64 | |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 65 | #define ULPI_IO_TIMEOUT_USEC (10 * 1000) |
Anji jonnala | 11aa5c4 | 2011-05-04 10:19:48 +0530 | [diff] [blame] | 66 | |
| 67 | #define USB_PHY_3P3_VOL_MIN 3050000 /* uV */ |
| 68 | #define USB_PHY_3P3_VOL_MAX 3300000 /* uV */ |
| 69 | #define USB_PHY_3P3_HPM_LOAD 50000 /* uA */ |
| 70 | #define USB_PHY_3P3_LPM_LOAD 4000 /* uA */ |
| 71 | |
| 72 | #define USB_PHY_1P8_VOL_MIN 1800000 /* uV */ |
| 73 | #define USB_PHY_1P8_VOL_MAX 1800000 /* uV */ |
| 74 | #define USB_PHY_1P8_HPM_LOAD 50000 /* uA */ |
| 75 | #define USB_PHY_1P8_LPM_LOAD 4000 /* uA */ |
| 76 | |
| 77 | #define USB_PHY_VDD_DIG_VOL_MIN 1000000 /* uV */ |
| 78 | #define USB_PHY_VDD_DIG_VOL_MAX 1320000 /* uV */ |
| 79 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 80 | static struct msm_otg *the_msm_otg; |
| 81 | |
Anji jonnala | 11aa5c4 | 2011-05-04 10:19:48 +0530 | [diff] [blame] | 82 | static struct regulator *hsusb_3p3; |
| 83 | static struct regulator *hsusb_1p8; |
| 84 | static struct regulator *hsusb_vddcx; |
| 85 | |
| 86 | static int msm_hsusb_init_vddcx(struct msm_otg *motg, int init) |
| 87 | { |
| 88 | int ret = 0; |
| 89 | |
| 90 | if (init) { |
| 91 | hsusb_vddcx = regulator_get(motg->otg.dev, "HSUSB_VDDCX"); |
| 92 | if (IS_ERR(hsusb_vddcx)) { |
| 93 | dev_err(motg->otg.dev, "unable to get hsusb vddcx\n"); |
| 94 | return PTR_ERR(hsusb_vddcx); |
| 95 | } |
| 96 | |
| 97 | ret = regulator_set_voltage(hsusb_vddcx, |
| 98 | USB_PHY_VDD_DIG_VOL_MIN, |
| 99 | USB_PHY_VDD_DIG_VOL_MAX); |
| 100 | if (ret) { |
| 101 | dev_err(motg->otg.dev, "unable to set the voltage " |
| 102 | "for hsusb vddcx\n"); |
| 103 | regulator_put(hsusb_vddcx); |
| 104 | return ret; |
| 105 | } |
| 106 | |
| 107 | ret = regulator_enable(hsusb_vddcx); |
| 108 | if (ret) { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 109 | regulator_set_voltage(hsusb_vddcx, 0, |
| 110 | USB_PHY_VDD_DIG_VOL_MIN); |
Anji jonnala | 11aa5c4 | 2011-05-04 10:19:48 +0530 | [diff] [blame] | 111 | regulator_put(hsusb_vddcx); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 112 | dev_err(motg->otg.dev, "unable to enable the hsusb vddcx\n"); |
| 113 | return ret; |
Anji jonnala | 11aa5c4 | 2011-05-04 10:19:48 +0530 | [diff] [blame] | 114 | } |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 115 | |
Anji jonnala | 11aa5c4 | 2011-05-04 10:19:48 +0530 | [diff] [blame] | 116 | } else { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 117 | |
Anji jonnala | 11aa5c4 | 2011-05-04 10:19:48 +0530 | [diff] [blame] | 118 | ret = regulator_disable(hsusb_vddcx); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 119 | if (ret) { |
Anji jonnala | 11aa5c4 | 2011-05-04 10:19:48 +0530 | [diff] [blame] | 120 | dev_err(motg->otg.dev, "unable to disable hsusb vddcx\n"); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 121 | return ret; |
| 122 | } |
| 123 | |
| 124 | ret = regulator_set_voltage(hsusb_vddcx, 0, |
| 125 | USB_PHY_VDD_DIG_VOL_MIN); |
| 126 | if (ret) { |
| 127 | dev_err(motg->otg.dev, "unable to set the voltage" |
| 128 | "for hsusb vddcx\n"); |
| 129 | return ret; |
| 130 | } |
Anji jonnala | 11aa5c4 | 2011-05-04 10:19:48 +0530 | [diff] [blame] | 131 | |
| 132 | regulator_put(hsusb_vddcx); |
| 133 | } |
| 134 | |
| 135 | return ret; |
| 136 | } |
| 137 | |
| 138 | static int msm_hsusb_ldo_init(struct msm_otg *motg, int init) |
| 139 | { |
| 140 | int rc = 0; |
| 141 | |
| 142 | if (init) { |
| 143 | hsusb_3p3 = regulator_get(motg->otg.dev, "HSUSB_3p3"); |
| 144 | if (IS_ERR(hsusb_3p3)) { |
| 145 | dev_err(motg->otg.dev, "unable to get hsusb 3p3\n"); |
| 146 | return PTR_ERR(hsusb_3p3); |
| 147 | } |
| 148 | |
| 149 | rc = regulator_set_voltage(hsusb_3p3, USB_PHY_3P3_VOL_MIN, |
| 150 | USB_PHY_3P3_VOL_MAX); |
| 151 | if (rc) { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 152 | dev_err(motg->otg.dev, "unable to set voltage level for" |
| 153 | "hsusb 3p3\n"); |
Anji jonnala | 11aa5c4 | 2011-05-04 10:19:48 +0530 | [diff] [blame] | 154 | goto put_3p3; |
| 155 | } |
| 156 | hsusb_1p8 = regulator_get(motg->otg.dev, "HSUSB_1p8"); |
| 157 | if (IS_ERR(hsusb_1p8)) { |
| 158 | dev_err(motg->otg.dev, "unable to get hsusb 1p8\n"); |
| 159 | rc = PTR_ERR(hsusb_1p8); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 160 | goto put_3p3_lpm; |
Anji jonnala | 11aa5c4 | 2011-05-04 10:19:48 +0530 | [diff] [blame] | 161 | } |
| 162 | rc = regulator_set_voltage(hsusb_1p8, USB_PHY_1P8_VOL_MIN, |
| 163 | USB_PHY_1P8_VOL_MAX); |
| 164 | if (rc) { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 165 | dev_err(motg->otg.dev, "unable to set voltage level for" |
| 166 | "hsusb 1p8\n"); |
Anji jonnala | 11aa5c4 | 2011-05-04 10:19:48 +0530 | [diff] [blame] | 167 | goto put_1p8; |
| 168 | } |
| 169 | |
| 170 | return 0; |
| 171 | } |
| 172 | |
Anji jonnala | 11aa5c4 | 2011-05-04 10:19:48 +0530 | [diff] [blame] | 173 | put_1p8: |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 174 | regulator_set_voltage(hsusb_1p8, 0, USB_PHY_1P8_VOL_MAX); |
Anji jonnala | 11aa5c4 | 2011-05-04 10:19:48 +0530 | [diff] [blame] | 175 | regulator_put(hsusb_1p8); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 176 | put_3p3_lpm: |
| 177 | regulator_set_voltage(hsusb_3p3, 0, USB_PHY_3P3_VOL_MAX); |
Anji jonnala | 11aa5c4 | 2011-05-04 10:19:48 +0530 | [diff] [blame] | 178 | put_3p3: |
| 179 | regulator_put(hsusb_3p3); |
| 180 | return rc; |
| 181 | } |
| 182 | |
Pavankumar Kondeti | 04aebcb | 2011-05-04 10:19:49 +0530 | [diff] [blame] | 183 | #ifdef CONFIG_PM_SLEEP |
| 184 | #define USB_PHY_SUSP_DIG_VOL 500000 |
| 185 | static int msm_hsusb_config_vddcx(int high) |
| 186 | { |
| 187 | int max_vol = USB_PHY_VDD_DIG_VOL_MAX; |
| 188 | int min_vol; |
| 189 | int ret; |
| 190 | |
| 191 | if (high) |
| 192 | min_vol = USB_PHY_VDD_DIG_VOL_MIN; |
| 193 | else |
| 194 | min_vol = USB_PHY_SUSP_DIG_VOL; |
| 195 | |
| 196 | ret = regulator_set_voltage(hsusb_vddcx, min_vol, max_vol); |
| 197 | if (ret) { |
| 198 | pr_err("%s: unable to set the voltage for regulator " |
| 199 | "HSUSB_VDDCX\n", __func__); |
| 200 | return ret; |
| 201 | } |
| 202 | |
| 203 | pr_debug("%s: min_vol:%d max_vol:%d\n", __func__, min_vol, max_vol); |
| 204 | |
| 205 | return ret; |
| 206 | } |
Hemant Kumar | 8e7bd07 | 2011-08-01 14:14:24 -0700 | [diff] [blame^] | 207 | #else |
| 208 | static int msm_hsusb_config_vddcx(int high) |
| 209 | { |
| 210 | return 0; |
| 211 | } |
Pavankumar Kondeti | 04aebcb | 2011-05-04 10:19:49 +0530 | [diff] [blame] | 212 | #endif |
| 213 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 214 | static int msm_hsusb_ldo_enable(struct msm_otg *motg, int on) |
Anji jonnala | 11aa5c4 | 2011-05-04 10:19:48 +0530 | [diff] [blame] | 215 | { |
| 216 | int ret = 0; |
| 217 | |
| 218 | if (!hsusb_1p8 || IS_ERR(hsusb_1p8)) { |
| 219 | pr_err("%s: HSUSB_1p8 is not initialized\n", __func__); |
| 220 | return -ENODEV; |
| 221 | } |
| 222 | |
| 223 | if (!hsusb_3p3 || IS_ERR(hsusb_3p3)) { |
| 224 | pr_err("%s: HSUSB_3p3 is not initialized\n", __func__); |
| 225 | return -ENODEV; |
| 226 | } |
| 227 | |
| 228 | if (on) { |
| 229 | ret = regulator_set_optimum_mode(hsusb_1p8, |
| 230 | USB_PHY_1P8_HPM_LOAD); |
| 231 | if (ret < 0) { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 232 | pr_err("%s: Unable to set HPM of the regulator:" |
Anji jonnala | 11aa5c4 | 2011-05-04 10:19:48 +0530 | [diff] [blame] | 233 | "HSUSB_1p8\n", __func__); |
| 234 | return ret; |
| 235 | } |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 236 | |
| 237 | ret = regulator_enable(hsusb_1p8); |
| 238 | if (ret) { |
| 239 | dev_err(motg->otg.dev, "%s: unable to enable the hsusb 1p8\n", |
| 240 | __func__); |
| 241 | regulator_set_optimum_mode(hsusb_1p8, 0); |
| 242 | return ret; |
| 243 | } |
| 244 | |
Anji jonnala | 11aa5c4 | 2011-05-04 10:19:48 +0530 | [diff] [blame] | 245 | ret = regulator_set_optimum_mode(hsusb_3p3, |
| 246 | USB_PHY_3P3_HPM_LOAD); |
| 247 | if (ret < 0) { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 248 | pr_err("%s: Unable to set HPM of the regulator:" |
Anji jonnala | 11aa5c4 | 2011-05-04 10:19:48 +0530 | [diff] [blame] | 249 | "HSUSB_3p3\n", __func__); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 250 | regulator_set_optimum_mode(hsusb_1p8, 0); |
| 251 | regulator_disable(hsusb_1p8); |
Anji jonnala | 11aa5c4 | 2011-05-04 10:19:48 +0530 | [diff] [blame] | 252 | return ret; |
| 253 | } |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 254 | |
| 255 | ret = regulator_enable(hsusb_3p3); |
| 256 | if (ret) { |
| 257 | dev_err(motg->otg.dev, "%s: unable to enable the hsusb 3p3\n", |
| 258 | __func__); |
| 259 | regulator_set_optimum_mode(hsusb_3p3, 0); |
| 260 | regulator_set_optimum_mode(hsusb_1p8, 0); |
| 261 | regulator_disable(hsusb_1p8); |
| 262 | return ret; |
| 263 | } |
| 264 | |
Anji jonnala | 11aa5c4 | 2011-05-04 10:19:48 +0530 | [diff] [blame] | 265 | } else { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 266 | ret = regulator_disable(hsusb_1p8); |
| 267 | if (ret) { |
| 268 | dev_err(motg->otg.dev, "%s: unable to disable the hsusb 1p8\n", |
| 269 | __func__); |
| 270 | return ret; |
| 271 | } |
| 272 | |
| 273 | ret = regulator_set_optimum_mode(hsusb_1p8, 0); |
Anji jonnala | 11aa5c4 | 2011-05-04 10:19:48 +0530 | [diff] [blame] | 274 | if (ret < 0) |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 275 | pr_err("%s: Unable to set LPM of the regulator:" |
Anji jonnala | 11aa5c4 | 2011-05-04 10:19:48 +0530 | [diff] [blame] | 276 | "HSUSB_1p8\n", __func__); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 277 | |
| 278 | ret = regulator_disable(hsusb_3p3); |
| 279 | if (ret) { |
| 280 | dev_err(motg->otg.dev, "%s: unable to disable the hsusb 3p3\n", |
| 281 | __func__); |
| 282 | return ret; |
| 283 | } |
| 284 | ret = regulator_set_optimum_mode(hsusb_3p3, 0); |
Anji jonnala | 11aa5c4 | 2011-05-04 10:19:48 +0530 | [diff] [blame] | 285 | if (ret < 0) |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 286 | pr_err("%s: Unable to set LPM of the regulator:" |
Anji jonnala | 11aa5c4 | 2011-05-04 10:19:48 +0530 | [diff] [blame] | 287 | "HSUSB_3p3\n", __func__); |
| 288 | } |
| 289 | |
| 290 | pr_debug("reg (%s)\n", on ? "HPM" : "LPM"); |
| 291 | return ret < 0 ? ret : 0; |
| 292 | } |
| 293 | |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 294 | static int ulpi_read(struct otg_transceiver *otg, u32 reg) |
| 295 | { |
| 296 | struct msm_otg *motg = container_of(otg, struct msm_otg, otg); |
| 297 | int cnt = 0; |
| 298 | |
| 299 | /* initiate read operation */ |
| 300 | writel(ULPI_RUN | ULPI_READ | ULPI_ADDR(reg), |
| 301 | USB_ULPI_VIEWPORT); |
| 302 | |
| 303 | /* wait for completion */ |
| 304 | while (cnt < ULPI_IO_TIMEOUT_USEC) { |
| 305 | if (!(readl(USB_ULPI_VIEWPORT) & ULPI_RUN)) |
| 306 | break; |
| 307 | udelay(1); |
| 308 | cnt++; |
| 309 | } |
| 310 | |
| 311 | if (cnt >= ULPI_IO_TIMEOUT_USEC) { |
| 312 | dev_err(otg->dev, "ulpi_read: timeout %08x\n", |
| 313 | readl(USB_ULPI_VIEWPORT)); |
| 314 | return -ETIMEDOUT; |
| 315 | } |
| 316 | return ULPI_DATA_READ(readl(USB_ULPI_VIEWPORT)); |
| 317 | } |
| 318 | |
| 319 | static int ulpi_write(struct otg_transceiver *otg, u32 val, u32 reg) |
| 320 | { |
| 321 | struct msm_otg *motg = container_of(otg, struct msm_otg, otg); |
| 322 | int cnt = 0; |
| 323 | |
| 324 | /* initiate write operation */ |
| 325 | writel(ULPI_RUN | ULPI_WRITE | |
| 326 | ULPI_ADDR(reg) | ULPI_DATA(val), |
| 327 | USB_ULPI_VIEWPORT); |
| 328 | |
| 329 | /* wait for completion */ |
| 330 | while (cnt < ULPI_IO_TIMEOUT_USEC) { |
| 331 | if (!(readl(USB_ULPI_VIEWPORT) & ULPI_RUN)) |
| 332 | break; |
| 333 | udelay(1); |
| 334 | cnt++; |
| 335 | } |
| 336 | |
| 337 | if (cnt >= ULPI_IO_TIMEOUT_USEC) { |
| 338 | dev_err(otg->dev, "ulpi_write: timeout\n"); |
| 339 | return -ETIMEDOUT; |
| 340 | } |
| 341 | return 0; |
| 342 | } |
| 343 | |
| 344 | static struct otg_io_access_ops msm_otg_io_ops = { |
| 345 | .read = ulpi_read, |
| 346 | .write = ulpi_write, |
| 347 | }; |
| 348 | |
| 349 | static void ulpi_init(struct msm_otg *motg) |
| 350 | { |
| 351 | struct msm_otg_platform_data *pdata = motg->pdata; |
| 352 | int *seq = pdata->phy_init_seq; |
| 353 | |
| 354 | if (!seq) |
| 355 | return; |
| 356 | |
| 357 | while (seq[0] >= 0) { |
| 358 | dev_vdbg(motg->otg.dev, "ulpi: write 0x%02x to 0x%02x\n", |
| 359 | seq[0], seq[1]); |
| 360 | ulpi_write(&motg->otg, seq[0], seq[1]); |
| 361 | seq += 2; |
| 362 | } |
| 363 | } |
| 364 | |
| 365 | static int msm_otg_link_clk_reset(struct msm_otg *motg, bool assert) |
| 366 | { |
| 367 | int ret; |
| 368 | |
| 369 | if (assert) { |
| 370 | ret = clk_reset(motg->clk, CLK_RESET_ASSERT); |
| 371 | if (ret) |
| 372 | dev_err(motg->otg.dev, "usb hs_clk assert failed\n"); |
| 373 | } else { |
| 374 | ret = clk_reset(motg->clk, CLK_RESET_DEASSERT); |
| 375 | if (ret) |
| 376 | dev_err(motg->otg.dev, "usb hs_clk deassert failed\n"); |
| 377 | } |
| 378 | return ret; |
| 379 | } |
| 380 | |
| 381 | static int msm_otg_phy_clk_reset(struct msm_otg *motg) |
| 382 | { |
| 383 | int ret; |
| 384 | |
| 385 | ret = clk_reset(motg->phy_reset_clk, CLK_RESET_ASSERT); |
| 386 | if (ret) { |
| 387 | dev_err(motg->otg.dev, "usb phy clk assert failed\n"); |
| 388 | return ret; |
| 389 | } |
| 390 | usleep_range(10000, 12000); |
| 391 | ret = clk_reset(motg->phy_reset_clk, CLK_RESET_DEASSERT); |
| 392 | if (ret) |
| 393 | dev_err(motg->otg.dev, "usb phy clk deassert failed\n"); |
| 394 | return ret; |
| 395 | } |
| 396 | |
| 397 | static int msm_otg_phy_reset(struct msm_otg *motg) |
| 398 | { |
| 399 | u32 val; |
| 400 | int ret; |
| 401 | int retries; |
| 402 | |
| 403 | ret = msm_otg_link_clk_reset(motg, 1); |
| 404 | if (ret) |
| 405 | return ret; |
| 406 | ret = msm_otg_phy_clk_reset(motg); |
| 407 | if (ret) |
| 408 | return ret; |
| 409 | ret = msm_otg_link_clk_reset(motg, 0); |
| 410 | if (ret) |
| 411 | return ret; |
| 412 | |
| 413 | val = readl(USB_PORTSC) & ~PORTSC_PTS_MASK; |
| 414 | writel(val | PORTSC_PTS_ULPI, USB_PORTSC); |
| 415 | |
| 416 | for (retries = 3; retries > 0; retries--) { |
| 417 | ret = ulpi_write(&motg->otg, ULPI_FUNC_CTRL_SUSPENDM, |
| 418 | ULPI_CLR(ULPI_FUNC_CTRL)); |
| 419 | if (!ret) |
| 420 | break; |
| 421 | ret = msm_otg_phy_clk_reset(motg); |
| 422 | if (ret) |
| 423 | return ret; |
| 424 | } |
| 425 | if (!retries) |
| 426 | return -ETIMEDOUT; |
| 427 | |
| 428 | /* This reset calibrates the phy, if the above write succeeded */ |
| 429 | ret = msm_otg_phy_clk_reset(motg); |
| 430 | if (ret) |
| 431 | return ret; |
| 432 | |
| 433 | for (retries = 3; retries > 0; retries--) { |
| 434 | ret = ulpi_read(&motg->otg, ULPI_DEBUG); |
| 435 | if (ret != -ETIMEDOUT) |
| 436 | break; |
| 437 | ret = msm_otg_phy_clk_reset(motg); |
| 438 | if (ret) |
| 439 | return ret; |
| 440 | } |
| 441 | if (!retries) |
| 442 | return -ETIMEDOUT; |
| 443 | |
| 444 | dev_info(motg->otg.dev, "phy_reset: success\n"); |
| 445 | return 0; |
| 446 | } |
| 447 | |
| 448 | #define LINK_RESET_TIMEOUT_USEC (250 * 1000) |
| 449 | static int msm_otg_reset(struct otg_transceiver *otg) |
| 450 | { |
| 451 | struct msm_otg *motg = container_of(otg, struct msm_otg, otg); |
| 452 | struct msm_otg_platform_data *pdata = motg->pdata; |
| 453 | int cnt = 0; |
| 454 | int ret; |
| 455 | u32 val = 0; |
| 456 | u32 ulpi_val = 0; |
| 457 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 458 | clk_enable(motg->clk); |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 459 | ret = msm_otg_phy_reset(motg); |
| 460 | if (ret) { |
| 461 | dev_err(otg->dev, "phy_reset failed\n"); |
| 462 | return ret; |
| 463 | } |
| 464 | |
| 465 | ulpi_init(motg); |
| 466 | |
| 467 | writel(USBCMD_RESET, USB_USBCMD); |
| 468 | while (cnt < LINK_RESET_TIMEOUT_USEC) { |
| 469 | if (!(readl(USB_USBCMD) & USBCMD_RESET)) |
| 470 | break; |
| 471 | udelay(1); |
| 472 | cnt++; |
| 473 | } |
| 474 | if (cnt >= LINK_RESET_TIMEOUT_USEC) |
| 475 | return -ETIMEDOUT; |
| 476 | |
| 477 | /* select ULPI phy */ |
| 478 | writel(0x80000000, USB_PORTSC); |
| 479 | |
| 480 | msleep(100); |
| 481 | |
| 482 | writel(0x0, USB_AHBBURST); |
| 483 | writel(0x00, USB_AHBMODE); |
| 484 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 485 | /* Ensure that RESET operation is completed before turning off clock */ |
| 486 | mb(); |
| 487 | clk_disable(motg->clk); |
| 488 | |
| 489 | val = readl_relaxed(USB_OTGSC); |
| 490 | if (pdata->mode == USB_OTG) { |
| 491 | ulpi_val = ULPI_INT_IDGRD | ULPI_INT_SESS_VALID; |
| 492 | val |= OTGSC_IDIE | OTGSC_BSVIE; |
| 493 | } else if (pdata->mode == USB_PERIPHERAL) { |
| 494 | ulpi_val = ULPI_INT_SESS_VALID; |
| 495 | val |= OTGSC_BSVIE; |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 496 | } |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 497 | writel_relaxed(val, USB_OTGSC); |
| 498 | ulpi_write(otg, ulpi_val, ULPI_USB_INT_EN_RISE); |
| 499 | ulpi_write(otg, ulpi_val, ULPI_USB_INT_EN_FALL); |
| 500 | |
| 501 | msm_chg_enable_aca_det(motg); |
| 502 | msm_chg_enable_aca_intr(motg); |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 503 | |
| 504 | return 0; |
| 505 | } |
| 506 | |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 507 | #define PHY_SUSPEND_TIMEOUT_USEC (500 * 1000) |
Pavankumar Kondeti | 7018773 | 2011-02-15 09:42:34 +0530 | [diff] [blame] | 508 | #define PHY_RESUME_TIMEOUT_USEC (100 * 1000) |
| 509 | |
| 510 | #ifdef CONFIG_PM_SLEEP |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 511 | static int msm_otg_suspend(struct msm_otg *motg) |
| 512 | { |
| 513 | struct otg_transceiver *otg = &motg->otg; |
| 514 | struct usb_bus *bus = otg->host; |
| 515 | struct msm_otg_platform_data *pdata = motg->pdata; |
| 516 | int cnt = 0; |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 517 | bool session_active; |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 518 | |
| 519 | if (atomic_read(&motg->in_lpm)) |
| 520 | return 0; |
| 521 | |
| 522 | disable_irq(motg->irq); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 523 | session_active = (otg->host && !test_bit(ID, &motg->inputs)) || |
| 524 | test_bit(B_SESS_VLD, &motg->inputs); |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 525 | /* |
Pavankumar Kondeti | 04aebcb | 2011-05-04 10:19:49 +0530 | [diff] [blame] | 526 | * Chipidea 45-nm PHY suspend sequence: |
| 527 | * |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 528 | * Interrupt Latch Register auto-clear feature is not present |
| 529 | * in all PHY versions. Latch register is clear on read type. |
| 530 | * Clear latch register to avoid spurious wakeup from |
| 531 | * low power mode (LPM). |
Pavankumar Kondeti | 04aebcb | 2011-05-04 10:19:49 +0530 | [diff] [blame] | 532 | * |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 533 | * PHY comparators are disabled when PHY enters into low power |
| 534 | * mode (LPM). Keep PHY comparators ON in LPM only when we expect |
| 535 | * VBUS/Id notifications from USB PHY. Otherwise turn off USB |
| 536 | * PHY comparators. This save significant amount of power. |
Pavankumar Kondeti | 04aebcb | 2011-05-04 10:19:49 +0530 | [diff] [blame] | 537 | * |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 538 | * PLL is not turned off when PHY enters into low power mode (LPM). |
| 539 | * Disable PLL for maximum power savings. |
| 540 | */ |
Pavankumar Kondeti | 04aebcb | 2011-05-04 10:19:49 +0530 | [diff] [blame] | 541 | |
| 542 | if (motg->pdata->phy_type == CI_45NM_INTEGRATED_PHY) { |
| 543 | ulpi_read(otg, 0x14); |
| 544 | if (pdata->otg_control == OTG_PHY_CONTROL) |
| 545 | ulpi_write(otg, 0x01, 0x30); |
| 546 | ulpi_write(otg, 0x08, 0x09); |
| 547 | } |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 548 | |
| 549 | /* |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 550 | * Turn off the OTG comparators, if depends on PMIC for |
| 551 | * VBUS and ID notifications. |
| 552 | */ |
| 553 | if ((motg->caps & ALLOW_PHY_COMP_DISABLE) && !session_active) { |
| 554 | ulpi_write(otg, OTG_COMP_DISABLE, |
| 555 | ULPI_SET(ULPI_PWR_CLK_MNG_REG)); |
| 556 | motg->lpm_flags |= PHY_OTG_COMP_DISABLED; |
| 557 | } |
| 558 | |
| 559 | /* |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 560 | * PHY may take some time or even fail to enter into low power |
| 561 | * mode (LPM). Hence poll for 500 msec and reset the PHY and link |
| 562 | * in failure case. |
| 563 | */ |
| 564 | writel(readl(USB_PORTSC) | PORTSC_PHCD, USB_PORTSC); |
| 565 | while (cnt < PHY_SUSPEND_TIMEOUT_USEC) { |
| 566 | if (readl(USB_PORTSC) & PORTSC_PHCD) |
| 567 | break; |
| 568 | udelay(1); |
| 569 | cnt++; |
| 570 | } |
| 571 | |
| 572 | if (cnt >= PHY_SUSPEND_TIMEOUT_USEC) { |
| 573 | dev_err(otg->dev, "Unable to suspend PHY\n"); |
| 574 | msm_otg_reset(otg); |
| 575 | enable_irq(motg->irq); |
| 576 | return -ETIMEDOUT; |
| 577 | } |
| 578 | |
| 579 | /* |
| 580 | * PHY has capability to generate interrupt asynchronously in low |
| 581 | * power mode (LPM). This interrupt is level triggered. So USB IRQ |
| 582 | * line must be disabled till async interrupt enable bit is cleared |
| 583 | * in USBCMD register. Assert STP (ULPI interface STOP signal) to |
| 584 | * block data communication from PHY. |
| 585 | */ |
| 586 | writel(readl(USB_USBCMD) | ASYNC_INTR_CTRL | ULPI_STP_CTRL, USB_USBCMD); |
| 587 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 588 | if (motg->caps & ALLOW_PHY_RETENTION && !session_active) { |
| 589 | writel_relaxed(readl_relaxed(USB_PHY_CTRL) & ~PHY_RETEN, |
| 590 | USB_PHY_CTRL); |
| 591 | motg->lpm_flags |= PHY_RETENTIONED; |
| 592 | } |
Pavankumar Kondeti | 04aebcb | 2011-05-04 10:19:49 +0530 | [diff] [blame] | 593 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 594 | /* Ensure that above operation is completed before turning off clocks */ |
| 595 | mb(); |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 596 | clk_disable(motg->pclk); |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 597 | if (motg->core_clk) |
| 598 | clk_disable(motg->core_clk); |
| 599 | |
Anji jonnala | 0f73cac | 2011-05-04 10:19:46 +0530 | [diff] [blame] | 600 | if (!IS_ERR(motg->pclk_src)) |
| 601 | clk_disable(motg->pclk_src); |
| 602 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 603 | if (motg->caps & ALLOW_PHY_POWER_COLLAPSE && !session_active) { |
| 604 | msm_hsusb_ldo_enable(motg, 0); |
| 605 | motg->lpm_flags |= PHY_PWR_COLLAPSED; |
Pavankumar Kondeti | 04aebcb | 2011-05-04 10:19:49 +0530 | [diff] [blame] | 606 | } |
| 607 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 608 | if (motg->lpm_flags & PHY_RETENTIONED) |
| 609 | msm_hsusb_config_vddcx(0); |
| 610 | |
| 611 | if (device_may_wakeup(otg->dev)) { |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 612 | enable_irq_wake(motg->irq); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 613 | if (motg->pdata->pmic_id_irq) |
| 614 | enable_irq_wake(motg->pdata->pmic_id_irq); |
| 615 | } |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 616 | if (bus) |
| 617 | clear_bit(HCD_FLAG_HW_ACCESSIBLE, &(bus_to_hcd(bus))->flags); |
| 618 | |
| 619 | atomic_set(&motg->in_lpm, 1); |
| 620 | enable_irq(motg->irq); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 621 | wake_unlock(&motg->wlock); |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 622 | |
| 623 | dev_info(otg->dev, "USB in low power mode\n"); |
| 624 | |
| 625 | return 0; |
| 626 | } |
| 627 | |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 628 | static int msm_otg_resume(struct msm_otg *motg) |
| 629 | { |
| 630 | struct otg_transceiver *otg = &motg->otg; |
| 631 | struct usb_bus *bus = otg->host; |
| 632 | int cnt = 0; |
| 633 | unsigned temp; |
| 634 | |
| 635 | if (!atomic_read(&motg->in_lpm)) |
| 636 | return 0; |
| 637 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 638 | wake_lock(&motg->wlock); |
Anji jonnala | 0f73cac | 2011-05-04 10:19:46 +0530 | [diff] [blame] | 639 | if (!IS_ERR(motg->pclk_src)) |
| 640 | clk_enable(motg->pclk_src); |
| 641 | |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 642 | clk_enable(motg->pclk); |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 643 | if (motg->core_clk) |
| 644 | clk_enable(motg->core_clk); |
| 645 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 646 | if (motg->lpm_flags & PHY_PWR_COLLAPSED) { |
| 647 | msm_hsusb_ldo_enable(motg, 1); |
| 648 | motg->lpm_flags &= ~PHY_PWR_COLLAPSED; |
| 649 | } |
| 650 | |
| 651 | if (motg->lpm_flags & PHY_RETENTIONED) { |
Pavankumar Kondeti | 04aebcb | 2011-05-04 10:19:49 +0530 | [diff] [blame] | 652 | msm_hsusb_config_vddcx(1); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 653 | writel_relaxed(readl_relaxed(USB_PHY_CTRL) | PHY_RETEN, |
| 654 | USB_PHY_CTRL); |
| 655 | motg->lpm_flags &= ~PHY_RETENTIONED; |
Pavankumar Kondeti | 04aebcb | 2011-05-04 10:19:49 +0530 | [diff] [blame] | 656 | } |
| 657 | |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 658 | temp = readl(USB_USBCMD); |
| 659 | temp &= ~ASYNC_INTR_CTRL; |
| 660 | temp &= ~ULPI_STP_CTRL; |
| 661 | writel(temp, USB_USBCMD); |
| 662 | |
| 663 | /* |
| 664 | * PHY comes out of low power mode (LPM) in case of wakeup |
| 665 | * from asynchronous interrupt. |
| 666 | */ |
| 667 | if (!(readl(USB_PORTSC) & PORTSC_PHCD)) |
| 668 | goto skip_phy_resume; |
| 669 | |
| 670 | writel(readl(USB_PORTSC) & ~PORTSC_PHCD, USB_PORTSC); |
| 671 | while (cnt < PHY_RESUME_TIMEOUT_USEC) { |
| 672 | if (!(readl(USB_PORTSC) & PORTSC_PHCD)) |
| 673 | break; |
| 674 | udelay(1); |
| 675 | cnt++; |
| 676 | } |
| 677 | |
| 678 | if (cnt >= PHY_RESUME_TIMEOUT_USEC) { |
| 679 | /* |
| 680 | * This is a fatal error. Reset the link and |
| 681 | * PHY. USB state can not be restored. Re-insertion |
| 682 | * of USB cable is the only way to get USB working. |
| 683 | */ |
| 684 | dev_err(otg->dev, "Unable to resume USB." |
| 685 | "Re-plugin the cable\n"); |
| 686 | msm_otg_reset(otg); |
| 687 | } |
| 688 | |
| 689 | skip_phy_resume: |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 690 | /* Turn on the OTG comparators on resume */ |
| 691 | if (motg->lpm_flags & PHY_OTG_COMP_DISABLED) { |
| 692 | ulpi_write(otg, OTG_COMP_DISABLE, |
| 693 | ULPI_CLR(ULPI_PWR_CLK_MNG_REG)); |
| 694 | motg->lpm_flags &= ~PHY_OTG_COMP_DISABLED; |
| 695 | } |
| 696 | if (device_may_wakeup(otg->dev)) { |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 697 | disable_irq_wake(motg->irq); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 698 | if (motg->pdata->pmic_id_irq) |
| 699 | disable_irq_wake(motg->pdata->pmic_id_irq); |
| 700 | } |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 701 | if (bus) |
| 702 | set_bit(HCD_FLAG_HW_ACCESSIBLE, &(bus_to_hcd(bus))->flags); |
| 703 | |
Pavankumar Kondeti | 2ce2c3a | 2011-05-02 11:56:33 +0530 | [diff] [blame] | 704 | atomic_set(&motg->in_lpm, 0); |
| 705 | |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 706 | if (motg->async_int) { |
| 707 | motg->async_int = 0; |
| 708 | pm_runtime_put(otg->dev); |
| 709 | enable_irq(motg->irq); |
| 710 | } |
| 711 | |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 712 | dev_info(otg->dev, "USB exited from low power mode\n"); |
| 713 | |
| 714 | return 0; |
| 715 | } |
Pavankumar Kondeti | 7018773 | 2011-02-15 09:42:34 +0530 | [diff] [blame] | 716 | #endif |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 717 | |
Pavankumar Kondeti | d860852 | 2011-05-04 10:19:47 +0530 | [diff] [blame] | 718 | static void msm_otg_notify_charger(struct msm_otg *motg, unsigned mA) |
| 719 | { |
| 720 | if (motg->cur_power == mA) |
| 721 | return; |
| 722 | |
Pavankumar Kondeti | d860852 | 2011-05-04 10:19:47 +0530 | [diff] [blame] | 723 | dev_info(motg->otg.dev, "Avail curr from USB = %u\n", mA); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 724 | pm8921_charger_vbus_draw(mA); |
Pavankumar Kondeti | d860852 | 2011-05-04 10:19:47 +0530 | [diff] [blame] | 725 | motg->cur_power = mA; |
| 726 | } |
| 727 | |
| 728 | static int msm_otg_set_power(struct otg_transceiver *otg, unsigned mA) |
| 729 | { |
| 730 | struct msm_otg *motg = container_of(otg, struct msm_otg, otg); |
| 731 | |
| 732 | /* |
| 733 | * Gadget driver uses set_power method to notify about the |
| 734 | * available current based on suspend/configured states. |
| 735 | * |
| 736 | * IDEV_CHG can be drawn irrespective of suspend/un-configured |
| 737 | * states when CDP/ACA is connected. |
| 738 | */ |
| 739 | if (motg->chg_type == USB_SDP_CHARGER) |
| 740 | msm_otg_notify_charger(motg, mA); |
| 741 | |
| 742 | return 0; |
| 743 | } |
| 744 | |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 745 | static void msm_otg_start_host(struct otg_transceiver *otg, int on) |
| 746 | { |
| 747 | struct msm_otg *motg = container_of(otg, struct msm_otg, otg); |
| 748 | struct msm_otg_platform_data *pdata = motg->pdata; |
| 749 | struct usb_hcd *hcd; |
| 750 | |
| 751 | if (!otg->host) |
| 752 | return; |
| 753 | |
| 754 | hcd = bus_to_hcd(otg->host); |
| 755 | |
| 756 | if (on) { |
| 757 | dev_dbg(otg->dev, "host on\n"); |
| 758 | |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 759 | /* |
| 760 | * Some boards have a switch cotrolled by gpio |
| 761 | * to enable/disable internal HUB. Enable internal |
| 762 | * HUB before kicking the host. |
| 763 | */ |
| 764 | if (pdata->setup_gpio) |
| 765 | pdata->setup_gpio(OTG_STATE_A_HOST); |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 766 | usb_add_hcd(hcd, hcd->irq, IRQF_SHARED); |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 767 | } else { |
| 768 | dev_dbg(otg->dev, "host off\n"); |
| 769 | |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 770 | usb_remove_hcd(hcd); |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 771 | if (pdata->setup_gpio) |
| 772 | pdata->setup_gpio(OTG_STATE_UNDEFINED); |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 773 | } |
| 774 | } |
| 775 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 776 | static int msm_otg_usbdev_notify(struct notifier_block *self, |
| 777 | unsigned long action, void *priv) |
| 778 | { |
| 779 | struct msm_otg *motg = container_of(self, struct msm_otg, usbdev_nb); |
| 780 | struct usb_device *udev; |
| 781 | |
| 782 | switch (action) { |
| 783 | case USB_DEVICE_ADD: |
| 784 | case USB_DEVICE_CONFIG: |
| 785 | udev = priv; |
| 786 | /* |
| 787 | * Interested in devices connected directly to the root hub. |
| 788 | * ACA dock can supply IDEV_CHG irrespective devices connected |
| 789 | * on the accessory port. |
| 790 | */ |
| 791 | if (!udev->parent || udev->parent->parent || |
| 792 | motg->chg_type == USB_ACA_DOCK_CHARGER) |
| 793 | break; |
| 794 | if (udev->actconfig) |
| 795 | motg->mA_port = udev->actconfig->desc.bMaxPower * 2; |
| 796 | else |
| 797 | motg->mA_port = IUNIT; |
| 798 | |
| 799 | if (test_bit(ID_A, &motg->inputs)) |
| 800 | msm_otg_notify_charger(motg, IDEV_CHG_MIN - |
| 801 | motg->mA_port); |
| 802 | break; |
| 803 | default: |
| 804 | break; |
| 805 | } |
| 806 | return NOTIFY_OK; |
| 807 | } |
| 808 | |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 809 | static int msm_otg_set_host(struct otg_transceiver *otg, struct usb_bus *host) |
| 810 | { |
| 811 | struct msm_otg *motg = container_of(otg, struct msm_otg, otg); |
| 812 | struct usb_hcd *hcd; |
| 813 | |
| 814 | /* |
| 815 | * Fail host registration if this board can support |
| 816 | * only peripheral configuration. |
| 817 | */ |
| 818 | if (motg->pdata->mode == USB_PERIPHERAL) { |
| 819 | dev_info(otg->dev, "Host mode is not supported\n"); |
| 820 | return -ENODEV; |
| 821 | } |
| 822 | |
| 823 | if (!host) { |
| 824 | if (otg->state == OTG_STATE_A_HOST) { |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 825 | pm_runtime_get_sync(otg->dev); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 826 | usb_unregister_notify(&motg->usbdev_nb); |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 827 | msm_otg_start_host(otg, 0); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 828 | if (motg->pdata->vbus_power) |
| 829 | motg->pdata->vbus_power(0); |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 830 | otg->host = NULL; |
| 831 | otg->state = OTG_STATE_UNDEFINED; |
| 832 | schedule_work(&motg->sm_work); |
| 833 | } else { |
| 834 | otg->host = NULL; |
| 835 | } |
| 836 | |
| 837 | return 0; |
| 838 | } |
| 839 | |
| 840 | hcd = bus_to_hcd(host); |
| 841 | hcd->power_budget = motg->pdata->power_budget; |
| 842 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 843 | motg->usbdev_nb.notifier_call = msm_otg_usbdev_notify; |
| 844 | usb_register_notify(&motg->usbdev_nb); |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 845 | otg->host = host; |
| 846 | dev_dbg(otg->dev, "host driver registered w/ tranceiver\n"); |
| 847 | |
| 848 | /* |
| 849 | * Kick the state machine work, if peripheral is not supported |
| 850 | * or peripheral is already registered with us. |
| 851 | */ |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 852 | if (motg->pdata->mode == USB_HOST || otg->gadget) { |
| 853 | pm_runtime_get_sync(otg->dev); |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 854 | schedule_work(&motg->sm_work); |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 855 | } |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 856 | |
| 857 | return 0; |
| 858 | } |
| 859 | |
| 860 | static void msm_otg_start_peripheral(struct otg_transceiver *otg, int on) |
| 861 | { |
| 862 | struct msm_otg *motg = container_of(otg, struct msm_otg, otg); |
| 863 | struct msm_otg_platform_data *pdata = motg->pdata; |
| 864 | |
| 865 | if (!otg->gadget) |
| 866 | return; |
| 867 | |
| 868 | if (on) { |
| 869 | dev_dbg(otg->dev, "gadget on\n"); |
| 870 | /* |
| 871 | * Some boards have a switch cotrolled by gpio |
| 872 | * to enable/disable internal HUB. Disable internal |
| 873 | * HUB before kicking the gadget. |
| 874 | */ |
| 875 | if (pdata->setup_gpio) |
| 876 | pdata->setup_gpio(OTG_STATE_B_PERIPHERAL); |
| 877 | usb_gadget_vbus_connect(otg->gadget); |
| 878 | } else { |
| 879 | dev_dbg(otg->dev, "gadget off\n"); |
| 880 | usb_gadget_vbus_disconnect(otg->gadget); |
| 881 | if (pdata->setup_gpio) |
| 882 | pdata->setup_gpio(OTG_STATE_UNDEFINED); |
| 883 | } |
| 884 | |
| 885 | } |
| 886 | |
| 887 | static int msm_otg_set_peripheral(struct otg_transceiver *otg, |
| 888 | struct usb_gadget *gadget) |
| 889 | { |
| 890 | struct msm_otg *motg = container_of(otg, struct msm_otg, otg); |
| 891 | |
| 892 | /* |
| 893 | * Fail peripheral registration if this board can support |
| 894 | * only host configuration. |
| 895 | */ |
| 896 | if (motg->pdata->mode == USB_HOST) { |
| 897 | dev_info(otg->dev, "Peripheral mode is not supported\n"); |
| 898 | return -ENODEV; |
| 899 | } |
| 900 | |
| 901 | if (!gadget) { |
| 902 | if (otg->state == OTG_STATE_B_PERIPHERAL) { |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 903 | pm_runtime_get_sync(otg->dev); |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 904 | msm_otg_start_peripheral(otg, 0); |
| 905 | otg->gadget = NULL; |
| 906 | otg->state = OTG_STATE_UNDEFINED; |
| 907 | schedule_work(&motg->sm_work); |
| 908 | } else { |
| 909 | otg->gadget = NULL; |
| 910 | } |
| 911 | |
| 912 | return 0; |
| 913 | } |
| 914 | otg->gadget = gadget; |
| 915 | dev_dbg(otg->dev, "peripheral driver registered w/ tranceiver\n"); |
| 916 | |
| 917 | /* |
| 918 | * Kick the state machine work, if host is not supported |
| 919 | * or host is already registered with us. |
| 920 | */ |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 921 | if (motg->pdata->mode == USB_PERIPHERAL || otg->host) { |
| 922 | pm_runtime_get_sync(otg->dev); |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 923 | schedule_work(&motg->sm_work); |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 924 | } |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 925 | |
| 926 | return 0; |
| 927 | } |
| 928 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 929 | #ifdef CONFIG_USB_MSM_ACA |
| 930 | static bool msm_chg_aca_detect(struct msm_otg *motg) |
| 931 | { |
| 932 | struct otg_transceiver *otg = &motg->otg; |
| 933 | u32 int_sts; |
| 934 | bool ret = false; |
| 935 | |
| 936 | if (motg->pdata->phy_type == CI_45NM_INTEGRATED_PHY) |
| 937 | goto out; |
| 938 | |
| 939 | int_sts = ulpi_read(otg, 0x87); |
| 940 | switch (int_sts & 0x1C) { |
| 941 | case 0x08: |
| 942 | if (!test_and_set_bit(ID_A, &motg->inputs)) { |
| 943 | dev_dbg(otg->dev, "ID_A\n"); |
| 944 | motg->chg_type = USB_ACA_A_CHARGER; |
| 945 | motg->chg_state = USB_CHG_STATE_DETECTED; |
| 946 | clear_bit(ID_B, &motg->inputs); |
| 947 | clear_bit(ID_C, &motg->inputs); |
| 948 | ret = true; |
| 949 | } |
| 950 | break; |
| 951 | case 0x0C: |
| 952 | if (!test_and_set_bit(ID_B, &motg->inputs)) { |
| 953 | dev_dbg(otg->dev, "ID_B\n"); |
| 954 | motg->chg_type = USB_ACA_B_CHARGER; |
| 955 | motg->chg_state = USB_CHG_STATE_DETECTED; |
| 956 | clear_bit(ID_A, &motg->inputs); |
| 957 | clear_bit(ID_C, &motg->inputs); |
| 958 | ret = true; |
| 959 | } |
| 960 | break; |
| 961 | case 0x10: |
| 962 | if (!test_and_set_bit(ID_C, &motg->inputs)) { |
| 963 | dev_dbg(otg->dev, "ID_C\n"); |
| 964 | motg->chg_type = USB_ACA_C_CHARGER; |
| 965 | motg->chg_state = USB_CHG_STATE_DETECTED; |
| 966 | clear_bit(ID_A, &motg->inputs); |
| 967 | clear_bit(ID_B, &motg->inputs); |
| 968 | ret = true; |
| 969 | } |
| 970 | break; |
| 971 | default: |
| 972 | ret = test_and_clear_bit(ID_A, &motg->inputs) | |
| 973 | test_and_clear_bit(ID_B, &motg->inputs) | |
| 974 | test_and_clear_bit(ID_C, &motg->inputs); |
| 975 | if (ret) { |
| 976 | dev_dbg(otg->dev, "ID A/B/C is no more\n"); |
| 977 | motg->chg_type = USB_INVALID_CHARGER; |
| 978 | motg->chg_state = USB_CHG_STATE_UNDEFINED; |
| 979 | } |
| 980 | } |
| 981 | out: |
| 982 | return ret; |
| 983 | } |
| 984 | |
| 985 | static void msm_chg_enable_aca_det(struct msm_otg *motg) |
| 986 | { |
| 987 | struct otg_transceiver *otg = &motg->otg; |
| 988 | |
| 989 | switch (motg->pdata->phy_type) { |
| 990 | case SNPS_28NM_INTEGRATED_PHY: |
| 991 | /* ACA ID pin resistance detection enable */ |
| 992 | ulpi_write(otg, 0x20, 0x85); |
| 993 | break; |
| 994 | default: |
| 995 | break; |
| 996 | } |
| 997 | } |
| 998 | |
| 999 | static void msm_chg_enable_aca_intr(struct msm_otg *motg) |
| 1000 | { |
| 1001 | struct otg_transceiver *otg = &motg->otg; |
| 1002 | |
| 1003 | switch (motg->pdata->phy_type) { |
| 1004 | case SNPS_28NM_INTEGRATED_PHY: |
| 1005 | /* Enables ACA Detection interrupt (on any RID change) */ |
| 1006 | ulpi_write(otg, 0x20, 0x94); |
| 1007 | break; |
| 1008 | default: |
| 1009 | break; |
| 1010 | } |
| 1011 | } |
| 1012 | |
| 1013 | static bool msm_chg_check_aca_intr(struct msm_otg *motg) |
| 1014 | { |
| 1015 | struct otg_transceiver *otg = &motg->otg; |
| 1016 | bool ret = false; |
| 1017 | |
| 1018 | switch (motg->pdata->phy_type) { |
| 1019 | case SNPS_28NM_INTEGRATED_PHY: |
| 1020 | if (ulpi_read(otg, 0x91) & 1) { |
| 1021 | dev_dbg(otg->dev, "RID change\n"); |
| 1022 | ulpi_write(otg, 0x01, 0x92); |
| 1023 | ret = msm_chg_aca_detect(motg); |
| 1024 | } |
| 1025 | default: |
| 1026 | break; |
| 1027 | } |
| 1028 | return ret; |
| 1029 | } |
| 1030 | #endif |
Pavankumar Kondeti | d860852 | 2011-05-04 10:19:47 +0530 | [diff] [blame] | 1031 | static bool msm_chg_check_secondary_det(struct msm_otg *motg) |
| 1032 | { |
| 1033 | struct otg_transceiver *otg = &motg->otg; |
| 1034 | u32 chg_det; |
| 1035 | bool ret = false; |
| 1036 | |
| 1037 | switch (motg->pdata->phy_type) { |
| 1038 | case CI_45NM_INTEGRATED_PHY: |
| 1039 | chg_det = ulpi_read(otg, 0x34); |
| 1040 | ret = chg_det & (1 << 4); |
| 1041 | break; |
| 1042 | case SNPS_28NM_INTEGRATED_PHY: |
| 1043 | chg_det = ulpi_read(otg, 0x87); |
| 1044 | ret = chg_det & 1; |
| 1045 | break; |
| 1046 | default: |
| 1047 | break; |
| 1048 | } |
| 1049 | return ret; |
| 1050 | } |
| 1051 | |
| 1052 | static void msm_chg_enable_secondary_det(struct msm_otg *motg) |
| 1053 | { |
| 1054 | struct otg_transceiver *otg = &motg->otg; |
| 1055 | u32 chg_det; |
| 1056 | |
| 1057 | switch (motg->pdata->phy_type) { |
| 1058 | case CI_45NM_INTEGRATED_PHY: |
| 1059 | chg_det = ulpi_read(otg, 0x34); |
| 1060 | /* Turn off charger block */ |
| 1061 | chg_det |= ~(1 << 1); |
| 1062 | ulpi_write(otg, chg_det, 0x34); |
| 1063 | udelay(20); |
| 1064 | /* control chg block via ULPI */ |
| 1065 | chg_det &= ~(1 << 3); |
| 1066 | ulpi_write(otg, chg_det, 0x34); |
| 1067 | /* put it in host mode for enabling D- source */ |
| 1068 | chg_det &= ~(1 << 2); |
| 1069 | ulpi_write(otg, chg_det, 0x34); |
| 1070 | /* Turn on chg detect block */ |
| 1071 | chg_det &= ~(1 << 1); |
| 1072 | ulpi_write(otg, chg_det, 0x34); |
| 1073 | udelay(20); |
| 1074 | /* enable chg detection */ |
| 1075 | chg_det &= ~(1 << 0); |
| 1076 | ulpi_write(otg, chg_det, 0x34); |
| 1077 | break; |
| 1078 | case SNPS_28NM_INTEGRATED_PHY: |
| 1079 | /* |
| 1080 | * Configure DM as current source, DP as current sink |
| 1081 | * and enable battery charging comparators. |
| 1082 | */ |
| 1083 | ulpi_write(otg, 0x8, 0x85); |
| 1084 | ulpi_write(otg, 0x2, 0x85); |
| 1085 | ulpi_write(otg, 0x1, 0x85); |
| 1086 | break; |
| 1087 | default: |
| 1088 | break; |
| 1089 | } |
| 1090 | } |
| 1091 | |
| 1092 | static bool msm_chg_check_primary_det(struct msm_otg *motg) |
| 1093 | { |
| 1094 | struct otg_transceiver *otg = &motg->otg; |
| 1095 | u32 chg_det; |
| 1096 | bool ret = false; |
| 1097 | |
| 1098 | switch (motg->pdata->phy_type) { |
| 1099 | case CI_45NM_INTEGRATED_PHY: |
| 1100 | chg_det = ulpi_read(otg, 0x34); |
| 1101 | ret = chg_det & (1 << 4); |
| 1102 | break; |
| 1103 | case SNPS_28NM_INTEGRATED_PHY: |
| 1104 | chg_det = ulpi_read(otg, 0x87); |
| 1105 | ret = chg_det & 1; |
| 1106 | break; |
| 1107 | default: |
| 1108 | break; |
| 1109 | } |
| 1110 | return ret; |
| 1111 | } |
| 1112 | |
| 1113 | static void msm_chg_enable_primary_det(struct msm_otg *motg) |
| 1114 | { |
| 1115 | struct otg_transceiver *otg = &motg->otg; |
| 1116 | u32 chg_det; |
| 1117 | |
| 1118 | switch (motg->pdata->phy_type) { |
| 1119 | case CI_45NM_INTEGRATED_PHY: |
| 1120 | chg_det = ulpi_read(otg, 0x34); |
| 1121 | /* enable chg detection */ |
| 1122 | chg_det &= ~(1 << 0); |
| 1123 | ulpi_write(otg, chg_det, 0x34); |
| 1124 | break; |
| 1125 | case SNPS_28NM_INTEGRATED_PHY: |
| 1126 | /* |
| 1127 | * Configure DP as current source, DM as current sink |
| 1128 | * and enable battery charging comparators. |
| 1129 | */ |
| 1130 | ulpi_write(otg, 0x2, 0x85); |
| 1131 | ulpi_write(otg, 0x1, 0x85); |
| 1132 | break; |
| 1133 | default: |
| 1134 | break; |
| 1135 | } |
| 1136 | } |
| 1137 | |
| 1138 | static bool msm_chg_check_dcd(struct msm_otg *motg) |
| 1139 | { |
| 1140 | struct otg_transceiver *otg = &motg->otg; |
| 1141 | u32 line_state; |
| 1142 | bool ret = false; |
| 1143 | |
| 1144 | switch (motg->pdata->phy_type) { |
| 1145 | case CI_45NM_INTEGRATED_PHY: |
| 1146 | line_state = ulpi_read(otg, 0x15); |
| 1147 | ret = !(line_state & 1); |
| 1148 | break; |
| 1149 | case SNPS_28NM_INTEGRATED_PHY: |
| 1150 | line_state = ulpi_read(otg, 0x87); |
| 1151 | ret = line_state & 2; |
| 1152 | break; |
| 1153 | default: |
| 1154 | break; |
| 1155 | } |
| 1156 | return ret; |
| 1157 | } |
| 1158 | |
| 1159 | static void msm_chg_disable_dcd(struct msm_otg *motg) |
| 1160 | { |
| 1161 | struct otg_transceiver *otg = &motg->otg; |
| 1162 | u32 chg_det; |
| 1163 | |
| 1164 | switch (motg->pdata->phy_type) { |
| 1165 | case CI_45NM_INTEGRATED_PHY: |
| 1166 | chg_det = ulpi_read(otg, 0x34); |
| 1167 | chg_det &= ~(1 << 5); |
| 1168 | ulpi_write(otg, chg_det, 0x34); |
| 1169 | break; |
| 1170 | case SNPS_28NM_INTEGRATED_PHY: |
| 1171 | ulpi_write(otg, 0x10, 0x86); |
| 1172 | break; |
| 1173 | default: |
| 1174 | break; |
| 1175 | } |
| 1176 | } |
| 1177 | |
| 1178 | static void msm_chg_enable_dcd(struct msm_otg *motg) |
| 1179 | { |
| 1180 | struct otg_transceiver *otg = &motg->otg; |
| 1181 | u32 chg_det; |
| 1182 | |
| 1183 | switch (motg->pdata->phy_type) { |
| 1184 | case CI_45NM_INTEGRATED_PHY: |
| 1185 | chg_det = ulpi_read(otg, 0x34); |
| 1186 | /* Turn on D+ current source */ |
| 1187 | chg_det |= (1 << 5); |
| 1188 | ulpi_write(otg, chg_det, 0x34); |
| 1189 | break; |
| 1190 | case SNPS_28NM_INTEGRATED_PHY: |
| 1191 | /* Data contact detection enable */ |
| 1192 | ulpi_write(otg, 0x10, 0x85); |
| 1193 | break; |
| 1194 | default: |
| 1195 | break; |
| 1196 | } |
| 1197 | } |
| 1198 | |
| 1199 | static void msm_chg_block_on(struct msm_otg *motg) |
| 1200 | { |
| 1201 | struct otg_transceiver *otg = &motg->otg; |
| 1202 | u32 func_ctrl, chg_det; |
| 1203 | |
| 1204 | /* put the controller in non-driving mode */ |
| 1205 | func_ctrl = ulpi_read(otg, ULPI_FUNC_CTRL); |
| 1206 | func_ctrl &= ~ULPI_FUNC_CTRL_OPMODE_MASK; |
| 1207 | func_ctrl |= ULPI_FUNC_CTRL_OPMODE_NONDRIVING; |
| 1208 | ulpi_write(otg, func_ctrl, ULPI_FUNC_CTRL); |
| 1209 | |
| 1210 | switch (motg->pdata->phy_type) { |
| 1211 | case CI_45NM_INTEGRATED_PHY: |
| 1212 | chg_det = ulpi_read(otg, 0x34); |
| 1213 | /* control chg block via ULPI */ |
| 1214 | chg_det &= ~(1 << 3); |
| 1215 | ulpi_write(otg, chg_det, 0x34); |
| 1216 | /* Turn on chg detect block */ |
| 1217 | chg_det &= ~(1 << 1); |
| 1218 | ulpi_write(otg, chg_det, 0x34); |
| 1219 | udelay(20); |
| 1220 | break; |
| 1221 | case SNPS_28NM_INTEGRATED_PHY: |
| 1222 | /* Clear charger detecting control bits */ |
| 1223 | ulpi_write(otg, 0x3F, 0x86); |
| 1224 | /* Clear alt interrupt latch and enable bits */ |
| 1225 | ulpi_write(otg, 0x1F, 0x92); |
| 1226 | ulpi_write(otg, 0x1F, 0x95); |
| 1227 | udelay(100); |
| 1228 | break; |
| 1229 | default: |
| 1230 | break; |
| 1231 | } |
| 1232 | } |
| 1233 | |
| 1234 | static void msm_chg_block_off(struct msm_otg *motg) |
| 1235 | { |
| 1236 | struct otg_transceiver *otg = &motg->otg; |
| 1237 | u32 func_ctrl, chg_det; |
| 1238 | |
| 1239 | switch (motg->pdata->phy_type) { |
| 1240 | case CI_45NM_INTEGRATED_PHY: |
| 1241 | chg_det = ulpi_read(otg, 0x34); |
| 1242 | /* Turn off charger block */ |
| 1243 | chg_det |= ~(1 << 1); |
| 1244 | ulpi_write(otg, chg_det, 0x34); |
| 1245 | break; |
| 1246 | case SNPS_28NM_INTEGRATED_PHY: |
| 1247 | /* Clear charger detecting control bits */ |
| 1248 | ulpi_write(otg, 0x3F, 0x86); |
| 1249 | /* Clear alt interrupt latch and enable bits */ |
| 1250 | ulpi_write(otg, 0x1F, 0x92); |
| 1251 | ulpi_write(otg, 0x1F, 0x95); |
| 1252 | break; |
| 1253 | default: |
| 1254 | break; |
| 1255 | } |
| 1256 | |
| 1257 | /* put the controller in normal mode */ |
| 1258 | func_ctrl = ulpi_read(otg, ULPI_FUNC_CTRL); |
| 1259 | func_ctrl &= ~ULPI_FUNC_CTRL_OPMODE_MASK; |
| 1260 | func_ctrl |= ULPI_FUNC_CTRL_OPMODE_NORMAL; |
| 1261 | ulpi_write(otg, func_ctrl, ULPI_FUNC_CTRL); |
| 1262 | } |
| 1263 | |
| 1264 | #define MSM_CHG_DCD_POLL_TIME (100 * HZ/1000) /* 100 msec */ |
| 1265 | #define MSM_CHG_DCD_MAX_RETRIES 6 /* Tdcd_tmout = 6 * 100 msec */ |
| 1266 | #define MSM_CHG_PRIMARY_DET_TIME (40 * HZ/1000) /* TVDPSRC_ON */ |
| 1267 | #define MSM_CHG_SECONDARY_DET_TIME (40 * HZ/1000) /* TVDMSRC_ON */ |
| 1268 | static void msm_chg_detect_work(struct work_struct *w) |
| 1269 | { |
| 1270 | struct msm_otg *motg = container_of(w, struct msm_otg, chg_work.work); |
| 1271 | struct otg_transceiver *otg = &motg->otg; |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1272 | bool is_dcd, tmout, vout, is_aca; |
Pavankumar Kondeti | d860852 | 2011-05-04 10:19:47 +0530 | [diff] [blame] | 1273 | unsigned long delay; |
| 1274 | |
| 1275 | dev_dbg(otg->dev, "chg detection work\n"); |
| 1276 | switch (motg->chg_state) { |
| 1277 | case USB_CHG_STATE_UNDEFINED: |
| 1278 | pm_runtime_get_sync(otg->dev); |
| 1279 | msm_chg_block_on(motg); |
| 1280 | msm_chg_enable_dcd(motg); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1281 | msm_chg_enable_aca_det(motg); |
Pavankumar Kondeti | d860852 | 2011-05-04 10:19:47 +0530 | [diff] [blame] | 1282 | motg->chg_state = USB_CHG_STATE_WAIT_FOR_DCD; |
| 1283 | motg->dcd_retries = 0; |
| 1284 | delay = MSM_CHG_DCD_POLL_TIME; |
| 1285 | break; |
| 1286 | case USB_CHG_STATE_WAIT_FOR_DCD: |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1287 | is_aca = msm_chg_aca_detect(motg); |
| 1288 | if (is_aca) { |
| 1289 | /* |
| 1290 | * ID_A can be ACA dock too. continue |
| 1291 | * primary detection after DCD. |
| 1292 | */ |
| 1293 | if (test_bit(ID_A, &motg->inputs)) { |
| 1294 | motg->chg_state = USB_CHG_STATE_WAIT_FOR_DCD; |
| 1295 | } else { |
| 1296 | delay = 0; |
| 1297 | break; |
| 1298 | } |
| 1299 | } |
Pavankumar Kondeti | d860852 | 2011-05-04 10:19:47 +0530 | [diff] [blame] | 1300 | is_dcd = msm_chg_check_dcd(motg); |
| 1301 | tmout = ++motg->dcd_retries == MSM_CHG_DCD_MAX_RETRIES; |
| 1302 | if (is_dcd || tmout) { |
| 1303 | msm_chg_disable_dcd(motg); |
| 1304 | msm_chg_enable_primary_det(motg); |
| 1305 | delay = MSM_CHG_PRIMARY_DET_TIME; |
| 1306 | motg->chg_state = USB_CHG_STATE_DCD_DONE; |
| 1307 | } else { |
| 1308 | delay = MSM_CHG_DCD_POLL_TIME; |
| 1309 | } |
| 1310 | break; |
| 1311 | case USB_CHG_STATE_DCD_DONE: |
| 1312 | vout = msm_chg_check_primary_det(motg); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1313 | is_aca = msm_chg_aca_detect(motg); |
| 1314 | if (is_aca) { |
| 1315 | if (vout && test_bit(ID_A, &motg->inputs)) |
| 1316 | motg->chg_type = USB_ACA_DOCK_CHARGER; |
| 1317 | delay = 0; |
| 1318 | break; |
| 1319 | } |
Pavankumar Kondeti | d860852 | 2011-05-04 10:19:47 +0530 | [diff] [blame] | 1320 | if (vout) { |
| 1321 | msm_chg_enable_secondary_det(motg); |
| 1322 | delay = MSM_CHG_SECONDARY_DET_TIME; |
| 1323 | motg->chg_state = USB_CHG_STATE_PRIMARY_DONE; |
| 1324 | } else { |
| 1325 | motg->chg_type = USB_SDP_CHARGER; |
| 1326 | motg->chg_state = USB_CHG_STATE_DETECTED; |
| 1327 | delay = 0; |
| 1328 | } |
| 1329 | break; |
| 1330 | case USB_CHG_STATE_PRIMARY_DONE: |
| 1331 | vout = msm_chg_check_secondary_det(motg); |
| 1332 | if (vout) |
| 1333 | motg->chg_type = USB_DCP_CHARGER; |
| 1334 | else |
| 1335 | motg->chg_type = USB_CDP_CHARGER; |
| 1336 | motg->chg_state = USB_CHG_STATE_SECONDARY_DONE; |
| 1337 | /* fall through */ |
| 1338 | case USB_CHG_STATE_SECONDARY_DONE: |
| 1339 | motg->chg_state = USB_CHG_STATE_DETECTED; |
| 1340 | case USB_CHG_STATE_DETECTED: |
| 1341 | msm_chg_block_off(motg); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1342 | msm_chg_enable_aca_det(motg); |
| 1343 | msm_chg_enable_aca_intr(motg); |
Pavankumar Kondeti | d860852 | 2011-05-04 10:19:47 +0530 | [diff] [blame] | 1344 | dev_dbg(otg->dev, "charger = %d\n", motg->chg_type); |
| 1345 | schedule_work(&motg->sm_work); |
| 1346 | return; |
| 1347 | default: |
| 1348 | return; |
| 1349 | } |
| 1350 | |
| 1351 | schedule_delayed_work(&motg->chg_work, delay); |
| 1352 | } |
| 1353 | |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 1354 | /* |
| 1355 | * We support OTG, Peripheral only and Host only configurations. In case |
| 1356 | * of OTG, mode switch (host-->peripheral/peripheral-->host) can happen |
| 1357 | * via Id pin status or user request (debugfs). Id/BSV interrupts are not |
| 1358 | * enabled when switch is controlled by user and default mode is supplied |
| 1359 | * by board file, which can be changed by userspace later. |
| 1360 | */ |
| 1361 | static void msm_otg_init_sm(struct msm_otg *motg) |
| 1362 | { |
| 1363 | struct msm_otg_platform_data *pdata = motg->pdata; |
| 1364 | u32 otgsc = readl(USB_OTGSC); |
| 1365 | |
| 1366 | switch (pdata->mode) { |
| 1367 | case USB_OTG: |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1368 | if (pdata->otg_control == OTG_USER_CONTROL) { |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 1369 | if (pdata->default_mode == USB_HOST) { |
| 1370 | clear_bit(ID, &motg->inputs); |
| 1371 | } else if (pdata->default_mode == USB_PERIPHERAL) { |
| 1372 | set_bit(ID, &motg->inputs); |
| 1373 | set_bit(B_SESS_VLD, &motg->inputs); |
| 1374 | } else { |
| 1375 | set_bit(ID, &motg->inputs); |
| 1376 | clear_bit(B_SESS_VLD, &motg->inputs); |
| 1377 | } |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1378 | } else { |
| 1379 | if (otgsc & OTGSC_ID) |
| 1380 | set_bit(ID, &motg->inputs); |
| 1381 | else |
| 1382 | clear_bit(ID, &motg->inputs); |
| 1383 | |
| 1384 | if (otgsc & OTGSC_BSV) |
| 1385 | set_bit(B_SESS_VLD, &motg->inputs); |
| 1386 | else |
| 1387 | clear_bit(B_SESS_VLD, &motg->inputs); |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 1388 | } |
| 1389 | break; |
| 1390 | case USB_HOST: |
| 1391 | clear_bit(ID, &motg->inputs); |
| 1392 | break; |
| 1393 | case USB_PERIPHERAL: |
| 1394 | set_bit(ID, &motg->inputs); |
| 1395 | if (otgsc & OTGSC_BSV) |
| 1396 | set_bit(B_SESS_VLD, &motg->inputs); |
| 1397 | else |
| 1398 | clear_bit(B_SESS_VLD, &motg->inputs); |
| 1399 | break; |
| 1400 | default: |
| 1401 | break; |
| 1402 | } |
| 1403 | } |
| 1404 | |
| 1405 | static void msm_otg_sm_work(struct work_struct *w) |
| 1406 | { |
| 1407 | struct msm_otg *motg = container_of(w, struct msm_otg, sm_work); |
| 1408 | struct otg_transceiver *otg = &motg->otg; |
| 1409 | |
| 1410 | switch (otg->state) { |
| 1411 | case OTG_STATE_UNDEFINED: |
| 1412 | dev_dbg(otg->dev, "OTG_STATE_UNDEFINED state\n"); |
| 1413 | msm_otg_reset(otg); |
| 1414 | msm_otg_init_sm(motg); |
| 1415 | otg->state = OTG_STATE_B_IDLE; |
| 1416 | /* FALL THROUGH */ |
| 1417 | case OTG_STATE_B_IDLE: |
| 1418 | dev_dbg(otg->dev, "OTG_STATE_B_IDLE state\n"); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1419 | if ((!test_bit(ID, &motg->inputs) || |
| 1420 | test_bit(ID_A, &motg->inputs)) && otg->host) { |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 1421 | /* disable BSV bit */ |
| 1422 | writel(readl(USB_OTGSC) & ~OTGSC_BSVIE, USB_OTGSC); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1423 | if (motg->chg_type == USB_ACA_DOCK_CHARGER) |
| 1424 | msm_otg_notify_charger(motg, |
| 1425 | IDEV_CHG_MAX); |
| 1426 | else if (!test_bit(ID_A, &motg->inputs) && |
| 1427 | motg->pdata->vbus_power) |
| 1428 | motg->pdata->vbus_power(1); |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 1429 | msm_otg_start_host(otg, 1); |
| 1430 | otg->state = OTG_STATE_A_HOST; |
Pavankumar Kondeti | d860852 | 2011-05-04 10:19:47 +0530 | [diff] [blame] | 1431 | } else if (test_bit(B_SESS_VLD, &motg->inputs)) { |
| 1432 | switch (motg->chg_state) { |
| 1433 | case USB_CHG_STATE_UNDEFINED: |
| 1434 | msm_chg_detect_work(&motg->chg_work.work); |
| 1435 | break; |
| 1436 | case USB_CHG_STATE_DETECTED: |
| 1437 | switch (motg->chg_type) { |
| 1438 | case USB_DCP_CHARGER: |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1439 | case USB_ACA_B_CHARGER: |
Pavankumar Kondeti | d860852 | 2011-05-04 10:19:47 +0530 | [diff] [blame] | 1440 | msm_otg_notify_charger(motg, |
| 1441 | IDEV_CHG_MAX); |
| 1442 | break; |
| 1443 | case USB_CDP_CHARGER: |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1444 | case USB_ACA_C_CHARGER: |
Pavankumar Kondeti | d860852 | 2011-05-04 10:19:47 +0530 | [diff] [blame] | 1445 | msm_otg_notify_charger(motg, |
| 1446 | IDEV_CHG_MAX); |
| 1447 | msm_otg_start_peripheral(otg, 1); |
| 1448 | otg->state = OTG_STATE_B_PERIPHERAL; |
| 1449 | break; |
| 1450 | case USB_SDP_CHARGER: |
| 1451 | msm_otg_notify_charger(motg, IUNIT); |
| 1452 | msm_otg_start_peripheral(otg, 1); |
| 1453 | otg->state = OTG_STATE_B_PERIPHERAL; |
| 1454 | break; |
| 1455 | default: |
| 1456 | break; |
| 1457 | } |
| 1458 | break; |
| 1459 | default: |
| 1460 | break; |
| 1461 | } |
| 1462 | } else { |
| 1463 | /* |
| 1464 | * If charger detection work is pending, decrement |
| 1465 | * the pm usage counter to balance with the one that |
| 1466 | * is incremented in charger detection work. |
| 1467 | */ |
| 1468 | if (cancel_delayed_work_sync(&motg->chg_work)) { |
| 1469 | pm_runtime_put_sync(otg->dev); |
| 1470 | msm_otg_reset(otg); |
| 1471 | } |
| 1472 | msm_otg_notify_charger(motg, 0); |
| 1473 | motg->chg_state = USB_CHG_STATE_UNDEFINED; |
| 1474 | motg->chg_type = USB_INVALID_CHARGER; |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 1475 | } |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 1476 | pm_runtime_put_sync(otg->dev); |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 1477 | break; |
| 1478 | case OTG_STATE_B_PERIPHERAL: |
| 1479 | dev_dbg(otg->dev, "OTG_STATE_B_PERIPHERAL state\n"); |
| 1480 | if (!test_bit(B_SESS_VLD, &motg->inputs) || |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1481 | !test_bit(ID, &motg->inputs) || |
| 1482 | !test_bit(ID_C, &motg->inputs)) { |
Pavankumar Kondeti | d860852 | 2011-05-04 10:19:47 +0530 | [diff] [blame] | 1483 | msm_otg_notify_charger(motg, 0); |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 1484 | msm_otg_start_peripheral(otg, 0); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1485 | if (!test_bit(ID_B, &motg->inputs) && |
| 1486 | !test_bit(ID_A, &motg->inputs)) { |
| 1487 | motg->chg_state = USB_CHG_STATE_UNDEFINED; |
| 1488 | motg->chg_type = USB_INVALID_CHARGER; |
| 1489 | } |
| 1490 | otg->state = OTG_STATE_B_IDLE; |
| 1491 | msm_otg_reset(otg); |
| 1492 | schedule_work(w); |
| 1493 | } else if (test_bit(ID_C, &motg->inputs)) { |
| 1494 | msm_otg_notify_charger(motg, IDEV_CHG_MAX); |
| 1495 | pm_runtime_put_sync(otg->dev); |
| 1496 | } |
| 1497 | break; |
| 1498 | case OTG_STATE_A_HOST: |
| 1499 | dev_dbg(otg->dev, "OTG_STATE_A_HOST state\n"); |
| 1500 | if (test_bit(ID, &motg->inputs) && |
| 1501 | !test_bit(ID_A, &motg->inputs)) { |
| 1502 | msm_otg_start_host(otg, 0); |
| 1503 | writel(readl(USB_OTGSC) & ~OTGSC_BSVIE, USB_OTGSC); |
| 1504 | if (motg->pdata->vbus_power) |
| 1505 | motg->pdata->vbus_power(0); |
Pavankumar Kondeti | d860852 | 2011-05-04 10:19:47 +0530 | [diff] [blame] | 1506 | motg->chg_state = USB_CHG_STATE_UNDEFINED; |
| 1507 | motg->chg_type = USB_INVALID_CHARGER; |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 1508 | otg->state = OTG_STATE_B_IDLE; |
| 1509 | msm_otg_reset(otg); |
| 1510 | schedule_work(w); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1511 | } else if (test_bit(ID_A, &motg->inputs)) { |
| 1512 | writel(readl(USB_OTGSC) & ~OTGSC_BSVIE, USB_OTGSC); |
| 1513 | if (motg->pdata->vbus_power) |
| 1514 | motg->pdata->vbus_power(0); |
| 1515 | msm_otg_notify_charger(motg, |
| 1516 | IDEV_CHG_MIN - motg->mA_port); |
| 1517 | pm_runtime_put_sync(otg->dev); |
| 1518 | } else if (!test_bit(ID, &motg->inputs)) { |
| 1519 | motg->chg_state = USB_CHG_STATE_UNDEFINED; |
| 1520 | motg->chg_type = USB_INVALID_CHARGER; |
| 1521 | msm_otg_notify_charger(motg, 0); |
| 1522 | writel(readl(USB_OTGSC) & ~OTGSC_BSVIE, USB_OTGSC); |
| 1523 | if (motg->pdata->vbus_power) |
| 1524 | motg->pdata->vbus_power(1); |
| 1525 | pm_runtime_put_sync(otg->dev); |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 1526 | } |
| 1527 | break; |
| 1528 | default: |
| 1529 | break; |
| 1530 | } |
| 1531 | } |
| 1532 | |
| 1533 | static irqreturn_t msm_otg_irq(int irq, void *data) |
| 1534 | { |
| 1535 | struct msm_otg *motg = data; |
| 1536 | struct otg_transceiver *otg = &motg->otg; |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1537 | u32 otgsc = 0, usbsts; |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 1538 | |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 1539 | if (atomic_read(&motg->in_lpm)) { |
| 1540 | disable_irq_nosync(irq); |
| 1541 | motg->async_int = 1; |
| 1542 | pm_runtime_get(otg->dev); |
| 1543 | return IRQ_HANDLED; |
| 1544 | } |
| 1545 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1546 | usbsts = readl(USB_USBSTS); |
| 1547 | if ((usbsts & PHY_ALT_INT)) { |
| 1548 | writel(PHY_ALT_INT, USB_USBSTS); |
| 1549 | if (msm_chg_check_aca_intr(motg)) { |
| 1550 | pm_runtime_get_noresume(otg->dev); |
| 1551 | schedule_work(&motg->sm_work); |
| 1552 | } |
| 1553 | return IRQ_HANDLED; |
| 1554 | } |
| 1555 | |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 1556 | otgsc = readl(USB_OTGSC); |
| 1557 | if (!(otgsc & (OTGSC_IDIS | OTGSC_BSVIS))) |
| 1558 | return IRQ_NONE; |
| 1559 | |
| 1560 | if ((otgsc & OTGSC_IDIS) && (otgsc & OTGSC_IDIE)) { |
| 1561 | if (otgsc & OTGSC_ID) |
| 1562 | set_bit(ID, &motg->inputs); |
| 1563 | else |
| 1564 | clear_bit(ID, &motg->inputs); |
| 1565 | dev_dbg(otg->dev, "ID set/clear\n"); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1566 | schedule_work(&motg->sm_work); |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 1567 | pm_runtime_get_noresume(otg->dev); |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 1568 | } else if ((otgsc & OTGSC_BSVIS) && (otgsc & OTGSC_BSVIE)) { |
| 1569 | if (otgsc & OTGSC_BSV) |
| 1570 | set_bit(B_SESS_VLD, &motg->inputs); |
| 1571 | else |
| 1572 | clear_bit(B_SESS_VLD, &motg->inputs); |
| 1573 | dev_dbg(otg->dev, "BSV set/clear\n"); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1574 | schedule_work(&motg->sm_work); |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 1575 | pm_runtime_get_noresume(otg->dev); |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 1576 | } |
| 1577 | |
| 1578 | writel(otgsc, USB_OTGSC); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1579 | return IRQ_HANDLED; |
| 1580 | } |
| 1581 | |
| 1582 | static void msm_otg_set_vbus_state(int online) |
| 1583 | { |
| 1584 | struct msm_otg *motg = the_msm_otg; |
| 1585 | |
| 1586 | /* We depend on PMIC for only VBUS ON interrupt */ |
| 1587 | if (!atomic_read(&motg->in_lpm) || !online) |
| 1588 | return; |
| 1589 | |
| 1590 | /* |
| 1591 | * Let interrupt handler take care of resuming |
| 1592 | * the hardware. |
| 1593 | */ |
| 1594 | msm_otg_irq(motg->irq, (void *) motg); |
| 1595 | } |
| 1596 | |
| 1597 | static irqreturn_t msm_pmic_id_irq(int irq, void *data) |
| 1598 | { |
| 1599 | struct msm_otg *motg = data; |
| 1600 | |
| 1601 | if (atomic_read(&motg->in_lpm) && !motg->async_int) |
| 1602 | msm_otg_irq(motg->irq, motg); |
| 1603 | |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 1604 | return IRQ_HANDLED; |
| 1605 | } |
| 1606 | |
| 1607 | static int msm_otg_mode_show(struct seq_file *s, void *unused) |
| 1608 | { |
| 1609 | struct msm_otg *motg = s->private; |
| 1610 | struct otg_transceiver *otg = &motg->otg; |
| 1611 | |
| 1612 | switch (otg->state) { |
| 1613 | case OTG_STATE_A_HOST: |
| 1614 | seq_printf(s, "host\n"); |
| 1615 | break; |
| 1616 | case OTG_STATE_B_PERIPHERAL: |
| 1617 | seq_printf(s, "peripheral\n"); |
| 1618 | break; |
| 1619 | default: |
| 1620 | seq_printf(s, "none\n"); |
| 1621 | break; |
| 1622 | } |
| 1623 | |
| 1624 | return 0; |
| 1625 | } |
| 1626 | |
| 1627 | static int msm_otg_mode_open(struct inode *inode, struct file *file) |
| 1628 | { |
| 1629 | return single_open(file, msm_otg_mode_show, inode->i_private); |
| 1630 | } |
| 1631 | |
| 1632 | static ssize_t msm_otg_mode_write(struct file *file, const char __user *ubuf, |
| 1633 | size_t count, loff_t *ppos) |
| 1634 | { |
Pavankumar Kondeti | e2904ee | 2011-02-15 09:42:35 +0530 | [diff] [blame] | 1635 | struct seq_file *s = file->private_data; |
| 1636 | struct msm_otg *motg = s->private; |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 1637 | char buf[16]; |
| 1638 | struct otg_transceiver *otg = &motg->otg; |
| 1639 | int status = count; |
| 1640 | enum usb_mode_type req_mode; |
| 1641 | |
| 1642 | memset(buf, 0x00, sizeof(buf)); |
| 1643 | |
| 1644 | if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) { |
| 1645 | status = -EFAULT; |
| 1646 | goto out; |
| 1647 | } |
| 1648 | |
| 1649 | if (!strncmp(buf, "host", 4)) { |
| 1650 | req_mode = USB_HOST; |
| 1651 | } else if (!strncmp(buf, "peripheral", 10)) { |
| 1652 | req_mode = USB_PERIPHERAL; |
| 1653 | } else if (!strncmp(buf, "none", 4)) { |
| 1654 | req_mode = USB_NONE; |
| 1655 | } else { |
| 1656 | status = -EINVAL; |
| 1657 | goto out; |
| 1658 | } |
| 1659 | |
| 1660 | switch (req_mode) { |
| 1661 | case USB_NONE: |
| 1662 | switch (otg->state) { |
| 1663 | case OTG_STATE_A_HOST: |
| 1664 | case OTG_STATE_B_PERIPHERAL: |
| 1665 | set_bit(ID, &motg->inputs); |
| 1666 | clear_bit(B_SESS_VLD, &motg->inputs); |
| 1667 | break; |
| 1668 | default: |
| 1669 | goto out; |
| 1670 | } |
| 1671 | break; |
| 1672 | case USB_PERIPHERAL: |
| 1673 | switch (otg->state) { |
| 1674 | case OTG_STATE_B_IDLE: |
| 1675 | case OTG_STATE_A_HOST: |
| 1676 | set_bit(ID, &motg->inputs); |
| 1677 | set_bit(B_SESS_VLD, &motg->inputs); |
| 1678 | break; |
| 1679 | default: |
| 1680 | goto out; |
| 1681 | } |
| 1682 | break; |
| 1683 | case USB_HOST: |
| 1684 | switch (otg->state) { |
| 1685 | case OTG_STATE_B_IDLE: |
| 1686 | case OTG_STATE_B_PERIPHERAL: |
| 1687 | clear_bit(ID, &motg->inputs); |
| 1688 | break; |
| 1689 | default: |
| 1690 | goto out; |
| 1691 | } |
| 1692 | break; |
| 1693 | default: |
| 1694 | goto out; |
| 1695 | } |
| 1696 | |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 1697 | pm_runtime_get_sync(otg->dev); |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 1698 | schedule_work(&motg->sm_work); |
| 1699 | out: |
| 1700 | return status; |
| 1701 | } |
| 1702 | |
| 1703 | const struct file_operations msm_otg_mode_fops = { |
| 1704 | .open = msm_otg_mode_open, |
| 1705 | .read = seq_read, |
| 1706 | .write = msm_otg_mode_write, |
| 1707 | .llseek = seq_lseek, |
| 1708 | .release = single_release, |
| 1709 | }; |
| 1710 | |
| 1711 | static struct dentry *msm_otg_dbg_root; |
| 1712 | static struct dentry *msm_otg_dbg_mode; |
| 1713 | |
| 1714 | static int msm_otg_debugfs_init(struct msm_otg *motg) |
| 1715 | { |
| 1716 | msm_otg_dbg_root = debugfs_create_dir("msm_otg", NULL); |
| 1717 | |
| 1718 | if (!msm_otg_dbg_root || IS_ERR(msm_otg_dbg_root)) |
| 1719 | return -ENODEV; |
| 1720 | |
| 1721 | msm_otg_dbg_mode = debugfs_create_file("mode", S_IRUGO | S_IWUSR, |
| 1722 | msm_otg_dbg_root, motg, &msm_otg_mode_fops); |
| 1723 | if (!msm_otg_dbg_mode) { |
| 1724 | debugfs_remove(msm_otg_dbg_root); |
| 1725 | msm_otg_dbg_root = NULL; |
| 1726 | return -ENODEV; |
| 1727 | } |
| 1728 | |
| 1729 | return 0; |
| 1730 | } |
| 1731 | |
| 1732 | static void msm_otg_debugfs_cleanup(void) |
| 1733 | { |
| 1734 | debugfs_remove(msm_otg_dbg_mode); |
| 1735 | debugfs_remove(msm_otg_dbg_root); |
| 1736 | } |
| 1737 | |
| 1738 | static int __init msm_otg_probe(struct platform_device *pdev) |
| 1739 | { |
| 1740 | int ret = 0; |
| 1741 | struct resource *res; |
| 1742 | struct msm_otg *motg; |
| 1743 | struct otg_transceiver *otg; |
| 1744 | |
| 1745 | dev_info(&pdev->dev, "msm_otg probe\n"); |
| 1746 | if (!pdev->dev.platform_data) { |
| 1747 | dev_err(&pdev->dev, "No platform data given. Bailing out\n"); |
| 1748 | return -ENODEV; |
| 1749 | } |
| 1750 | |
| 1751 | motg = kzalloc(sizeof(struct msm_otg), GFP_KERNEL); |
| 1752 | if (!motg) { |
| 1753 | dev_err(&pdev->dev, "unable to allocate msm_otg\n"); |
| 1754 | return -ENOMEM; |
| 1755 | } |
| 1756 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1757 | the_msm_otg = motg; |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 1758 | motg->pdata = pdev->dev.platform_data; |
| 1759 | otg = &motg->otg; |
| 1760 | otg->dev = &pdev->dev; |
| 1761 | |
| 1762 | motg->phy_reset_clk = clk_get(&pdev->dev, "usb_phy_clk"); |
| 1763 | if (IS_ERR(motg->phy_reset_clk)) { |
| 1764 | dev_err(&pdev->dev, "failed to get usb_phy_clk\n"); |
| 1765 | ret = PTR_ERR(motg->phy_reset_clk); |
| 1766 | goto free_motg; |
| 1767 | } |
| 1768 | |
| 1769 | motg->clk = clk_get(&pdev->dev, "usb_hs_clk"); |
| 1770 | if (IS_ERR(motg->clk)) { |
| 1771 | dev_err(&pdev->dev, "failed to get usb_hs_clk\n"); |
| 1772 | ret = PTR_ERR(motg->clk); |
| 1773 | goto put_phy_reset_clk; |
| 1774 | } |
Anji jonnala | 0f73cac | 2011-05-04 10:19:46 +0530 | [diff] [blame] | 1775 | clk_set_rate(motg->clk, 60000000); |
| 1776 | |
| 1777 | /* |
| 1778 | * If USB Core is running its protocol engine based on CORE CLK, |
| 1779 | * CORE CLK must be running at >55Mhz for correct HSUSB |
| 1780 | * operation and USB core cannot tolerate frequency changes on |
| 1781 | * CORE CLK. For such USB cores, vote for maximum clk frequency |
| 1782 | * on pclk source |
| 1783 | */ |
| 1784 | if (motg->pdata->pclk_src_name) { |
| 1785 | motg->pclk_src = clk_get(&pdev->dev, |
| 1786 | motg->pdata->pclk_src_name); |
| 1787 | if (IS_ERR(motg->pclk_src)) |
| 1788 | goto put_clk; |
| 1789 | clk_set_rate(motg->pclk_src, INT_MAX); |
| 1790 | clk_enable(motg->pclk_src); |
| 1791 | } else |
| 1792 | motg->pclk_src = ERR_PTR(-ENOENT); |
| 1793 | |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 1794 | |
| 1795 | motg->pclk = clk_get(&pdev->dev, "usb_hs_pclk"); |
| 1796 | if (IS_ERR(motg->pclk)) { |
| 1797 | dev_err(&pdev->dev, "failed to get usb_hs_pclk\n"); |
| 1798 | ret = PTR_ERR(motg->pclk); |
Anji jonnala | 0f73cac | 2011-05-04 10:19:46 +0530 | [diff] [blame] | 1799 | goto put_pclk_src; |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 1800 | } |
| 1801 | |
| 1802 | /* |
| 1803 | * USB core clock is not present on all MSM chips. This |
| 1804 | * clock is introduced to remove the dependency on AXI |
| 1805 | * bus frequency. |
| 1806 | */ |
| 1807 | motg->core_clk = clk_get(&pdev->dev, "usb_hs_core_clk"); |
| 1808 | if (IS_ERR(motg->core_clk)) |
| 1809 | motg->core_clk = NULL; |
| 1810 | |
| 1811 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 1812 | if (!res) { |
| 1813 | dev_err(&pdev->dev, "failed to get platform resource mem\n"); |
| 1814 | ret = -ENODEV; |
| 1815 | goto put_core_clk; |
| 1816 | } |
| 1817 | |
| 1818 | motg->regs = ioremap(res->start, resource_size(res)); |
| 1819 | if (!motg->regs) { |
| 1820 | dev_err(&pdev->dev, "ioremap failed\n"); |
| 1821 | ret = -ENOMEM; |
| 1822 | goto put_core_clk; |
| 1823 | } |
| 1824 | dev_info(&pdev->dev, "OTG regs = %p\n", motg->regs); |
| 1825 | |
| 1826 | motg->irq = platform_get_irq(pdev, 0); |
| 1827 | if (!motg->irq) { |
| 1828 | dev_err(&pdev->dev, "platform_get_irq failed\n"); |
| 1829 | ret = -ENODEV; |
| 1830 | goto free_regs; |
| 1831 | } |
| 1832 | |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 1833 | clk_enable(motg->pclk); |
Anji jonnala | 11aa5c4 | 2011-05-04 10:19:48 +0530 | [diff] [blame] | 1834 | |
| 1835 | ret = msm_hsusb_init_vddcx(motg, 1); |
| 1836 | if (ret) { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1837 | dev_err(&pdev->dev, "hsusb vddcx init failed\n"); |
Anji jonnala | 11aa5c4 | 2011-05-04 10:19:48 +0530 | [diff] [blame] | 1838 | goto free_regs; |
| 1839 | } |
| 1840 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1841 | ret = msm_hsusb_config_vddcx(1); |
| 1842 | if (ret) { |
| 1843 | dev_err(&pdev->dev, "hsusb vddcx configuration failed\n"); |
| 1844 | goto free_init_vddcx; |
| 1845 | } |
| 1846 | |
Anji jonnala | 11aa5c4 | 2011-05-04 10:19:48 +0530 | [diff] [blame] | 1847 | ret = msm_hsusb_ldo_init(motg, 1); |
| 1848 | if (ret) { |
| 1849 | dev_err(&pdev->dev, "hsusb vreg configuration failed\n"); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1850 | goto free_init_vddcx; |
Anji jonnala | 11aa5c4 | 2011-05-04 10:19:48 +0530 | [diff] [blame] | 1851 | } |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1852 | |
| 1853 | ret = msm_hsusb_ldo_enable(motg, 1); |
Anji jonnala | 11aa5c4 | 2011-05-04 10:19:48 +0530 | [diff] [blame] | 1854 | if (ret) { |
| 1855 | dev_err(&pdev->dev, "hsusb vreg enable failed\n"); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1856 | goto free_ldo_init; |
Anji jonnala | 11aa5c4 | 2011-05-04 10:19:48 +0530 | [diff] [blame] | 1857 | } |
| 1858 | |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 1859 | if (motg->core_clk) |
| 1860 | clk_enable(motg->core_clk); |
| 1861 | |
| 1862 | writel(0, USB_USBINTR); |
| 1863 | writel(0, USB_OTGSC); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1864 | /* Ensure that above STOREs are completed before enabling interrupts */ |
| 1865 | mb(); |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 1866 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1867 | wake_lock_init(&motg->wlock, WAKE_LOCK_SUSPEND, "msm_otg"); |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 1868 | INIT_WORK(&motg->sm_work, msm_otg_sm_work); |
Pavankumar Kondeti | d860852 | 2011-05-04 10:19:47 +0530 | [diff] [blame] | 1869 | INIT_DELAYED_WORK(&motg->chg_work, msm_chg_detect_work); |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 1870 | ret = request_irq(motg->irq, msm_otg_irq, IRQF_SHARED, |
| 1871 | "msm_otg", motg); |
| 1872 | if (ret) { |
| 1873 | dev_err(&pdev->dev, "request irq failed\n"); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1874 | goto destroy_wlock; |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 1875 | } |
| 1876 | |
| 1877 | otg->init = msm_otg_reset; |
| 1878 | otg->set_host = msm_otg_set_host; |
| 1879 | otg->set_peripheral = msm_otg_set_peripheral; |
Pavankumar Kondeti | d860852 | 2011-05-04 10:19:47 +0530 | [diff] [blame] | 1880 | otg->set_power = msm_otg_set_power; |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 1881 | |
| 1882 | otg->io_ops = &msm_otg_io_ops; |
| 1883 | |
| 1884 | ret = otg_set_transceiver(&motg->otg); |
| 1885 | if (ret) { |
| 1886 | dev_err(&pdev->dev, "otg_set_transceiver failed\n"); |
| 1887 | goto free_irq; |
| 1888 | } |
| 1889 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1890 | if (motg->pdata->otg_control == OTG_PMIC_CONTROL) { |
| 1891 | if (motg->pdata->pmic_id_irq) { |
| 1892 | ret = request_irq(motg->pdata->pmic_id_irq, |
| 1893 | msm_pmic_id_irq, |
| 1894 | IRQF_TRIGGER_RISING | |
| 1895 | IRQF_TRIGGER_FALLING, |
| 1896 | "msm_otg", motg); |
| 1897 | if (ret) { |
| 1898 | dev_err(&pdev->dev, "request irq failed for PMIC ID\n"); |
| 1899 | goto remove_otg; |
| 1900 | } |
| 1901 | } else { |
| 1902 | ret = -ENODEV; |
| 1903 | dev_err(&pdev->dev, "PMIC IRQ for ID notifications doesn't exist\n"); |
| 1904 | goto remove_otg; |
| 1905 | } |
| 1906 | } |
| 1907 | |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 1908 | platform_set_drvdata(pdev, motg); |
| 1909 | device_init_wakeup(&pdev->dev, 1); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1910 | motg->mA_port = IUNIT; |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 1911 | |
| 1912 | if (motg->pdata->mode == USB_OTG && |
| 1913 | motg->pdata->otg_control == OTG_USER_CONTROL) { |
| 1914 | ret = msm_otg_debugfs_init(motg); |
| 1915 | if (ret) |
| 1916 | dev_dbg(&pdev->dev, "mode debugfs file is" |
| 1917 | "not available\n"); |
| 1918 | } |
| 1919 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1920 | if (motg->pdata->otg_control == OTG_PMIC_CONTROL) |
| 1921 | pm8921_charger_register_vbus_sn(&msm_otg_set_vbus_state); |
| 1922 | |
| 1923 | if (motg->pdata->phy_type == SNPS_28NM_INTEGRATED_PHY && |
| 1924 | motg->pdata->otg_control == OTG_PMIC_CONTROL && |
| 1925 | motg->pdata->pmic_id_irq) |
| 1926 | motg->caps = ALLOW_PHY_POWER_COLLAPSE | |
| 1927 | ALLOW_PHY_RETENTION | |
| 1928 | ALLOW_PHY_COMP_DISABLE; |
| 1929 | |
| 1930 | wake_lock(&motg->wlock); |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 1931 | pm_runtime_set_active(&pdev->dev); |
| 1932 | pm_runtime_enable(&pdev->dev); |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 1933 | |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 1934 | return 0; |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1935 | |
| 1936 | remove_otg: |
| 1937 | otg_set_transceiver(NULL); |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 1938 | free_irq: |
| 1939 | free_irq(motg->irq, motg); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1940 | destroy_wlock: |
| 1941 | wake_lock_destroy(&motg->wlock); |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 1942 | clk_disable(motg->pclk); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1943 | msm_hsusb_ldo_enable(motg, 0); |
| 1944 | free_ldo_init: |
Anji jonnala | 11aa5c4 | 2011-05-04 10:19:48 +0530 | [diff] [blame] | 1945 | msm_hsusb_ldo_init(motg, 0); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1946 | free_init_vddcx: |
Anji jonnala | 11aa5c4 | 2011-05-04 10:19:48 +0530 | [diff] [blame] | 1947 | msm_hsusb_init_vddcx(motg, 0); |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 1948 | free_regs: |
| 1949 | iounmap(motg->regs); |
| 1950 | put_core_clk: |
| 1951 | if (motg->core_clk) |
| 1952 | clk_put(motg->core_clk); |
Anji jonnala | 0f73cac | 2011-05-04 10:19:46 +0530 | [diff] [blame] | 1953 | put_pclk_src: |
| 1954 | if (!IS_ERR(motg->pclk_src)) { |
| 1955 | clk_disable(motg->pclk_src); |
| 1956 | clk_put(motg->pclk_src); |
| 1957 | } |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 1958 | put_clk: |
| 1959 | clk_put(motg->clk); |
| 1960 | put_phy_reset_clk: |
| 1961 | clk_put(motg->phy_reset_clk); |
| 1962 | free_motg: |
| 1963 | kfree(motg); |
| 1964 | return ret; |
| 1965 | } |
| 1966 | |
| 1967 | static int __devexit msm_otg_remove(struct platform_device *pdev) |
| 1968 | { |
| 1969 | struct msm_otg *motg = platform_get_drvdata(pdev); |
| 1970 | struct otg_transceiver *otg = &motg->otg; |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 1971 | int cnt = 0; |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 1972 | |
| 1973 | if (otg->host || otg->gadget) |
| 1974 | return -EBUSY; |
| 1975 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1976 | if (motg->pdata->otg_control == OTG_PMIC_CONTROL) |
| 1977 | pm8921_charger_unregister_vbus_sn(0); |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 1978 | msm_otg_debugfs_cleanup(); |
Pavankumar Kondeti | d860852 | 2011-05-04 10:19:47 +0530 | [diff] [blame] | 1979 | cancel_delayed_work_sync(&motg->chg_work); |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 1980 | cancel_work_sync(&motg->sm_work); |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 1981 | |
Pavankumar Kondeti | 7018773 | 2011-02-15 09:42:34 +0530 | [diff] [blame] | 1982 | pm_runtime_resume(&pdev->dev); |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 1983 | |
| 1984 | device_init_wakeup(&pdev->dev, 0); |
| 1985 | pm_runtime_disable(&pdev->dev); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1986 | wake_lock_destroy(&motg->wlock); |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 1987 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1988 | if (motg->pdata->pmic_id_irq) |
| 1989 | free_irq(motg->pdata->pmic_id_irq, motg); |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 1990 | otg_set_transceiver(NULL); |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 1991 | free_irq(motg->irq, motg); |
| 1992 | |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 1993 | /* |
| 1994 | * Put PHY in low power mode. |
| 1995 | */ |
| 1996 | ulpi_read(otg, 0x14); |
| 1997 | ulpi_write(otg, 0x08, 0x09); |
| 1998 | |
| 1999 | writel(readl(USB_PORTSC) | PORTSC_PHCD, USB_PORTSC); |
| 2000 | while (cnt < PHY_SUSPEND_TIMEOUT_USEC) { |
| 2001 | if (readl(USB_PORTSC) & PORTSC_PHCD) |
| 2002 | break; |
| 2003 | udelay(1); |
| 2004 | cnt++; |
| 2005 | } |
| 2006 | if (cnt >= PHY_SUSPEND_TIMEOUT_USEC) |
| 2007 | dev_err(otg->dev, "Unable to suspend PHY\n"); |
| 2008 | |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 2009 | clk_disable(motg->pclk); |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 2010 | if (motg->core_clk) |
| 2011 | clk_disable(motg->core_clk); |
Anji jonnala | 0f73cac | 2011-05-04 10:19:46 +0530 | [diff] [blame] | 2012 | if (!IS_ERR(motg->pclk_src)) { |
| 2013 | clk_disable(motg->pclk_src); |
| 2014 | clk_put(motg->pclk_src); |
| 2015 | } |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2016 | msm_hsusb_ldo_enable(motg, 0); |
Anji jonnala | 11aa5c4 | 2011-05-04 10:19:48 +0530 | [diff] [blame] | 2017 | msm_hsusb_ldo_init(motg, 0); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2018 | msm_hsusb_init_vddcx(motg, 0); |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 2019 | |
| 2020 | iounmap(motg->regs); |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 2021 | pm_runtime_set_suspended(&pdev->dev); |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 2022 | |
| 2023 | clk_put(motg->phy_reset_clk); |
| 2024 | clk_put(motg->pclk); |
| 2025 | clk_put(motg->clk); |
| 2026 | if (motg->core_clk) |
| 2027 | clk_put(motg->core_clk); |
| 2028 | |
| 2029 | kfree(motg); |
| 2030 | |
| 2031 | return 0; |
| 2032 | } |
| 2033 | |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 2034 | #ifdef CONFIG_PM_RUNTIME |
| 2035 | static int msm_otg_runtime_idle(struct device *dev) |
| 2036 | { |
| 2037 | struct msm_otg *motg = dev_get_drvdata(dev); |
| 2038 | struct otg_transceiver *otg = &motg->otg; |
| 2039 | |
| 2040 | dev_dbg(dev, "OTG runtime idle\n"); |
| 2041 | |
| 2042 | /* |
| 2043 | * It is observed some times that a spurious interrupt |
| 2044 | * comes when PHY is put into LPM immediately after PHY reset. |
| 2045 | * This 1 sec delay also prevents entering into LPM immediately |
| 2046 | * after asynchronous interrupt. |
| 2047 | */ |
| 2048 | if (otg->state != OTG_STATE_UNDEFINED) |
| 2049 | pm_schedule_suspend(dev, 1000); |
| 2050 | |
| 2051 | return -EAGAIN; |
| 2052 | } |
| 2053 | |
| 2054 | static int msm_otg_runtime_suspend(struct device *dev) |
| 2055 | { |
| 2056 | struct msm_otg *motg = dev_get_drvdata(dev); |
| 2057 | |
| 2058 | dev_dbg(dev, "OTG runtime suspend\n"); |
| 2059 | return msm_otg_suspend(motg); |
| 2060 | } |
| 2061 | |
| 2062 | static int msm_otg_runtime_resume(struct device *dev) |
| 2063 | { |
| 2064 | struct msm_otg *motg = dev_get_drvdata(dev); |
| 2065 | |
| 2066 | dev_dbg(dev, "OTG runtime resume\n"); |
| 2067 | return msm_otg_resume(motg); |
| 2068 | } |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 2069 | #endif |
| 2070 | |
Pavankumar Kondeti | 7018773 | 2011-02-15 09:42:34 +0530 | [diff] [blame] | 2071 | #ifdef CONFIG_PM_SLEEP |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 2072 | static int msm_otg_pm_suspend(struct device *dev) |
| 2073 | { |
| 2074 | struct msm_otg *motg = dev_get_drvdata(dev); |
| 2075 | |
| 2076 | dev_dbg(dev, "OTG PM suspend\n"); |
| 2077 | return msm_otg_suspend(motg); |
| 2078 | } |
| 2079 | |
| 2080 | static int msm_otg_pm_resume(struct device *dev) |
| 2081 | { |
| 2082 | struct msm_otg *motg = dev_get_drvdata(dev); |
Manu Gautam | f284c05 | 2011-09-08 16:52:48 +0530 | [diff] [blame] | 2083 | int ret = 0; |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 2084 | |
| 2085 | dev_dbg(dev, "OTG PM resume\n"); |
| 2086 | |
Manu Gautam | f284c05 | 2011-09-08 16:52:48 +0530 | [diff] [blame] | 2087 | #ifdef CONFIG_PM_RUNTIME |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 2088 | /* |
Manu Gautam | f284c05 | 2011-09-08 16:52:48 +0530 | [diff] [blame] | 2089 | * Do not resume hardware as part of system resume, |
| 2090 | * rather, wait for the ASYNC INT from the h/w |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 2091 | */ |
Manu Gautam | f284c05 | 2011-09-08 16:52:48 +0530 | [diff] [blame] | 2092 | return ret; |
| 2093 | #endif |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 2094 | |
Manu Gautam | f284c05 | 2011-09-08 16:52:48 +0530 | [diff] [blame] | 2095 | return msm_otg_resume(motg); |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 2096 | } |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 2097 | #endif |
| 2098 | |
Pavankumar Kondeti | 7018773 | 2011-02-15 09:42:34 +0530 | [diff] [blame] | 2099 | #ifdef CONFIG_PM |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 2100 | static const struct dev_pm_ops msm_otg_dev_pm_ops = { |
Pavankumar Kondeti | 7018773 | 2011-02-15 09:42:34 +0530 | [diff] [blame] | 2101 | SET_SYSTEM_SLEEP_PM_OPS(msm_otg_pm_suspend, msm_otg_pm_resume) |
| 2102 | SET_RUNTIME_PM_OPS(msm_otg_runtime_suspend, msm_otg_runtime_resume, |
| 2103 | msm_otg_runtime_idle) |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 2104 | }; |
Pavankumar Kondeti | 7018773 | 2011-02-15 09:42:34 +0530 | [diff] [blame] | 2105 | #endif |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 2106 | |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 2107 | static struct platform_driver msm_otg_driver = { |
| 2108 | .remove = __devexit_p(msm_otg_remove), |
| 2109 | .driver = { |
| 2110 | .name = DRIVER_NAME, |
| 2111 | .owner = THIS_MODULE, |
Pavankumar Kondeti | 7018773 | 2011-02-15 09:42:34 +0530 | [diff] [blame] | 2112 | #ifdef CONFIG_PM |
Pavankumar Kondeti | 87c0104 | 2010-12-07 17:53:58 +0530 | [diff] [blame] | 2113 | .pm = &msm_otg_dev_pm_ops, |
Pavankumar Kondeti | 7018773 | 2011-02-15 09:42:34 +0530 | [diff] [blame] | 2114 | #endif |
Pavankumar Kondeti | e0c201f | 2010-12-07 17:53:55 +0530 | [diff] [blame] | 2115 | }, |
| 2116 | }; |
| 2117 | |
| 2118 | static int __init msm_otg_init(void) |
| 2119 | { |
| 2120 | return platform_driver_probe(&msm_otg_driver, msm_otg_probe); |
| 2121 | } |
| 2122 | |
| 2123 | static void __exit msm_otg_exit(void) |
| 2124 | { |
| 2125 | platform_driver_unregister(&msm_otg_driver); |
| 2126 | } |
| 2127 | |
| 2128 | module_init(msm_otg_init); |
| 2129 | module_exit(msm_otg_exit); |
| 2130 | |
| 2131 | MODULE_LICENSE("GPL v2"); |
| 2132 | MODULE_DESCRIPTION("MSM USB transceiver driver"); |