Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 1 | /* |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 2 | * Xilinx SPI controller driver (master mode only) |
| 3 | * |
| 4 | * Author: MontaVista Software, Inc. |
| 5 | * source@mvista.com |
| 6 | * |
Grant Likely | 8fd8821 | 2010-10-14 09:04:29 -0600 | [diff] [blame^] | 7 | * Copyright (c) 2010 Secret Lab Technologies, Ltd. |
| 8 | * Copyright (c) 2009 Intel Corporation |
| 9 | * 2002-2007 (c) MontaVista Software, Inc. |
| 10 | |
| 11 | * This program is free software; you can redistribute it and/or modify |
| 12 | * it under the terms of the GNU General Public License version 2 as |
| 13 | * published by the Free Software Foundation. |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 14 | */ |
| 15 | |
| 16 | #include <linux/module.h> |
| 17 | #include <linux/init.h> |
| 18 | #include <linux/interrupt.h> |
Grant Likely | 8fd8821 | 2010-10-14 09:04:29 -0600 | [diff] [blame^] | 19 | #include <linux/platform_device.h> |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 20 | #include <linux/spi/spi.h> |
| 21 | #include <linux/spi/spi_bitbang.h> |
| 22 | #include <linux/io.h> |
| 23 | |
Richard Röjfors | d5af91a | 2009-11-13 12:28:39 +0100 | [diff] [blame] | 24 | #include "xilinx_spi.h" |
| 25 | #include <linux/spi/xilinx_spi.h> |
| 26 | |
David Brownell | fc3ba95 | 2007-08-30 23:56:24 -0700 | [diff] [blame] | 27 | #define XILINX_SPI_NAME "xilinx_spi" |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 28 | |
| 29 | /* Register definitions as per "OPB Serial Peripheral Interface (SPI) (v1.00e) |
| 30 | * Product Specification", DS464 |
| 31 | */ |
Richard Röjfors | c9da2e1 | 2009-11-13 12:28:55 +0100 | [diff] [blame] | 32 | #define XSPI_CR_OFFSET 0x60 /* Control Register */ |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 33 | |
| 34 | #define XSPI_CR_ENABLE 0x02 |
| 35 | #define XSPI_CR_MASTER_MODE 0x04 |
| 36 | #define XSPI_CR_CPOL 0x08 |
| 37 | #define XSPI_CR_CPHA 0x10 |
| 38 | #define XSPI_CR_MODE_MASK (XSPI_CR_CPHA | XSPI_CR_CPOL) |
| 39 | #define XSPI_CR_TXFIFO_RESET 0x20 |
| 40 | #define XSPI_CR_RXFIFO_RESET 0x40 |
| 41 | #define XSPI_CR_MANUAL_SSELECT 0x80 |
| 42 | #define XSPI_CR_TRANS_INHIBIT 0x100 |
Richard Röjfors | c9da2e1 | 2009-11-13 12:28:55 +0100 | [diff] [blame] | 43 | #define XSPI_CR_LSB_FIRST 0x200 |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 44 | |
Richard Röjfors | c9da2e1 | 2009-11-13 12:28:55 +0100 | [diff] [blame] | 45 | #define XSPI_SR_OFFSET 0x64 /* Status Register */ |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 46 | |
| 47 | #define XSPI_SR_RX_EMPTY_MASK 0x01 /* Receive FIFO is empty */ |
| 48 | #define XSPI_SR_RX_FULL_MASK 0x02 /* Receive FIFO is full */ |
| 49 | #define XSPI_SR_TX_EMPTY_MASK 0x04 /* Transmit FIFO is empty */ |
| 50 | #define XSPI_SR_TX_FULL_MASK 0x08 /* Transmit FIFO is full */ |
| 51 | #define XSPI_SR_MODE_FAULT_MASK 0x10 /* Mode fault error */ |
| 52 | |
Richard Röjfors | c9da2e1 | 2009-11-13 12:28:55 +0100 | [diff] [blame] | 53 | #define XSPI_TXD_OFFSET 0x68 /* Data Transmit Register */ |
| 54 | #define XSPI_RXD_OFFSET 0x6c /* Data Receive Register */ |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 55 | |
| 56 | #define XSPI_SSR_OFFSET 0x70 /* 32-bit Slave Select Register */ |
| 57 | |
| 58 | /* Register definitions as per "OPB IPIF (v3.01c) Product Specification", DS414 |
| 59 | * IPIF registers are 32 bit |
| 60 | */ |
| 61 | #define XIPIF_V123B_DGIER_OFFSET 0x1c /* IPIF global int enable reg */ |
| 62 | #define XIPIF_V123B_GINTR_ENABLE 0x80000000 |
| 63 | |
| 64 | #define XIPIF_V123B_IISR_OFFSET 0x20 /* IPIF interrupt status reg */ |
| 65 | #define XIPIF_V123B_IIER_OFFSET 0x28 /* IPIF interrupt enable reg */ |
| 66 | |
| 67 | #define XSPI_INTR_MODE_FAULT 0x01 /* Mode fault error */ |
| 68 | #define XSPI_INTR_SLAVE_MODE_FAULT 0x02 /* Selected as slave while |
| 69 | * disabled */ |
| 70 | #define XSPI_INTR_TX_EMPTY 0x04 /* TxFIFO is empty */ |
| 71 | #define XSPI_INTR_TX_UNDERRUN 0x08 /* TxFIFO was underrun */ |
| 72 | #define XSPI_INTR_RX_FULL 0x10 /* RxFIFO is full */ |
| 73 | #define XSPI_INTR_RX_OVERRUN 0x20 /* RxFIFO was overrun */ |
Richard Röjfors | c9da2e1 | 2009-11-13 12:28:55 +0100 | [diff] [blame] | 74 | #define XSPI_INTR_TX_HALF_EMPTY 0x40 /* TxFIFO is half empty */ |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 75 | |
| 76 | #define XIPIF_V123B_RESETR_OFFSET 0x40 /* IPIF reset register */ |
| 77 | #define XIPIF_V123B_RESET_MASK 0x0a /* the value to write */ |
| 78 | |
| 79 | struct xilinx_spi { |
| 80 | /* bitbang has to be first */ |
| 81 | struct spi_bitbang bitbang; |
| 82 | struct completion done; |
Richard Röjfors | d5af91a | 2009-11-13 12:28:39 +0100 | [diff] [blame] | 83 | struct resource mem; /* phys mem */ |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 84 | void __iomem *regs; /* virt. address of the control registers */ |
| 85 | |
| 86 | u32 irq; |
| 87 | |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 88 | u8 *rx_ptr; /* pointer in the Tx buffer */ |
| 89 | const u8 *tx_ptr; /* pointer in the Rx buffer */ |
| 90 | int remaining_bytes; /* the number of bytes left to transfer */ |
Richard Röjfors | c9da2e1 | 2009-11-13 12:28:55 +0100 | [diff] [blame] | 91 | u8 bits_per_word; |
Richard Röjfors | 86fc593 | 2009-11-13 12:28:49 +0100 | [diff] [blame] | 92 | unsigned int (*read_fn) (void __iomem *); |
| 93 | void (*write_fn) (u32, void __iomem *); |
Richard Röjfors | c9da2e1 | 2009-11-13 12:28:55 +0100 | [diff] [blame] | 94 | void (*tx_fn) (struct xilinx_spi *); |
| 95 | void (*rx_fn) (struct xilinx_spi *); |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 96 | }; |
| 97 | |
Paul Mundt | 9778214 | 2010-01-20 13:49:45 -0700 | [diff] [blame] | 98 | static void xspi_write32(u32 val, void __iomem *addr) |
| 99 | { |
| 100 | iowrite32(val, addr); |
| 101 | } |
| 102 | |
| 103 | static unsigned int xspi_read32(void __iomem *addr) |
| 104 | { |
| 105 | return ioread32(addr); |
| 106 | } |
| 107 | |
| 108 | static void xspi_write32_be(u32 val, void __iomem *addr) |
| 109 | { |
| 110 | iowrite32be(val, addr); |
| 111 | } |
| 112 | |
| 113 | static unsigned int xspi_read32_be(void __iomem *addr) |
| 114 | { |
| 115 | return ioread32be(addr); |
| 116 | } |
| 117 | |
Richard Röjfors | c9da2e1 | 2009-11-13 12:28:55 +0100 | [diff] [blame] | 118 | static void xspi_tx8(struct xilinx_spi *xspi) |
| 119 | { |
| 120 | xspi->write_fn(*xspi->tx_ptr, xspi->regs + XSPI_TXD_OFFSET); |
| 121 | xspi->tx_ptr++; |
| 122 | } |
| 123 | |
| 124 | static void xspi_tx16(struct xilinx_spi *xspi) |
| 125 | { |
| 126 | xspi->write_fn(*(u16 *)(xspi->tx_ptr), xspi->regs + XSPI_TXD_OFFSET); |
| 127 | xspi->tx_ptr += 2; |
| 128 | } |
| 129 | |
| 130 | static void xspi_tx32(struct xilinx_spi *xspi) |
| 131 | { |
| 132 | xspi->write_fn(*(u32 *)(xspi->tx_ptr), xspi->regs + XSPI_TXD_OFFSET); |
| 133 | xspi->tx_ptr += 4; |
| 134 | } |
| 135 | |
| 136 | static void xspi_rx8(struct xilinx_spi *xspi) |
| 137 | { |
| 138 | u32 data = xspi->read_fn(xspi->regs + XSPI_RXD_OFFSET); |
| 139 | if (xspi->rx_ptr) { |
| 140 | *xspi->rx_ptr = data & 0xff; |
| 141 | xspi->rx_ptr++; |
| 142 | } |
| 143 | } |
| 144 | |
| 145 | static void xspi_rx16(struct xilinx_spi *xspi) |
| 146 | { |
| 147 | u32 data = xspi->read_fn(xspi->regs + XSPI_RXD_OFFSET); |
| 148 | if (xspi->rx_ptr) { |
| 149 | *(u16 *)(xspi->rx_ptr) = data & 0xffff; |
| 150 | xspi->rx_ptr += 2; |
| 151 | } |
| 152 | } |
| 153 | |
| 154 | static void xspi_rx32(struct xilinx_spi *xspi) |
| 155 | { |
| 156 | u32 data = xspi->read_fn(xspi->regs + XSPI_RXD_OFFSET); |
| 157 | if (xspi->rx_ptr) { |
| 158 | *(u32 *)(xspi->rx_ptr) = data; |
| 159 | xspi->rx_ptr += 4; |
| 160 | } |
| 161 | } |
| 162 | |
Richard Röjfors | 86fc593 | 2009-11-13 12:28:49 +0100 | [diff] [blame] | 163 | static void xspi_init_hw(struct xilinx_spi *xspi) |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 164 | { |
Richard Röjfors | 86fc593 | 2009-11-13 12:28:49 +0100 | [diff] [blame] | 165 | void __iomem *regs_base = xspi->regs; |
| 166 | |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 167 | /* Reset the SPI device */ |
Richard Röjfors | 86fc593 | 2009-11-13 12:28:49 +0100 | [diff] [blame] | 168 | xspi->write_fn(XIPIF_V123B_RESET_MASK, |
| 169 | regs_base + XIPIF_V123B_RESETR_OFFSET); |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 170 | /* Disable all the interrupts just in case */ |
Richard Röjfors | 86fc593 | 2009-11-13 12:28:49 +0100 | [diff] [blame] | 171 | xspi->write_fn(0, regs_base + XIPIF_V123B_IIER_OFFSET); |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 172 | /* Enable the global IPIF interrupt */ |
Richard Röjfors | 86fc593 | 2009-11-13 12:28:49 +0100 | [diff] [blame] | 173 | xspi->write_fn(XIPIF_V123B_GINTR_ENABLE, |
| 174 | regs_base + XIPIF_V123B_DGIER_OFFSET); |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 175 | /* Deselect the slave on the SPI bus */ |
Richard Röjfors | 86fc593 | 2009-11-13 12:28:49 +0100 | [diff] [blame] | 176 | xspi->write_fn(0xffff, regs_base + XSPI_SSR_OFFSET); |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 177 | /* Disable the transmitter, enable Manual Slave Select Assertion, |
| 178 | * put SPI controller into master mode, and enable it */ |
Richard Röjfors | 86fc593 | 2009-11-13 12:28:49 +0100 | [diff] [blame] | 179 | xspi->write_fn(XSPI_CR_TRANS_INHIBIT | XSPI_CR_MANUAL_SSELECT | |
Richard Röjfors | c9da2e1 | 2009-11-13 12:28:55 +0100 | [diff] [blame] | 180 | XSPI_CR_MASTER_MODE | XSPI_CR_ENABLE | XSPI_CR_TXFIFO_RESET | |
| 181 | XSPI_CR_RXFIFO_RESET, regs_base + XSPI_CR_OFFSET); |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 182 | } |
| 183 | |
| 184 | static void xilinx_spi_chipselect(struct spi_device *spi, int is_on) |
| 185 | { |
| 186 | struct xilinx_spi *xspi = spi_master_get_devdata(spi->master); |
| 187 | |
| 188 | if (is_on == BITBANG_CS_INACTIVE) { |
| 189 | /* Deselect the slave on the SPI bus */ |
Richard Röjfors | 86fc593 | 2009-11-13 12:28:49 +0100 | [diff] [blame] | 190 | xspi->write_fn(0xffff, xspi->regs + XSPI_SSR_OFFSET); |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 191 | } else if (is_on == BITBANG_CS_ACTIVE) { |
| 192 | /* Set the SPI clock phase and polarity */ |
Richard Röjfors | 86fc593 | 2009-11-13 12:28:49 +0100 | [diff] [blame] | 193 | u16 cr = xspi->read_fn(xspi->regs + XSPI_CR_OFFSET) |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 194 | & ~XSPI_CR_MODE_MASK; |
| 195 | if (spi->mode & SPI_CPHA) |
| 196 | cr |= XSPI_CR_CPHA; |
| 197 | if (spi->mode & SPI_CPOL) |
| 198 | cr |= XSPI_CR_CPOL; |
Richard Röjfors | 86fc593 | 2009-11-13 12:28:49 +0100 | [diff] [blame] | 199 | xspi->write_fn(cr, xspi->regs + XSPI_CR_OFFSET); |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 200 | |
| 201 | /* We do not check spi->max_speed_hz here as the SPI clock |
| 202 | * frequency is not software programmable (the IP block design |
| 203 | * parameter) |
| 204 | */ |
| 205 | |
| 206 | /* Activate the chip select */ |
Richard Röjfors | 86fc593 | 2009-11-13 12:28:49 +0100 | [diff] [blame] | 207 | xspi->write_fn(~(0x0001 << spi->chip_select), |
| 208 | xspi->regs + XSPI_SSR_OFFSET); |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 209 | } |
| 210 | } |
| 211 | |
| 212 | /* spi_bitbang requires custom setup_transfer() to be defined if there is a |
| 213 | * custom txrx_bufs(). We have nothing to setup here as the SPI IP block |
Richard Röjfors | c9da2e1 | 2009-11-13 12:28:55 +0100 | [diff] [blame] | 214 | * supports 8 or 16 bits per word which cannot be changed in software. |
| 215 | * SPI clock can't be changed in software either. |
| 216 | * Check for correct bits per word. Chip select delay calculations could be |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 217 | * added here as soon as bitbang_work() can be made aware of the delay value. |
| 218 | */ |
| 219 | static int xilinx_spi_setup_transfer(struct spi_device *spi, |
| 220 | struct spi_transfer *t) |
| 221 | { |
Richard Röjfors | c9da2e1 | 2009-11-13 12:28:55 +0100 | [diff] [blame] | 222 | struct xilinx_spi *xspi = spi_master_get_devdata(spi->master); |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 223 | u8 bits_per_word; |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 224 | |
John Linn | 1a8d3b7 | 2009-09-14 08:17:05 +0000 | [diff] [blame] | 225 | bits_per_word = (t && t->bits_per_word) |
| 226 | ? t->bits_per_word : spi->bits_per_word; |
Richard Röjfors | c9da2e1 | 2009-11-13 12:28:55 +0100 | [diff] [blame] | 227 | if (bits_per_word != xspi->bits_per_word) { |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 228 | dev_err(&spi->dev, "%s, unsupported bits_per_word=%d\n", |
Harvey Harrison | b687d2a | 2008-04-28 02:14:19 -0700 | [diff] [blame] | 229 | __func__, bits_per_word); |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 230 | return -EINVAL; |
| 231 | } |
| 232 | |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 233 | return 0; |
| 234 | } |
| 235 | |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 236 | static int xilinx_spi_setup(struct spi_device *spi) |
| 237 | { |
Richard Röjfors | c9da2e1 | 2009-11-13 12:28:55 +0100 | [diff] [blame] | 238 | /* always return 0, we can not check the number of bits. |
| 239 | * There are cases when SPI setup is called before any driver is |
| 240 | * there, in that case the SPI core defaults to 8 bits, which we |
| 241 | * do not support in some cases. But if we return an error, the |
| 242 | * SPI device would not be registered and no driver can get hold of it |
| 243 | * When the driver is there, it will call SPI setup again with the |
| 244 | * correct number of bits per transfer. |
| 245 | * If a driver setups with the wrong bit number, it will fail when |
| 246 | * it tries to do a transfer |
| 247 | */ |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 248 | return 0; |
| 249 | } |
| 250 | |
| 251 | static void xilinx_spi_fill_tx_fifo(struct xilinx_spi *xspi) |
| 252 | { |
| 253 | u8 sr; |
| 254 | |
| 255 | /* Fill the Tx FIFO with as many bytes as possible */ |
Richard Röjfors | 86fc593 | 2009-11-13 12:28:49 +0100 | [diff] [blame] | 256 | sr = xspi->read_fn(xspi->regs + XSPI_SR_OFFSET); |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 257 | while ((sr & XSPI_SR_TX_FULL_MASK) == 0 && xspi->remaining_bytes > 0) { |
Richard Röjfors | 86fc593 | 2009-11-13 12:28:49 +0100 | [diff] [blame] | 258 | if (xspi->tx_ptr) |
Richard Röjfors | c9da2e1 | 2009-11-13 12:28:55 +0100 | [diff] [blame] | 259 | xspi->tx_fn(xspi); |
Richard Röjfors | 86fc593 | 2009-11-13 12:28:49 +0100 | [diff] [blame] | 260 | else |
| 261 | xspi->write_fn(0, xspi->regs + XSPI_TXD_OFFSET); |
Richard Röjfors | c9da2e1 | 2009-11-13 12:28:55 +0100 | [diff] [blame] | 262 | xspi->remaining_bytes -= xspi->bits_per_word / 8; |
Richard Röjfors | 86fc593 | 2009-11-13 12:28:49 +0100 | [diff] [blame] | 263 | sr = xspi->read_fn(xspi->regs + XSPI_SR_OFFSET); |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 264 | } |
| 265 | } |
| 266 | |
| 267 | static int xilinx_spi_txrx_bufs(struct spi_device *spi, struct spi_transfer *t) |
| 268 | { |
| 269 | struct xilinx_spi *xspi = spi_master_get_devdata(spi->master); |
| 270 | u32 ipif_ier; |
| 271 | u16 cr; |
| 272 | |
| 273 | /* We get here with transmitter inhibited */ |
| 274 | |
| 275 | xspi->tx_ptr = t->tx_buf; |
| 276 | xspi->rx_ptr = t->rx_buf; |
| 277 | xspi->remaining_bytes = t->len; |
| 278 | INIT_COMPLETION(xspi->done); |
| 279 | |
| 280 | xilinx_spi_fill_tx_fifo(xspi); |
| 281 | |
| 282 | /* Enable the transmit empty interrupt, which we use to determine |
| 283 | * progress on the transmission. |
| 284 | */ |
Richard Röjfors | 86fc593 | 2009-11-13 12:28:49 +0100 | [diff] [blame] | 285 | ipif_ier = xspi->read_fn(xspi->regs + XIPIF_V123B_IIER_OFFSET); |
| 286 | xspi->write_fn(ipif_ier | XSPI_INTR_TX_EMPTY, |
| 287 | xspi->regs + XIPIF_V123B_IIER_OFFSET); |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 288 | |
| 289 | /* Start the transfer by not inhibiting the transmitter any longer */ |
Richard Röjfors | 86fc593 | 2009-11-13 12:28:49 +0100 | [diff] [blame] | 290 | cr = xspi->read_fn(xspi->regs + XSPI_CR_OFFSET) & |
| 291 | ~XSPI_CR_TRANS_INHIBIT; |
| 292 | xspi->write_fn(cr, xspi->regs + XSPI_CR_OFFSET); |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 293 | |
| 294 | wait_for_completion(&xspi->done); |
| 295 | |
| 296 | /* Disable the transmit empty interrupt */ |
Richard Röjfors | 86fc593 | 2009-11-13 12:28:49 +0100 | [diff] [blame] | 297 | xspi->write_fn(ipif_ier, xspi->regs + XIPIF_V123B_IIER_OFFSET); |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 298 | |
| 299 | return t->len - xspi->remaining_bytes; |
| 300 | } |
| 301 | |
| 302 | |
| 303 | /* This driver supports single master mode only. Hence Tx FIFO Empty |
| 304 | * is the only interrupt we care about. |
| 305 | * Receive FIFO Overrun, Transmit FIFO Underrun, Mode Fault, and Slave Mode |
| 306 | * Fault are not to happen. |
| 307 | */ |
| 308 | static irqreturn_t xilinx_spi_irq(int irq, void *dev_id) |
| 309 | { |
| 310 | struct xilinx_spi *xspi = dev_id; |
| 311 | u32 ipif_isr; |
| 312 | |
| 313 | /* Get the IPIF interrupts, and clear them immediately */ |
Richard Röjfors | 86fc593 | 2009-11-13 12:28:49 +0100 | [diff] [blame] | 314 | ipif_isr = xspi->read_fn(xspi->regs + XIPIF_V123B_IISR_OFFSET); |
| 315 | xspi->write_fn(ipif_isr, xspi->regs + XIPIF_V123B_IISR_OFFSET); |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 316 | |
| 317 | if (ipif_isr & XSPI_INTR_TX_EMPTY) { /* Transmission completed */ |
| 318 | u16 cr; |
| 319 | u8 sr; |
| 320 | |
| 321 | /* A transmit has just completed. Process received data and |
| 322 | * check for more data to transmit. Always inhibit the |
| 323 | * transmitter while the Isr refills the transmit register/FIFO, |
| 324 | * or make sure it is stopped if we're done. |
| 325 | */ |
Richard Röjfors | 86fc593 | 2009-11-13 12:28:49 +0100 | [diff] [blame] | 326 | cr = xspi->read_fn(xspi->regs + XSPI_CR_OFFSET); |
| 327 | xspi->write_fn(cr | XSPI_CR_TRANS_INHIBIT, |
| 328 | xspi->regs + XSPI_CR_OFFSET); |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 329 | |
| 330 | /* Read out all the data from the Rx FIFO */ |
Richard Röjfors | 86fc593 | 2009-11-13 12:28:49 +0100 | [diff] [blame] | 331 | sr = xspi->read_fn(xspi->regs + XSPI_SR_OFFSET); |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 332 | while ((sr & XSPI_SR_RX_EMPTY_MASK) == 0) { |
Richard Röjfors | c9da2e1 | 2009-11-13 12:28:55 +0100 | [diff] [blame] | 333 | xspi->rx_fn(xspi); |
Richard Röjfors | 86fc593 | 2009-11-13 12:28:49 +0100 | [diff] [blame] | 334 | sr = xspi->read_fn(xspi->regs + XSPI_SR_OFFSET); |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 335 | } |
| 336 | |
| 337 | /* See if there is more data to send */ |
| 338 | if (xspi->remaining_bytes > 0) { |
| 339 | xilinx_spi_fill_tx_fifo(xspi); |
| 340 | /* Start the transfer by not inhibiting the |
| 341 | * transmitter any longer |
| 342 | */ |
Richard Röjfors | 86fc593 | 2009-11-13 12:28:49 +0100 | [diff] [blame] | 343 | xspi->write_fn(cr, xspi->regs + XSPI_CR_OFFSET); |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 344 | } else { |
| 345 | /* No more data to send. |
| 346 | * Indicate the transfer is completed. |
| 347 | */ |
| 348 | complete(&xspi->done); |
| 349 | } |
| 350 | } |
| 351 | |
| 352 | return IRQ_HANDLED; |
| 353 | } |
| 354 | |
Richard Röjfors | d5af91a | 2009-11-13 12:28:39 +0100 | [diff] [blame] | 355 | struct spi_master *xilinx_spi_init(struct device *dev, struct resource *mem, |
Grant Likely | 91565c4 | 2010-10-14 08:54:55 -0600 | [diff] [blame] | 356 | u32 irq, s16 bus_num, int num_cs, int little_endian, int bits_per_word) |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 357 | { |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 358 | struct spi_master *master; |
| 359 | struct xilinx_spi *xspi; |
Richard Röjfors | d5af91a | 2009-11-13 12:28:39 +0100 | [diff] [blame] | 360 | int ret; |
John Linn | ff82c58 | 2009-01-09 16:01:53 -0700 | [diff] [blame] | 361 | |
Richard Röjfors | d5af91a | 2009-11-13 12:28:39 +0100 | [diff] [blame] | 362 | master = spi_alloc_master(dev, sizeof(struct xilinx_spi)); |
| 363 | if (!master) |
| 364 | return NULL; |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 365 | |
David Brownell | e7db06b | 2009-06-17 16:26:04 -0700 | [diff] [blame] | 366 | /* the spi->mode bits understood by this driver: */ |
| 367 | master->mode_bits = SPI_CPOL | SPI_CPHA; |
| 368 | |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 369 | xspi = spi_master_get_devdata(master); |
| 370 | xspi->bitbang.master = spi_master_get(master); |
| 371 | xspi->bitbang.chipselect = xilinx_spi_chipselect; |
| 372 | xspi->bitbang.setup_transfer = xilinx_spi_setup_transfer; |
| 373 | xspi->bitbang.txrx_bufs = xilinx_spi_txrx_bufs; |
| 374 | xspi->bitbang.master->setup = xilinx_spi_setup; |
| 375 | init_completion(&xspi->done); |
| 376 | |
Richard Röjfors | d5af91a | 2009-11-13 12:28:39 +0100 | [diff] [blame] | 377 | if (!request_mem_region(mem->start, resource_size(mem), |
| 378 | XILINX_SPI_NAME)) |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 379 | goto put_master; |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 380 | |
Richard Röjfors | d5af91a | 2009-11-13 12:28:39 +0100 | [diff] [blame] | 381 | xspi->regs = ioremap(mem->start, resource_size(mem)); |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 382 | if (xspi->regs == NULL) { |
Richard Röjfors | d5af91a | 2009-11-13 12:28:39 +0100 | [diff] [blame] | 383 | dev_warn(dev, "ioremap failure\n"); |
| 384 | goto map_failed; |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 385 | } |
| 386 | |
Richard Röjfors | d5af91a | 2009-11-13 12:28:39 +0100 | [diff] [blame] | 387 | master->bus_num = bus_num; |
Grant Likely | 91565c4 | 2010-10-14 08:54:55 -0600 | [diff] [blame] | 388 | master->num_chipselect = num_cs; |
Anatolij Gustschin | 12b15e8 | 2010-07-27 22:35:58 +0200 | [diff] [blame] | 389 | #ifdef CONFIG_OF |
| 390 | master->dev.of_node = dev->of_node; |
| 391 | #endif |
John Linn | ff82c58 | 2009-01-09 16:01:53 -0700 | [diff] [blame] | 392 | |
Richard Röjfors | d5af91a | 2009-11-13 12:28:39 +0100 | [diff] [blame] | 393 | xspi->mem = *mem; |
| 394 | xspi->irq = irq; |
Grant Likely | 91565c4 | 2010-10-14 08:54:55 -0600 | [diff] [blame] | 395 | if (little_endian) { |
Paul Mundt | 9778214 | 2010-01-20 13:49:45 -0700 | [diff] [blame] | 396 | xspi->read_fn = xspi_read32; |
| 397 | xspi->write_fn = xspi_write32; |
Richard Röjfors | 86fc593 | 2009-11-13 12:28:49 +0100 | [diff] [blame] | 398 | } else { |
Paul Mundt | 9778214 | 2010-01-20 13:49:45 -0700 | [diff] [blame] | 399 | xspi->read_fn = xspi_read32_be; |
| 400 | xspi->write_fn = xspi_write32_be; |
Richard Röjfors | 86fc593 | 2009-11-13 12:28:49 +0100 | [diff] [blame] | 401 | } |
Grant Likely | 91565c4 | 2010-10-14 08:54:55 -0600 | [diff] [blame] | 402 | xspi->bits_per_word = bits_per_word; |
Richard Röjfors | c9da2e1 | 2009-11-13 12:28:55 +0100 | [diff] [blame] | 403 | if (xspi->bits_per_word == 8) { |
| 404 | xspi->tx_fn = xspi_tx8; |
| 405 | xspi->rx_fn = xspi_rx8; |
| 406 | } else if (xspi->bits_per_word == 16) { |
| 407 | xspi->tx_fn = xspi_tx16; |
| 408 | xspi->rx_fn = xspi_rx16; |
| 409 | } else if (xspi->bits_per_word == 32) { |
| 410 | xspi->tx_fn = xspi_tx32; |
| 411 | xspi->rx_fn = xspi_rx32; |
| 412 | } else |
| 413 | goto unmap_io; |
| 414 | |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 415 | |
| 416 | /* SPI controller initializations */ |
Richard Röjfors | 86fc593 | 2009-11-13 12:28:49 +0100 | [diff] [blame] | 417 | xspi_init_hw(xspi); |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 418 | |
| 419 | /* Register for SPI Interrupt */ |
Richard Röjfors | d5af91a | 2009-11-13 12:28:39 +0100 | [diff] [blame] | 420 | ret = request_irq(xspi->irq, xilinx_spi_irq, 0, XILINX_SPI_NAME, xspi); |
| 421 | if (ret) |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 422 | goto unmap_io; |
| 423 | |
Richard Röjfors | d5af91a | 2009-11-13 12:28:39 +0100 | [diff] [blame] | 424 | ret = spi_bitbang_start(&xspi->bitbang); |
| 425 | if (ret) { |
| 426 | dev_err(dev, "spi_bitbang_start FAILED\n"); |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 427 | goto free_irq; |
| 428 | } |
| 429 | |
Grant Likely | 920712a | 2009-11-25 07:23:35 -0700 | [diff] [blame] | 430 | dev_info(dev, "at 0x%08llX mapped to 0x%p, irq=%d\n", |
| 431 | (unsigned long long)mem->start, xspi->regs, xspi->irq); |
Richard Röjfors | d5af91a | 2009-11-13 12:28:39 +0100 | [diff] [blame] | 432 | return master; |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 433 | |
| 434 | free_irq: |
| 435 | free_irq(xspi->irq, xspi); |
| 436 | unmap_io: |
| 437 | iounmap(xspi->regs); |
Richard Röjfors | d5af91a | 2009-11-13 12:28:39 +0100 | [diff] [blame] | 438 | map_failed: |
| 439 | release_mem_region(mem->start, resource_size(mem)); |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 440 | put_master: |
| 441 | spi_master_put(master); |
Richard Röjfors | d5af91a | 2009-11-13 12:28:39 +0100 | [diff] [blame] | 442 | return NULL; |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 443 | } |
Richard Röjfors | d5af91a | 2009-11-13 12:28:39 +0100 | [diff] [blame] | 444 | EXPORT_SYMBOL(xilinx_spi_init); |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 445 | |
Richard Röjfors | d5af91a | 2009-11-13 12:28:39 +0100 | [diff] [blame] | 446 | void xilinx_spi_deinit(struct spi_master *master) |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 447 | { |
| 448 | struct xilinx_spi *xspi; |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 449 | |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 450 | xspi = spi_master_get_devdata(master); |
| 451 | |
| 452 | spi_bitbang_stop(&xspi->bitbang); |
| 453 | free_irq(xspi->irq, xspi); |
| 454 | iounmap(xspi->regs); |
Richard Röjfors | d5af91a | 2009-11-13 12:28:39 +0100 | [diff] [blame] | 455 | |
| 456 | release_mem_region(xspi->mem.start, resource_size(&xspi->mem)); |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 457 | spi_master_put(xspi->bitbang.master); |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 458 | } |
Richard Röjfors | d5af91a | 2009-11-13 12:28:39 +0100 | [diff] [blame] | 459 | EXPORT_SYMBOL(xilinx_spi_deinit); |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 460 | |
Grant Likely | 8fd8821 | 2010-10-14 09:04:29 -0600 | [diff] [blame^] | 461 | static int __devinit xilinx_spi_probe(struct platform_device *dev) |
| 462 | { |
| 463 | struct xspi_platform_data *pdata; |
| 464 | struct resource *r; |
| 465 | int irq; |
| 466 | struct spi_master *master; |
| 467 | u8 i; |
| 468 | |
| 469 | pdata = dev->dev.platform_data; |
| 470 | if (!pdata) |
| 471 | return -ENODEV; |
| 472 | |
| 473 | r = platform_get_resource(dev, IORESOURCE_MEM, 0); |
| 474 | if (!r) |
| 475 | return -ENODEV; |
| 476 | |
| 477 | irq = platform_get_irq(dev, 0); |
| 478 | if (irq < 0) |
| 479 | return -ENXIO; |
| 480 | |
| 481 | master = xilinx_spi_init(&dev->dev, r, irq, dev->id, |
| 482 | pdata->num_chipselect, pdata->little_endian, |
| 483 | pdata->bits_per_word); |
| 484 | if (!master) |
| 485 | return -ENODEV; |
| 486 | |
| 487 | for (i = 0; i < pdata->num_devices; i++) |
| 488 | spi_new_device(master, pdata->devices + i); |
| 489 | |
| 490 | platform_set_drvdata(dev, master); |
| 491 | return 0; |
| 492 | } |
| 493 | |
| 494 | static int __devexit xilinx_spi_remove(struct platform_device *dev) |
| 495 | { |
| 496 | xilinx_spi_deinit(platform_get_drvdata(dev)); |
| 497 | platform_set_drvdata(dev, 0); |
| 498 | |
| 499 | return 0; |
| 500 | } |
| 501 | |
| 502 | /* work with hotplug and coldplug */ |
| 503 | MODULE_ALIAS("platform:" XILINX_SPI_NAME); |
| 504 | |
| 505 | static struct platform_driver xilinx_spi_driver = { |
| 506 | .probe = xilinx_spi_probe, |
| 507 | .remove = __devexit_p(xilinx_spi_remove), |
| 508 | .driver = { |
| 509 | .name = XILINX_SPI_NAME, |
| 510 | .owner = THIS_MODULE, |
| 511 | }, |
| 512 | }; |
| 513 | |
| 514 | static int __init xilinx_spi_pltfm_init(void) |
| 515 | { |
| 516 | return platform_driver_register(&xilinx_spi_driver); |
| 517 | } |
| 518 | module_init(xilinx_spi_pltfm_init); |
| 519 | |
| 520 | static void __exit xilinx_spi_pltfm_exit(void) |
| 521 | { |
| 522 | platform_driver_unregister(&xilinx_spi_driver); |
| 523 | } |
| 524 | module_exit(xilinx_spi_pltfm_exit); |
| 525 | |
Andrei Konovalov | ae918c0 | 2007-07-17 04:04:11 -0700 | [diff] [blame] | 526 | MODULE_AUTHOR("MontaVista Software, Inc. <source@mvista.com>"); |
| 527 | MODULE_DESCRIPTION("Xilinx SPI driver"); |
| 528 | MODULE_LICENSE("GPL"); |