blob: ec4a14f924e44406436c149ca2b4e4870244c57f [file] [log] [blame]
Daniel Walker62a6cc52010-05-05 07:27:16 -07001/*
2 * Copyright (C) 2008 Google, Inc.
Murali Nalajala2a0bbda2012-03-28 12:12:54 +05303 * Copyright (c) 2008-2012, Code Aurora Forum. All rights reserved.
Daniel Walker62a6cc52010-05-05 07:27:16 -07004 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#include <linux/kernel.h>
17#include <linux/platform_device.h>
Jordan Crouse914de9b2012-07-09 13:49:46 -060018#include <mach/kgsl.h>
Stephen Boydbd323442011-02-23 09:37:42 -080019
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070020#include <linux/dma-mapping.h>
21#include <asm/clkdev.h>
Daniel Walker62a6cc52010-05-05 07:27:16 -070022#include <mach/irqs.h>
23#include <mach/msm_iomap.h>
24#include <mach/dma.h>
25#include <mach/board.h>
26
27#include "devices.h"
28
29#include <asm/mach/flash.h>
30
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070031#include <asm/mach/mmc.h>
32#include <mach/msm_hsusb.h>
33#include <mach/usbdiag.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070034#include <mach/rpc_hsusb.h>
Murali Nalajala2a0bbda2012-03-28 12:12:54 +053035#include "pm.h"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070036
Matt Wagantallbf430eb2012-03-22 11:45:49 -070037struct platform_device msm8x50_device_acpuclk = {
38 .name = "acpuclk-8x50",
39 .id = -1,
40};
41
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070042static struct resource resources_uart1[] = {
43 {
44 .start = INT_UART1,
45 .end = INT_UART1,
46 .flags = IORESOURCE_IRQ,
47 },
48 {
49 .start = MSM_UART1_PHYS,
50 .end = MSM_UART1_PHYS + MSM_UART1_SIZE - 1,
51 .flags = IORESOURCE_MEM,
52 },
53};
54
55static struct resource resources_uart2[] = {
56 {
57 .start = INT_UART2,
58 .end = INT_UART2,
59 .flags = IORESOURCE_IRQ,
60 },
61 {
62 .start = MSM_UART2_PHYS,
63 .end = MSM_UART2_PHYS + MSM_UART2_SIZE - 1,
64 .flags = IORESOURCE_MEM,
65 },
66};
Daniel Walker62a6cc52010-05-05 07:27:16 -070067
68static struct resource resources_uart3[] = {
69 {
70 .start = INT_UART3,
71 .end = INT_UART3,
72 .flags = IORESOURCE_IRQ,
73 },
74 {
75 .start = MSM_UART3_PHYS,
76 .end = MSM_UART3_PHYS + MSM_UART3_SIZE - 1,
77 .flags = IORESOURCE_MEM,
Stepan Moskovchenkod41cb8c2011-01-17 20:33:32 -080078 .name = "uart_resource"
Daniel Walker62a6cc52010-05-05 07:27:16 -070079 },
80};
81
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070082struct platform_device msm_device_uart1 = {
83 .name = "msm_serial",
84 .id = 0,
85 .num_resources = ARRAY_SIZE(resources_uart1),
86 .resource = resources_uart1,
87};
88
89struct platform_device msm_device_uart2 = {
90 .name = "msm_serial",
91 .id = 1,
92 .num_resources = ARRAY_SIZE(resources_uart2),
93 .resource = resources_uart2,
94};
95
Daniel Walker62a6cc52010-05-05 07:27:16 -070096struct platform_device msm_device_uart3 = {
97 .name = "msm_serial",
98 .id = 2,
99 .num_resources = ARRAY_SIZE(resources_uart3),
100 .resource = resources_uart3,
101};
102
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700103#define MSM_UART1DM_PHYS 0xA0200000
104#define MSM_UART2DM_PHYS 0xA0900000
105static struct resource msm_uart1_dm_resources[] = {
106 {
107 .start = MSM_UART1DM_PHYS,
108 .end = MSM_UART1DM_PHYS + PAGE_SIZE - 1,
109 .flags = IORESOURCE_MEM,
110 },
111 {
112 .start = INT_UART1DM_IRQ,
113 .end = INT_UART1DM_IRQ,
114 .flags = IORESOURCE_IRQ,
115 },
116 {
117 .start = INT_UART1DM_RX,
118 .end = INT_UART1DM_RX,
119 .flags = IORESOURCE_IRQ,
120 },
121 {
122 .start = DMOV_HSUART1_TX_CHAN,
123 .end = DMOV_HSUART1_RX_CHAN,
124 .name = "uartdm_channels",
125 .flags = IORESOURCE_DMA,
126 },
127 {
128 .start = DMOV_HSUART1_TX_CRCI,
129 .end = DMOV_HSUART1_RX_CRCI,
130 .name = "uartdm_crci",
131 .flags = IORESOURCE_DMA,
132 },
133};
134
135static u64 msm_uart_dm1_dma_mask = DMA_BIT_MASK(32);
136
137struct platform_device msm_device_uart_dm1 = {
138 .name = "msm_serial_hs",
139 .id = 0,
140 .num_resources = ARRAY_SIZE(msm_uart1_dm_resources),
141 .resource = msm_uart1_dm_resources,
142 .dev = {
143 .dma_mask = &msm_uart_dm1_dma_mask,
144 .coherent_dma_mask = DMA_BIT_MASK(32),
145 },
146};
147
148static struct resource msm_uart2_dm_resources[] = {
149 {
150 .start = MSM_UART2DM_PHYS,
151 .end = MSM_UART2DM_PHYS + PAGE_SIZE - 1,
152 .flags = IORESOURCE_MEM,
153 },
154 {
155 .start = INT_UART2DM_IRQ,
156 .end = INT_UART2DM_IRQ,
157 .flags = IORESOURCE_IRQ,
158 },
159 {
160 .start = INT_UART2DM_RX,
161 .end = INT_UART2DM_RX,
162 .flags = IORESOURCE_IRQ,
163 },
164 {
165 .start = DMOV_HSUART2_TX_CHAN,
166 .end = DMOV_HSUART2_RX_CHAN,
167 .name = "uartdm_channels",
168 .flags = IORESOURCE_DMA,
169 },
170 {
171 .start = DMOV_HSUART2_TX_CRCI,
172 .end = DMOV_HSUART2_RX_CRCI,
173 .name = "uartdm_crci",
174 .flags = IORESOURCE_DMA,
175 },
176};
177
178static u64 msm_uart_dm2_dma_mask = DMA_BIT_MASK(32);
179
180struct platform_device msm_device_uart_dm2 = {
181 .name = "msm_serial_hs",
182 .id = 1,
183 .num_resources = ARRAY_SIZE(msm_uart2_dm_resources),
184 .resource = msm_uart2_dm_resources,
185 .dev = {
186 .dma_mask = &msm_uart_dm2_dma_mask,
187 .coherent_dma_mask = DMA_BIT_MASK(32),
188 },
189};
190
191#define MSM_I2C_SIZE SZ_4K
192#define MSM_I2C_PHYS 0xA9900000
193
194static struct resource resources_i2c[] = {
195 {
196 .start = MSM_I2C_PHYS,
197 .end = MSM_I2C_PHYS + MSM_I2C_SIZE - 1,
198 .flags = IORESOURCE_MEM,
199 },
200 {
201 .start = INT_PWB_I2C,
202 .end = INT_PWB_I2C,
203 .flags = IORESOURCE_IRQ,
204 },
205};
206
207struct platform_device msm_device_i2c = {
208 .name = "msm_i2c",
209 .id = 0,
210 .num_resources = ARRAY_SIZE(resources_i2c),
211 .resource = resources_i2c,
212};
213
214#define MSM_HSUSB_PHYS 0xA0800000
215static struct resource resources_hsusb_otg[] = {
216 {
217 .start = MSM_HSUSB_PHYS,
218 .end = MSM_HSUSB_PHYS + SZ_1K - 1,
219 .flags = IORESOURCE_MEM,
220 },
221 {
222 .start = INT_USB_HS,
223 .end = INT_USB_HS,
224 .flags = IORESOURCE_IRQ,
225 },
226};
227
228static u64 dma_mask = 0xffffffffULL;
229struct platform_device msm_device_hsusb_otg = {
230 .name = "msm_hsusb_otg",
231 .id = -1,
232 .num_resources = ARRAY_SIZE(resources_hsusb_otg),
233 .resource = resources_hsusb_otg,
234 .dev = {
235 .dma_mask = &dma_mask,
236 .coherent_dma_mask = 0xffffffffULL,
237 },
238};
239
240static struct resource resources_hsusb_peripheral[] = {
241 {
242 .start = MSM_HSUSB_PHYS,
243 .end = MSM_HSUSB_PHYS + SZ_1K - 1,
244 .flags = IORESOURCE_MEM,
245 },
246 {
247 .start = INT_USB_HS,
248 .end = INT_USB_HS,
249 .flags = IORESOURCE_IRQ,
250 },
251};
252
253static struct resource resources_gadget_peripheral[] = {
254 {
255 .start = MSM_HSUSB_PHYS,
256 .end = MSM_HSUSB_PHYS + SZ_1K - 1,
257 .flags = IORESOURCE_MEM,
258 },
259 {
260 .start = INT_USB_HS,
261 .end = INT_USB_HS,
262 .flags = IORESOURCE_IRQ,
263 },
264};
265
266struct platform_device msm_device_hsusb_peripheral = {
267 .name = "msm_hsusb_peripheral",
268 .id = -1,
269 .num_resources = ARRAY_SIZE(resources_hsusb_peripheral),
270 .resource = resources_hsusb_peripheral,
271 .dev = {
272 .dma_mask = &dma_mask,
273 .coherent_dma_mask = 0xffffffffULL,
274 },
275};
276
277struct platform_device msm_device_gadget_peripheral = {
278 .name = "msm_hsusb",
279 .id = -1,
280 .num_resources = ARRAY_SIZE(resources_gadget_peripheral),
281 .resource = resources_gadget_peripheral,
282 .dev = {
283 .dma_mask = &dma_mask,
284 .coherent_dma_mask = 0xffffffffULL,
285 },
286};
287
288#ifdef CONFIG_USB_FS_HOST
289#define MSM_HS2USB_PHYS 0xA0800400
290static struct resource resources_hsusb_host2[] = {
291 {
292 .start = MSM_HS2USB_PHYS,
293 .end = MSM_HS2USB_PHYS + SZ_1K - 1,
294 .flags = IORESOURCE_MEM,
295 },
296 {
297 .start = INT_USB_OTG,
298 .end = INT_USB_OTG,
299 .flags = IORESOURCE_IRQ,
300 },
301};
302
303struct platform_device msm_device_hsusb_host2 = {
304 .name = "msm_hsusb_host",
305 .id = 1,
306 .num_resources = ARRAY_SIZE(resources_hsusb_host2),
307 .resource = resources_hsusb_host2,
308 .dev = {
309 .dma_mask = &dma_mask,
310 .coherent_dma_mask = 0xffffffffULL,
311 },
312};
313#endif
314
315static struct resource resources_hsusb_host[] = {
316 {
317 .start = MSM_HSUSB_PHYS,
318 .end = MSM_HSUSB_PHYS + SZ_1K - 1,
319 .flags = IORESOURCE_MEM,
320 },
321 {
322 .start = INT_USB_HS,
323 .end = INT_USB_HS,
324 .flags = IORESOURCE_IRQ,
325 },
326};
327
328struct platform_device msm_device_hsusb_host = {
329 .name = "msm_hsusb_host",
330 .id = 0,
331 .num_resources = ARRAY_SIZE(resources_hsusb_host),
332 .resource = resources_hsusb_host,
333 .dev = {
334 .dma_mask = &dma_mask,
335 .coherent_dma_mask = 0xffffffffULL,
336 },
337};
338
339static struct platform_device *msm_host_devices[] = {
340 &msm_device_hsusb_host,
341#ifdef CONFIG_USB_FS_HOST
342 &msm_device_hsusb_host2,
343#endif
344};
345
346int msm_add_host(unsigned int host, struct msm_usb_host_platform_data *plat)
347{
348 struct platform_device *pdev;
349
350 pdev = msm_host_devices[host];
351 if (!pdev)
352 return -ENODEV;
353 pdev->dev.platform_data = plat;
354 return platform_device_register(pdev);
355}
356
357#ifdef CONFIG_USB_ANDROID
358struct usb_diag_platform_data usb_diag_pdata = {
359 .ch_name = DIAG_LEGACY,
360 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
361};
362
363struct platform_device usb_diag_device = {
364 .name = "usb_diag",
365 .id = -1,
366 .dev = {
367 .platform_data = &usb_diag_pdata,
368 },
369};
370#endif
371
372#ifdef CONFIG_USB_F_SERIAL
373static struct usb_gadget_fserial_platform_data fserial_pdata = {
374 .no_ports = 2,
375};
376
377struct platform_device usb_gadget_fserial_device = {
378 .name = "usb_fserial",
379 .id = -1,
380 .dev = {
381 .platform_data = &fserial_pdata,
382 },
383};
384#endif
385
386#define MSM_NAND_PHYS 0xA0A00000
387static struct resource resources_nand[] = {
388 [0] = {
389 .name = "msm_nand_dmac",
390 .start = DMOV_NAND_CHAN,
391 .end = DMOV_NAND_CHAN,
392 .flags = IORESOURCE_DMA,
393 },
394 [1] = {
395 .name = "msm_nand_phys",
396 .start = MSM_NAND_PHYS,
397 .end = MSM_NAND_PHYS + 0x7FF,
398 .flags = IORESOURCE_MEM,
399 },
Niranjana Vishwanathapura88b52272010-10-06 13:52:11 -0700400};
401
Pavankumar Kondeti7032d512010-12-08 13:37:07 +0530402static struct resource resources_otg[] = {
403 {
404 .start = MSM_HSUSB_PHYS,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700405 .end = MSM_HSUSB_PHYS + SZ_1K - 1,
Pavankumar Kondeti7032d512010-12-08 13:37:07 +0530406 .flags = IORESOURCE_MEM,
407 },
408 {
409 .start = INT_USB_HS,
410 .end = INT_USB_HS,
411 .flags = IORESOURCE_IRQ,
412 },
413};
414
415struct platform_device msm_device_otg = {
416 .name = "msm_otg",
417 .id = -1,
418 .num_resources = ARRAY_SIZE(resources_otg),
419 .resource = resources_otg,
420 .dev = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700421 .coherent_dma_mask = 0xffffffffULL,
Pavankumar Kondeti7032d512010-12-08 13:37:07 +0530422 },
423};
424
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700425struct flash_platform_data msm_nand_data = {
426 .parts = NULL,
427 .nr_parts = 0,
Pavankumar Kondeti7032d512010-12-08 13:37:07 +0530428};
429
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700430struct platform_device msm_device_nand = {
431 .name = "msm_nand",
Pavankumar Kondeti7032d512010-12-08 13:37:07 +0530432 .id = -1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700433 .num_resources = ARRAY_SIZE(resources_nand),
434 .resource = resources_nand,
Pavankumar Kondeti7032d512010-12-08 13:37:07 +0530435 .dev = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700436 .platform_data = &msm_nand_data,
Pavankumar Kondeti7032d512010-12-08 13:37:07 +0530437 },
438};
439
Murali Nalajala2a0bbda2012-03-28 12:12:54 +0530440static struct msm_pm_irq_calls qsd8x50_pm_irq_calls = {
441 .irq_pending = msm_irq_pending,
442 .idle_sleep_allowed = msm_irq_idle_sleep_allowed,
443 .enter_sleep1 = msm_irq_enter_sleep1,
444 .enter_sleep2 = msm_irq_enter_sleep2,
445 .exit_sleep1 = msm_irq_exit_sleep1,
446 .exit_sleep2 = msm_irq_exit_sleep2,
447 .exit_sleep3 = msm_irq_exit_sleep3,
448};
449
Stephen Boyd986c9632012-04-24 16:31:45 -0700450void __init msm_pm_register_irqs(void)
Murali Nalajala2a0bbda2012-03-28 12:12:54 +0530451{
452 msm_pm_set_irq_extns(&qsd8x50_pm_irq_calls);
453}
454
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700455struct platform_device msm_device_smd = {
456 .name = "msm_smd",
457 .id = -1,
458};
459
Jeff Ohlstein905f1ce2011-09-07 18:50:18 -0700460static struct resource msm_dmov_resource[] = {
Pavankumar Kondeti7032d512010-12-08 13:37:07 +0530461 {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700462 .start = INT_ADM_AARM,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700463 .flags = IORESOURCE_IRQ,
Pavankumar Kondeti7032d512010-12-08 13:37:07 +0530464 },
465 {
Jeff Ohlstein905f1ce2011-09-07 18:50:18 -0700466 .start = 0xA9700000,
467 .end = 0xA9700000 + SZ_4K - 1,
468 .flags = IORESOURCE_MEM,
Pavankumar Kondeti7032d512010-12-08 13:37:07 +0530469 },
470};
471
Jeff Ohlstein905f1ce2011-09-07 18:50:18 -0700472static struct msm_dmov_pdata msm_dmov_pdata = {
473 .sd = 3,
474 .sd_size = 0x400,
Pavankumar Kondeti7032d512010-12-08 13:37:07 +0530475};
476
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700477struct platform_device msm_device_dmov = {
478 .name = "msm_dmov",
479 .id = -1,
480 .resource = msm_dmov_resource,
481 .num_resources = ARRAY_SIZE(msm_dmov_resource),
Jeff Ohlstein905f1ce2011-09-07 18:50:18 -0700482 .dev = {
483 .platform_data = &msm_dmov_pdata,
Pavankumar Kondeti7032d512010-12-08 13:37:07 +0530484 },
485};
486
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700487#define MSM_SDC1_BASE 0xA0300000
488#define MSM_SDC2_BASE 0xA0400000
489#define MSM_SDC3_BASE 0xA0500000
490#define MSM_SDC4_BASE 0xA0600000
Sahitya Tummala8b4d95f2011-01-18 11:22:50 +0530491static struct resource resources_sdc1[] = {
492 {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700493 .start = MSM_SDC1_BASE,
494 .end = MSM_SDC1_BASE + SZ_4K - 1,
Sahitya Tummala8b4d95f2011-01-18 11:22:50 +0530495 .flags = IORESOURCE_MEM,
496 },
497 {
498 .start = INT_SDC1_0,
Sahitya Tummala8b4d95f2011-01-18 11:22:50 +0530499 .end = INT_SDC1_1,
Sahitya Tummala8b4d95f2011-01-18 11:22:50 +0530500 .flags = IORESOURCE_IRQ,
Sahitya Tummala8b4d95f2011-01-18 11:22:50 +0530501 },
502 {
Krishna Konda25786ec2011-07-25 16:21:36 -0700503 .name = "sdcc_dma_chnl",
504 .start = DMOV_SDC1_CHAN,
505 .end = DMOV_SDC1_CHAN,
Sahitya Tummala8b4d95f2011-01-18 11:22:50 +0530506 .flags = IORESOURCE_DMA,
507 },
Krishna Konda25786ec2011-07-25 16:21:36 -0700508 {
509 .name = "sdcc_dma_crci",
510 .start = DMOV_SDC1_CRCI,
511 .end = DMOV_SDC1_CRCI,
512 .flags = IORESOURCE_DMA,
513 }
Sahitya Tummala8b4d95f2011-01-18 11:22:50 +0530514};
515
516static struct resource resources_sdc2[] = {
517 {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700518 .start = MSM_SDC2_BASE,
519 .end = MSM_SDC2_BASE + SZ_4K - 1,
Sahitya Tummala8b4d95f2011-01-18 11:22:50 +0530520 .flags = IORESOURCE_MEM,
521 },
522 {
523 .start = INT_SDC2_0,
Sahitya Tummala8b4d95f2011-01-18 11:22:50 +0530524 .end = INT_SDC2_1,
Sahitya Tummala8b4d95f2011-01-18 11:22:50 +0530525 .flags = IORESOURCE_IRQ,
Sahitya Tummala8b4d95f2011-01-18 11:22:50 +0530526 },
Sahitya Tummala8b4d95f2011-01-18 11:22:50 +0530527 {
Krishna Konda25786ec2011-07-25 16:21:36 -0700528 .name = "sdcc_dma_chnl",
529 .start = DMOV_SDC2_CHAN,
530 .end = DMOV_SDC2_CHAN,
Sahitya Tummala8b4d95f2011-01-18 11:22:50 +0530531 .flags = IORESOURCE_DMA,
532 },
Krishna Konda25786ec2011-07-25 16:21:36 -0700533 {
534 .name = "sdcc_dma_crci",
535 .start = DMOV_SDC2_CRCI,
536 .end = DMOV_SDC2_CRCI,
537 .flags = IORESOURCE_DMA,
538 }
Sahitya Tummala8b4d95f2011-01-18 11:22:50 +0530539};
540
541static struct resource resources_sdc3[] = {
542 {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700543 .start = MSM_SDC3_BASE,
544 .end = MSM_SDC3_BASE + SZ_4K - 1,
Sahitya Tummala8b4d95f2011-01-18 11:22:50 +0530545 .flags = IORESOURCE_MEM,
546 },
547 {
548 .start = INT_SDC3_0,
Sahitya Tummala8b4d95f2011-01-18 11:22:50 +0530549 .end = INT_SDC3_1,
Sahitya Tummala8b4d95f2011-01-18 11:22:50 +0530550 .flags = IORESOURCE_IRQ,
Sahitya Tummala8b4d95f2011-01-18 11:22:50 +0530551 },
Sahitya Tummala8b4d95f2011-01-18 11:22:50 +0530552 {
Krishna Konda25786ec2011-07-25 16:21:36 -0700553 .name = "sdcc_dma_chnl",
554 .start = DMOV_SDC3_CHAN,
555 .end = DMOV_SDC3_CHAN,
556 .flags = IORESOURCE_DMA,
Sahitya Tummala8b4d95f2011-01-18 11:22:50 +0530557 },
558 {
Krishna Konda25786ec2011-07-25 16:21:36 -0700559 .name = "sdcc_dma_crci",
560 .start = DMOV_SDC3_CRCI,
561 .end = DMOV_SDC3_CRCI,
Sahitya Tummala8b4d95f2011-01-18 11:22:50 +0530562 .flags = IORESOURCE_DMA,
563 },
564};
565
566static struct resource resources_sdc4[] = {
567 {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700568 .start = MSM_SDC4_BASE,
569 .end = MSM_SDC4_BASE + SZ_4K - 1,
Sahitya Tummala8b4d95f2011-01-18 11:22:50 +0530570 .flags = IORESOURCE_MEM,
571 },
572 {
573 .start = INT_SDC4_0,
Sahitya Tummala8b4d95f2011-01-18 11:22:50 +0530574 .end = INT_SDC4_1,
Sahitya Tummala8b4d95f2011-01-18 11:22:50 +0530575 .flags = IORESOURCE_IRQ,
Sahitya Tummala8b4d95f2011-01-18 11:22:50 +0530576 },
Sahitya Tummala8b4d95f2011-01-18 11:22:50 +0530577 {
Krishna Konda25786ec2011-07-25 16:21:36 -0700578 .name = "sdcc_dma_chnl",
579 .start = DMOV_SDC4_CHAN,
580 .end = DMOV_SDC4_CHAN,
581 .flags = IORESOURCE_DMA,
Sahitya Tummala8b4d95f2011-01-18 11:22:50 +0530582 },
583 {
Krishna Konda25786ec2011-07-25 16:21:36 -0700584 .name = "sdcc_dma_crci",
585 .start = DMOV_SDC4_CRCI,
586 .end = DMOV_SDC4_CRCI,
Sahitya Tummala8b4d95f2011-01-18 11:22:50 +0530587 .flags = IORESOURCE_DMA,
588 },
589};
590
591struct platform_device msm_device_sdc1 = {
592 .name = "msm_sdcc",
593 .id = 1,
594 .num_resources = ARRAY_SIZE(resources_sdc1),
595 .resource = resources_sdc1,
596 .dev = {
597 .coherent_dma_mask = 0xffffffff,
598 },
599};
600
601struct platform_device msm_device_sdc2 = {
602 .name = "msm_sdcc",
603 .id = 2,
604 .num_resources = ARRAY_SIZE(resources_sdc2),
605 .resource = resources_sdc2,
606 .dev = {
607 .coherent_dma_mask = 0xffffffff,
608 },
609};
610
611struct platform_device msm_device_sdc3 = {
612 .name = "msm_sdcc",
613 .id = 3,
614 .num_resources = ARRAY_SIZE(resources_sdc3),
615 .resource = resources_sdc3,
616 .dev = {
617 .coherent_dma_mask = 0xffffffff,
618 },
619};
620
621struct platform_device msm_device_sdc4 = {
622 .name = "msm_sdcc",
623 .id = 4,
624 .num_resources = ARRAY_SIZE(resources_sdc4),
625 .resource = resources_sdc4,
626 .dev = {
627 .coherent_dma_mask = 0xffffffff,
628 },
629};
630
631static struct platform_device *msm_sdcc_devices[] __initdata = {
632 &msm_device_sdc1,
633 &msm_device_sdc2,
634 &msm_device_sdc3,
635 &msm_device_sdc4,
636};
637
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700638int __init msm_add_sdcc(unsigned int controller, struct mmc_platform_data *plat)
Sahitya Tummala8b4d95f2011-01-18 11:22:50 +0530639{
640 struct platform_device *pdev;
Sahitya Tummala8b4d95f2011-01-18 11:22:50 +0530641
642 if (controller < 1 || controller > 4)
643 return -EINVAL;
644
645 pdev = msm_sdcc_devices[controller-1];
646 pdev->dev.platform_data = plat;
Sahitya Tummala8b4d95f2011-01-18 11:22:50 +0530647 return platform_device_register(pdev);
648}
649
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700650#if defined(CONFIG_FB_MSM_MDP40)
651#define MDP_BASE 0xA3F00000
652#define PMDH_BASE 0xAD600000
653#define EMDH_BASE 0xAD700000
654#define TVENC_BASE 0xAD400000
655#else
656#define MDP_BASE 0xAA200000
657#define PMDH_BASE 0xAA600000
658#define EMDH_BASE 0xAA700000
659#define TVENC_BASE 0xAA400000
660#endif
661
662static struct resource msm_mdp_resources[] = {
663 {
664 .name = "mdp",
665 .start = MDP_BASE,
666 .end = MDP_BASE + 0x000F0000 - 1,
667 .flags = IORESOURCE_MEM,
668 },
669 {
670 .start = INT_MDP,
671 .end = INT_MDP,
672 .flags = IORESOURCE_IRQ,
673 },
Daniel Walker62a6cc52010-05-05 07:27:16 -0700674};
675
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700676static struct resource msm_mddi_resources[] = {
677 {
678 .name = "pmdh",
679 .start = PMDH_BASE,
680 .end = PMDH_BASE + PAGE_SIZE - 1,
681 .flags = IORESOURCE_MEM,
682 }
683};
684
685static struct resource msm_mddi_ext_resources[] = {
686 {
687 .name = "emdh",
688 .start = EMDH_BASE,
689 .end = EMDH_BASE + PAGE_SIZE - 1,
690 .flags = IORESOURCE_MEM,
691 }
692};
693
694static struct resource msm_ebi2_lcd_resources[] = {
695 {
696 .name = "base",
697 .start = 0xa0d00000,
698 .end = 0xa0d00000 + PAGE_SIZE - 1,
699 .flags = IORESOURCE_MEM,
700 },
701 {
702 .name = "lcd01",
703 .start = 0x98000000,
704 .end = 0x98000000 + 0x80000 - 1,
705 .flags = IORESOURCE_MEM,
706 },
707 {
708 .name = "lcd02",
709 .start = 0x9c000000,
710 .end = 0x9c000000 + 0x80000 - 1,
711 .flags = IORESOURCE_MEM,
712 },
713};
714
715static struct resource msm_tvenc_resources[] = {
716 {
717 .name = "tvenc",
718 .start = TVENC_BASE,
719 .end = TVENC_BASE + PAGE_SIZE - 1,
720 .flags = IORESOURCE_MEM,
721 }
722};
723
724static struct platform_device msm_mdp_device = {
725 .name = "mdp",
726 .id = 0,
727 .num_resources = ARRAY_SIZE(msm_mdp_resources),
728 .resource = msm_mdp_resources,
729};
730
731static struct platform_device msm_mddi_device = {
732 .name = "mddi",
733 .id = 0,
734 .num_resources = ARRAY_SIZE(msm_mddi_resources),
735 .resource = msm_mddi_resources,
736};
737
738static struct platform_device msm_mddi_ext_device = {
739 .name = "mddi_ext",
740 .id = 0,
741 .num_resources = ARRAY_SIZE(msm_mddi_ext_resources),
742 .resource = msm_mddi_ext_resources,
743};
744
745static struct platform_device msm_ebi2_lcd_device = {
746 .name = "ebi2_lcd",
747 .id = 0,
748 .num_resources = ARRAY_SIZE(msm_ebi2_lcd_resources),
749 .resource = msm_ebi2_lcd_resources,
750};
751
752static struct platform_device msm_lcdc_device = {
753 .name = "lcdc",
754 .id = 0,
755};
756
757static struct platform_device msm_tvenc_device = {
758 .name = "tvenc",
759 .id = 0,
760 .num_resources = ARRAY_SIZE(msm_tvenc_resources),
761 .resource = msm_tvenc_resources,
762};
763
764#if defined(CONFIG_MSM_SOC_REV_A)
765#define MSM_QUP_PHYS 0xA1680000
766#define MSM_GSBI_QUP_I2C_PHYS 0xA1600000
767#define INT_PWB_QUP_ERR INT_GSBI_QUP
768#else
769#define MSM_QUP_PHYS 0xA9900000
770#define MSM_GSBI_QUP_I2C_PHYS 0xA9900000
771#define INT_PWB_QUP_ERR INT_PWB_I2C
772#endif
773#define MSM_QUP_SIZE SZ_4K
774static struct resource resources_qup[] = {
775 {
776 .name = "qup_phys_addr",
777 .start = MSM_QUP_PHYS,
778 .end = MSM_QUP_PHYS + MSM_QUP_SIZE - 1,
779 .flags = IORESOURCE_MEM,
780 },
781 {
782 .name = "gsbi_qup_i2c_addr",
783 .start = MSM_GSBI_QUP_I2C_PHYS,
784 .end = MSM_GSBI_QUP_I2C_PHYS + 4 - 1,
785 .flags = IORESOURCE_MEM,
786 },
787 {
788 .name = "qup_err_intr",
789 .start = INT_PWB_QUP_ERR,
790 .end = INT_PWB_QUP_ERR,
791 .flags = IORESOURCE_IRQ,
792 },
793};
794
795struct platform_device qup_device_i2c = {
796 .name = "qup_i2c",
797 .id = 4,
798 .num_resources = ARRAY_SIZE(resources_qup),
799 .resource = resources_qup,
800};
801
802/* TSIF begin */
803#if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE)
804
805#define MSM_TSIF_PHYS (0xa0100000)
806#define MSM_TSIF_SIZE (0x200)
807
808static struct resource tsif_resources[] = {
809 [0] = {
810 .flags = IORESOURCE_IRQ,
811 .start = INT_TSIF_IRQ,
812 .end = INT_TSIF_IRQ,
813 },
814 [1] = {
815 .flags = IORESOURCE_MEM,
816 .start = MSM_TSIF_PHYS,
817 .end = MSM_TSIF_PHYS + MSM_TSIF_SIZE - 1,
818 },
819 [2] = {
820 .flags = IORESOURCE_DMA,
821 .start = DMOV_TSIF_CHAN,
822 .end = DMOV_TSIF_CRCI,
823 },
824};
825
826static void tsif_release(struct device *dev)
827{
828 dev_info(dev, "release\n");
829}
830
831struct platform_device msm_device_tsif = {
832 .name = "msm_tsif",
833 .id = 0,
834 .num_resources = ARRAY_SIZE(tsif_resources),
835 .resource = tsif_resources,
836 .dev = {
837 .release = tsif_release,
838 },
839};
840#endif /* defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE) */
841/* TSIF end */
842
843#define MSM_TSSC_PHYS 0xAA300000
844static struct resource resources_tssc[] = {
845 {
846 .start = MSM_TSSC_PHYS,
847 .end = MSM_TSSC_PHYS + SZ_4K - 1,
848 .name = "tssc",
849 .flags = IORESOURCE_MEM,
850 },
851 {
852 .start = INT_TCHSCRN1,
853 .end = INT_TCHSCRN1,
854 .name = "tssc1",
855 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING,
856 },
857 {
858 .start = INT_TCHSCRN2,
859 .end = INT_TCHSCRN2,
860 .name = "tssc2",
861 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING,
862 },
863};
864
865struct platform_device msm_device_tssc = {
866 .name = "msm_touchscreen",
867 .id = 0,
868 .num_resources = ARRAY_SIZE(resources_tssc),
869 .resource = resources_tssc,
870};
871
872static void __init msm_register_device(struct platform_device *pdev, void *data)
873{
874 int ret;
875
876 pdev->dev.platform_data = data;
877
878 ret = platform_device_register(pdev);
879 if (ret)
880 dev_err(&pdev->dev,
881 "%s: platform_device_register() failed = %d\n",
882 __func__, ret);
883}
884
885void __init msm_fb_register_device(char *name, void *data)
886{
887 if (!strncmp(name, "mdp", 3))
888 msm_register_device(&msm_mdp_device, data);
889 else if (!strncmp(name, "pmdh", 4))
890 msm_register_device(&msm_mddi_device, data);
891 else if (!strncmp(name, "emdh", 4))
892 msm_register_device(&msm_mddi_ext_device, data);
893 else if (!strncmp(name, "ebi2", 4))
894 msm_register_device(&msm_ebi2_lcd_device, data);
895 else if (!strncmp(name, "tvenc", 5))
896 msm_register_device(&msm_tvenc_device, data);
897 else if (!strncmp(name, "lcdc", 4))
898 msm_register_device(&msm_lcdc_device, data);
899 else
900 printk(KERN_ERR "%s: unknown device! %s\n", __func__, name);
901}
902
903static struct platform_device msm_camera_device = {
904 .name = "msm_camera",
905 .id = 0,
906};
907
908void __init msm_camera_register_device(void *res, uint32_t num,
909 void *data)
910{
911 msm_camera_device.num_resources = num;
912 msm_camera_device.resource = res;
913
914 msm_register_device(&msm_camera_device, data);
915}
916
917static struct resource kgsl_3d0_resources[] = {
918 {
919 .name = KGSL_3D0_REG_MEMORY,
920 .start = 0xA0000000,
921 .end = 0xA001ffff,
922 .flags = IORESOURCE_MEM,
923 },
924 {
925 .name = KGSL_3D0_IRQ,
926 .start = INT_GRAPHICS,
927 .end = INT_GRAPHICS,
928 .flags = IORESOURCE_IRQ,
929 },
930};
931
932static struct kgsl_device_platform_data kgsl_3d0_pdata = {
Lucille Sylvesterdce84cd2011-10-12 14:15:37 -0600933 .pwrlevel = {
934 {
935 .gpu_freq = 0,
936 .bus_freq = 128000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700937 },
938 },
Lucille Sylvesterdce84cd2011-10-12 14:15:37 -0600939 .init_level = 0,
940 .num_levels = 1,
941 .set_grp_async = NULL,
942 .idle_timeout = HZ/5,
943 .clk_map = KGSL_CLK_CORE | KGSL_CLK_MEM,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700944};
945
946struct platform_device msm_kgsl_3d0 = {
947 .name = "kgsl-3d0",
948 .id = 0,
949 .num_resources = ARRAY_SIZE(kgsl_3d0_resources),
950 .resource = kgsl_3d0_resources,
951 .dev = {
952 .platform_data = &kgsl_3d0_pdata,
953 },
954};
Daniel Walker62a6cc52010-05-05 07:27:16 -0700955