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Lennert Buytenhekc4a6a2a2007-10-19 04:09:53 +02001/*
2 * MV-643XX ethernet platform device data definition file.
3 */
Lennert Buytenhekfa3959f2008-04-24 01:27:02 +02004
Lennert Buytenhekc4a6a2a2007-10-19 04:09:53 +02005#ifndef __LINUX_MV643XX_ETH_H
6#define __LINUX_MV643XX_ETH_H
7
Lennert Buytenhekf2ce8252008-04-24 01:27:17 +02008#include <linux/mbus.h>
9
Lennert Buytenhek240e44192008-04-24 01:27:44 +020010#define MV643XX_ETH_SHARED_NAME "mv643xx_eth"
11#define MV643XX_ETH_NAME "mv643xx_eth_port"
Lennert Buytenhekc4a6a2a2007-10-19 04:09:53 +020012#define MV643XX_ETH_SHARED_REGS 0x2000
13#define MV643XX_ETH_SHARED_REGS_SIZE 0x2000
Dale Farnsworth3077d782007-10-29 15:39:01 -070014#define MV643XX_ETH_BAR_4 0x2220
15#define MV643XX_ETH_SIZE_REG_4 0x2224
16#define MV643XX_ETH_BASE_ADDR_ENABLE_REG 0x2290
Lennert Buytenhekc4a6a2a2007-10-19 04:09:53 +020017
Lennert Buytenhekf2ce8252008-04-24 01:27:17 +020018struct mv643xx_eth_shared_platform_data {
19 struct mbus_dram_target_info *dram;
Lennert Buytenhekfc0eb9f2008-08-26 12:56:56 +020020 struct platform_device *shared_smi;
Lennert Buytenhekfc32b0e2008-06-02 00:28:40 +020021 unsigned int t_clk;
Saeed Bishara9b2c2ff2010-06-27 00:26:43 +000022 /*
23 * Max packet size for Tx IP/Layer 4 checksum, when set to 0, default
24 * limit of 9KiB will be used.
25 */
26 int tx_csum_limit;
Lennert Buytenhekf2ce8252008-04-24 01:27:17 +020027};
28
Lennert Buytenhekac840602008-08-26 14:06:47 +020029#define MV643XX_ETH_PHY_ADDR_DEFAULT 0
30#define MV643XX_ETH_PHY_ADDR(x) (0x80 | (x))
31#define MV643XX_ETH_PHY_NONE 0xff
32
Lennert Buytenhekc4a6a2a2007-10-19 04:09:53 +020033struct mv643xx_eth_platform_data {
Lennert Buytenhekfc32b0e2008-06-02 00:28:40 +020034 /*
35 * Pointer back to our parent instance, and our port number.
36 */
Lennert Buytenhekfa3959f2008-04-24 01:27:02 +020037 struct platform_device *shared;
Lennert Buytenhekfc32b0e2008-06-02 00:28:40 +020038 int port_number;
Lennert Buytenhekfa3959f2008-04-24 01:27:02 +020039
Lennert Buytenhekfc32b0e2008-06-02 00:28:40 +020040 /*
41 * Whether a PHY is present, and if yes, at which address.
42 */
Lennert Buytenhekfc32b0e2008-06-02 00:28:40 +020043 int phy_addr;
Lennert Buytenhekce4e2e42008-04-24 01:29:59 +020044
Lennert Buytenhekfc32b0e2008-06-02 00:28:40 +020045 /*
46 * Use this MAC address if it is valid, overriding the
47 * address that is already in the hardware.
48 */
49 u8 mac_addr[6];
Lennert Buytenhekc4a6a2a2007-10-19 04:09:53 +020050
Lennert Buytenhekfc32b0e2008-06-02 00:28:40 +020051 /*
52 * If speed is 0, autonegotiation is enabled.
53 * Valid values for speed: 0, SPEED_10, SPEED_100, SPEED_1000.
54 * Valid values for duplex: DUPLEX_HALF, DUPLEX_FULL.
55 */
56 int speed;
57 int duplex;
Lennert Buytenhekc4a6a2a2007-10-19 04:09:53 +020058
Lennert Buytenhekfc32b0e2008-06-02 00:28:40 +020059 /*
Lennert Buytenhekf7981c12008-08-26 10:23:22 +020060 * How many RX/TX queues to use.
Lennert Buytenhek64da80a2008-06-02 01:01:26 +020061 */
Lennert Buytenhekf7981c12008-08-26 10:23:22 +020062 int rx_queue_count;
63 int tx_queue_count;
Lennert Buytenhek64da80a2008-06-02 01:01:26 +020064
65 /*
Lennert Buytenhekfc32b0e2008-06-02 00:28:40 +020066 * Override default RX/TX queue sizes if nonzero.
67 */
68 int rx_queue_size;
69 int tx_queue_size;
70
71 /*
72 * Use on-chip SRAM for RX/TX descriptors if size is nonzero
73 * and sufficient to contain all descriptors for the requested
74 * ring sizes.
75 */
76 unsigned long rx_sram_addr;
77 int rx_sram_size;
78 unsigned long tx_sram_addr;
79 int tx_sram_size;
Lennert Buytenhekc4a6a2a2007-10-19 04:09:53 +020080};
81
Lennert Buytenhekfc32b0e2008-06-02 00:28:40 +020082
83#endif