blob: c74e59d23175c47799de65037d54ad0cbdac17b9 [file] [log] [blame]
Stepan Moskovchenko632d4162013-01-24 16:00:08 -08001/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
Stepan Moskovchenko920a1012013-04-26 14:34:14 -070013/include/ "skeleton64.dtsi"
Stepan Moskovchenko632d4162013-01-24 16:00:08 -080014
15/ {
Stepan Moskovchenkoe90cd652013-04-18 12:54:47 -070016 model = "Qualcomm APQ 8084";
17 compatible = "qcom,apq8084";
Stepan Moskovchenko632d4162013-01-24 16:00:08 -080018 interrupt-parent = <&intc>;
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -070019 soc: soc { };
20};
21
22/include/ "apq8084-ion.dtsi"
Jeff Hugo94686722013-05-17 17:37:33 -060023/include/ "apq8084-smp2p.dtsi"
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -070024
25&soc {
26 #address-cells = <1>;
27 #size-cells = <1>;
Stepan Moskovchenko920a1012013-04-26 14:34:14 -070028 ranges = <0 0 0 0xffffffff>;
Stepan Moskovchenko632d4162013-01-24 16:00:08 -080029
30 intc: interrupt-controller@f9000000 {
31 compatible = "qcom,msm-qgic2";
32 interrupt-controller;
33 #interrupt-cells = <3>;
34 reg = <0xF9000000 0x1000>,
35 <0xF9002000 0x1000>;
36 };
37
38 msmgpio: gpio@fd510000 {
39 compatible = "qcom,msm-gpio";
40 gpio-controller;
41 #gpio-cells = <2>;
42 interrupt-controller;
43 #interrupt-cells = <2>;
44 reg = <0xfd510000 0x4000>;
45 ngpio = <146>;
46 interrupts = <0 208 0>;
47 qcom,direct-connect-irqs = <8>;
48 };
49
50 timer {
51 compatible = "arm,armv7-timer";
52 interrupts = <1 2 0 1 3 0>;
53 clock-frequency = <19200000>;
54 };
55
56 serial@f991f000 {
57 compatible = "qcom,msm-lsuart-v14";
58 reg = <0xf991f000 0x1000>;
59 interrupts = <0 109 0>;
60 status = "disabled";
61 };
62
63 qcom,cache_erp {
64 compatible = "qcom,cache_erp";
65 interrupts = <1 9 0>, <0 2 0>;
66 interrupt-names = "l1_irq", "l2_irq";
67 };
68
69 qcom,cache_dump {
70 compatible = "qcom,cache_dump";
71 qcom,l1-dump-size = <0x100000>;
72 qcom,l2-dump-size = <0x500000>;
73 qcom,memory-reservation-type = "EBI1";
74 qcom,memory-reservation-size = <0x600000>; /* 6M EBI1 buffer */
75 };
76
77 rpm_bus: qcom,rpm-smd {
78 compatible = "qcom,rpm-smd";
79 rpm-channel-name = "rpm_requests";
80 rpm-channel-type = <15>; /* SMD_APPS_RPM */
81 rpm-standalone;
82 };
83
Stepan Moskovchenkob8dd6a92013-03-18 18:53:34 -070084 qcom,msm-imem@fe805000 {
85 compatible = "qcom,msm-imem";
86 reg = <0xfe805000 0x1000>; /* Address and size of IMEM */
Laura Abbott2fd1fc62013-03-05 14:30:47 -080087 };
88
89 qcom,msm-rtb {
90 compatible = "qcom,msm-rtb";
91 qcom,memory-reservation-type = "EBI1";
92 qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */
93 };
Stepan Moskovchenkob8dd6a92013-03-18 18:53:34 -070094
Venkat Gopalakrishnand7ba4e32013-03-29 19:51:19 -070095 sdcc1: qcom,sdcc@f9824000 {
96 cell-index = <1>; /* SDC1 eMMC slot */
97 compatible = "qcom,msm-sdcc";
98 reg = <0xf9824000 0x800>;
99 reg-names = "core_mem";
100 interrupts = <0 123 0>;
101 interrupt-names = "core_irq";
102
103 qcom,bus-width = <8>;
104 status = "disabled";
105 };
106
107 sdcc2: qcom,sdcc@f98a4000 {
108 cell-index = <2>; /* SDC2 SD card slot */
109 compatible = "qcom,msm-sdcc";
110 reg = <0xf98a4000 0x800>;
111 reg-names = "core_mem";
112 interrupts = <0 125 0>;
113 interrupt-names = "core_irq";
114
115
116 qcom,bus-width = <4>;
117 status = "disabled";
118 };
Kenneth Heitke72e12c02013-04-22 17:30:58 -0600119
120 spmi_bus: qcom,spmi@fc4c0000 {
121 cell-index = <0>;
122 compatible = "qcom,spmi-pmic-arb";
123 reg-names = "core", "intr", "cnfg";
124 reg = <0xfc4cf000 0x1000>,
125 <0Xfc4cb000 0x1000>,
126 <0Xfc4ca000 0x1000>;
127 /* 190,ee0_krait_hlos_spmi_periph_irq */
128 /* 187,channel_0_krait_hlos_trans_done_irq */
129 interrupts = <0 190 0>, <0 187 0>;
130 qcom,not-wakeup;
131 qcom,pmic-arb-ee = <0>;
132 qcom,pmic-arb-channel = <0>;
133 #address-cells = <1>;
134 #size-cells = <0>;
135 interrupt-controller;
136 #interrupt-cells = <3>;
137 };
Hemant Kumar303c9412013-04-19 12:33:31 -0700138
139 usb3: qcom,ssusb@f9200000 {
140 compatible = "qcom,dwc-usb3-msm";
141 reg = <0xf9200000 0xfc000>,
142 <0xfd4ab000 0x4>;
143 #address-cells = <1>;
144 #size-cells = <1>;
145 ranges;
146 interrupts = <0 133 0>;
147 interrupt-names = "hs_phy_irq";
148 ssusb_vdd_dig-supply = <&pma8084_s1>;
149 SSUSB_1p8-supply = <&pma8084_l6>;
150 hsusb_vdd_dig-supply = <&pma8084_s1>;
151 HSUSB_1p8-supply = <&pma8084_l6>;
152 HSUSB_3p3-supply = <&pma8084_l24>;
153 qcom,dwc-usb3-msm-dbm-eps = <4>;
154 qcom,vdd-voltage-level = <0 900000 1050000>;
155
156 dwc3@f9200000 {
157 compatible = "synopsys,dwc3";
158 reg = <0xf9200000 0xfc000>;
159 interrupt-parent = <&intc>;
160 interrupts = <0 131 0>, <0 179 0>;
161 interrupt-names = "irq", "otg_irq";
162 tx-fifo-resize;
163 };
164 };
165
166 android_usb {
167 compatible = "qcom,android-usb";
168 };
Neeti Desai3db510c2013-04-29 14:31:31 -0700169
170 qcom,ocmem@fdd00000 {
171 compatible = "qcom,msm-ocmem";
172 reg = <0xfdd00000 0x2000>,
173 <0xfdd02000 0x2000>,
174 <0xfe039000 0x400>,
175 <0xfec00000 0x200000>;
176 reg-names = "ocmem_ctrl_physical", "dm_ctrl_physical", "br_ctrl_physical", "ocmem_physical";
177 interrupts = <0 76 0 0 77 0>;
178 interrupt-names = "ocmem_irq", "dm_irq";
179 qcom,ocmem-num-regions = <0x4>;
180 qcom,ocmem-num-macros = <0x20>;
181 qcom,resource-type = <0x706d636f>;
182 #address-cells = <1>;
183 #size-cells = <1>;
184 ranges = <0x0 0xfec00000 0x200000>;
185
186 partition@0 {
187 reg = <0x0 0x180000>;
188 qcom,ocmem-part-name = "graphics";
189 qcom,ocmem-part-min = <0x80000>;
190 };
191
192 partition@80000 {
193 reg = <0x180000 0x80000>;
194 qcom,ocmem-part-name = "lp_audio";
195 qcom,ocmem-part-min = <0x80000>;
196 };
197
198 partition@100000 {
199 reg = <0x180000 0x80000>;
200 qcom,ocmem-part-name = "video";
201 qcom,ocmem-part-min = <0x55000>;
202 };
203
204 };
Laura Abbott8fadcbc2013-05-17 17:44:16 -0700205
206 memory_hole: qcom,msm-mem-hole {
207 compatible = "qcom,msm-mem-hole";
208 qcom,memblock-remove = <0x0dc00000 0x2000000>; /* Address and Size of Hole */
209 };
Jeff Hugo762c2cd2013-05-17 13:25:36 -0600210
211 qcom,ipc-spinlock@fd484000 {
212 compatible = "qcom,ipc-spinlock-sfpb";
213 reg = <0xfd484000 0x400>;
214 qcom,num-locks = <8>;
215 };
Jeff Hugoa1d67b32013-05-17 17:26:34 -0600216
217 qcom,smem@fa00000 {
218 compatible = "qcom,smem";
219 reg = <0xfa00000 0x200000>,
220 <0xf9011000 0x1000>,
221 <0xfc428000 0x4000>;
222 reg-names = "smem", "irq-reg-base", "aux-mem1";
223
224 qcom,smd-adsp {
225 compatible = "qcom,smd";
226 qcom,smd-edge = <1>;
227 qcom,smd-irq-offset = <0x8>;
228 qcom,smd-irq-bitmask = <0x100>;
229 qcom,pil-string = "adsp";
230 interrupts = <0 156 1>;
231 };
232
233 qcom,smsm-adsp {
234 compatible = "qcom,smsm";
235 qcom,smsm-edge = <1>;
236 qcom,smsm-irq-offset = <0x8>;
237 qcom,smsm-irq-bitmask = <0x200>;
238 interrupts = <0 157 1>;
239 };
240
241 qcom,smd-rpm {
242 compatible = "qcom,smd";
243 qcom,smd-edge = <15>;
244 qcom,smd-irq-offset = <0x8>;
245 qcom,smd-irq-bitmask = <0x1>;
246 interrupts = <0 168 1>;
247 qcom,irq-no-suspend;
248 };
249 };
Stepan Moskovchenko632d4162013-01-24 16:00:08 -0800250};
David Collinsce8b1162013-04-23 09:01:57 -0700251
252/include/ "msm-pma8084.dtsi"
David Collinsb8e4fe52013-04-23 09:04:30 -0700253/include/ "apq8084-regulator.dtsi"