Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1 | /* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. |
Steve Muckle | a55df6e | 2010-01-07 12:43:24 -0800 | [diff] [blame] | 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | * |
Steve Muckle | a55df6e | 2010-01-07 12:43:24 -0800 | [diff] [blame] | 12 | */ |
| 13 | |
| 14 | #include <linux/kernel.h> |
| 15 | #include <linux/platform_device.h> |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 16 | #include <linux/gpio.h> |
Steve Muckle | 9161d30 | 2010-02-11 11:50:40 -0800 | [diff] [blame] | 17 | #include <linux/irq.h> |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 18 | #include <linux/io.h> |
| 19 | #include <linux/mfd/pmic8058.h> |
Steve Muckle | a55df6e | 2010-01-07 12:43:24 -0800 | [diff] [blame] | 20 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 21 | #include <linux/input/pmic8058-keypad.h> |
| 22 | #include <linux/pmic8058-batt-alarm.h> |
| 23 | #include <linux/pmic8058-pwrkey.h> |
Ashay Jaiswal | 4d1ab55 | 2011-07-15 11:30:49 +0530 | [diff] [blame] | 24 | #include <linux/rtc/rtc-pm8058.h> |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 25 | #include <linux/pmic8058-vibrator.h> |
| 26 | #include <linux/leds.h> |
| 27 | #include <linux/pmic8058-othc.h> |
| 28 | #include <linux/mfd/pmic8901.h> |
| 29 | #include <linux/regulator/pmic8058-regulator.h> |
| 30 | #include <linux/regulator/pmic8901-regulator.h> |
| 31 | #include <linux/bootmem.h> |
| 32 | #include <linux/pwm.h> |
| 33 | #include <linux/pmic8058-pwm.h> |
| 34 | #include <linux/leds-pmic8058.h> |
| 35 | #include <linux/pmic8058-xoadc.h> |
| 36 | #include <linux/msm_adc.h> |
| 37 | #include <linux/m_adcproc.h> |
| 38 | #include <linux/mfd/marimba.h> |
| 39 | #include <linux/msm-charger.h> |
| 40 | #include <linux/i2c.h> |
| 41 | #include <linux/i2c/sx150x.h> |
| 42 | #include <linux/smsc911x.h> |
| 43 | #include <linux/spi/spi.h> |
| 44 | #include <linux/input/tdisc_shinetsu.h> |
| 45 | #include <linux/input/cy8c_ts.h> |
| 46 | #include <linux/cyttsp.h> |
| 47 | #include <linux/i2c/isa1200.h> |
| 48 | #include <linux/dma-mapping.h> |
| 49 | #include <linux/i2c/bq27520.h> |
| 50 | |
| 51 | #ifdef CONFIG_ANDROID_PMEM |
| 52 | #include <linux/android_pmem.h> |
| 53 | #endif |
| 54 | |
| 55 | #if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE) |
| 56 | #include <linux/i2c/smb137b.h> |
| 57 | #endif |
Steve Muckle | a55df6e | 2010-01-07 12:43:24 -0800 | [diff] [blame] | 58 | #include <asm/mach-types.h> |
| 59 | #include <asm/mach/arch.h> |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 60 | #include <asm/setup.h> |
Steve Muckle | a55df6e | 2010-01-07 12:43:24 -0800 | [diff] [blame] | 61 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 62 | #include <mach/dma.h> |
| 63 | #include <mach/mpp.h> |
Steve Muckle | a55df6e | 2010-01-07 12:43:24 -0800 | [diff] [blame] | 64 | #include <mach/board.h> |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 65 | #include <mach/irqs.h> |
| 66 | #include <mach/msm_spi.h> |
| 67 | #include <mach/msm_serial_hs.h> |
| 68 | #include <mach/msm_serial_hs_lite.h> |
Steve Muckle | a55df6e | 2010-01-07 12:43:24 -0800 | [diff] [blame] | 69 | #include <mach/msm_iomap.h> |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 70 | #include <mach/msm_memtypes.h> |
| 71 | #include <asm/mach/mmc.h> |
| 72 | #include <mach/msm_battery.h> |
| 73 | #include <mach/msm_hsusb.h> |
Rohit Vaswani | a513aa8d | 2011-07-18 15:14:28 -0700 | [diff] [blame] | 74 | #include <mach/gpiomux.h> |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 75 | #ifdef CONFIG_MSM_DSPS |
| 76 | #include <mach/msm_dsps.h> |
| 77 | #endif |
| 78 | #include <mach/msm_xo.h> |
| 79 | #include <mach/msm_bus_board.h> |
| 80 | #include <mach/socinfo.h> |
| 81 | #include <linux/i2c/isl9519.h> |
| 82 | #ifdef CONFIG_USB_G_ANDROID |
| 83 | #include <linux/usb/android.h> |
| 84 | #include <mach/usbdiag.h> |
| 85 | #endif |
| 86 | #include <linux/regulator/consumer.h> |
| 87 | #include <linux/regulator/machine.h> |
| 88 | #include <mach/sdio_al.h> |
| 89 | #include <mach/rpm.h> |
| 90 | #include <mach/rpm-regulator.h> |
Steve Muckle | a55df6e | 2010-01-07 12:43:24 -0800 | [diff] [blame] | 91 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 92 | #include "devices.h" |
| 93 | #include "devices-msm8x60.h" |
| 94 | #include "cpuidle.h" |
| 95 | #include "pm.h" |
| 96 | #include "mpm.h" |
| 97 | #include "spm.h" |
| 98 | #include "rpm_log.h" |
| 99 | #include "timer.h" |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 100 | #include "gpiomux-8x60.h" |
| 101 | #include "rpm_stats.h" |
| 102 | #include "peripheral-loader.h" |
| 103 | #include <linux/platform_data/qcom_crypto_device.h> |
| 104 | #include "rpm_resources.h" |
Steve Muckle | a55df6e | 2010-01-07 12:43:24 -0800 | [diff] [blame] | 105 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 106 | #define MSM_SHARED_RAM_PHYS 0x40000000 |
| 107 | |
| 108 | /* Macros assume PMIC GPIOs start at 0 */ |
| 109 | #define PM8058_GPIO_BASE NR_MSM_GPIOS |
| 110 | #define PM8058_GPIO_PM_TO_SYS(pm_gpio) (pm_gpio + PM8058_GPIO_BASE) |
| 111 | #define PM8058_GPIO_SYS_TO_PM(sys_gpio) (sys_gpio - PM8058_GPIO_BASE) |
| 112 | #define PM8058_MPP_BASE (PM8058_GPIO_BASE + PM8058_GPIOS) |
| 113 | #define PM8058_MPP_PM_TO_SYS(pm_gpio) (pm_gpio + PM8058_MPP_BASE) |
| 114 | #define PM8058_MPP_SYS_TO_PM(sys_gpio) (sys_gpio - PM8058_MPP_BASE) |
| 115 | #define PM8058_IRQ_BASE (NR_MSM_IRQS + NR_GPIO_IRQS) |
| 116 | |
| 117 | #define PM8901_GPIO_BASE (PM8058_GPIO_BASE + \ |
| 118 | PM8058_GPIOS + PM8058_MPPS) |
| 119 | #define PM8901_GPIO_PM_TO_SYS(pm_gpio) (pm_gpio + PM8901_GPIO_BASE) |
| 120 | #define PM8901_GPIO_SYS_TO_PM(sys_gpio) (sys_gpio - PM901_GPIO_BASE) |
| 121 | #define PM8901_IRQ_BASE (PM8058_IRQ_BASE + \ |
| 122 | NR_PMIC8058_IRQS) |
| 123 | |
| 124 | #define MDM2AP_SYNC 129 |
| 125 | |
| 126 | #define LCDC_SPI_GPIO_CLK 73 |
| 127 | #define LCDC_SPI_GPIO_CS 72 |
| 128 | #define LCDC_SPI_GPIO_MOSI 70 |
| 129 | #define LCDC_AUO_PANEL_NAME "lcdc_auo_wvga" |
| 130 | #define LCDC_SAMSUNG_OLED_PANEL_NAME "lcdc_samsung_oled" |
| 131 | #define LCDC_SAMSUNG_WSVGA_PANEL_NAME "lcdc_samsung_wsvga" |
| 132 | #define LCDC_SAMSUNG_SPI_DEVICE_NAME "lcdc_samsung_ams367pe02" |
| 133 | #define LCDC_AUO_SPI_DEVICE_NAME "lcdc_auo_nt35582" |
| 134 | |
| 135 | #define DSPS_PIL_GENERIC_NAME "dsps" |
| 136 | #define DSPS_PIL_FLUID_NAME "dsps_fluid" |
| 137 | |
| 138 | enum { |
| 139 | GPIO_EXPANDER_IRQ_BASE = PM8901_IRQ_BASE + NR_PMIC8901_IRQS, |
| 140 | GPIO_EXPANDER_GPIO_BASE = PM8901_GPIO_BASE + PM8901_MPPS, |
| 141 | /* CORE expander */ |
| 142 | GPIO_CORE_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE, |
| 143 | GPIO_CLASS_D1_EN = GPIO_CORE_EXPANDER_BASE, |
| 144 | GPIO_WLAN_DEEP_SLEEP_N, |
| 145 | GPIO_LVDS_SHUTDOWN_N, |
| 146 | GPIO_DISP_RESX_N = GPIO_LVDS_SHUTDOWN_N, |
| 147 | GPIO_MS_SYS_RESET_N, |
| 148 | GPIO_CAP_TS_RESOUT_N, |
| 149 | GPIO_CAP_GAUGE_BI_TOUT, |
| 150 | GPIO_ETHERNET_PME, |
| 151 | GPIO_EXT_GPS_LNA_EN, |
| 152 | GPIO_MSM_WAKES_BT, |
| 153 | GPIO_ETHERNET_RESET_N, |
| 154 | GPIO_HEADSET_DET_N, |
| 155 | GPIO_USB_UICC_EN, |
| 156 | GPIO_BACKLIGHT_EN, |
| 157 | GPIO_EXT_CAMIF_PWR_EN, |
| 158 | GPIO_BATT_GAUGE_INT_N, |
| 159 | GPIO_BATT_GAUGE_EN, |
| 160 | /* DOCKING expander */ |
| 161 | GPIO_DOCKING_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + 16, |
| 162 | GPIO_MIPI_DSI_RST_N = GPIO_DOCKING_EXPANDER_BASE, |
| 163 | GPIO_AUX_JTAG_DET_N, |
| 164 | GPIO_DONGLE_DET_N, |
| 165 | GPIO_SVIDEO_LOAD_DET, |
| 166 | GPIO_SVID_AMP_SHUTDOWN1_N, |
| 167 | GPIO_SVID_AMP_SHUTDOWN0_N, |
| 168 | GPIO_SDC_WP, |
| 169 | GPIO_IRDA_PWDN, |
| 170 | GPIO_IRDA_RESET_N, |
| 171 | GPIO_DONGLE_GPIO0, |
| 172 | GPIO_DONGLE_GPIO1, |
| 173 | GPIO_DONGLE_GPIO2, |
| 174 | GPIO_DONGLE_GPIO3, |
| 175 | GPIO_DONGLE_PWR_EN, |
| 176 | GPIO_EMMC_RESET_N, |
| 177 | GPIO_TP_EXP2_IO15, |
| 178 | /* SURF expander */ |
| 179 | GPIO_SURF_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 2), |
| 180 | GPIO_SD_CARD_DET_1 = GPIO_SURF_EXPANDER_BASE, |
| 181 | GPIO_SD_CARD_DET_2, |
| 182 | GPIO_SD_CARD_DET_4, |
| 183 | GPIO_SD_CARD_DET_5, |
| 184 | GPIO_UIM3_RST, |
| 185 | GPIO_SURF_EXPANDER_IO5, |
| 186 | GPIO_SURF_EXPANDER_IO6, |
| 187 | GPIO_ADC_I2C_EN, |
| 188 | GPIO_SURF_EXPANDER_IO8, |
| 189 | GPIO_SURF_EXPANDER_IO9, |
| 190 | GPIO_SURF_EXPANDER_IO10, |
| 191 | GPIO_SURF_EXPANDER_IO11, |
| 192 | GPIO_SURF_EXPANDER_IO12, |
| 193 | GPIO_SURF_EXPANDER_IO13, |
| 194 | GPIO_SURF_EXPANDER_IO14, |
| 195 | GPIO_SURF_EXPANDER_IO15, |
| 196 | /* LEFT KB IO expander */ |
| 197 | GPIO_LEFT_KB_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 3), |
| 198 | GPIO_LEFT_LED_1 = GPIO_LEFT_KB_EXPANDER_BASE, |
| 199 | GPIO_LEFT_LED_2, |
| 200 | GPIO_LEFT_LED_3, |
| 201 | GPIO_LEFT_LED_WLAN, |
| 202 | GPIO_JOYSTICK_EN, |
| 203 | GPIO_CAP_TS_SLEEP, |
| 204 | GPIO_LEFT_KB_IO6, |
| 205 | GPIO_LEFT_LED_5, |
| 206 | /* RIGHT KB IO expander */ |
| 207 | GPIO_RIGHT_KB_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 3) + 8, |
| 208 | GPIO_RIGHT_LED_1 = GPIO_RIGHT_KB_EXPANDER_BASE, |
| 209 | GPIO_RIGHT_LED_2, |
| 210 | GPIO_RIGHT_LED_3, |
| 211 | GPIO_RIGHT_LED_BT, |
| 212 | GPIO_WEB_CAMIF_STANDBY, |
| 213 | GPIO_COMPASS_RST_N, |
| 214 | GPIO_WEB_CAMIF_RESET_N, |
| 215 | GPIO_RIGHT_LED_5, |
| 216 | GPIO_R_ALTIMETER_RESET_N, |
| 217 | /* FLUID S IO expander */ |
| 218 | GPIO_SOUTH_EXPANDER_BASE, |
| 219 | GPIO_MIC2_ANCR_SEL = GPIO_SOUTH_EXPANDER_BASE, |
| 220 | GPIO_MIC1_ANCL_SEL, |
| 221 | GPIO_HS_MIC4_SEL, |
| 222 | GPIO_FML_MIC3_SEL, |
| 223 | GPIO_FMR_MIC5_SEL, |
| 224 | GPIO_TS_SLEEP, |
| 225 | GPIO_HAP_SHIFT_LVL_OE, |
| 226 | GPIO_HS_SW_DIR, |
| 227 | /* FLUID N IO expander */ |
| 228 | GPIO_NORTH_EXPANDER_BASE, |
| 229 | GPIO_EPM_3_3V_EN = GPIO_NORTH_EXPANDER_BASE, |
| 230 | GPIO_EPM_5V_BOOST_EN, |
| 231 | GPIO_AUX_CAM_2P7_EN, |
| 232 | GPIO_LED_FLASH_EN, |
| 233 | GPIO_LED1_GREEN_N, |
| 234 | GPIO_LED2_RED_N, |
| 235 | GPIO_FRONT_CAM_RESET_N, |
| 236 | GPIO_EPM_LVLSFT_EN, |
| 237 | GPIO_N_ALTIMETER_RESET_N, |
| 238 | /* EPM expander */ |
| 239 | GPIO_EPM_EXPANDER_BASE, |
| 240 | GPIO_PWR_MON_START = GPIO_EPM_EXPANDER_BASE, |
| 241 | GPIO_PWR_MON_RESET_N, |
| 242 | GPIO_ADC1_PWDN_N, |
| 243 | GPIO_ADC2_PWDN_N, |
| 244 | GPIO_EPM_EXPANDER_IO4, |
| 245 | GPIO_ADC1_MUX_SPI_INT_N_3_3V, |
| 246 | GPIO_ADC2_MUX_SPI_INT_N, |
| 247 | GPIO_EPM_EXPANDER_IO7, |
| 248 | GPIO_PWR_MON_ENABLE, |
| 249 | GPIO_EPM_SPI_ADC1_CS_N, |
| 250 | GPIO_EPM_SPI_ADC2_CS_N, |
| 251 | GPIO_EPM_EXPANDER_IO11, |
| 252 | GPIO_EPM_EXPANDER_IO12, |
| 253 | GPIO_EPM_EXPANDER_IO13, |
| 254 | GPIO_EPM_EXPANDER_IO14, |
| 255 | GPIO_EPM_EXPANDER_IO15, |
| 256 | }; |
| 257 | |
| 258 | /* |
| 259 | * The UI_INTx_N lines are pmic gpio lines which connect i2c |
| 260 | * gpio expanders to the pm8058. |
| 261 | */ |
| 262 | #define UI_INT1_N 25 |
| 263 | #define UI_INT2_N 34 |
| 264 | #define UI_INT3_N 14 |
| 265 | /* |
| 266 | FM GPIO is GPIO 18 on PMIC 8058. |
| 267 | As the index starts from 0 in the PMIC driver, and hence 17 |
| 268 | corresponds to GPIO 18 on PMIC 8058. |
| 269 | */ |
| 270 | #define FM_GPIO 17 |
| 271 | |
| 272 | #ifdef CONFIG_MMC_MSM_SDC2_SUPPORT |
| 273 | static void (*sdc2_status_notify_cb)(int card_present, void *dev_id); |
| 274 | static void *sdc2_status_notify_cb_devid; |
| 275 | #endif |
| 276 | |
| 277 | #ifdef CONFIG_MMC_MSM_SDC5_SUPPORT |
| 278 | static void (*sdc5_status_notify_cb)(int card_present, void *dev_id); |
| 279 | static void *sdc5_status_notify_cb_devid; |
| 280 | #endif |
| 281 | |
| 282 | static struct msm_spm_platform_data msm_spm_data_v1[] __initdata = { |
| 283 | [0] = { |
| 284 | .reg_base_addr = MSM_SAW0_BASE, |
| 285 | |
| 286 | #ifdef CONFIG_MSM_AVS_HW |
| 287 | .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF, |
| 288 | #endif |
| 289 | .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x0F, |
| 290 | .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68, |
| 291 | .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0xFFFFFFFF, |
| 292 | .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0xFFFFFFFF, |
| 293 | |
| 294 | .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x01, |
| 295 | .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07, |
| 296 | .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00, |
| 297 | |
| 298 | .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01, |
| 299 | .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00, |
| 300 | .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00, |
| 301 | |
| 302 | .awake_vlevel = 0x94, |
| 303 | .retention_vlevel = 0x81, |
| 304 | .collapse_vlevel = 0x20, |
| 305 | .retention_mid_vlevel = 0x94, |
| 306 | .collapse_mid_vlevel = 0x8C, |
| 307 | |
| 308 | .vctl_timeout_us = 50, |
| 309 | }, |
| 310 | |
| 311 | [1] = { |
| 312 | .reg_base_addr = MSM_SAW1_BASE, |
| 313 | |
| 314 | #ifdef CONFIG_MSM_AVS_HW |
| 315 | .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF, |
| 316 | #endif |
| 317 | .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x0F, |
| 318 | .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68, |
| 319 | .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0xFFFFFFFF, |
| 320 | .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0xFFFFFFFF, |
| 321 | |
| 322 | .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x13, |
| 323 | .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07, |
| 324 | .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00, |
| 325 | |
| 326 | .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01, |
| 327 | .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00, |
| 328 | .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00, |
| 329 | |
| 330 | .awake_vlevel = 0x94, |
| 331 | .retention_vlevel = 0x81, |
| 332 | .collapse_vlevel = 0x20, |
| 333 | .retention_mid_vlevel = 0x94, |
| 334 | .collapse_mid_vlevel = 0x8C, |
| 335 | |
| 336 | .vctl_timeout_us = 50, |
| 337 | }, |
| 338 | }; |
| 339 | |
| 340 | static struct msm_spm_platform_data msm_spm_data[] __initdata = { |
| 341 | [0] = { |
| 342 | .reg_base_addr = MSM_SAW0_BASE, |
| 343 | |
| 344 | #ifdef CONFIG_MSM_AVS_HW |
| 345 | .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF, |
| 346 | #endif |
| 347 | .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x1C, |
| 348 | .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68, |
| 349 | .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0x0C0CFFFF, |
| 350 | .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0x78780FFF, |
| 351 | |
| 352 | .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x01, |
| 353 | .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07, |
| 354 | .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00, |
| 355 | |
| 356 | .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01, |
| 357 | .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00, |
| 358 | .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00, |
| 359 | |
| 360 | .awake_vlevel = 0xA0, |
| 361 | .retention_vlevel = 0x89, |
| 362 | .collapse_vlevel = 0x20, |
| 363 | .retention_mid_vlevel = 0x89, |
| 364 | .collapse_mid_vlevel = 0x89, |
| 365 | |
| 366 | .vctl_timeout_us = 50, |
| 367 | }, |
| 368 | |
| 369 | [1] = { |
| 370 | .reg_base_addr = MSM_SAW1_BASE, |
| 371 | |
| 372 | #ifdef CONFIG_MSM_AVS_HW |
| 373 | .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF, |
| 374 | #endif |
| 375 | .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x1C, |
| 376 | .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68, |
| 377 | .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0x0C0CFFFF, |
| 378 | .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0x78780FFF, |
| 379 | |
| 380 | .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x13, |
| 381 | .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07, |
| 382 | .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00, |
| 383 | |
| 384 | .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01, |
| 385 | .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00, |
| 386 | .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00, |
| 387 | |
| 388 | .awake_vlevel = 0xA0, |
| 389 | .retention_vlevel = 0x89, |
| 390 | .collapse_vlevel = 0x20, |
| 391 | .retention_mid_vlevel = 0x89, |
| 392 | .collapse_mid_vlevel = 0x89, |
| 393 | |
| 394 | .vctl_timeout_us = 50, |
| 395 | }, |
| 396 | }; |
| 397 | |
| 398 | static struct msm_acpu_clock_platform_data msm8x60_acpu_clock_data = { |
| 399 | }; |
| 400 | |
| 401 | /* |
| 402 | * Consumer specific regulator names: |
| 403 | * regulator name consumer dev_name |
| 404 | */ |
| 405 | static struct regulator_consumer_supply vreg_consumers_8901_S0[] = { |
| 406 | REGULATOR_SUPPLY("8901_s0", NULL), |
| 407 | }; |
| 408 | static struct regulator_consumer_supply vreg_consumers_8901_S1[] = { |
| 409 | REGULATOR_SUPPLY("8901_s1", NULL), |
| 410 | }; |
| 411 | |
| 412 | static struct regulator_init_data saw_s0_init_data = { |
| 413 | .constraints = { |
| 414 | .name = "8901_s0", |
| 415 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, |
| 416 | .min_uV = 840000, |
| 417 | .max_uV = 1250000, |
| 418 | }, |
| 419 | .consumer_supplies = vreg_consumers_8901_S0, |
| 420 | .num_consumer_supplies = ARRAY_SIZE(vreg_consumers_8901_S0), |
| 421 | }; |
| 422 | |
| 423 | static struct regulator_init_data saw_s1_init_data = { |
| 424 | .constraints = { |
| 425 | .name = "8901_s1", |
| 426 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, |
| 427 | .min_uV = 840000, |
| 428 | .max_uV = 1250000, |
| 429 | }, |
| 430 | .consumer_supplies = vreg_consumers_8901_S1, |
| 431 | .num_consumer_supplies = ARRAY_SIZE(vreg_consumers_8901_S1), |
| 432 | }; |
| 433 | |
| 434 | static struct platform_device msm_device_saw_s0 = { |
| 435 | .name = "saw-regulator", |
| 436 | .id = 0, |
| 437 | .dev = { |
| 438 | .platform_data = &saw_s0_init_data, |
| 439 | }, |
| 440 | }; |
| 441 | |
| 442 | static struct platform_device msm_device_saw_s1 = { |
| 443 | .name = "saw-regulator", |
| 444 | .id = 1, |
| 445 | .dev = { |
| 446 | .platform_data = &saw_s1_init_data, |
| 447 | }, |
| 448 | }; |
| 449 | |
| 450 | /* |
| 451 | * The smc91x configuration varies depending on platform. |
| 452 | * The resources data structure is filled in at runtime. |
| 453 | */ |
| 454 | static struct resource smc91x_resources[] = { |
| 455 | [0] = { |
| 456 | .flags = IORESOURCE_MEM, |
| 457 | }, |
| 458 | [1] = { |
| 459 | .flags = IORESOURCE_IRQ, |
| 460 | }, |
| 461 | }; |
| 462 | |
| 463 | static struct platform_device smc91x_device = { |
| 464 | .name = "smc91x", |
| 465 | .id = 0, |
| 466 | .num_resources = ARRAY_SIZE(smc91x_resources), |
| 467 | .resource = smc91x_resources, |
| 468 | }; |
| 469 | |
| 470 | static struct resource smsc911x_resources[] = { |
| 471 | [0] = { |
| 472 | .flags = IORESOURCE_MEM, |
| 473 | .start = 0x1b800000, |
| 474 | .end = 0x1b8000ff |
| 475 | }, |
| 476 | [1] = { |
| 477 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, |
| 478 | }, |
| 479 | }; |
| 480 | |
| 481 | static struct smsc911x_platform_config smsc911x_config = { |
| 482 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, |
| 483 | .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, |
| 484 | .flags = SMSC911X_USE_16BIT, |
| 485 | .has_reset_gpio = 1, |
| 486 | .reset_gpio = GPIO_ETHERNET_RESET_N |
| 487 | }; |
| 488 | |
| 489 | static struct platform_device smsc911x_device = { |
| 490 | .name = "smsc911x", |
| 491 | .id = 0, |
| 492 | .num_resources = ARRAY_SIZE(smsc911x_resources), |
| 493 | .resource = smsc911x_resources, |
| 494 | .dev = { |
| 495 | .platform_data = &smsc911x_config |
| 496 | } |
| 497 | }; |
| 498 | |
| 499 | #if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \ |
| 500 | defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE) || \ |
| 501 | defined(CONFIG_CRYPTO_DEV_QCEDEV) || \ |
| 502 | defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE) |
| 503 | |
| 504 | #define QCE_SIZE 0x10000 |
| 505 | #define QCE_0_BASE 0x18500000 |
| 506 | |
| 507 | #define QCE_HW_KEY_SUPPORT 0 |
| 508 | #define QCE_SHA_HMAC_SUPPORT 0 |
| 509 | #define QCE_SHARE_CE_RESOURCE 2 |
| 510 | #define QCE_CE_SHARED 1 |
| 511 | |
| 512 | static struct resource qcrypto_resources[] = { |
| 513 | [0] = { |
| 514 | .start = QCE_0_BASE, |
| 515 | .end = QCE_0_BASE + QCE_SIZE - 1, |
| 516 | .flags = IORESOURCE_MEM, |
| 517 | }, |
| 518 | [1] = { |
| 519 | .name = "crypto_channels", |
| 520 | .start = DMOV_CE_IN_CHAN, |
| 521 | .end = DMOV_CE_OUT_CHAN, |
| 522 | .flags = IORESOURCE_DMA, |
| 523 | }, |
| 524 | [2] = { |
| 525 | .name = "crypto_crci_in", |
| 526 | .start = DMOV_CE_IN_CRCI, |
| 527 | .end = DMOV_CE_IN_CRCI, |
| 528 | .flags = IORESOURCE_DMA, |
| 529 | }, |
| 530 | [3] = { |
| 531 | .name = "crypto_crci_out", |
| 532 | .start = DMOV_CE_OUT_CRCI, |
| 533 | .end = DMOV_CE_OUT_CRCI, |
| 534 | .flags = IORESOURCE_DMA, |
| 535 | }, |
| 536 | [4] = { |
| 537 | .name = "crypto_crci_hash", |
| 538 | .start = DMOV_CE_HASH_CRCI, |
| 539 | .end = DMOV_CE_HASH_CRCI, |
| 540 | .flags = IORESOURCE_DMA, |
| 541 | }, |
| 542 | }; |
| 543 | |
| 544 | static struct resource qcedev_resources[] = { |
| 545 | [0] = { |
| 546 | .start = QCE_0_BASE, |
| 547 | .end = QCE_0_BASE + QCE_SIZE - 1, |
| 548 | .flags = IORESOURCE_MEM, |
| 549 | }, |
| 550 | [1] = { |
| 551 | .name = "crypto_channels", |
| 552 | .start = DMOV_CE_IN_CHAN, |
| 553 | .end = DMOV_CE_OUT_CHAN, |
| 554 | .flags = IORESOURCE_DMA, |
| 555 | }, |
| 556 | [2] = { |
| 557 | .name = "crypto_crci_in", |
| 558 | .start = DMOV_CE_IN_CRCI, |
| 559 | .end = DMOV_CE_IN_CRCI, |
| 560 | .flags = IORESOURCE_DMA, |
| 561 | }, |
| 562 | [3] = { |
| 563 | .name = "crypto_crci_out", |
| 564 | .start = DMOV_CE_OUT_CRCI, |
| 565 | .end = DMOV_CE_OUT_CRCI, |
| 566 | .flags = IORESOURCE_DMA, |
| 567 | }, |
| 568 | [4] = { |
| 569 | .name = "crypto_crci_hash", |
| 570 | .start = DMOV_CE_HASH_CRCI, |
| 571 | .end = DMOV_CE_HASH_CRCI, |
| 572 | .flags = IORESOURCE_DMA, |
| 573 | }, |
| 574 | }; |
| 575 | |
| 576 | #endif |
| 577 | |
| 578 | #if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \ |
| 579 | defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE) |
| 580 | |
| 581 | static struct msm_ce_hw_support qcrypto_ce_hw_suppport = { |
| 582 | .ce_shared = QCE_CE_SHARED, |
| 583 | .shared_ce_resource = QCE_SHARE_CE_RESOURCE, |
| 584 | .hw_key_support = QCE_HW_KEY_SUPPORT, |
| 585 | .sha_hmac = QCE_SHA_HMAC_SUPPORT, |
| 586 | }; |
| 587 | |
| 588 | static struct platform_device qcrypto_device = { |
| 589 | .name = "qcrypto", |
| 590 | .id = 0, |
| 591 | .num_resources = ARRAY_SIZE(qcrypto_resources), |
| 592 | .resource = qcrypto_resources, |
| 593 | .dev = { |
| 594 | .coherent_dma_mask = DMA_BIT_MASK(32), |
| 595 | .platform_data = &qcrypto_ce_hw_suppport, |
| 596 | }, |
| 597 | }; |
| 598 | #endif |
| 599 | |
| 600 | #if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \ |
| 601 | defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE) |
| 602 | |
| 603 | static struct msm_ce_hw_support qcedev_ce_hw_suppport = { |
| 604 | .ce_shared = QCE_CE_SHARED, |
| 605 | .shared_ce_resource = QCE_SHARE_CE_RESOURCE, |
| 606 | .hw_key_support = QCE_HW_KEY_SUPPORT, |
| 607 | .sha_hmac = QCE_SHA_HMAC_SUPPORT, |
| 608 | }; |
| 609 | |
| 610 | static struct platform_device qcedev_device = { |
| 611 | .name = "qce", |
| 612 | .id = 0, |
| 613 | .num_resources = ARRAY_SIZE(qcedev_resources), |
| 614 | .resource = qcedev_resources, |
| 615 | .dev = { |
| 616 | .coherent_dma_mask = DMA_BIT_MASK(32), |
| 617 | .platform_data = &qcedev_ce_hw_suppport, |
| 618 | }, |
| 619 | }; |
| 620 | #endif |
| 621 | |
| 622 | #if defined(CONFIG_HAPTIC_ISA1200) || \ |
| 623 | defined(CONFIG_HAPTIC_ISA1200_MODULE) |
| 624 | |
| 625 | static const char *vregs_isa1200_name[] = { |
| 626 | "8058_s3", |
| 627 | "8901_l4", |
| 628 | }; |
| 629 | |
| 630 | static const int vregs_isa1200_val[] = { |
| 631 | 1800000,/* uV */ |
| 632 | 2600000, |
| 633 | }; |
| 634 | static struct regulator *vregs_isa1200[ARRAY_SIZE(vregs_isa1200_name)]; |
| 635 | static struct msm_xo_voter *xo_handle_a1; |
| 636 | |
| 637 | static int isa1200_power(int vreg_on) |
Steve Muckle | a55df6e | 2010-01-07 12:43:24 -0800 | [diff] [blame] | 638 | { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 639 | int i, rc = 0; |
| 640 | |
| 641 | for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++) { |
| 642 | rc = vreg_on ? regulator_enable(vregs_isa1200[i]) : |
| 643 | regulator_disable(vregs_isa1200[i]); |
| 644 | if (rc < 0) { |
| 645 | pr_err("%s: vreg %s %s failed (%d)\n", |
| 646 | __func__, vregs_isa1200_name[i], |
| 647 | vreg_on ? "enable" : "disable", rc); |
| 648 | goto vreg_fail; |
| 649 | } |
| 650 | } |
| 651 | |
| 652 | rc = vreg_on ? msm_xo_mode_vote(xo_handle_a1, MSM_XO_MODE_ON) : |
| 653 | msm_xo_mode_vote(xo_handle_a1, MSM_XO_MODE_OFF); |
| 654 | if (rc < 0) { |
| 655 | pr_err("%s: failed to %svote for TCXO A1 buffer%d\n", |
| 656 | __func__, vreg_on ? "" : "de-", rc); |
| 657 | goto vreg_fail; |
| 658 | } |
| 659 | return 0; |
| 660 | |
| 661 | vreg_fail: |
| 662 | while (i--) |
| 663 | !vreg_on ? regulator_enable(vregs_isa1200[i]) : |
| 664 | regulator_disable(vregs_isa1200[i]); |
| 665 | return rc; |
Steve Muckle | a55df6e | 2010-01-07 12:43:24 -0800 | [diff] [blame] | 666 | } |
| 667 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 668 | static int isa1200_dev_setup(bool enable) |
Steve Muckle | a55df6e | 2010-01-07 12:43:24 -0800 | [diff] [blame] | 669 | { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 670 | int i, rc; |
Steve Muckle | 9161d30 | 2010-02-11 11:50:40 -0800 | [diff] [blame] | 671 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 672 | if (enable == true) { |
| 673 | for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++) { |
| 674 | vregs_isa1200[i] = regulator_get(NULL, |
| 675 | vregs_isa1200_name[i]); |
| 676 | if (IS_ERR(vregs_isa1200[i])) { |
| 677 | pr_err("%s: regulator get of %s failed (%ld)\n", |
| 678 | __func__, vregs_isa1200_name[i], |
| 679 | PTR_ERR(vregs_isa1200[i])); |
| 680 | rc = PTR_ERR(vregs_isa1200[i]); |
| 681 | goto vreg_get_fail; |
| 682 | } |
| 683 | rc = regulator_set_voltage(vregs_isa1200[i], |
| 684 | vregs_isa1200_val[i], vregs_isa1200_val[i]); |
| 685 | if (rc) { |
| 686 | pr_err("%s: regulator_set_voltage(%s) failed\n", |
| 687 | __func__, vregs_isa1200_name[i]); |
| 688 | goto vreg_get_fail; |
| 689 | } |
| 690 | } |
Steve Muckle | 9161d30 | 2010-02-11 11:50:40 -0800 | [diff] [blame] | 691 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 692 | rc = gpio_request(GPIO_HAP_SHIFT_LVL_OE, "haptics_shft_lvl_oe"); |
| 693 | if (rc) { |
| 694 | pr_err("%s: unable to request gpio %d (%d)\n", |
| 695 | __func__, GPIO_HAP_SHIFT_LVL_OE, rc); |
| 696 | goto vreg_get_fail; |
| 697 | } |
Steve Muckle | 9161d30 | 2010-02-11 11:50:40 -0800 | [diff] [blame] | 698 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 699 | rc = gpio_direction_output(GPIO_HAP_SHIFT_LVL_OE, 1); |
| 700 | if (rc) { |
| 701 | pr_err("%s: Unable to set direction\n", __func__);; |
| 702 | goto free_gpio; |
| 703 | } |
| 704 | |
| 705 | xo_handle_a1 = msm_xo_get(MSM_XO_TCXO_A1, "isa1200"); |
| 706 | if (IS_ERR(xo_handle_a1)) { |
| 707 | rc = PTR_ERR(xo_handle_a1); |
| 708 | pr_err("%s: failed to get the handle for A1(%d)\n", |
| 709 | __func__, rc); |
| 710 | goto gpio_set_dir; |
| 711 | } |
| 712 | } else { |
| 713 | gpio_set_value(GPIO_HAP_SHIFT_LVL_OE, 0); |
| 714 | gpio_free(GPIO_HAP_SHIFT_LVL_OE); |
| 715 | |
| 716 | for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++) |
| 717 | regulator_put(vregs_isa1200[i]); |
| 718 | |
| 719 | msm_xo_put(xo_handle_a1); |
| 720 | } |
| 721 | |
| 722 | return 0; |
| 723 | gpio_set_dir: |
| 724 | gpio_set_value(GPIO_HAP_SHIFT_LVL_OE, 0); |
| 725 | free_gpio: |
| 726 | gpio_free(GPIO_HAP_SHIFT_LVL_OE); |
| 727 | vreg_get_fail: |
| 728 | while (i) |
| 729 | regulator_put(vregs_isa1200[--i]); |
| 730 | return rc; |
| 731 | } |
| 732 | |
| 733 | #define PMIC_GPIO_HAP_ENABLE 18 /* PMIC GPIO Number 19 */ |
| 734 | static struct isa1200_platform_data isa1200_1_pdata = { |
| 735 | .name = "vibrator", |
| 736 | .power_on = isa1200_power, |
| 737 | .dev_setup = isa1200_dev_setup, |
| 738 | /*gpio to enable haptic*/ |
| 739 | .hap_en_gpio = PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_ENABLE), |
| 740 | .max_timeout = 15000, |
| 741 | .mode_ctrl = PWM_GEN_MODE, |
| 742 | .pwm_fd = { |
| 743 | .pwm_div = 256, |
| 744 | }, |
| 745 | .is_erm = false, |
| 746 | .smart_en = true, |
| 747 | .ext_clk_en = true, |
| 748 | .chip_en = 1, |
| 749 | }; |
| 750 | |
| 751 | static struct i2c_board_info msm_isa1200_board_info[] = { |
| 752 | { |
| 753 | I2C_BOARD_INFO("isa1200_1", 0x90>>1), |
| 754 | .platform_data = &isa1200_1_pdata, |
| 755 | }, |
| 756 | }; |
| 757 | #endif |
| 758 | |
| 759 | #if defined(CONFIG_BATTERY_BQ27520) || \ |
| 760 | defined(CONFIG_BATTERY_BQ27520_MODULE) |
| 761 | static struct bq27520_platform_data bq27520_pdata = { |
| 762 | .name = "fuel-gauge", |
| 763 | .vreg_name = "8058_s3", |
| 764 | .vreg_value = 1800000, |
| 765 | .soc_int = GPIO_BATT_GAUGE_INT_N, |
| 766 | .bi_tout = GPIO_CAP_GAUGE_BI_TOUT, |
| 767 | .chip_en = GPIO_BATT_GAUGE_EN, |
| 768 | .enable_dlog = 0, /* if enable coulomb counter logger */ |
| 769 | }; |
| 770 | |
| 771 | static struct i2c_board_info msm_bq27520_board_info[] = { |
| 772 | { |
| 773 | I2C_BOARD_INFO("bq27520", 0xaa>>1), |
| 774 | .platform_data = &bq27520_pdata, |
| 775 | }, |
| 776 | }; |
| 777 | #endif |
| 778 | |
| 779 | static struct msm_pm_platform_data msm_pm_data[MSM_PM_SLEEP_MODE_NR * 2] = { |
| 780 | [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = { |
| 781 | .idle_supported = 1, |
| 782 | .suspend_supported = 1, |
| 783 | .idle_enabled = 0, |
| 784 | .suspend_enabled = 0, |
| 785 | .latency = 4000, |
| 786 | .residency = 13000, |
| 787 | }, |
| 788 | |
| 789 | [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = { |
| 790 | .idle_supported = 1, |
| 791 | .suspend_supported = 1, |
| 792 | .idle_enabled = 0, |
| 793 | .suspend_enabled = 0, |
| 794 | .latency = 500, |
| 795 | .residency = 6000, |
| 796 | }, |
| 797 | |
| 798 | [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = { |
| 799 | .idle_supported = 1, |
| 800 | .suspend_supported = 1, |
| 801 | .idle_enabled = 1, |
| 802 | .suspend_enabled = 1, |
| 803 | .latency = 2, |
| 804 | .residency = 0, |
| 805 | }, |
| 806 | |
| 807 | [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = { |
| 808 | .idle_supported = 1, |
| 809 | .suspend_supported = 1, |
| 810 | .idle_enabled = 0, |
| 811 | .suspend_enabled = 0, |
| 812 | .latency = 600, |
| 813 | .residency = 7200, |
| 814 | }, |
| 815 | |
| 816 | [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = { |
| 817 | .idle_supported = 1, |
| 818 | .suspend_supported = 1, |
| 819 | .idle_enabled = 0, |
| 820 | .suspend_enabled = 0, |
| 821 | .latency = 500, |
| 822 | .residency = 6000, |
| 823 | }, |
| 824 | |
| 825 | [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = { |
| 826 | .idle_supported = 1, |
| 827 | .suspend_supported = 1, |
| 828 | .idle_enabled = 1, |
| 829 | .suspend_enabled = 1, |
| 830 | .latency = 2, |
| 831 | .residency = 0, |
| 832 | }, |
| 833 | }; |
| 834 | |
| 835 | static struct msm_cpuidle_state msm_cstates[] __initdata = { |
| 836 | {0, 0, "C0", "WFI", |
| 837 | MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT}, |
| 838 | |
| 839 | {0, 1, "C1", "STANDALONE_POWER_COLLAPSE", |
| 840 | MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE}, |
| 841 | |
| 842 | {0, 2, "C2", "POWER_COLLAPSE", |
| 843 | MSM_PM_SLEEP_MODE_POWER_COLLAPSE}, |
| 844 | |
| 845 | {1, 0, "C0", "WFI", |
| 846 | MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT}, |
| 847 | |
| 848 | {1, 1, "C1", "STANDALONE_POWER_COLLAPSE", |
| 849 | MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE}, |
| 850 | }; |
| 851 | |
| 852 | static struct msm_rpmrs_level msm_rpmrs_levels[] __initdata = { |
| 853 | { |
| 854 | MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT, |
| 855 | MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE), |
| 856 | true, |
| 857 | 1, 8000, 100000, 1, |
| 858 | }, |
| 859 | |
| 860 | { |
| 861 | MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE, |
| 862 | MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE), |
| 863 | true, |
| 864 | 1500, 5000, 60100000, 3000, |
| 865 | }, |
| 866 | |
| 867 | { |
| 868 | MSM_PM_SLEEP_MODE_POWER_COLLAPSE, |
| 869 | MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE), |
| 870 | false, |
| 871 | 1800, 5000, 60350000, 3500, |
| 872 | }, |
| 873 | { |
| 874 | MSM_PM_SLEEP_MODE_POWER_COLLAPSE, |
| 875 | MSM_RPMRS_LIMITS(OFF, ACTIVE, MAX, ACTIVE), |
| 876 | false, |
| 877 | 3800, 4500, 65350000, 5500, |
| 878 | }, |
| 879 | |
| 880 | { |
| 881 | MSM_PM_SLEEP_MODE_POWER_COLLAPSE, |
| 882 | MSM_RPMRS_LIMITS(ON, HSFS_OPEN, MAX, ACTIVE), |
| 883 | false, |
| 884 | 2800, 2500, 66850000, 4800, |
| 885 | }, |
| 886 | |
| 887 | { |
| 888 | MSM_PM_SLEEP_MODE_POWER_COLLAPSE, |
| 889 | MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, MAX, ACTIVE), |
| 890 | false, |
| 891 | 4800, 2000, 71850000, 6800, |
| 892 | }, |
| 893 | |
| 894 | { |
| 895 | MSM_PM_SLEEP_MODE_POWER_COLLAPSE, |
| 896 | MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, ACTIVE, RET_HIGH), |
| 897 | false, |
| 898 | 6800, 500, 75850000, 8800, |
| 899 | }, |
| 900 | |
| 901 | { |
| 902 | MSM_PM_SLEEP_MODE_POWER_COLLAPSE, |
| 903 | MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, RET_HIGH, RET_LOW), |
| 904 | false, |
| 905 | 7800, 0, 76350000, 9800, |
| 906 | }, |
| 907 | }; |
| 908 | |
| 909 | #if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE) |
| 910 | |
| 911 | #define ISP1763_INT_GPIO 117 |
| 912 | #define ISP1763_RST_GPIO 152 |
| 913 | static struct resource isp1763_resources[] = { |
| 914 | [0] = { |
| 915 | .flags = IORESOURCE_MEM, |
| 916 | .start = 0x1D000000, |
| 917 | .end = 0x1D005FFF, /* 24KB */ |
| 918 | }, |
| 919 | [1] = { |
| 920 | .flags = IORESOURCE_IRQ, |
| 921 | }, |
| 922 | }; |
| 923 | static void __init msm8x60_cfg_isp1763(void) |
| 924 | { |
| 925 | isp1763_resources[1].start = gpio_to_irq(ISP1763_INT_GPIO); |
| 926 | isp1763_resources[1].end = gpio_to_irq(ISP1763_INT_GPIO); |
| 927 | } |
| 928 | |
| 929 | static int isp1763_setup_gpio(int enable) |
| 930 | { |
| 931 | int status = 0; |
| 932 | |
| 933 | if (enable) { |
| 934 | status = gpio_request(ISP1763_INT_GPIO, "isp1763_usb"); |
| 935 | if (status) { |
| 936 | pr_err("%s:Failed to request GPIO %d\n", |
| 937 | __func__, ISP1763_INT_GPIO); |
| 938 | return status; |
| 939 | } |
| 940 | status = gpio_direction_input(ISP1763_INT_GPIO); |
| 941 | if (status) { |
| 942 | pr_err("%s:Failed to configure GPIO %d\n", |
| 943 | __func__, ISP1763_INT_GPIO); |
| 944 | goto gpio_free_int; |
| 945 | } |
| 946 | status = gpio_request(ISP1763_RST_GPIO, "isp1763_usb"); |
| 947 | if (status) { |
| 948 | pr_err("%s:Failed to request GPIO %d\n", |
| 949 | __func__, ISP1763_RST_GPIO); |
| 950 | goto gpio_free_int; |
| 951 | } |
| 952 | status = gpio_direction_output(ISP1763_RST_GPIO, 1); |
| 953 | if (status) { |
| 954 | pr_err("%s:Failed to configure GPIO %d\n", |
| 955 | __func__, ISP1763_RST_GPIO); |
| 956 | goto gpio_free_rst; |
| 957 | } |
| 958 | pr_debug("\nISP GPIO configuration done\n"); |
| 959 | return status; |
| 960 | } |
| 961 | |
| 962 | gpio_free_rst: |
| 963 | gpio_free(ISP1763_RST_GPIO); |
| 964 | gpio_free_int: |
| 965 | gpio_free(ISP1763_INT_GPIO); |
| 966 | |
| 967 | return status; |
| 968 | } |
| 969 | static struct isp1763_platform_data isp1763_pdata = { |
| 970 | .reset_gpio = ISP1763_RST_GPIO, |
| 971 | .setup_gpio = isp1763_setup_gpio |
| 972 | }; |
| 973 | |
| 974 | static struct platform_device isp1763_device = { |
| 975 | .name = "isp1763_usb", |
| 976 | .num_resources = ARRAY_SIZE(isp1763_resources), |
| 977 | .resource = isp1763_resources, |
| 978 | .dev = { |
| 979 | .platform_data = &isp1763_pdata |
| 980 | } |
| 981 | }; |
| 982 | #endif |
| 983 | |
| 984 | #if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_MSM_72K) |
| 985 | static struct regulator *ldo6_3p3; |
| 986 | static struct regulator *ldo7_1p8; |
| 987 | static struct regulator *vdd_cx; |
| 988 | #define PMICID_INT PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 36) |
| 989 | notify_vbus_state notify_vbus_state_func_ptr; |
| 990 | static int usb_phy_susp_dig_vol = 750000; |
| 991 | static int pmic_id_notif_supported; |
| 992 | |
| 993 | #ifdef CONFIG_USB_EHCI_MSM_72K |
| 994 | #define USB_PMIC_ID_DET_DELAY msecs_to_jiffies(100) |
| 995 | struct delayed_work pmic_id_det; |
| 996 | |
| 997 | static int __init usb_id_pin_rework_setup(char *support) |
| 998 | { |
| 999 | if (strncmp(support, "true", 4) == 0) |
| 1000 | pmic_id_notif_supported = 1; |
| 1001 | |
| 1002 | return 1; |
| 1003 | } |
| 1004 | __setup("usb_id_pin_rework=", usb_id_pin_rework_setup); |
| 1005 | |
| 1006 | static void pmic_id_detect(struct work_struct *w) |
| 1007 | { |
| 1008 | int val = gpio_get_value_cansleep(PM8058_GPIO_PM_TO_SYS(36)); |
| 1009 | pr_debug("%s(): gpio_read_value = %d\n", __func__, val); |
| 1010 | |
| 1011 | if (notify_vbus_state_func_ptr) |
| 1012 | (*notify_vbus_state_func_ptr) (val); |
| 1013 | } |
| 1014 | |
| 1015 | static irqreturn_t pmic_id_on_irq(int irq, void *data) |
| 1016 | { |
| 1017 | /* |
| 1018 | * Spurious interrupts are observed on pmic gpio line |
| 1019 | * even though there is no state change on USB ID. Schedule the |
| 1020 | * work to to allow debounce on gpio |
Steve Muckle | 9161d30 | 2010-02-11 11:50:40 -0800 | [diff] [blame] | 1021 | */ |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1022 | schedule_delayed_work(&pmic_id_det, USB_PMIC_ID_DET_DELAY); |
Steve Muckle | 9161d30 | 2010-02-11 11:50:40 -0800 | [diff] [blame] | 1023 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1024 | return IRQ_HANDLED; |
| 1025 | } |
| 1026 | |
| 1027 | static int msm_hsusb_pmic_id_notif_init(void (*callback)(int online), int init) |
| 1028 | { |
| 1029 | unsigned ret = -ENODEV; |
| 1030 | |
| 1031 | if (!callback) |
| 1032 | return -EINVAL; |
| 1033 | |
| 1034 | if (machine_is_msm8x60_fluid()) |
| 1035 | return -ENOTSUPP; |
| 1036 | |
| 1037 | if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 2) { |
| 1038 | pr_debug("%s: USB_ID pin is not routed to PMIC" |
| 1039 | "on V1 surf/ffa\n", __func__); |
| 1040 | return -ENOTSUPP; |
| 1041 | } |
| 1042 | |
| 1043 | if ((machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) && |
| 1044 | !pmic_id_notif_supported) { |
| 1045 | pr_debug("%s: USB_ID is not routed to PMIC" |
| 1046 | "on V2 ffa\n", __func__); |
| 1047 | return -ENOTSUPP; |
| 1048 | } |
| 1049 | |
| 1050 | usb_phy_susp_dig_vol = 500000; |
| 1051 | |
| 1052 | if (init) { |
| 1053 | notify_vbus_state_func_ptr = callback; |
| 1054 | ret = pm8901_mpp_config_digital_out(1, |
| 1055 | PM8901_MPP_DIG_LEVEL_L5, 1); |
| 1056 | if (ret) { |
| 1057 | pr_err("%s: MPP2 configuration failed\n", __func__); |
| 1058 | return -ENODEV; |
| 1059 | } |
| 1060 | INIT_DELAYED_WORK(&pmic_id_det, pmic_id_detect); |
| 1061 | ret = request_threaded_irq(PMICID_INT, NULL, pmic_id_on_irq, |
| 1062 | (IRQF_TRIGGER_RISING|IRQF_TRIGGER_FALLING), |
| 1063 | "msm_otg_id", NULL); |
| 1064 | if (ret) { |
| 1065 | pm8901_mpp_config_digital_out(1, |
| 1066 | PM8901_MPP_DIG_LEVEL_L5, 0); |
| 1067 | pr_err("%s:pmic_usb_id interrupt registration failed", |
| 1068 | __func__); |
| 1069 | return ret; |
| 1070 | } |
| 1071 | /* Notify the initial Id status */ |
| 1072 | pmic_id_detect(&pmic_id_det.work); |
| 1073 | } else { |
| 1074 | free_irq(PMICID_INT, 0); |
| 1075 | cancel_delayed_work_sync(&pmic_id_det); |
| 1076 | notify_vbus_state_func_ptr = NULL; |
| 1077 | ret = pm8901_mpp_config_digital_out(1, |
| 1078 | PM8901_MPP_DIG_LEVEL_L5, 0); |
| 1079 | if (ret) { |
| 1080 | pr_err("%s:MPP2 configuration failed\n", __func__); |
| 1081 | return -ENODEV; |
| 1082 | } |
| 1083 | } |
| 1084 | return 0; |
| 1085 | } |
| 1086 | #endif |
| 1087 | |
| 1088 | #define USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL 1000000 |
| 1089 | #define USB_PHY_MAX_VDD_DIG_VOL 1320000 |
| 1090 | static int msm_hsusb_init_vddcx(int init) |
| 1091 | { |
| 1092 | int ret = 0; |
| 1093 | |
| 1094 | if (init) { |
| 1095 | vdd_cx = regulator_get(NULL, "8058_s1"); |
| 1096 | if (IS_ERR(vdd_cx)) { |
| 1097 | return PTR_ERR(vdd_cx); |
| 1098 | } |
| 1099 | |
| 1100 | ret = regulator_set_voltage(vdd_cx, |
| 1101 | USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL, |
| 1102 | USB_PHY_MAX_VDD_DIG_VOL); |
| 1103 | if (ret) { |
| 1104 | pr_err("%s: unable to set the voltage for regulator" |
| 1105 | "vdd_cx\n", __func__); |
| 1106 | regulator_put(vdd_cx); |
| 1107 | return ret; |
| 1108 | } |
| 1109 | |
| 1110 | ret = regulator_enable(vdd_cx); |
| 1111 | if (ret) { |
| 1112 | pr_err("%s: unable to enable regulator" |
| 1113 | "vdd_cx\n", __func__); |
| 1114 | regulator_put(vdd_cx); |
| 1115 | } |
| 1116 | } else { |
| 1117 | ret = regulator_disable(vdd_cx); |
| 1118 | if (ret) { |
| 1119 | pr_err("%s: Unable to disable the regulator:" |
| 1120 | "vdd_cx\n", __func__); |
| 1121 | return ret; |
| 1122 | } |
| 1123 | |
| 1124 | regulator_put(vdd_cx); |
| 1125 | } |
| 1126 | |
| 1127 | return ret; |
| 1128 | } |
| 1129 | |
| 1130 | static int msm_hsusb_config_vddcx(int high) |
| 1131 | { |
| 1132 | int max_vol = USB_PHY_MAX_VDD_DIG_VOL; |
| 1133 | int min_vol; |
| 1134 | int ret; |
| 1135 | |
| 1136 | if (high) |
| 1137 | min_vol = USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL; |
| 1138 | else |
| 1139 | min_vol = usb_phy_susp_dig_vol; |
| 1140 | |
| 1141 | ret = regulator_set_voltage(vdd_cx, min_vol, max_vol); |
| 1142 | if (ret) { |
| 1143 | pr_err("%s: unable to set the voltage for regulator" |
| 1144 | "vdd_cx\n", __func__); |
| 1145 | return ret; |
| 1146 | } |
| 1147 | |
| 1148 | pr_debug("%s: min_vol:%d max_vol:%d\n", __func__, min_vol, max_vol); |
| 1149 | |
| 1150 | return ret; |
| 1151 | } |
| 1152 | |
| 1153 | #define USB_PHY_3P3_VOL_MIN 3050000 /* uV */ |
| 1154 | #define USB_PHY_3P3_VOL_MAX 3050000 /* uV */ |
| 1155 | #define USB_PHY_3P3_HPM_LOAD 50000 /* uA */ |
| 1156 | #define USB_PHY_3P3_LPM_LOAD 4000 /* uA */ |
| 1157 | |
| 1158 | #define USB_PHY_1P8_VOL_MIN 1800000 /* uV */ |
| 1159 | #define USB_PHY_1P8_VOL_MAX 1800000 /* uV */ |
| 1160 | #define USB_PHY_1P8_HPM_LOAD 50000 /* uA */ |
| 1161 | #define USB_PHY_1P8_LPM_LOAD 4000 /* uA */ |
| 1162 | static int msm_hsusb_ldo_init(int init) |
| 1163 | { |
| 1164 | int rc = 0; |
| 1165 | |
| 1166 | if (init) { |
| 1167 | ldo6_3p3 = regulator_get(NULL, "8058_l6"); |
| 1168 | if (IS_ERR(ldo6_3p3)) |
| 1169 | return PTR_ERR(ldo6_3p3); |
| 1170 | |
| 1171 | ldo7_1p8 = regulator_get(NULL, "8058_l7"); |
| 1172 | if (IS_ERR(ldo7_1p8)) { |
| 1173 | rc = PTR_ERR(ldo7_1p8); |
| 1174 | goto put_3p3; |
| 1175 | } |
| 1176 | |
| 1177 | rc = regulator_set_voltage(ldo6_3p3, USB_PHY_3P3_VOL_MIN, |
| 1178 | USB_PHY_3P3_VOL_MAX); |
| 1179 | if (rc) { |
| 1180 | pr_err("%s: Unable to set voltage level for" |
| 1181 | "ldo6_3p3 regulator\n", __func__); |
| 1182 | goto put_1p8; |
| 1183 | } |
| 1184 | rc = regulator_enable(ldo6_3p3); |
| 1185 | if (rc) { |
| 1186 | pr_err("%s: Unable to enable the regulator:" |
| 1187 | "ldo6_3p3\n", __func__); |
| 1188 | goto put_1p8; |
| 1189 | } |
| 1190 | rc = regulator_set_voltage(ldo7_1p8, USB_PHY_1P8_VOL_MIN, |
| 1191 | USB_PHY_1P8_VOL_MAX); |
| 1192 | if (rc) { |
| 1193 | pr_err("%s: Unable to set voltage level for" |
| 1194 | "ldo7_1p8 regulator\n", __func__); |
| 1195 | goto disable_3p3; |
| 1196 | } |
| 1197 | rc = regulator_enable(ldo7_1p8); |
| 1198 | if (rc) { |
| 1199 | pr_err("%s: Unable to enable the regulator:" |
| 1200 | "ldo7_1p8\n", __func__); |
| 1201 | goto disable_3p3; |
| 1202 | } |
| 1203 | |
| 1204 | return 0; |
| 1205 | } |
| 1206 | |
| 1207 | regulator_disable(ldo7_1p8); |
| 1208 | disable_3p3: |
| 1209 | regulator_disable(ldo6_3p3); |
| 1210 | put_1p8: |
| 1211 | regulator_put(ldo7_1p8); |
| 1212 | put_3p3: |
| 1213 | regulator_put(ldo6_3p3); |
| 1214 | return rc; |
| 1215 | } |
| 1216 | |
| 1217 | static int msm_hsusb_ldo_enable(int on) |
| 1218 | { |
| 1219 | int ret = 0; |
| 1220 | |
| 1221 | if (!ldo7_1p8 || IS_ERR(ldo7_1p8)) { |
| 1222 | pr_err("%s: ldo7_1p8 is not initialized\n", __func__); |
| 1223 | return -ENODEV; |
| 1224 | } |
| 1225 | |
| 1226 | if (!ldo6_3p3 || IS_ERR(ldo6_3p3)) { |
| 1227 | pr_err("%s: ldo6_3p3 is not initialized\n", __func__); |
| 1228 | return -ENODEV; |
| 1229 | } |
| 1230 | |
| 1231 | if (on) { |
| 1232 | ret = regulator_set_optimum_mode(ldo7_1p8, |
| 1233 | USB_PHY_1P8_HPM_LOAD); |
| 1234 | if (ret < 0) { |
| 1235 | pr_err("%s: Unable to set HPM of the regulator:" |
| 1236 | "ldo7_1p8\n", __func__); |
| 1237 | return ret; |
| 1238 | } |
| 1239 | ret = regulator_set_optimum_mode(ldo6_3p3, |
| 1240 | USB_PHY_3P3_HPM_LOAD); |
| 1241 | if (ret < 0) { |
| 1242 | pr_err("%s: Unable to set HPM of the regulator:" |
| 1243 | "ldo6_3p3\n", __func__); |
| 1244 | regulator_set_optimum_mode(ldo7_1p8, |
| 1245 | USB_PHY_1P8_LPM_LOAD); |
| 1246 | return ret; |
| 1247 | } |
| 1248 | } else { |
| 1249 | ret = regulator_set_optimum_mode(ldo7_1p8, |
| 1250 | USB_PHY_1P8_LPM_LOAD); |
| 1251 | if (ret < 0) |
| 1252 | pr_err("%s: Unable to set LPM of the regulator:" |
| 1253 | "ldo7_1p8\n", __func__); |
| 1254 | ret = regulator_set_optimum_mode(ldo6_3p3, |
| 1255 | USB_PHY_3P3_LPM_LOAD); |
| 1256 | if (ret < 0) |
| 1257 | pr_err("%s: Unable to set LPM of the regulator:" |
| 1258 | "ldo6_3p3\n", __func__); |
| 1259 | } |
| 1260 | |
| 1261 | pr_debug("reg (%s)\n", on ? "HPM" : "LPM"); |
| 1262 | return ret < 0 ? ret : 0; |
| 1263 | } |
| 1264 | #endif |
| 1265 | #ifdef CONFIG_USB_EHCI_MSM_72K |
| 1266 | #if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE) |
| 1267 | static void msm_hsusb_smb137b_vbus_power(unsigned phy_info, int on) |
| 1268 | { |
| 1269 | static int vbus_is_on; |
| 1270 | |
| 1271 | /* If VBUS is already on (or off), do nothing. */ |
| 1272 | if (on == vbus_is_on) |
| 1273 | return; |
| 1274 | smb137b_otg_power(on); |
| 1275 | vbus_is_on = on; |
| 1276 | } |
| 1277 | #endif |
| 1278 | static void msm_hsusb_vbus_power(unsigned phy_info, int on) |
| 1279 | { |
| 1280 | static struct regulator *votg_5v_switch; |
| 1281 | static struct regulator *ext_5v_reg; |
| 1282 | static int vbus_is_on; |
| 1283 | |
| 1284 | /* If VBUS is already on (or off), do nothing. */ |
| 1285 | if (on == vbus_is_on) |
| 1286 | return; |
| 1287 | |
| 1288 | if (!votg_5v_switch) { |
| 1289 | votg_5v_switch = regulator_get(NULL, "8901_usb_otg"); |
| 1290 | if (IS_ERR(votg_5v_switch)) { |
| 1291 | pr_err("%s: unable to get votg_5v_switch\n", __func__); |
| 1292 | return; |
| 1293 | } |
| 1294 | } |
| 1295 | if (!ext_5v_reg) { |
| 1296 | ext_5v_reg = regulator_get(NULL, "8901_mpp0"); |
| 1297 | if (IS_ERR(ext_5v_reg)) { |
| 1298 | pr_err("%s: unable to get ext_5v_reg\n", __func__); |
| 1299 | return; |
| 1300 | } |
| 1301 | } |
| 1302 | if (on) { |
| 1303 | if (regulator_enable(ext_5v_reg)) { |
| 1304 | pr_err("%s: Unable to enable the regulator:" |
| 1305 | " ext_5v_reg\n", __func__); |
| 1306 | return; |
| 1307 | } |
| 1308 | if (regulator_enable(votg_5v_switch)) { |
| 1309 | pr_err("%s: Unable to enable the regulator:" |
| 1310 | " votg_5v_switch\n", __func__); |
| 1311 | return; |
| 1312 | } |
| 1313 | } else { |
| 1314 | if (regulator_disable(votg_5v_switch)) |
| 1315 | pr_err("%s: Unable to enable the regulator:" |
| 1316 | " votg_5v_switch\n", __func__); |
| 1317 | if (regulator_disable(ext_5v_reg)) |
| 1318 | pr_err("%s: Unable to enable the regulator:" |
| 1319 | " ext_5v_reg\n", __func__); |
| 1320 | } |
| 1321 | |
| 1322 | vbus_is_on = on; |
| 1323 | } |
| 1324 | |
| 1325 | static struct msm_usb_host_platform_data msm_usb_host_pdata = { |
| 1326 | .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_45NM), |
| 1327 | .power_budget = 390, |
| 1328 | }; |
| 1329 | #endif |
| 1330 | |
| 1331 | #ifdef CONFIG_BATTERY_MSM8X60 |
| 1332 | static int msm_hsusb_pmic_vbus_notif_init(void (*callback)(int online), |
| 1333 | int init) |
| 1334 | { |
| 1335 | int ret = -ENOTSUPP; |
| 1336 | |
| 1337 | #if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE) |
| 1338 | if (machine_is_msm8x60_fluid()) { |
| 1339 | if (init) |
| 1340 | msm_charger_register_vbus_sn(callback); |
| 1341 | else |
| 1342 | msm_charger_unregister_vbus_sn(callback); |
| 1343 | return 0; |
| 1344 | } |
| 1345 | #endif |
| 1346 | /* ID and VBUS lines are connected to pmic on 8660.V2.SURF, |
| 1347 | * hence, irrespective of either peripheral only mode or |
| 1348 | * OTG (host and peripheral) modes, can depend on pmic for |
| 1349 | * vbus notifications |
Steve Muckle | 9161d30 | 2010-02-11 11:50:40 -0800 | [diff] [blame] | 1350 | */ |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1351 | if ((SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2) |
| 1352 | && (machine_is_msm8x60_surf() || |
| 1353 | pmic_id_notif_supported)) { |
| 1354 | if (init) |
| 1355 | ret = msm_charger_register_vbus_sn(callback); |
| 1356 | else { |
| 1357 | msm_charger_unregister_vbus_sn(callback); |
| 1358 | ret = 0; |
| 1359 | } |
| 1360 | } else { |
| 1361 | #if !defined(CONFIG_USB_EHCI_MSM_72K) |
| 1362 | if (init) |
| 1363 | ret = msm_charger_register_vbus_sn(callback); |
| 1364 | else { |
| 1365 | msm_charger_unregister_vbus_sn(callback); |
| 1366 | ret = 0; |
| 1367 | } |
| 1368 | #endif |
| 1369 | } |
| 1370 | return ret; |
| 1371 | } |
| 1372 | #endif |
| 1373 | |
| 1374 | #if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_MSM_72K) |
| 1375 | static struct msm_otg_platform_data msm_otg_pdata = { |
| 1376 | /* if usb link is in sps there is no need for |
| 1377 | * usb pclk as dayatona fabric clock will be |
| 1378 | * used instead |
| 1379 | */ |
| 1380 | .pclk_src_name = "dfab_usb_hs_clk", |
| 1381 | .pemp_level = PRE_EMPHASIS_WITH_20_PERCENT, |
| 1382 | .cdr_autoreset = CDR_AUTO_RESET_DISABLE, |
| 1383 | .se1_gating = SE1_GATING_DISABLE, |
| 1384 | #ifdef CONFIG_USB_EHCI_MSM_72K |
| 1385 | .pmic_id_notif_init = msm_hsusb_pmic_id_notif_init, |
| 1386 | #endif |
| 1387 | #ifdef CONFIG_USB_EHCI_MSM_72K |
| 1388 | .vbus_power = msm_hsusb_vbus_power, |
| 1389 | #endif |
| 1390 | #ifdef CONFIG_BATTERY_MSM8X60 |
| 1391 | .pmic_vbus_notif_init = msm_hsusb_pmic_vbus_notif_init, |
| 1392 | #endif |
| 1393 | .ldo_init = msm_hsusb_ldo_init, |
| 1394 | .ldo_enable = msm_hsusb_ldo_enable, |
| 1395 | .config_vddcx = msm_hsusb_config_vddcx, |
| 1396 | .init_vddcx = msm_hsusb_init_vddcx, |
| 1397 | #ifdef CONFIG_BATTERY_MSM8X60 |
| 1398 | .chg_vbus_draw = msm_charger_vbus_draw, |
| 1399 | #endif |
| 1400 | }; |
| 1401 | #endif |
| 1402 | |
| 1403 | #ifdef CONFIG_USB_GADGET_MSM_72K |
| 1404 | static struct msm_hsusb_gadget_platform_data msm_gadget_pdata = { |
| 1405 | .is_phy_status_timer_on = 1, |
| 1406 | }; |
| 1407 | #endif |
| 1408 | |
| 1409 | #ifdef CONFIG_USB_G_ANDROID |
| 1410 | |
| 1411 | #define PID_MAGIC_ID 0x71432909 |
| 1412 | #define SERIAL_NUM_MAGIC_ID 0x61945374 |
| 1413 | #define SERIAL_NUMBER_LENGTH 127 |
| 1414 | #define DLOAD_USB_BASE_ADD 0x2A05F0C8 |
| 1415 | |
| 1416 | struct magic_num_struct { |
| 1417 | uint32_t pid; |
| 1418 | uint32_t serial_num; |
| 1419 | }; |
| 1420 | |
| 1421 | struct dload_struct { |
| 1422 | uint32_t reserved1; |
| 1423 | uint32_t reserved2; |
| 1424 | uint32_t reserved3; |
| 1425 | uint16_t reserved4; |
| 1426 | uint16_t pid; |
| 1427 | char serial_number[SERIAL_NUMBER_LENGTH]; |
| 1428 | uint16_t reserved5; |
| 1429 | struct magic_num_struct |
| 1430 | magic_struct; |
| 1431 | }; |
| 1432 | |
| 1433 | static int usb_diag_update_pid_and_serial_num(uint32_t pid, const char *snum) |
| 1434 | { |
| 1435 | struct dload_struct __iomem *dload = 0; |
| 1436 | |
| 1437 | dload = ioremap(DLOAD_USB_BASE_ADD, sizeof(*dload)); |
| 1438 | if (!dload) { |
| 1439 | pr_err("%s: cannot remap I/O memory region: %08x\n", |
| 1440 | __func__, DLOAD_USB_BASE_ADD); |
| 1441 | return -ENXIO; |
| 1442 | } |
| 1443 | |
| 1444 | pr_debug("%s: dload:%p pid:%x serial_num:%s\n", |
| 1445 | __func__, dload, pid, snum); |
| 1446 | /* update pid */ |
| 1447 | dload->magic_struct.pid = PID_MAGIC_ID; |
| 1448 | dload->pid = pid; |
| 1449 | |
| 1450 | /* update serial number */ |
| 1451 | dload->magic_struct.serial_num = 0; |
| 1452 | if (!snum) |
| 1453 | return 0; |
| 1454 | |
| 1455 | dload->magic_struct.serial_num = SERIAL_NUM_MAGIC_ID; |
| 1456 | strncpy(dload->serial_number, snum, SERIAL_NUMBER_LENGTH); |
| 1457 | dload->serial_number[SERIAL_NUMBER_LENGTH - 1] = '\0'; |
| 1458 | |
| 1459 | iounmap(dload); |
| 1460 | |
| 1461 | return 0; |
| 1462 | } |
| 1463 | |
| 1464 | static struct android_usb_platform_data android_usb_pdata = { |
| 1465 | .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num, |
| 1466 | }; |
| 1467 | |
| 1468 | static struct platform_device android_usb_device = { |
| 1469 | .name = "android_usb", |
| 1470 | .id = -1, |
| 1471 | .dev = { |
| 1472 | .platform_data = &android_usb_pdata, |
| 1473 | }, |
| 1474 | }; |
| 1475 | |
| 1476 | |
| 1477 | #endif |
| 1478 | |
| 1479 | #ifdef CONFIG_MSM_VPE |
| 1480 | static struct resource msm_vpe_resources[] = { |
| 1481 | { |
| 1482 | .start = 0x05300000, |
| 1483 | .end = 0x05300000 + SZ_1M - 1, |
| 1484 | .flags = IORESOURCE_MEM, |
| 1485 | }, |
| 1486 | { |
| 1487 | .start = INT_VPE, |
| 1488 | .end = INT_VPE, |
| 1489 | .flags = IORESOURCE_IRQ, |
| 1490 | }, |
| 1491 | }; |
| 1492 | |
| 1493 | static struct platform_device msm_vpe_device = { |
| 1494 | .name = "msm_vpe", |
| 1495 | .id = 0, |
| 1496 | .num_resources = ARRAY_SIZE(msm_vpe_resources), |
| 1497 | .resource = msm_vpe_resources, |
| 1498 | }; |
| 1499 | #endif |
| 1500 | |
| 1501 | #ifdef CONFIG_MSM_CAMERA |
| 1502 | #ifdef CONFIG_MSM_CAMERA_FLASH |
| 1503 | #define VFE_CAMIF_TIMER1_GPIO 29 |
| 1504 | #define VFE_CAMIF_TIMER2_GPIO 30 |
| 1505 | #define VFE_CAMIF_TIMER3_GPIO_INT 31 |
| 1506 | #define FUSION_VFE_CAMIF_TIMER1_GPIO 42 |
| 1507 | static struct msm_camera_sensor_flash_src msm_flash_src = { |
| 1508 | .flash_sr_type = MSM_CAMERA_FLASH_SRC_PMIC, |
| 1509 | ._fsrc.pmic_src.num_of_src = 2, |
| 1510 | ._fsrc.pmic_src.low_current = 100, |
| 1511 | ._fsrc.pmic_src.high_current = 300, |
| 1512 | ._fsrc.pmic_src.led_src_1 = PMIC8058_ID_FLASH_LED_0, |
| 1513 | ._fsrc.pmic_src.led_src_2 = PMIC8058_ID_FLASH_LED_1, |
| 1514 | ._fsrc.pmic_src.pmic_set_current = pm8058_set_flash_led_current, |
| 1515 | }; |
| 1516 | #ifdef CONFIG_IMX074 |
| 1517 | static struct msm_camera_sensor_strobe_flash_data strobe_flash_xenon = { |
| 1518 | .flash_trigger = VFE_CAMIF_TIMER2_GPIO, |
| 1519 | .flash_charge = VFE_CAMIF_TIMER1_GPIO, |
| 1520 | .flash_charge_done = VFE_CAMIF_TIMER3_GPIO_INT, |
| 1521 | .flash_recharge_duration = 50000, |
| 1522 | .irq = MSM_GPIO_TO_INT(VFE_CAMIF_TIMER3_GPIO_INT), |
| 1523 | }; |
| 1524 | #endif |
| 1525 | #endif |
| 1526 | |
| 1527 | int msm_cam_gpio_tbl[] = { |
| 1528 | 32,/*CAMIF_MCLK*/ |
| 1529 | 47,/*CAMIF_I2C_DATA*/ |
| 1530 | 48,/*CAMIF_I2C_CLK*/ |
| 1531 | 105,/*STANDBY*/ |
| 1532 | }; |
| 1533 | |
| 1534 | enum msm_cam_stat{ |
| 1535 | MSM_CAM_OFF, |
| 1536 | MSM_CAM_ON, |
| 1537 | }; |
| 1538 | |
| 1539 | static int config_gpio_table(enum msm_cam_stat stat) |
| 1540 | { |
| 1541 | int rc = 0, i = 0; |
| 1542 | if (stat == MSM_CAM_ON) { |
| 1543 | for (i = 0; i < ARRAY_SIZE(msm_cam_gpio_tbl); i++) { |
| 1544 | rc = gpio_request(msm_cam_gpio_tbl[i], "CAM_GPIO"); |
| 1545 | if (unlikely(rc < 0)) { |
| 1546 | pr_err("%s not able to get gpio\n", __func__); |
| 1547 | for (i--; i >= 0; i--) |
| 1548 | gpio_free(msm_cam_gpio_tbl[i]); |
| 1549 | break; |
| 1550 | } |
| 1551 | } |
| 1552 | } else { |
| 1553 | for (i = 0; i < ARRAY_SIZE(msm_cam_gpio_tbl); i++) |
| 1554 | gpio_free(msm_cam_gpio_tbl[i]); |
| 1555 | } |
| 1556 | return rc; |
| 1557 | } |
| 1558 | |
| 1559 | static struct msm_camera_sensor_platform_info sensor_board_info = { |
| 1560 | .mount_angle = 0 |
| 1561 | }; |
| 1562 | |
| 1563 | /*external regulator VREG_5V*/ |
| 1564 | static struct regulator *reg_flash_5V; |
| 1565 | |
| 1566 | static int config_camera_on_gpios_fluid(void) |
| 1567 | { |
| 1568 | int rc = 0; |
| 1569 | |
| 1570 | reg_flash_5V = regulator_get(NULL, "8901_mpp0"); |
| 1571 | if (IS_ERR(reg_flash_5V)) { |
| 1572 | pr_err("'%s' regulator not found, rc=%ld\n", |
| 1573 | "8901_mpp0", IS_ERR(reg_flash_5V)); |
| 1574 | return -ENODEV; |
| 1575 | } |
| 1576 | |
| 1577 | rc = regulator_enable(reg_flash_5V); |
| 1578 | if (rc) { |
| 1579 | pr_err("'%s' regulator enable failed, rc=%d\n", |
| 1580 | "8901_mpp0", rc); |
| 1581 | regulator_put(reg_flash_5V); |
| 1582 | return rc; |
| 1583 | } |
| 1584 | |
| 1585 | #ifdef CONFIG_IMX074 |
| 1586 | sensor_board_info.mount_angle = 90; |
| 1587 | #endif |
| 1588 | rc = config_gpio_table(MSM_CAM_ON); |
| 1589 | if (rc < 0) { |
| 1590 | printk(KERN_ERR "%s: CAMSENSOR gpio table request" |
| 1591 | "failed\n", __func__); |
| 1592 | return rc; |
| 1593 | } |
| 1594 | |
| 1595 | rc = gpio_request(GPIO_EXT_CAMIF_PWR_EN, "CAM_EN"); |
| 1596 | if (rc < 0) { |
| 1597 | printk(KERN_ERR "%s: CAMSENSOR gpio %d request" |
| 1598 | "failed\n", __func__, GPIO_EXT_CAMIF_PWR_EN); |
| 1599 | regulator_disable(reg_flash_5V); |
| 1600 | regulator_put(reg_flash_5V); |
| 1601 | return rc; |
| 1602 | } |
| 1603 | gpio_direction_output(GPIO_EXT_CAMIF_PWR_EN, 0); |
| 1604 | msleep(20); |
| 1605 | gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 1); |
| 1606 | |
| 1607 | |
| 1608 | /*Enable LED_FLASH_EN*/ |
| 1609 | rc = gpio_request(GPIO_LED_FLASH_EN, "LED_FLASH_EN"); |
| 1610 | if (rc < 0) { |
| 1611 | printk(KERN_ERR "%s: CAMSENSOR gpio %d request" |
| 1612 | "failed\n", __func__, GPIO_LED_FLASH_EN); |
| 1613 | |
| 1614 | regulator_disable(reg_flash_5V); |
| 1615 | regulator_put(reg_flash_5V); |
| 1616 | config_gpio_table(MSM_CAM_OFF); |
| 1617 | gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0); |
| 1618 | gpio_free(GPIO_EXT_CAMIF_PWR_EN); |
| 1619 | return rc; |
| 1620 | } |
| 1621 | gpio_direction_output(GPIO_LED_FLASH_EN, 1); |
| 1622 | msleep(20); |
| 1623 | return rc; |
| 1624 | } |
| 1625 | |
| 1626 | |
| 1627 | static void config_camera_off_gpios_fluid(void) |
| 1628 | { |
| 1629 | regulator_disable(reg_flash_5V); |
| 1630 | regulator_put(reg_flash_5V); |
| 1631 | |
| 1632 | gpio_direction_output(GPIO_LED_FLASH_EN, 0); |
| 1633 | gpio_free(GPIO_LED_FLASH_EN); |
| 1634 | |
| 1635 | config_gpio_table(MSM_CAM_OFF); |
| 1636 | |
| 1637 | gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0); |
| 1638 | gpio_free(GPIO_EXT_CAMIF_PWR_EN); |
| 1639 | } |
| 1640 | static int config_camera_on_gpios(void) |
| 1641 | { |
| 1642 | int rc = 0; |
| 1643 | |
| 1644 | if (machine_is_msm8x60_fluid()) |
| 1645 | return config_camera_on_gpios_fluid(); |
| 1646 | |
| 1647 | rc = config_gpio_table(MSM_CAM_ON); |
| 1648 | if (rc < 0) { |
| 1649 | printk(KERN_ERR "%s: CAMSENSOR gpio table request" |
| 1650 | "failed\n", __func__); |
| 1651 | return rc; |
| 1652 | } |
| 1653 | |
Jilai Wang | 971f97f | 2011-07-13 14:25:25 -0400 | [diff] [blame^] | 1654 | if (!machine_is_msm8x60_dragon()) { |
| 1655 | rc = gpio_request(GPIO_EXT_CAMIF_PWR_EN, "CAM_EN"); |
| 1656 | if (rc < 0) { |
| 1657 | config_gpio_table(MSM_CAM_OFF); |
| 1658 | pr_err("%s: CAMSENSOR gpio %d request" |
| 1659 | "failed\n", __func__, GPIO_EXT_CAMIF_PWR_EN); |
| 1660 | return rc; |
| 1661 | } |
| 1662 | gpio_direction_output(GPIO_EXT_CAMIF_PWR_EN, 0); |
| 1663 | msleep(20); |
| 1664 | gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 1); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1665 | } |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1666 | |
| 1667 | #ifdef CONFIG_MSM_CAMERA_FLASH |
| 1668 | #ifdef CONFIG_IMX074 |
| 1669 | if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) |
| 1670 | strobe_flash_xenon.flash_charge = FUSION_VFE_CAMIF_TIMER1_GPIO; |
| 1671 | #endif |
| 1672 | #endif |
| 1673 | return rc; |
| 1674 | } |
| 1675 | |
| 1676 | static void config_camera_off_gpios(void) |
| 1677 | { |
| 1678 | if (machine_is_msm8x60_fluid()) |
| 1679 | return config_camera_off_gpios_fluid(); |
| 1680 | |
| 1681 | |
| 1682 | config_gpio_table(MSM_CAM_OFF); |
| 1683 | |
Jilai Wang | 971f97f | 2011-07-13 14:25:25 -0400 | [diff] [blame^] | 1684 | if (!machine_is_msm8x60_dragon()) { |
| 1685 | gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0); |
| 1686 | gpio_free(GPIO_EXT_CAMIF_PWR_EN); |
| 1687 | } |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1688 | } |
| 1689 | |
| 1690 | #ifdef CONFIG_QS_S5K4E1 |
| 1691 | |
| 1692 | #define QS_CAM_HC37_CAM_PD PM8058_GPIO_PM_TO_SYS(26) |
| 1693 | |
| 1694 | static int config_camera_on_gpios_qs_cam_fluid(void) |
| 1695 | { |
| 1696 | int rc = 0; |
| 1697 | |
| 1698 | /* request QS_CAM_HC37_CAM_PD as an output to HC37 ASIC pin CAM_PD */ |
| 1699 | rc = gpio_request(QS_CAM_HC37_CAM_PD, "QS_CAM_HC37_CAM_PD"); |
| 1700 | if (rc < 0) { |
| 1701 | printk(KERN_ERR "%s: QS_CAM_HC37_CAM_PD gpio %d request" |
| 1702 | " failed\n", __func__, QS_CAM_HC37_CAM_PD); |
| 1703 | return rc; |
| 1704 | } |
| 1705 | gpio_direction_output(QS_CAM_HC37_CAM_PD, 0); |
| 1706 | msleep(20); |
| 1707 | gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 1); |
| 1708 | msleep(20); |
| 1709 | |
| 1710 | /* |
| 1711 | * Set GPIO_AUX_CAM_2P7_EN to 1 on North Expander IO2 |
| 1712 | * to enable 2.7V power to Camera |
| 1713 | */ |
| 1714 | rc = gpio_request(GPIO_AUX_CAM_2P7_EN, "CAM_2P7_EN"); |
| 1715 | if (rc < 0) { |
| 1716 | printk(KERN_ERR "%s: CAMSENSOR gpio %d request" |
| 1717 | " failed\n", __func__, GPIO_AUX_CAM_2P7_EN); |
| 1718 | gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0); |
| 1719 | gpio_free(QS_CAM_HC37_CAM_PD); |
| 1720 | return rc; |
| 1721 | } |
| 1722 | gpio_direction_output(GPIO_AUX_CAM_2P7_EN, 0); |
| 1723 | msleep(20); |
| 1724 | gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 1); |
| 1725 | msleep(20); |
| 1726 | |
| 1727 | rc = config_camera_on_gpios_fluid(); |
| 1728 | if (rc < 0) { |
| 1729 | printk(KERN_ERR "%s: config_camera_on_gpios_fluid" |
| 1730 | " failed\n", __func__); |
| 1731 | gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0); |
| 1732 | gpio_free(QS_CAM_HC37_CAM_PD); |
| 1733 | gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 0); |
| 1734 | gpio_free(GPIO_AUX_CAM_2P7_EN); |
| 1735 | return rc; |
| 1736 | } |
| 1737 | return rc; |
| 1738 | } |
| 1739 | |
| 1740 | static void config_camera_off_gpios_qs_cam_fluid(void) |
| 1741 | { |
| 1742 | /* |
| 1743 | * Set GPIO_AUX_CAM_2P7_EN to 0 on North Expander IO2 |
| 1744 | * to disable 2.7V power to Camera |
| 1745 | */ |
| 1746 | gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 0); |
| 1747 | gpio_free(GPIO_AUX_CAM_2P7_EN); |
| 1748 | |
| 1749 | /* set QS_CAM_HC37_CAM_PD to 0 to power off HC37 ASIC*/ |
| 1750 | gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0); |
| 1751 | gpio_free(QS_CAM_HC37_CAM_PD); |
| 1752 | |
| 1753 | config_camera_off_gpios_fluid(); |
| 1754 | return; |
| 1755 | } |
| 1756 | |
| 1757 | static int config_camera_on_gpios_qs_cam(void) |
| 1758 | { |
| 1759 | int rc = 0; |
| 1760 | |
| 1761 | if (machine_is_msm8x60_fluid()) |
| 1762 | return config_camera_on_gpios_qs_cam_fluid(); |
| 1763 | |
| 1764 | rc = config_camera_on_gpios(); |
| 1765 | return rc; |
| 1766 | } |
| 1767 | |
| 1768 | static void config_camera_off_gpios_qs_cam(void) |
| 1769 | { |
| 1770 | if (machine_is_msm8x60_fluid()) |
| 1771 | return config_camera_off_gpios_qs_cam_fluid(); |
| 1772 | |
| 1773 | config_camera_off_gpios(); |
| 1774 | return; |
| 1775 | } |
| 1776 | #endif |
| 1777 | |
| 1778 | static int config_camera_on_gpios_web_cam(void) |
| 1779 | { |
| 1780 | int rc = 0; |
| 1781 | rc = config_gpio_table(MSM_CAM_ON); |
| 1782 | if (rc < 0) { |
| 1783 | printk(KERN_ERR "%s: CAMSENSOR gpio table request" |
| 1784 | "failed\n", __func__); |
| 1785 | return rc; |
| 1786 | } |
| 1787 | |
| 1788 | if (!machine_is_msm8x60_fluid()) { |
| 1789 | rc = gpio_request(GPIO_WEB_CAMIF_STANDBY, "CAM_EN"); |
| 1790 | if (rc < 0) { |
| 1791 | config_gpio_table(MSM_CAM_OFF); |
| 1792 | pr_err(KERN_ERR "%s: CAMSENSOR gpio %d request" |
| 1793 | "failed\n", __func__, GPIO_WEB_CAMIF_STANDBY); |
| 1794 | return rc; |
| 1795 | } |
| 1796 | gpio_direction_output(GPIO_WEB_CAMIF_STANDBY, 0); |
| 1797 | } |
| 1798 | return rc; |
| 1799 | } |
| 1800 | |
| 1801 | static void config_camera_off_gpios_web_cam(void) |
| 1802 | { |
| 1803 | config_gpio_table(MSM_CAM_OFF); |
| 1804 | if (!machine_is_msm8x60_fluid()) { |
| 1805 | gpio_set_value_cansleep(GPIO_WEB_CAMIF_STANDBY, 1); |
| 1806 | gpio_free(GPIO_WEB_CAMIF_STANDBY); |
| 1807 | } |
| 1808 | return; |
| 1809 | } |
| 1810 | |
| 1811 | #ifdef CONFIG_MSM_BUS_SCALING |
| 1812 | static struct msm_bus_vectors cam_init_vectors[] = { |
| 1813 | { |
| 1814 | .src = MSM_BUS_MASTER_VFE, |
| 1815 | .dst = MSM_BUS_SLAVE_SMI, |
| 1816 | .ab = 0, |
| 1817 | .ib = 0, |
| 1818 | }, |
| 1819 | { |
| 1820 | .src = MSM_BUS_MASTER_VFE, |
| 1821 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1822 | .ab = 0, |
| 1823 | .ib = 0, |
| 1824 | }, |
| 1825 | { |
| 1826 | .src = MSM_BUS_MASTER_VPE, |
| 1827 | .dst = MSM_BUS_SLAVE_SMI, |
| 1828 | .ab = 0, |
| 1829 | .ib = 0, |
| 1830 | }, |
| 1831 | { |
| 1832 | .src = MSM_BUS_MASTER_VPE, |
| 1833 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1834 | .ab = 0, |
| 1835 | .ib = 0, |
| 1836 | }, |
| 1837 | { |
| 1838 | .src = MSM_BUS_MASTER_JPEG_ENC, |
| 1839 | .dst = MSM_BUS_SLAVE_SMI, |
| 1840 | .ab = 0, |
| 1841 | .ib = 0, |
| 1842 | }, |
| 1843 | { |
| 1844 | .src = MSM_BUS_MASTER_JPEG_ENC, |
| 1845 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1846 | .ab = 0, |
| 1847 | .ib = 0, |
| 1848 | }, |
| 1849 | }; |
| 1850 | |
| 1851 | static struct msm_bus_vectors cam_preview_vectors[] = { |
| 1852 | { |
| 1853 | .src = MSM_BUS_MASTER_VFE, |
| 1854 | .dst = MSM_BUS_SLAVE_SMI, |
| 1855 | .ab = 0, |
| 1856 | .ib = 0, |
| 1857 | }, |
| 1858 | { |
| 1859 | .src = MSM_BUS_MASTER_VFE, |
| 1860 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1861 | .ab = 283115520, |
| 1862 | .ib = 452984832, |
| 1863 | }, |
| 1864 | { |
| 1865 | .src = MSM_BUS_MASTER_VPE, |
| 1866 | .dst = MSM_BUS_SLAVE_SMI, |
| 1867 | .ab = 0, |
| 1868 | .ib = 0, |
| 1869 | }, |
| 1870 | { |
| 1871 | .src = MSM_BUS_MASTER_VPE, |
| 1872 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1873 | .ab = 0, |
| 1874 | .ib = 0, |
| 1875 | }, |
| 1876 | { |
| 1877 | .src = MSM_BUS_MASTER_JPEG_ENC, |
| 1878 | .dst = MSM_BUS_SLAVE_SMI, |
| 1879 | .ab = 0, |
| 1880 | .ib = 0, |
| 1881 | }, |
| 1882 | { |
| 1883 | .src = MSM_BUS_MASTER_JPEG_ENC, |
| 1884 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1885 | .ab = 0, |
| 1886 | .ib = 0, |
| 1887 | }, |
| 1888 | }; |
| 1889 | |
| 1890 | static struct msm_bus_vectors cam_video_vectors[] = { |
| 1891 | { |
| 1892 | .src = MSM_BUS_MASTER_VFE, |
| 1893 | .dst = MSM_BUS_SLAVE_SMI, |
| 1894 | .ab = 283115520, |
| 1895 | .ib = 452984832, |
| 1896 | }, |
| 1897 | { |
| 1898 | .src = MSM_BUS_MASTER_VFE, |
| 1899 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1900 | .ab = 283115520, |
| 1901 | .ib = 452984832, |
| 1902 | }, |
| 1903 | { |
| 1904 | .src = MSM_BUS_MASTER_VPE, |
| 1905 | .dst = MSM_BUS_SLAVE_SMI, |
| 1906 | .ab = 319610880, |
| 1907 | .ib = 511377408, |
| 1908 | }, |
| 1909 | { |
| 1910 | .src = MSM_BUS_MASTER_VPE, |
| 1911 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1912 | .ab = 0, |
| 1913 | .ib = 0, |
| 1914 | }, |
| 1915 | { |
| 1916 | .src = MSM_BUS_MASTER_JPEG_ENC, |
| 1917 | .dst = MSM_BUS_SLAVE_SMI, |
| 1918 | .ab = 0, |
| 1919 | .ib = 0, |
| 1920 | }, |
| 1921 | { |
| 1922 | .src = MSM_BUS_MASTER_JPEG_ENC, |
| 1923 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1924 | .ab = 0, |
| 1925 | .ib = 0, |
| 1926 | }, |
| 1927 | }; |
| 1928 | |
| 1929 | static struct msm_bus_vectors cam_snapshot_vectors[] = { |
| 1930 | { |
| 1931 | .src = MSM_BUS_MASTER_VFE, |
| 1932 | .dst = MSM_BUS_SLAVE_SMI, |
| 1933 | .ab = 566231040, |
| 1934 | .ib = 905969664, |
| 1935 | }, |
| 1936 | { |
| 1937 | .src = MSM_BUS_MASTER_VFE, |
| 1938 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1939 | .ab = 69984000, |
| 1940 | .ib = 111974400, |
| 1941 | }, |
| 1942 | { |
| 1943 | .src = MSM_BUS_MASTER_VPE, |
| 1944 | .dst = MSM_BUS_SLAVE_SMI, |
| 1945 | .ab = 0, |
| 1946 | .ib = 0, |
| 1947 | }, |
| 1948 | { |
| 1949 | .src = MSM_BUS_MASTER_VPE, |
| 1950 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1951 | .ab = 0, |
| 1952 | .ib = 0, |
| 1953 | }, |
| 1954 | { |
| 1955 | .src = MSM_BUS_MASTER_JPEG_ENC, |
| 1956 | .dst = MSM_BUS_SLAVE_SMI, |
| 1957 | .ab = 320864256, |
| 1958 | .ib = 513382810, |
| 1959 | }, |
| 1960 | { |
| 1961 | .src = MSM_BUS_MASTER_JPEG_ENC, |
| 1962 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1963 | .ab = 320864256, |
| 1964 | .ib = 513382810, |
| 1965 | }, |
| 1966 | }; |
| 1967 | |
| 1968 | static struct msm_bus_vectors cam_zsl_vectors[] = { |
| 1969 | { |
| 1970 | .src = MSM_BUS_MASTER_VFE, |
| 1971 | .dst = MSM_BUS_SLAVE_SMI, |
| 1972 | .ab = 566231040, |
| 1973 | .ib = 905969664, |
| 1974 | }, |
| 1975 | { |
| 1976 | .src = MSM_BUS_MASTER_VFE, |
| 1977 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1978 | .ab = 706199040, |
| 1979 | .ib = 1129918464, |
| 1980 | }, |
| 1981 | { |
| 1982 | .src = MSM_BUS_MASTER_VPE, |
| 1983 | .dst = MSM_BUS_SLAVE_SMI, |
| 1984 | .ab = 0, |
| 1985 | .ib = 0, |
| 1986 | }, |
| 1987 | { |
| 1988 | .src = MSM_BUS_MASTER_VPE, |
| 1989 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1990 | .ab = 0, |
| 1991 | .ib = 0, |
| 1992 | }, |
| 1993 | { |
| 1994 | .src = MSM_BUS_MASTER_JPEG_ENC, |
| 1995 | .dst = MSM_BUS_SLAVE_SMI, |
| 1996 | .ab = 320864256, |
| 1997 | .ib = 513382810, |
| 1998 | }, |
| 1999 | { |
| 2000 | .src = MSM_BUS_MASTER_JPEG_ENC, |
| 2001 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 2002 | .ab = 320864256, |
| 2003 | .ib = 513382810, |
| 2004 | }, |
| 2005 | }; |
| 2006 | |
| 2007 | static struct msm_bus_vectors cam_stereo_video_vectors[] = { |
| 2008 | { |
| 2009 | .src = MSM_BUS_MASTER_VFE, |
| 2010 | .dst = MSM_BUS_SLAVE_SMI, |
| 2011 | .ab = 212336640, |
| 2012 | .ib = 339738624, |
| 2013 | }, |
| 2014 | { |
| 2015 | .src = MSM_BUS_MASTER_VFE, |
| 2016 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 2017 | .ab = 25090560, |
| 2018 | .ib = 40144896, |
| 2019 | }, |
| 2020 | { |
| 2021 | .src = MSM_BUS_MASTER_VPE, |
| 2022 | .dst = MSM_BUS_SLAVE_SMI, |
| 2023 | .ab = 239708160, |
| 2024 | .ib = 383533056, |
| 2025 | }, |
| 2026 | { |
| 2027 | .src = MSM_BUS_MASTER_VPE, |
| 2028 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 2029 | .ab = 79902720, |
| 2030 | .ib = 127844352, |
| 2031 | }, |
| 2032 | { |
| 2033 | .src = MSM_BUS_MASTER_JPEG_ENC, |
| 2034 | .dst = MSM_BUS_SLAVE_SMI, |
| 2035 | .ab = 0, |
| 2036 | .ib = 0, |
| 2037 | }, |
| 2038 | { |
| 2039 | .src = MSM_BUS_MASTER_JPEG_ENC, |
| 2040 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 2041 | .ab = 0, |
| 2042 | .ib = 0, |
| 2043 | }, |
| 2044 | }; |
| 2045 | |
| 2046 | static struct msm_bus_vectors cam_stereo_snapshot_vectors[] = { |
| 2047 | { |
| 2048 | .src = MSM_BUS_MASTER_VFE, |
| 2049 | .dst = MSM_BUS_SLAVE_SMI, |
| 2050 | .ab = 0, |
| 2051 | .ib = 0, |
| 2052 | }, |
| 2053 | { |
| 2054 | .src = MSM_BUS_MASTER_VFE, |
| 2055 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 2056 | .ab = 300902400, |
| 2057 | .ib = 481443840, |
| 2058 | }, |
| 2059 | { |
| 2060 | .src = MSM_BUS_MASTER_VPE, |
| 2061 | .dst = MSM_BUS_SLAVE_SMI, |
| 2062 | .ab = 230307840, |
| 2063 | .ib = 368492544, |
| 2064 | }, |
| 2065 | { |
| 2066 | .src = MSM_BUS_MASTER_VPE, |
| 2067 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 2068 | .ab = 245113344, |
| 2069 | .ib = 392181351, |
| 2070 | }, |
| 2071 | { |
| 2072 | .src = MSM_BUS_MASTER_JPEG_ENC, |
| 2073 | .dst = MSM_BUS_SLAVE_SMI, |
| 2074 | .ab = 106536960, |
| 2075 | .ib = 170459136, |
| 2076 | }, |
| 2077 | { |
| 2078 | .src = MSM_BUS_MASTER_JPEG_ENC, |
| 2079 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 2080 | .ab = 106536960, |
| 2081 | .ib = 170459136, |
| 2082 | }, |
| 2083 | }; |
| 2084 | |
| 2085 | static struct msm_bus_paths cam_bus_client_config[] = { |
| 2086 | { |
| 2087 | ARRAY_SIZE(cam_init_vectors), |
| 2088 | cam_init_vectors, |
| 2089 | }, |
| 2090 | { |
| 2091 | ARRAY_SIZE(cam_preview_vectors), |
| 2092 | cam_preview_vectors, |
| 2093 | }, |
| 2094 | { |
| 2095 | ARRAY_SIZE(cam_video_vectors), |
| 2096 | cam_video_vectors, |
| 2097 | }, |
| 2098 | { |
| 2099 | ARRAY_SIZE(cam_snapshot_vectors), |
| 2100 | cam_snapshot_vectors, |
| 2101 | }, |
| 2102 | { |
| 2103 | ARRAY_SIZE(cam_zsl_vectors), |
| 2104 | cam_zsl_vectors, |
| 2105 | }, |
| 2106 | { |
| 2107 | ARRAY_SIZE(cam_stereo_video_vectors), |
| 2108 | cam_stereo_video_vectors, |
| 2109 | }, |
| 2110 | { |
| 2111 | ARRAY_SIZE(cam_stereo_snapshot_vectors), |
| 2112 | cam_stereo_snapshot_vectors, |
| 2113 | }, |
| 2114 | }; |
| 2115 | |
| 2116 | static struct msm_bus_scale_pdata cam_bus_client_pdata = { |
| 2117 | cam_bus_client_config, |
| 2118 | ARRAY_SIZE(cam_bus_client_config), |
| 2119 | .name = "msm_camera", |
| 2120 | }; |
| 2121 | #endif |
| 2122 | |
| 2123 | struct msm_camera_device_platform_data msm_camera_device_data = { |
| 2124 | .camera_gpio_on = config_camera_on_gpios, |
| 2125 | .camera_gpio_off = config_camera_off_gpios, |
| 2126 | .ioext.csiphy = 0x04800000, |
| 2127 | .ioext.csisz = 0x00000400, |
| 2128 | .ioext.csiirq = CSI_0_IRQ, |
| 2129 | .ioclk.mclk_clk_rate = 24000000, |
| 2130 | .ioclk.vfe_clk_rate = 228570000, |
| 2131 | #ifdef CONFIG_MSM_BUS_SCALING |
| 2132 | .cam_bus_scale_table = &cam_bus_client_pdata, |
| 2133 | #endif |
| 2134 | }; |
| 2135 | |
| 2136 | #ifdef CONFIG_QS_S5K4E1 |
| 2137 | struct msm_camera_device_platform_data msm_camera_device_data_qs_cam = { |
| 2138 | .camera_gpio_on = config_camera_on_gpios_qs_cam, |
| 2139 | .camera_gpio_off = config_camera_off_gpios_qs_cam, |
| 2140 | .ioext.csiphy = 0x04800000, |
| 2141 | .ioext.csisz = 0x00000400, |
| 2142 | .ioext.csiirq = CSI_0_IRQ, |
| 2143 | .ioclk.mclk_clk_rate = 24000000, |
| 2144 | .ioclk.vfe_clk_rate = 228570000, |
| 2145 | #ifdef CONFIG_MSM_BUS_SCALING |
| 2146 | .cam_bus_scale_table = &cam_bus_client_pdata, |
| 2147 | #endif |
| 2148 | }; |
| 2149 | #endif |
| 2150 | |
| 2151 | struct msm_camera_device_platform_data msm_camera_device_data_web_cam = { |
| 2152 | .camera_gpio_on = config_camera_on_gpios_web_cam, |
| 2153 | .camera_gpio_off = config_camera_off_gpios_web_cam, |
| 2154 | .ioext.csiphy = 0x04900000, |
| 2155 | .ioext.csisz = 0x00000400, |
| 2156 | .ioext.csiirq = CSI_1_IRQ, |
| 2157 | .ioclk.mclk_clk_rate = 24000000, |
| 2158 | .ioclk.vfe_clk_rate = 228570000, |
| 2159 | #ifdef CONFIG_MSM_BUS_SCALING |
| 2160 | .cam_bus_scale_table = &cam_bus_client_pdata, |
| 2161 | #endif |
| 2162 | }; |
| 2163 | |
| 2164 | struct resource msm_camera_resources[] = { |
| 2165 | { |
| 2166 | .start = 0x04500000, |
| 2167 | .end = 0x04500000 + SZ_1M - 1, |
| 2168 | .flags = IORESOURCE_MEM, |
| 2169 | }, |
| 2170 | { |
| 2171 | .start = VFE_IRQ, |
| 2172 | .end = VFE_IRQ, |
| 2173 | .flags = IORESOURCE_IRQ, |
| 2174 | }, |
| 2175 | }; |
| 2176 | #ifdef CONFIG_MT9E013 |
| 2177 | static struct msm_camera_sensor_platform_info mt9e013_sensor_8660_info = { |
| 2178 | .mount_angle = 0 |
| 2179 | }; |
| 2180 | |
| 2181 | static struct msm_camera_sensor_flash_data flash_mt9e013 = { |
| 2182 | .flash_type = MSM_CAMERA_FLASH_LED, |
| 2183 | .flash_src = &msm_flash_src |
| 2184 | }; |
| 2185 | |
| 2186 | static struct msm_camera_sensor_info msm_camera_sensor_mt9e013_data = { |
| 2187 | .sensor_name = "mt9e013", |
| 2188 | .sensor_reset = 106, |
| 2189 | .sensor_pwd = 85, |
| 2190 | .vcm_pwd = 1, |
| 2191 | .vcm_enable = 0, |
| 2192 | .pdata = &msm_camera_device_data, |
| 2193 | .resource = msm_camera_resources, |
| 2194 | .num_resources = ARRAY_SIZE(msm_camera_resources), |
| 2195 | .flash_data = &flash_mt9e013, |
| 2196 | .strobe_flash_data = &strobe_flash_xenon, |
| 2197 | .sensor_platform_info = &mt9e013_sensor_8660_info, |
| 2198 | .csi_if = 1 |
| 2199 | }; |
| 2200 | struct platform_device msm_camera_sensor_mt9e013 = { |
| 2201 | .name = "msm_camera_mt9e013", |
| 2202 | .dev = { |
| 2203 | .platform_data = &msm_camera_sensor_mt9e013_data, |
| 2204 | }, |
| 2205 | }; |
| 2206 | #endif |
| 2207 | |
| 2208 | #ifdef CONFIG_IMX074 |
| 2209 | static struct msm_camera_sensor_flash_data flash_imx074 = { |
| 2210 | .flash_type = MSM_CAMERA_FLASH_LED, |
| 2211 | .flash_src = &msm_flash_src |
| 2212 | }; |
| 2213 | |
| 2214 | static struct msm_camera_sensor_info msm_camera_sensor_imx074_data = { |
| 2215 | .sensor_name = "imx074", |
| 2216 | .sensor_reset = 106, |
| 2217 | .sensor_pwd = 85, |
| 2218 | .vcm_pwd = GPIO_AUX_CAM_2P7_EN, |
| 2219 | .vcm_enable = 1, |
| 2220 | .pdata = &msm_camera_device_data, |
| 2221 | .resource = msm_camera_resources, |
| 2222 | .num_resources = ARRAY_SIZE(msm_camera_resources), |
| 2223 | .flash_data = &flash_imx074, |
| 2224 | .strobe_flash_data = &strobe_flash_xenon, |
| 2225 | .sensor_platform_info = &sensor_board_info, |
| 2226 | .csi_if = 1 |
| 2227 | }; |
| 2228 | struct platform_device msm_camera_sensor_imx074 = { |
| 2229 | .name = "msm_camera_imx074", |
| 2230 | .dev = { |
| 2231 | .platform_data = &msm_camera_sensor_imx074_data, |
| 2232 | }, |
| 2233 | }; |
| 2234 | #endif |
| 2235 | #ifdef CONFIG_WEBCAM_OV9726 |
| 2236 | |
| 2237 | static struct msm_camera_sensor_platform_info ov9726_sensor_8660_info = { |
| 2238 | .mount_angle = 0 |
| 2239 | }; |
| 2240 | |
| 2241 | static struct msm_camera_sensor_flash_data flash_ov9726 = { |
| 2242 | .flash_type = MSM_CAMERA_FLASH_LED, |
| 2243 | .flash_src = &msm_flash_src |
| 2244 | }; |
| 2245 | static struct msm_camera_sensor_info msm_camera_sensor_ov9726_data = { |
| 2246 | .sensor_name = "ov9726", |
Kevin Chan | 3382c51 | 2011-07-19 21:00:45 -0700 | [diff] [blame] | 2247 | .sensor_reset_enable = 1, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2248 | .sensor_reset = GPIO_FRONT_CAM_RESET_N, |
| 2249 | .sensor_pwd = 85, |
| 2250 | .vcm_pwd = 1, |
| 2251 | .vcm_enable = 0, |
| 2252 | .pdata = &msm_camera_device_data_web_cam, |
| 2253 | .resource = msm_camera_resources, |
| 2254 | .num_resources = ARRAY_SIZE(msm_camera_resources), |
| 2255 | .flash_data = &flash_ov9726, |
| 2256 | .sensor_platform_info = &ov9726_sensor_8660_info, |
| 2257 | .csi_if = 1 |
| 2258 | }; |
| 2259 | struct platform_device msm_camera_sensor_webcam_ov9726 = { |
| 2260 | .name = "msm_camera_ov9726", |
| 2261 | .dev = { |
| 2262 | .platform_data = &msm_camera_sensor_ov9726_data, |
| 2263 | }, |
| 2264 | }; |
| 2265 | #endif |
| 2266 | #ifdef CONFIG_WEBCAM_OV7692 |
| 2267 | static struct msm_camera_sensor_flash_data flash_ov7692 = { |
| 2268 | .flash_type = MSM_CAMERA_FLASH_LED, |
| 2269 | .flash_src = &msm_flash_src |
| 2270 | }; |
| 2271 | static struct msm_camera_sensor_info msm_camera_sensor_ov7692_data = { |
| 2272 | .sensor_name = "ov7692", |
| 2273 | .sensor_reset = GPIO_WEB_CAMIF_RESET_N, |
| 2274 | .sensor_pwd = 85, |
| 2275 | .vcm_pwd = 1, |
| 2276 | .vcm_enable = 0, |
| 2277 | .pdata = &msm_camera_device_data_web_cam, |
| 2278 | .resource = msm_camera_resources, |
| 2279 | .num_resources = ARRAY_SIZE(msm_camera_resources), |
| 2280 | .flash_data = &flash_ov7692, |
| 2281 | .csi_if = 1 |
| 2282 | }; |
| 2283 | |
| 2284 | static struct platform_device msm_camera_sensor_webcam_ov7692 = { |
| 2285 | .name = "msm_camera_ov7692", |
| 2286 | .dev = { |
| 2287 | .platform_data = &msm_camera_sensor_ov7692_data, |
| 2288 | }, |
| 2289 | }; |
| 2290 | #endif |
Jilai Wang | 971f97f | 2011-07-13 14:25:25 -0400 | [diff] [blame^] | 2291 | #ifdef CONFIG_VX6953 |
| 2292 | static struct msm_camera_sensor_platform_info vx6953_sensor_8660_info = { |
| 2293 | .mount_angle = 270 |
| 2294 | }; |
| 2295 | |
| 2296 | static struct msm_camera_sensor_flash_data flash_vx6953 = { |
| 2297 | .flash_type = MSM_CAMERA_FLASH_NONE, |
| 2298 | .flash_src = &msm_flash_src |
| 2299 | }; |
| 2300 | |
| 2301 | static struct msm_camera_sensor_info msm_camera_sensor_vx6953_data = { |
| 2302 | .sensor_name = "vx6953", |
| 2303 | .sensor_reset = 63, |
| 2304 | .sensor_pwd = 63, |
| 2305 | .vcm_pwd = GPIO_AUX_CAM_2P7_EN, |
| 2306 | .vcm_enable = 1, |
| 2307 | .pdata = &msm_camera_device_data, |
| 2308 | .resource = msm_camera_resources, |
| 2309 | .num_resources = ARRAY_SIZE(msm_camera_resources), |
| 2310 | .flash_data = &flash_vx6953, |
| 2311 | .sensor_platform_info = &vx6953_sensor_8660_info, |
| 2312 | .csi_if = 1 |
| 2313 | }; |
| 2314 | struct platform_device msm_camera_sensor_vx6953 = { |
| 2315 | .name = "msm_camera_vx6953", |
| 2316 | .dev = { |
| 2317 | .platform_data = &msm_camera_sensor_vx6953_data, |
| 2318 | }, |
| 2319 | }; |
| 2320 | #endif |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2321 | #ifdef CONFIG_QS_S5K4E1 |
| 2322 | |
| 2323 | static char eeprom_data[864]; |
| 2324 | static struct msm_camera_sensor_flash_data flash_qs_s5k4e1 = { |
| 2325 | .flash_type = MSM_CAMERA_FLASH_LED, |
| 2326 | .flash_src = &msm_flash_src |
| 2327 | }; |
| 2328 | |
| 2329 | static struct msm_camera_sensor_info msm_camera_sensor_qs_s5k4e1_data = { |
| 2330 | .sensor_name = "qs_s5k4e1", |
| 2331 | .sensor_reset = 106, |
| 2332 | .sensor_pwd = 85, |
| 2333 | .vcm_pwd = 1, |
| 2334 | .vcm_enable = 0, |
| 2335 | .pdata = &msm_camera_device_data_qs_cam, |
| 2336 | .resource = msm_camera_resources, |
| 2337 | .num_resources = ARRAY_SIZE(msm_camera_resources), |
| 2338 | .flash_data = &flash_qs_s5k4e1, |
| 2339 | .strobe_flash_data = &strobe_flash_xenon, |
| 2340 | .csi_if = 1, |
| 2341 | .eeprom_data = eeprom_data, |
| 2342 | }; |
| 2343 | struct platform_device msm_camera_sensor_qs_s5k4e1 = { |
| 2344 | .name = "msm_camera_qs_s5k4e1", |
| 2345 | .dev = { |
| 2346 | .platform_data = &msm_camera_sensor_qs_s5k4e1_data, |
| 2347 | }, |
| 2348 | }; |
| 2349 | #endif |
| 2350 | static struct i2c_board_info msm_camera_boardinfo[] __initdata = { |
| 2351 | #ifdef CONFIG_MT9E013 |
| 2352 | { |
| 2353 | I2C_BOARD_INFO("mt9e013", 0x6C >> 2), |
| 2354 | }, |
| 2355 | #endif |
| 2356 | #ifdef CONFIG_IMX074 |
| 2357 | { |
| 2358 | I2C_BOARD_INFO("imx074", 0x1A), |
| 2359 | }, |
| 2360 | #endif |
| 2361 | #ifdef CONFIG_WEBCAM_OV7692 |
| 2362 | { |
| 2363 | I2C_BOARD_INFO("ov7692", 0x78), |
| 2364 | }, |
| 2365 | #endif |
| 2366 | #ifdef CONFIG_WEBCAM_OV9726 |
| 2367 | { |
| 2368 | I2C_BOARD_INFO("ov9726", 0x10), |
| 2369 | }, |
| 2370 | #endif |
| 2371 | #ifdef CONFIG_QS_S5K4E1 |
| 2372 | { |
| 2373 | I2C_BOARD_INFO("qs_s5k4e1", 0x20), |
| 2374 | }, |
| 2375 | #endif |
| 2376 | }; |
Jilai Wang | 971f97f | 2011-07-13 14:25:25 -0400 | [diff] [blame^] | 2377 | |
| 2378 | static struct i2c_board_info msm_camera_dragon_boardinfo[] __initdata = { |
| 2379 | #ifdef CONFIG_VX6953 |
| 2380 | { |
| 2381 | I2C_BOARD_INFO("vx6953", 0x20), |
| 2382 | }, |
| 2383 | #endif |
| 2384 | }; |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2385 | #endif |
| 2386 | |
| 2387 | #ifdef CONFIG_MSM_GEMINI |
| 2388 | static struct resource msm_gemini_resources[] = { |
| 2389 | { |
| 2390 | .start = 0x04600000, |
| 2391 | .end = 0x04600000 + SZ_1M - 1, |
| 2392 | .flags = IORESOURCE_MEM, |
| 2393 | }, |
| 2394 | { |
| 2395 | .start = INT_JPEG, |
| 2396 | .end = INT_JPEG, |
| 2397 | .flags = IORESOURCE_IRQ, |
| 2398 | }, |
| 2399 | }; |
| 2400 | |
| 2401 | static struct platform_device msm_gemini_device = { |
| 2402 | .name = "msm_gemini", |
| 2403 | .resource = msm_gemini_resources, |
| 2404 | .num_resources = ARRAY_SIZE(msm_gemini_resources), |
| 2405 | }; |
| 2406 | #endif |
| 2407 | |
| 2408 | #ifdef CONFIG_I2C_QUP |
| 2409 | static void gsbi_qup_i2c_gpio_config(int adap_id, int config_type) |
| 2410 | { |
| 2411 | } |
| 2412 | |
| 2413 | static struct msm_i2c_platform_data msm_gsbi3_qup_i2c_pdata = { |
| 2414 | .clk_freq = 384000, |
| 2415 | .src_clk_rate = 24000000, |
| 2416 | .clk = "gsbi_qup_clk", |
| 2417 | .pclk = "gsbi_pclk", |
| 2418 | .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config, |
| 2419 | }; |
| 2420 | |
| 2421 | static struct msm_i2c_platform_data msm_gsbi4_qup_i2c_pdata = { |
| 2422 | .clk_freq = 100000, |
| 2423 | .src_clk_rate = 24000000, |
| 2424 | .clk = "gsbi_qup_clk", |
| 2425 | .pclk = "gsbi_pclk", |
| 2426 | .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config, |
| 2427 | }; |
| 2428 | |
| 2429 | static struct msm_i2c_platform_data msm_gsbi7_qup_i2c_pdata = { |
| 2430 | .clk_freq = 100000, |
| 2431 | .src_clk_rate = 24000000, |
| 2432 | .clk = "gsbi_qup_clk", |
| 2433 | .pclk = "gsbi_pclk", |
| 2434 | .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config, |
| 2435 | }; |
| 2436 | |
| 2437 | static struct msm_i2c_platform_data msm_gsbi8_qup_i2c_pdata = { |
| 2438 | .clk_freq = 100000, |
| 2439 | .src_clk_rate = 24000000, |
| 2440 | .clk = "gsbi_qup_clk", |
| 2441 | .pclk = "gsbi_pclk", |
| 2442 | .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config, |
| 2443 | }; |
| 2444 | |
| 2445 | static struct msm_i2c_platform_data msm_gsbi9_qup_i2c_pdata = { |
| 2446 | .clk_freq = 100000, |
| 2447 | .src_clk_rate = 24000000, |
| 2448 | .clk = "gsbi_qup_clk", |
| 2449 | .pclk = "gsbi_pclk", |
| 2450 | .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config, |
| 2451 | }; |
| 2452 | |
| 2453 | static struct msm_i2c_platform_data msm_gsbi12_qup_i2c_pdata = { |
| 2454 | .clk_freq = 100000, |
| 2455 | .src_clk_rate = 24000000, |
| 2456 | .clk = "gsbi_qup_clk", |
| 2457 | .pclk = "gsbi_pclk", |
| 2458 | .use_gsbi_shared_mode = 1, |
| 2459 | .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config, |
| 2460 | }; |
| 2461 | #endif |
| 2462 | |
| 2463 | #if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE) |
| 2464 | static struct msm_spi_platform_data msm_gsbi1_qup_spi_pdata = { |
| 2465 | .max_clock_speed = 24000000, |
| 2466 | }; |
| 2467 | |
| 2468 | static struct msm_spi_platform_data msm_gsbi10_qup_spi_pdata = { |
| 2469 | .max_clock_speed = 24000000, |
| 2470 | }; |
| 2471 | #endif |
| 2472 | |
| 2473 | #ifdef CONFIG_I2C_SSBI |
| 2474 | /* PMIC SSBI */ |
| 2475 | static struct msm_i2c_ssbi_platform_data msm_ssbi1_pdata = { |
| 2476 | .controller_type = MSM_SBI_CTRL_PMIC_ARBITER, |
| 2477 | }; |
| 2478 | |
| 2479 | /* PMIC SSBI */ |
| 2480 | static struct msm_i2c_ssbi_platform_data msm_ssbi2_pdata = { |
| 2481 | .controller_type = MSM_SBI_CTRL_PMIC_ARBITER, |
| 2482 | }; |
| 2483 | |
| 2484 | /* CODEC/TSSC SSBI */ |
| 2485 | static struct msm_i2c_ssbi_platform_data msm_ssbi3_pdata = { |
| 2486 | .controller_type = MSM_SBI_CTRL_SSBI, |
| 2487 | }; |
| 2488 | #endif |
| 2489 | |
| 2490 | #ifdef CONFIG_BATTERY_MSM |
| 2491 | /* Use basic value for fake MSM battery */ |
| 2492 | static struct msm_psy_batt_pdata msm_psy_batt_data = { |
| 2493 | .avail_chg_sources = AC_CHG, |
| 2494 | }; |
| 2495 | |
| 2496 | static struct platform_device msm_batt_device = { |
| 2497 | .name = "msm-battery", |
| 2498 | .id = -1, |
| 2499 | .dev.platform_data = &msm_psy_batt_data, |
| 2500 | }; |
| 2501 | #endif |
| 2502 | |
| 2503 | #ifdef CONFIG_FB_MSM_LCDC_DSUB |
| 2504 | /* VGA = 1440 x 900 x 4(bpp) x 2(pages) |
| 2505 | prim = 1024 x 600 x 4(bpp) x 2(pages) |
| 2506 | This is the difference. */ |
| 2507 | #define MSM_FB_DSUB_PMEM_ADDER (0xA32000-0x4B0000) |
| 2508 | #else |
| 2509 | #define MSM_FB_DSUB_PMEM_ADDER (0) |
| 2510 | #endif |
| 2511 | |
| 2512 | /* Sensors DSPS platform data */ |
| 2513 | #ifdef CONFIG_MSM_DSPS |
| 2514 | |
| 2515 | static struct dsps_gpio_info dsps_surf_gpios[] = { |
| 2516 | { |
| 2517 | .name = "compass_rst_n", |
| 2518 | .num = GPIO_COMPASS_RST_N, |
| 2519 | .on_val = 1, /* device not in reset */ |
| 2520 | .off_val = 0, /* device in reset */ |
| 2521 | }, |
| 2522 | { |
| 2523 | .name = "gpio_r_altimeter_reset_n", |
| 2524 | .num = GPIO_R_ALTIMETER_RESET_N, |
| 2525 | .on_val = 1, /* device not in reset */ |
| 2526 | .off_val = 0, /* device in reset */ |
| 2527 | } |
| 2528 | }; |
| 2529 | |
| 2530 | static struct dsps_gpio_info dsps_fluid_gpios[] = { |
| 2531 | { |
| 2532 | .name = "gpio_n_altimeter_reset_n", |
| 2533 | .num = GPIO_N_ALTIMETER_RESET_N, |
| 2534 | .on_val = 1, /* device not in reset */ |
| 2535 | .off_val = 0, /* device in reset */ |
| 2536 | } |
| 2537 | }; |
| 2538 | |
| 2539 | static void __init msm8x60_init_dsps(void) |
| 2540 | { |
| 2541 | struct msm_dsps_platform_data *pdata = |
| 2542 | msm_dsps_device.dev.platform_data; |
| 2543 | /* |
| 2544 | * On Fluid the Compass sensor Chip-Select (CS) is directly connected |
| 2545 | * to the power supply and not controled via GPIOs. Fluid uses a |
| 2546 | * different IO-Expender (north) than used on surf/ffa. |
| 2547 | */ |
| 2548 | if (machine_is_msm8x60_fluid()) { |
| 2549 | /* fluid has different firmware, gpios */ |
| 2550 | peripheral_dsps.name = DSPS_PIL_FLUID_NAME; |
| 2551 | pdata->pil_name = DSPS_PIL_FLUID_NAME; |
| 2552 | pdata->gpios = dsps_fluid_gpios; |
| 2553 | pdata->gpios_num = ARRAY_SIZE(dsps_fluid_gpios); |
| 2554 | } else { |
| 2555 | peripheral_dsps.name = DSPS_PIL_GENERIC_NAME; |
| 2556 | pdata->pil_name = DSPS_PIL_GENERIC_NAME; |
| 2557 | pdata->gpios = dsps_surf_gpios; |
| 2558 | pdata->gpios_num = ARRAY_SIZE(dsps_surf_gpios); |
| 2559 | } |
| 2560 | |
| 2561 | msm_pil_add_device(&peripheral_dsps); |
| 2562 | |
| 2563 | platform_device_register(&msm_dsps_device); |
| 2564 | } |
| 2565 | #endif /* CONFIG_MSM_DSPS */ |
| 2566 | |
| 2567 | #ifdef CONFIG_FB_MSM_TRIPLE_BUFFER |
| 2568 | /* prim = 1024 x 600 x 4(bpp) x 3(pages) */ |
| 2569 | #define MSM_FB_PRIM_BUF_SIZE 0x708000 |
| 2570 | #else |
| 2571 | /* prim = 1024 x 600 x 4(bpp) x 2(pages) */ |
| 2572 | #define MSM_FB_PRIM_BUF_SIZE 0x4B0000 |
| 2573 | #endif |
| 2574 | |
| 2575 | |
| 2576 | #ifdef CONFIG_FB_MSM_OVERLAY_WRITEBACK |
| 2577 | /* 960 x 540 x 3 x 2 */ |
| 2578 | #define MSM_FB_WRITEBACK_SIZE 0x300000 |
| 2579 | #else |
| 2580 | #define MSM_FB_WRITEBACK_SIZE 0 |
| 2581 | #endif |
| 2582 | |
| 2583 | #ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL |
| 2584 | /* prim = 1024 x 600 x 4(bpp) x 2(pages) |
| 2585 | * hdmi = 1920 x 1080 x 2(bpp) x 1(page) |
| 2586 | * Note: must be multiple of 4096 */ |
| 2587 | #define MSM_FB_SIZE roundup(MSM_FB_PRIM_BUF_SIZE + 0x3F4800 + \ |
| 2588 | MSM_FB_WRITEBACK_SIZE + MSM_FB_DSUB_PMEM_ADDER, 4096) |
| 2589 | #elif defined(CONFIG_FB_MSM_TVOUT) |
| 2590 | /* prim = 1024 x 600 x 4(bpp) x 2(pages) |
| 2591 | * tvout = 720 x 576 x 2(bpp) x 2(pages) |
| 2592 | * Note: must be multiple of 4096 */ |
| 2593 | #define MSM_FB_SIZE roundup(MSM_FB_PRIM_BUF_SIZE + 0x195000 + \ |
| 2594 | MSM_FB_WRITEBACK_SIZE + MSM_FB_DSUB_PMEM_ADDER, 4096) |
| 2595 | #else /* CONFIG_FB_MSM_HDMI_MSM_PANEL */ |
| 2596 | #define MSM_FB_SIZE roundup(MSM_FB_PRIM_BUF_SIZE + \ |
| 2597 | MSM_FB_WRITEBACK_SIZE + MSM_FB_DSUB_PMEM_ADDER, 4096) |
| 2598 | #endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */ |
| 2599 | |
| 2600 | #define MSM_PMEM_SF_SIZE 0x4000000 /* 64 Mbytes */ |
| 2601 | |
| 2602 | #define MSM_PMEM_KERNEL_EBI1_SIZE 0x600000 |
| 2603 | #define MSM_PMEM_ADSP_SIZE 0x2000000 |
| 2604 | #define MSM_PMEM_AUDIO_SIZE 0x279000 |
| 2605 | |
| 2606 | #define MSM_SMI_BASE 0x38000000 |
| 2607 | #define MSM_SMI_SIZE 0x4000000 |
| 2608 | |
| 2609 | #define KERNEL_SMI_BASE (MSM_SMI_BASE) |
| 2610 | #define KERNEL_SMI_SIZE 0x300000 |
| 2611 | |
| 2612 | #define USER_SMI_BASE (KERNEL_SMI_BASE + KERNEL_SMI_SIZE) |
| 2613 | #define USER_SMI_SIZE (MSM_SMI_SIZE - KERNEL_SMI_SIZE) |
| 2614 | #define MSM_PMEM_SMIPOOL_SIZE USER_SMI_SIZE |
| 2615 | |
| 2616 | static unsigned fb_size; |
| 2617 | static int __init fb_size_setup(char *p) |
| 2618 | { |
| 2619 | fb_size = memparse(p, NULL); |
| 2620 | return 0; |
| 2621 | } |
| 2622 | early_param("fb_size", fb_size_setup); |
| 2623 | |
| 2624 | static unsigned pmem_kernel_ebi1_size = MSM_PMEM_KERNEL_EBI1_SIZE; |
| 2625 | static int __init pmem_kernel_ebi1_size_setup(char *p) |
| 2626 | { |
| 2627 | pmem_kernel_ebi1_size = memparse(p, NULL); |
| 2628 | return 0; |
| 2629 | } |
| 2630 | early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup); |
| 2631 | |
| 2632 | #ifdef CONFIG_ANDROID_PMEM |
| 2633 | static unsigned pmem_sf_size = MSM_PMEM_SF_SIZE; |
| 2634 | static int __init pmem_sf_size_setup(char *p) |
| 2635 | { |
| 2636 | pmem_sf_size = memparse(p, NULL); |
| 2637 | return 0; |
| 2638 | } |
| 2639 | early_param("pmem_sf_size", pmem_sf_size_setup); |
| 2640 | |
| 2641 | static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE; |
| 2642 | |
| 2643 | static int __init pmem_adsp_size_setup(char *p) |
| 2644 | { |
| 2645 | pmem_adsp_size = memparse(p, NULL); |
| 2646 | return 0; |
| 2647 | } |
| 2648 | early_param("pmem_adsp_size", pmem_adsp_size_setup); |
| 2649 | |
| 2650 | static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE; |
| 2651 | |
| 2652 | static int __init pmem_audio_size_setup(char *p) |
| 2653 | { |
| 2654 | pmem_audio_size = memparse(p, NULL); |
| 2655 | return 0; |
| 2656 | } |
| 2657 | early_param("pmem_audio_size", pmem_audio_size_setup); |
| 2658 | #endif |
| 2659 | |
| 2660 | static struct resource msm_fb_resources[] = { |
| 2661 | { |
| 2662 | .flags = IORESOURCE_DMA, |
| 2663 | } |
| 2664 | }; |
| 2665 | |
| 2666 | #ifdef CONFIG_FB_MSM_LCDC_AUTO_DETECT |
| 2667 | static int msm_fb_detect_panel(const char *name) |
| 2668 | { |
| 2669 | if (machine_is_msm8x60_fluid()) { |
| 2670 | uint32_t soc_platform_version = socinfo_get_platform_version(); |
| 2671 | if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3) { |
| 2672 | #ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT |
| 2673 | if (!strncmp(name, LCDC_SAMSUNG_OLED_PANEL_NAME, |
| 2674 | strlen(LCDC_SAMSUNG_OLED_PANEL_NAME))) |
| 2675 | return 0; |
| 2676 | #endif |
| 2677 | } else { /*P3 and up use AUO panel */ |
| 2678 | #ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA |
| 2679 | if (!strncmp(name, LCDC_AUO_PANEL_NAME, |
| 2680 | strlen(LCDC_AUO_PANEL_NAME))) |
| 2681 | return 0; |
| 2682 | #endif |
| 2683 | } |
| 2684 | if (!strncmp(name, LCDC_SAMSUNG_WSVGA_PANEL_NAME, |
| 2685 | strlen(LCDC_SAMSUNG_WSVGA_PANEL_NAME))) |
| 2686 | return -ENODEV; |
| 2687 | } else { |
| 2688 | if (!strncmp(name, LCDC_SAMSUNG_WSVGA_PANEL_NAME, |
| 2689 | strlen(LCDC_SAMSUNG_WSVGA_PANEL_NAME))) |
| 2690 | return 0; |
| 2691 | if (!strncmp(name, LCDC_SAMSUNG_OLED_PANEL_NAME, |
| 2692 | strlen(LCDC_SAMSUNG_OLED_PANEL_NAME))) |
| 2693 | return -ENODEV; |
| 2694 | } |
| 2695 | pr_warning("%s: not supported '%s'", __func__, name); |
| 2696 | return -ENODEV; |
| 2697 | } |
| 2698 | |
| 2699 | static struct msm_fb_platform_data msm_fb_pdata = { |
| 2700 | .detect_client = msm_fb_detect_panel, |
| 2701 | }; |
| 2702 | #endif /* CONFIG_FB_MSM_LCDC_AUTO_DETECT */ |
| 2703 | |
| 2704 | static struct platform_device msm_fb_device = { |
| 2705 | .name = "msm_fb", |
| 2706 | .id = 0, |
| 2707 | .num_resources = ARRAY_SIZE(msm_fb_resources), |
| 2708 | .resource = msm_fb_resources, |
| 2709 | #ifdef CONFIG_FB_MSM_LCDC_AUTO_DETECT |
| 2710 | .dev.platform_data = &msm_fb_pdata, |
| 2711 | #endif /* CONFIG_FB_MSM_LCDC_AUTO_DETECT */ |
| 2712 | }; |
| 2713 | |
| 2714 | #ifdef CONFIG_ANDROID_PMEM |
| 2715 | static struct android_pmem_platform_data android_pmem_pdata = { |
| 2716 | .name = "pmem", |
| 2717 | .allocator_type = PMEM_ALLOCATORTYPE_ALLORNOTHING, |
| 2718 | .cached = 1, |
| 2719 | .memory_type = MEMTYPE_EBI1, |
| 2720 | }; |
| 2721 | |
| 2722 | static struct platform_device android_pmem_device = { |
| 2723 | .name = "android_pmem", |
| 2724 | .id = 0, |
| 2725 | .dev = {.platform_data = &android_pmem_pdata}, |
| 2726 | }; |
| 2727 | |
| 2728 | static struct android_pmem_platform_data android_pmem_adsp_pdata = { |
| 2729 | .name = "pmem_adsp", |
| 2730 | .allocator_type = PMEM_ALLOCATORTYPE_BITMAP, |
| 2731 | .cached = 0, |
| 2732 | .memory_type = MEMTYPE_EBI1, |
| 2733 | }; |
| 2734 | |
| 2735 | static struct platform_device android_pmem_adsp_device = { |
| 2736 | .name = "android_pmem", |
| 2737 | .id = 2, |
| 2738 | .dev = { .platform_data = &android_pmem_adsp_pdata }, |
| 2739 | }; |
| 2740 | |
| 2741 | static struct android_pmem_platform_data android_pmem_audio_pdata = { |
| 2742 | .name = "pmem_audio", |
| 2743 | .allocator_type = PMEM_ALLOCATORTYPE_BITMAP, |
| 2744 | .cached = 0, |
| 2745 | .memory_type = MEMTYPE_EBI1, |
| 2746 | }; |
| 2747 | |
| 2748 | static struct platform_device android_pmem_audio_device = { |
| 2749 | .name = "android_pmem", |
| 2750 | .id = 4, |
| 2751 | .dev = { .platform_data = &android_pmem_audio_pdata }, |
| 2752 | }; |
| 2753 | |
Laura Abbott | 1e36a02 | 2011-06-22 17:08:13 -0700 | [diff] [blame] | 2754 | #define PMEM_BUS_WIDTH(_bw) \ |
| 2755 | { \ |
| 2756 | .vectors = &(struct msm_bus_vectors){ \ |
| 2757 | .src = MSM_BUS_MASTER_AMPSS_M0, \ |
| 2758 | .dst = MSM_BUS_SLAVE_SMI, \ |
| 2759 | .ib = (_bw), \ |
| 2760 | .ab = 0, \ |
| 2761 | }, \ |
| 2762 | .num_paths = 1, \ |
| 2763 | } |
| 2764 | static struct msm_bus_paths pmem_smi_table[] = { |
| 2765 | [0] = PMEM_BUS_WIDTH(0), /* Off */ |
| 2766 | [1] = PMEM_BUS_WIDTH(1), /* On */ |
| 2767 | }; |
| 2768 | |
| 2769 | static struct msm_bus_scale_pdata smi_client_pdata = { |
| 2770 | .usecase = pmem_smi_table, |
| 2771 | .num_usecases = ARRAY_SIZE(pmem_smi_table), |
| 2772 | .name = "pmem_smi", |
| 2773 | }; |
| 2774 | |
| 2775 | void pmem_request_smi_region(void *data) |
| 2776 | { |
| 2777 | int bus_id = (int) data; |
| 2778 | |
| 2779 | msm_bus_scale_client_update_request(bus_id, 1); |
| 2780 | } |
| 2781 | |
| 2782 | void pmem_release_smi_region(void *data) |
| 2783 | { |
| 2784 | int bus_id = (int) data; |
| 2785 | |
| 2786 | msm_bus_scale_client_update_request(bus_id, 0); |
| 2787 | } |
| 2788 | |
| 2789 | void *pmem_setup_smi_region(void) |
| 2790 | { |
| 2791 | return (void *)msm_bus_scale_register_client(&smi_client_pdata); |
| 2792 | } |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2793 | static struct android_pmem_platform_data android_pmem_smipool_pdata = { |
| 2794 | .name = "pmem_smipool", |
| 2795 | .allocator_type = PMEM_ALLOCATORTYPE_BITMAP, |
| 2796 | .cached = 0, |
| 2797 | .memory_type = MEMTYPE_SMI, |
Laura Abbott | 1e36a02 | 2011-06-22 17:08:13 -0700 | [diff] [blame] | 2798 | .request_region = pmem_request_smi_region, |
| 2799 | .release_region = pmem_release_smi_region, |
| 2800 | .setup_region = pmem_setup_smi_region, |
| 2801 | .map_on_demand = 1, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2802 | }; |
| 2803 | static struct platform_device android_pmem_smipool_device = { |
| 2804 | .name = "android_pmem", |
| 2805 | .id = 7, |
| 2806 | .dev = { .platform_data = &android_pmem_smipool_pdata }, |
| 2807 | }; |
| 2808 | |
| 2809 | #endif |
| 2810 | |
| 2811 | #define GPIO_DONGLE_PWR_EN 258 |
| 2812 | static void setup_display_power(void); |
| 2813 | static int lcdc_vga_enabled; |
| 2814 | static int vga_enable_request(int enable) |
| 2815 | { |
| 2816 | if (enable) |
| 2817 | lcdc_vga_enabled = 1; |
| 2818 | else |
| 2819 | lcdc_vga_enabled = 0; |
| 2820 | setup_display_power(); |
| 2821 | |
| 2822 | return 0; |
| 2823 | } |
| 2824 | |
| 2825 | #define GPIO_BACKLIGHT_PWM0 0 |
| 2826 | #define GPIO_BACKLIGHT_PWM1 1 |
| 2827 | |
| 2828 | static int pmic_backlight_gpio[2] |
| 2829 | = { GPIO_BACKLIGHT_PWM0, GPIO_BACKLIGHT_PWM1 }; |
| 2830 | static struct msm_panel_common_pdata lcdc_samsung_panel_data = { |
| 2831 | .gpio_num = pmic_backlight_gpio, /* two LPG CHANNELS for backlight */ |
| 2832 | .vga_switch = vga_enable_request, |
| 2833 | }; |
| 2834 | |
| 2835 | static struct platform_device lcdc_samsung_panel_device = { |
| 2836 | .name = LCDC_SAMSUNG_WSVGA_PANEL_NAME, |
| 2837 | .id = 0, |
| 2838 | .dev = { |
| 2839 | .platform_data = &lcdc_samsung_panel_data, |
| 2840 | } |
| 2841 | }; |
| 2842 | #if (!defined(CONFIG_SPI_QUP)) && \ |
| 2843 | (defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \ |
| 2844 | defined(CONFIG_FB_MSM_LCDC_AUO_WVGA)) |
| 2845 | |
| 2846 | static int lcdc_spi_gpio_array_num[] = { |
| 2847 | LCDC_SPI_GPIO_CLK, |
| 2848 | LCDC_SPI_GPIO_CS, |
| 2849 | LCDC_SPI_GPIO_MOSI, |
| 2850 | }; |
| 2851 | |
| 2852 | static uint32_t lcdc_spi_gpio_config_data[] = { |
| 2853 | GPIO_CFG(LCDC_SPI_GPIO_CLK, 0, |
| 2854 | GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), |
| 2855 | GPIO_CFG(LCDC_SPI_GPIO_CS, 0, |
| 2856 | GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), |
| 2857 | GPIO_CFG(LCDC_SPI_GPIO_MOSI, 0, |
| 2858 | GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), |
| 2859 | }; |
| 2860 | |
| 2861 | static void lcdc_config_spi_gpios(int enable) |
| 2862 | { |
| 2863 | int n; |
| 2864 | for (n = 0; n < ARRAY_SIZE(lcdc_spi_gpio_config_data); ++n) |
| 2865 | gpio_tlmm_config(lcdc_spi_gpio_config_data[n], 0); |
| 2866 | } |
| 2867 | #endif |
| 2868 | |
| 2869 | #ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT |
| 2870 | #ifdef CONFIG_SPI_QUP |
| 2871 | static struct spi_board_info lcdc_samsung_spi_board_info[] __initdata = { |
| 2872 | { |
| 2873 | .modalias = LCDC_SAMSUNG_SPI_DEVICE_NAME, |
| 2874 | .mode = SPI_MODE_3, |
| 2875 | .bus_num = 1, |
| 2876 | .chip_select = 0, |
| 2877 | .max_speed_hz = 10800000, |
| 2878 | } |
| 2879 | }; |
| 2880 | #endif /* CONFIG_SPI_QUP */ |
| 2881 | |
| 2882 | static struct msm_panel_common_pdata lcdc_samsung_oled_panel_data = { |
| 2883 | #ifndef CONFIG_SPI_QUP |
| 2884 | .panel_config_gpio = lcdc_config_spi_gpios, |
| 2885 | .gpio_num = lcdc_spi_gpio_array_num, |
| 2886 | #endif |
| 2887 | }; |
| 2888 | |
| 2889 | static struct platform_device lcdc_samsung_oled_panel_device = { |
| 2890 | .name = LCDC_SAMSUNG_OLED_PANEL_NAME, |
| 2891 | .id = 0, |
| 2892 | .dev.platform_data = &lcdc_samsung_oled_panel_data, |
| 2893 | }; |
| 2894 | #endif /*CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT */ |
| 2895 | |
| 2896 | #ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA |
| 2897 | #ifdef CONFIG_SPI_QUP |
| 2898 | static struct spi_board_info lcdc_auo_spi_board_info[] __initdata = { |
| 2899 | { |
| 2900 | .modalias = LCDC_AUO_SPI_DEVICE_NAME, |
| 2901 | .mode = SPI_MODE_3, |
| 2902 | .bus_num = 1, |
| 2903 | .chip_select = 0, |
| 2904 | .max_speed_hz = 10800000, |
| 2905 | } |
| 2906 | }; |
| 2907 | #endif |
| 2908 | |
| 2909 | static struct msm_panel_common_pdata lcdc_auo_wvga_panel_data = { |
| 2910 | #ifndef CONFIG_SPI_QUP |
| 2911 | .panel_config_gpio = lcdc_config_spi_gpios, |
| 2912 | .gpio_num = lcdc_spi_gpio_array_num, |
| 2913 | #endif |
| 2914 | }; |
| 2915 | |
| 2916 | static struct platform_device lcdc_auo_wvga_panel_device = { |
| 2917 | .name = LCDC_AUO_PANEL_NAME, |
| 2918 | .id = 0, |
| 2919 | .dev.platform_data = &lcdc_auo_wvga_panel_data, |
| 2920 | }; |
| 2921 | #endif /*CONFIG_FB_MSM_LCDC_AUO_WVGA*/ |
| 2922 | |
| 2923 | #ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL |
| 2924 | static struct resource hdmi_msm_resources[] = { |
| 2925 | { |
| 2926 | .name = "hdmi_msm_qfprom_addr", |
| 2927 | .start = 0x00700000, |
| 2928 | .end = 0x007060FF, |
| 2929 | .flags = IORESOURCE_MEM, |
| 2930 | }, |
| 2931 | { |
| 2932 | .name = "hdmi_msm_hdmi_addr", |
| 2933 | .start = 0x04A00000, |
| 2934 | .end = 0x04A00FFF, |
| 2935 | .flags = IORESOURCE_MEM, |
| 2936 | }, |
| 2937 | { |
| 2938 | .name = "hdmi_msm_irq", |
| 2939 | .start = HDMI_IRQ, |
| 2940 | .end = HDMI_IRQ, |
| 2941 | .flags = IORESOURCE_IRQ, |
| 2942 | }, |
| 2943 | }; |
| 2944 | |
| 2945 | static int hdmi_enable_5v(int on); |
| 2946 | static int hdmi_core_power(int on, int show); |
| 2947 | static int hdmi_cec_power(int on); |
| 2948 | |
| 2949 | static struct msm_hdmi_platform_data hdmi_msm_data = { |
| 2950 | .irq = HDMI_IRQ, |
| 2951 | .enable_5v = hdmi_enable_5v, |
| 2952 | .core_power = hdmi_core_power, |
| 2953 | .cec_power = hdmi_cec_power, |
| 2954 | }; |
| 2955 | |
| 2956 | static struct platform_device hdmi_msm_device = { |
| 2957 | .name = "hdmi_msm", |
| 2958 | .id = 0, |
| 2959 | .num_resources = ARRAY_SIZE(hdmi_msm_resources), |
| 2960 | .resource = hdmi_msm_resources, |
| 2961 | .dev.platform_data = &hdmi_msm_data, |
| 2962 | }; |
| 2963 | #endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */ |
| 2964 | |
| 2965 | #ifdef CONFIG_FB_MSM_MIPI_DSI |
| 2966 | static struct platform_device mipi_dsi_toshiba_panel_device = { |
| 2967 | .name = "mipi_toshiba", |
| 2968 | .id = 0, |
| 2969 | }; |
| 2970 | |
| 2971 | #define FPGA_3D_GPIO_CONFIG_ADDR 0x1D00017A |
| 2972 | |
Nagamalleswararao Ganji | eac5dfa | 2011-07-23 17:31:16 -0700 | [diff] [blame] | 2973 | static struct mipi_dsi_panel_platform_data novatek_pdata = { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2974 | .fpga_3d_config_addr = FPGA_3D_GPIO_CONFIG_ADDR, |
| 2975 | }; |
| 2976 | |
| 2977 | static struct platform_device mipi_dsi_novatek_panel_device = { |
| 2978 | .name = "mipi_novatek", |
| 2979 | .id = 0, |
| 2980 | .dev = { |
| 2981 | .platform_data = &novatek_pdata, |
| 2982 | } |
| 2983 | }; |
| 2984 | #endif |
| 2985 | |
| 2986 | static void __init msm8x60_allocate_memory_regions(void) |
| 2987 | { |
| 2988 | void *addr; |
| 2989 | unsigned long size; |
| 2990 | |
| 2991 | size = MSM_FB_SIZE; |
| 2992 | addr = alloc_bootmem_align(size, 0x1000); |
| 2993 | msm_fb_resources[0].start = __pa(addr); |
| 2994 | msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1; |
| 2995 | pr_info("allocating %lu bytes at %p (%lx physical) for fb\n", |
| 2996 | size, addr, __pa(addr)); |
| 2997 | |
| 2998 | } |
| 2999 | |
| 3000 | #if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \ |
| 3001 | defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE) |
| 3002 | /*virtual key support */ |
| 3003 | static ssize_t tma300_vkeys_show(struct kobject *kobj, |
| 3004 | struct kobj_attribute *attr, char *buf) |
| 3005 | { |
| 3006 | return sprintf(buf, |
| 3007 | __stringify(EV_KEY) ":" __stringify(KEY_BACK) ":60:900:90:120" |
| 3008 | ":" __stringify(EV_KEY) ":" __stringify(KEY_MENU) ":180:900:90:120" |
| 3009 | ":" __stringify(EV_KEY) ":" __stringify(KEY_HOME) ":300:900:90:120" |
| 3010 | ":" __stringify(EV_KEY) ":" __stringify(KEY_SEARCH) ":420:900:90:120" |
| 3011 | "\n"); |
| 3012 | } |
| 3013 | |
| 3014 | static struct kobj_attribute tma300_vkeys_attr = { |
| 3015 | .attr = { |
| 3016 | .mode = S_IRUGO, |
| 3017 | }, |
| 3018 | .show = &tma300_vkeys_show, |
| 3019 | }; |
| 3020 | |
| 3021 | static struct attribute *tma300_properties_attrs[] = { |
| 3022 | &tma300_vkeys_attr.attr, |
| 3023 | NULL |
| 3024 | }; |
| 3025 | |
| 3026 | static struct attribute_group tma300_properties_attr_group = { |
| 3027 | .attrs = tma300_properties_attrs, |
| 3028 | }; |
| 3029 | |
| 3030 | static struct kobject *properties_kobj; |
| 3031 | |
| 3032 | |
| 3033 | |
| 3034 | #define CYTTSP_TS_GPIO_IRQ 61 |
| 3035 | static int cyttsp_platform_init(struct i2c_client *client) |
| 3036 | { |
| 3037 | int rc = -EINVAL; |
| 3038 | struct regulator *pm8058_l5 = NULL, *pm8058_s3; |
| 3039 | |
| 3040 | if (machine_is_msm8x60_fluid()) { |
| 3041 | pm8058_l5 = regulator_get(NULL, "8058_l5"); |
| 3042 | if (IS_ERR(pm8058_l5)) { |
| 3043 | pr_err("%s: regulator get of 8058_l5 failed (%ld)\n", |
| 3044 | __func__, PTR_ERR(pm8058_l5)); |
| 3045 | rc = PTR_ERR(pm8058_l5); |
| 3046 | return rc; |
| 3047 | } |
| 3048 | rc = regulator_set_voltage(pm8058_l5, 2850000, 2850000); |
| 3049 | if (rc) { |
| 3050 | pr_err("%s: regulator_set_voltage of 8058_l5 failed(%d)\n", |
| 3051 | __func__, rc); |
| 3052 | goto reg_l5_put; |
| 3053 | } |
| 3054 | |
| 3055 | rc = regulator_enable(pm8058_l5); |
| 3056 | if (rc) { |
| 3057 | pr_err("%s: regulator_enable of 8058_l5 failed(%d)\n", |
| 3058 | __func__, rc); |
| 3059 | goto reg_l5_put; |
| 3060 | } |
| 3061 | } |
| 3062 | /* vote for s3 to enable i2c communication lines */ |
| 3063 | pm8058_s3 = regulator_get(NULL, "8058_s3"); |
| 3064 | if (IS_ERR(pm8058_s3)) { |
| 3065 | pr_err("%s: regulator get of 8058_s3 failed (%ld)\n", |
| 3066 | __func__, PTR_ERR(pm8058_s3)); |
| 3067 | rc = PTR_ERR(pm8058_s3); |
| 3068 | goto reg_l5_disable; |
| 3069 | } |
| 3070 | |
| 3071 | rc = regulator_set_voltage(pm8058_s3, 1800000, 1800000); |
| 3072 | if (rc) { |
| 3073 | pr_err("%s: regulator_set_voltage() = %d\n", |
| 3074 | __func__, rc); |
| 3075 | goto reg_s3_put; |
| 3076 | } |
| 3077 | |
| 3078 | rc = regulator_enable(pm8058_s3); |
| 3079 | if (rc) { |
| 3080 | pr_err("%s: regulator_enable of 8058_l5 failed(%d)\n", |
| 3081 | __func__, rc); |
| 3082 | goto reg_s3_put; |
| 3083 | } |
| 3084 | |
| 3085 | /* wait for vregs to stabilize */ |
| 3086 | usleep_range(10000, 10000); |
| 3087 | |
| 3088 | /* check this device active by reading first byte/register */ |
| 3089 | rc = i2c_smbus_read_byte_data(client, 0x01); |
| 3090 | if (rc < 0) { |
| 3091 | pr_err("%s: i2c sanity check failed\n", __func__); |
| 3092 | goto reg_s3_disable; |
| 3093 | } |
| 3094 | |
| 3095 | /* virtual keys */ |
| 3096 | if (machine_is_msm8x60_fluid()) { |
| 3097 | tma300_vkeys_attr.attr.name = "virtualkeys.cyttsp-i2c"; |
| 3098 | properties_kobj = kobject_create_and_add("board_properties", |
| 3099 | NULL); |
| 3100 | if (properties_kobj) |
| 3101 | rc = sysfs_create_group(properties_kobj, |
| 3102 | &tma300_properties_attr_group); |
| 3103 | if (!properties_kobj || rc) |
| 3104 | pr_err("%s: failed to create board_properties\n", |
| 3105 | __func__); |
| 3106 | } |
| 3107 | return CY_OK; |
| 3108 | |
| 3109 | reg_s3_disable: |
| 3110 | regulator_disable(pm8058_s3); |
| 3111 | reg_s3_put: |
| 3112 | regulator_put(pm8058_s3); |
| 3113 | reg_l5_disable: |
| 3114 | if (machine_is_msm8x60_fluid()) |
| 3115 | regulator_disable(pm8058_l5); |
| 3116 | reg_l5_put: |
| 3117 | if (machine_is_msm8x60_fluid()) |
| 3118 | regulator_put(pm8058_l5); |
| 3119 | return rc; |
| 3120 | } |
| 3121 | |
| 3122 | static int cyttsp_platform_resume(struct i2c_client *client) |
| 3123 | { |
| 3124 | /* add any special code to strobe a wakeup pin or chip reset */ |
| 3125 | msleep(10); |
| 3126 | |
| 3127 | return CY_OK; |
| 3128 | } |
| 3129 | |
| 3130 | static struct cyttsp_platform_data cyttsp_fluid_pdata = { |
| 3131 | .flags = 0x04, |
| 3132 | .gen = CY_GEN3, /* or */ |
| 3133 | .use_st = CY_USE_ST, |
| 3134 | .use_mt = CY_USE_MT, |
| 3135 | .use_hndshk = CY_SEND_HNDSHK, |
| 3136 | .use_trk_id = CY_USE_TRACKING_ID, |
Anirudh Ghayal | 1518777 | 2011-06-22 17:39:41 +0530 | [diff] [blame] | 3137 | .use_sleep = CY_USE_DEEP_SLEEP_SEL | CY_USE_LOW_POWER_SEL, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 3138 | .use_gestures = CY_USE_GESTURES, |
| 3139 | /* activate up to 4 groups |
| 3140 | * and set active distance |
| 3141 | */ |
| 3142 | .gest_set = CY_GEST_GRP1 | CY_GEST_GRP2 | |
| 3143 | CY_GEST_GRP3 | CY_GEST_GRP4 | |
| 3144 | CY_ACT_DIST, |
| 3145 | /* change act_intrvl to customize the Active power state |
| 3146 | * scanning/processing refresh interval for Operating mode |
| 3147 | */ |
| 3148 | .act_intrvl = CY_ACT_INTRVL_DFLT, |
| 3149 | /* change tch_tmout to customize the touch timeout for the |
| 3150 | * Active power state for Operating mode |
| 3151 | */ |
| 3152 | .tch_tmout = CY_TCH_TMOUT_DFLT, |
| 3153 | /* change lp_intrvl to customize the Low Power power state |
| 3154 | * scanning/processing refresh interval for Operating mode |
| 3155 | */ |
| 3156 | .lp_intrvl = CY_LP_INTRVL_DFLT, |
| 3157 | .sleep_gpio = -1, |
| 3158 | .resout_gpio = -1, |
| 3159 | .irq_gpio = CYTTSP_TS_GPIO_IRQ, |
| 3160 | .resume = cyttsp_platform_resume, |
| 3161 | .init = cyttsp_platform_init, |
| 3162 | }; |
| 3163 | |
| 3164 | static struct cyttsp_platform_data cyttsp_tmg240_pdata = { |
| 3165 | .panel_maxx = 1083, |
| 3166 | .panel_maxy = 659, |
| 3167 | .disp_minx = 30, |
| 3168 | .disp_maxx = 1053, |
| 3169 | .disp_miny = 30, |
| 3170 | .disp_maxy = 629, |
| 3171 | .correct_fw_ver = 8, |
| 3172 | .fw_fname = "cyttsp_8660_ffa.hex", |
| 3173 | .flags = 0x00, |
| 3174 | .gen = CY_GEN2, /* or */ |
| 3175 | .use_st = CY_USE_ST, |
| 3176 | .use_mt = CY_USE_MT, |
| 3177 | .use_hndshk = CY_SEND_HNDSHK, |
| 3178 | .use_trk_id = CY_USE_TRACKING_ID, |
Anirudh Ghayal | 1518777 | 2011-06-22 17:39:41 +0530 | [diff] [blame] | 3179 | .use_sleep = CY_USE_DEEP_SLEEP_SEL | CY_USE_LOW_POWER_SEL, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 3180 | .use_gestures = CY_USE_GESTURES, |
| 3181 | /* activate up to 4 groups |
| 3182 | * and set active distance |
| 3183 | */ |
| 3184 | .gest_set = CY_GEST_GRP1 | CY_GEST_GRP2 | |
| 3185 | CY_GEST_GRP3 | CY_GEST_GRP4 | |
| 3186 | CY_ACT_DIST, |
| 3187 | /* change act_intrvl to customize the Active power state |
| 3188 | * scanning/processing refresh interval for Operating mode |
| 3189 | */ |
| 3190 | .act_intrvl = CY_ACT_INTRVL_DFLT, |
| 3191 | /* change tch_tmout to customize the touch timeout for the |
| 3192 | * Active power state for Operating mode |
| 3193 | */ |
| 3194 | .tch_tmout = CY_TCH_TMOUT_DFLT, |
| 3195 | /* change lp_intrvl to customize the Low Power power state |
| 3196 | * scanning/processing refresh interval for Operating mode |
| 3197 | */ |
| 3198 | .lp_intrvl = CY_LP_INTRVL_DFLT, |
| 3199 | .sleep_gpio = -1, |
| 3200 | .resout_gpio = -1, |
| 3201 | .irq_gpio = CYTTSP_TS_GPIO_IRQ, |
| 3202 | .resume = cyttsp_platform_resume, |
| 3203 | .init = cyttsp_platform_init, |
| 3204 | }; |
| 3205 | static void cyttsp_set_params(void) |
| 3206 | { |
| 3207 | if (SOCINFO_VERSION_MAJOR(socinfo_get_platform_version()) < 3) { |
| 3208 | cyttsp_fluid_pdata.fw_fname = "cyttsp_8660_fluid_p2.hex"; |
| 3209 | cyttsp_fluid_pdata.panel_maxx = 539; |
| 3210 | cyttsp_fluid_pdata.panel_maxy = 994; |
| 3211 | cyttsp_fluid_pdata.disp_minx = 30; |
| 3212 | cyttsp_fluid_pdata.disp_maxx = 509; |
| 3213 | cyttsp_fluid_pdata.disp_miny = 60; |
| 3214 | cyttsp_fluid_pdata.disp_maxy = 859; |
| 3215 | cyttsp_fluid_pdata.correct_fw_ver = 4; |
| 3216 | } else { |
| 3217 | cyttsp_fluid_pdata.fw_fname = "cyttsp_8660_fluid_p3.hex"; |
| 3218 | cyttsp_fluid_pdata.panel_maxx = 550; |
| 3219 | cyttsp_fluid_pdata.panel_maxy = 1013; |
| 3220 | cyttsp_fluid_pdata.disp_minx = 35; |
| 3221 | cyttsp_fluid_pdata.disp_maxx = 515; |
| 3222 | cyttsp_fluid_pdata.disp_miny = 69; |
| 3223 | cyttsp_fluid_pdata.disp_maxy = 869; |
| 3224 | cyttsp_fluid_pdata.correct_fw_ver = 5; |
| 3225 | } |
| 3226 | |
| 3227 | } |
| 3228 | |
| 3229 | static struct i2c_board_info cyttsp_fluid_info[] __initdata = { |
| 3230 | { |
| 3231 | I2C_BOARD_INFO(CY_I2C_NAME, 0x24), |
| 3232 | .platform_data = &cyttsp_fluid_pdata, |
| 3233 | #ifndef CY_USE_TIMER |
| 3234 | .irq = MSM_GPIO_TO_INT(CYTTSP_TS_GPIO_IRQ), |
| 3235 | #endif /* CY_USE_TIMER */ |
| 3236 | }, |
| 3237 | }; |
| 3238 | |
| 3239 | static struct i2c_board_info cyttsp_ffa_info[] __initdata = { |
| 3240 | { |
| 3241 | I2C_BOARD_INFO(CY_I2C_NAME, 0x3b), |
| 3242 | .platform_data = &cyttsp_tmg240_pdata, |
| 3243 | #ifndef CY_USE_TIMER |
| 3244 | .irq = MSM_GPIO_TO_INT(CYTTSP_TS_GPIO_IRQ), |
| 3245 | #endif /* CY_USE_TIMER */ |
| 3246 | }, |
| 3247 | }; |
| 3248 | #endif |
| 3249 | |
| 3250 | static struct regulator *vreg_tmg200; |
| 3251 | |
| 3252 | #define TS_PEN_IRQ_GPIO 61 |
| 3253 | static int tmg200_power(int vreg_on) |
| 3254 | { |
| 3255 | int rc = -EINVAL; |
| 3256 | |
| 3257 | if (!vreg_tmg200) { |
| 3258 | printk(KERN_ERR "%s: regulator 8058_s3 not found (%d)\n", |
| 3259 | __func__, rc); |
| 3260 | return rc; |
| 3261 | } |
| 3262 | |
| 3263 | rc = vreg_on ? regulator_enable(vreg_tmg200) : |
| 3264 | regulator_disable(vreg_tmg200); |
| 3265 | if (rc < 0) |
| 3266 | printk(KERN_ERR "%s: vreg 8058_s3 %s failed (%d)\n", |
| 3267 | __func__, vreg_on ? "enable" : "disable", rc); |
| 3268 | |
| 3269 | /* wait for vregs to stabilize */ |
Amy Maloche | 12b5d4e | 2011-08-03 15:42:28 -0700 | [diff] [blame] | 3270 | msleep(20); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 3271 | |
| 3272 | return rc; |
| 3273 | } |
| 3274 | |
| 3275 | static int tmg200_dev_setup(bool enable) |
| 3276 | { |
| 3277 | int rc; |
| 3278 | |
| 3279 | if (enable) { |
| 3280 | vreg_tmg200 = regulator_get(NULL, "8058_s3"); |
| 3281 | if (IS_ERR(vreg_tmg200)) { |
| 3282 | pr_err("%s: regulator get of 8058_s3 failed (%ld)\n", |
| 3283 | __func__, PTR_ERR(vreg_tmg200)); |
| 3284 | rc = PTR_ERR(vreg_tmg200); |
| 3285 | return rc; |
| 3286 | } |
| 3287 | |
| 3288 | rc = regulator_set_voltage(vreg_tmg200, 1800000, 1800000); |
| 3289 | if (rc) { |
| 3290 | pr_err("%s: regulator_set_voltage() = %d\n", |
| 3291 | __func__, rc); |
| 3292 | goto reg_put; |
| 3293 | } |
| 3294 | } else { |
| 3295 | /* put voltage sources */ |
| 3296 | regulator_put(vreg_tmg200); |
| 3297 | } |
| 3298 | return 0; |
| 3299 | reg_put: |
| 3300 | regulator_put(vreg_tmg200); |
| 3301 | return rc; |
| 3302 | } |
| 3303 | |
| 3304 | static struct cy8c_ts_platform_data cy8ctmg200_pdata = { |
| 3305 | .ts_name = "msm_tmg200_ts", |
| 3306 | .dis_min_x = 0, |
| 3307 | .dis_max_x = 1023, |
| 3308 | .dis_min_y = 0, |
| 3309 | .dis_max_y = 599, |
| 3310 | .min_tid = 0, |
| 3311 | .max_tid = 255, |
| 3312 | .min_touch = 0, |
| 3313 | .max_touch = 255, |
| 3314 | .min_width = 0, |
| 3315 | .max_width = 255, |
| 3316 | .power_on = tmg200_power, |
| 3317 | .dev_setup = tmg200_dev_setup, |
| 3318 | .nfingers = 2, |
| 3319 | .irq_gpio = TS_PEN_IRQ_GPIO, |
| 3320 | .resout_gpio = GPIO_CAP_TS_RESOUT_N, |
| 3321 | }; |
| 3322 | |
| 3323 | static struct i2c_board_info cy8ctmg200_board_info[] = { |
| 3324 | { |
| 3325 | I2C_BOARD_INFO("cy8ctmg200", 0x2), |
| 3326 | .platform_data = &cy8ctmg200_pdata, |
| 3327 | } |
| 3328 | }; |
| 3329 | |
| 3330 | #ifdef CONFIG_SERIAL_MSM_HS |
| 3331 | static int configure_uart_gpios(int on) |
| 3332 | { |
| 3333 | int ret = 0, i; |
| 3334 | int uart_gpios[] = {53, 54, 55, 56}; |
| 3335 | for (i = 0; i < ARRAY_SIZE(uart_gpios); i++) { |
| 3336 | if (on) { |
| 3337 | ret = msm_gpiomux_get(uart_gpios[i]); |
| 3338 | if (unlikely(ret)) |
| 3339 | break; |
| 3340 | } else { |
| 3341 | ret = msm_gpiomux_put(uart_gpios[i]); |
| 3342 | if (unlikely(ret)) |
| 3343 | return ret; |
| 3344 | } |
| 3345 | } |
| 3346 | if (ret) |
| 3347 | for (; i >= 0; i--) |
| 3348 | msm_gpiomux_put(uart_gpios[i]); |
| 3349 | return ret; |
| 3350 | } |
| 3351 | static struct msm_serial_hs_platform_data msm_uart_dm1_pdata = { |
| 3352 | .inject_rx_on_wakeup = 1, |
| 3353 | .rx_to_inject = 0xFD, |
| 3354 | .gpio_config = configure_uart_gpios, |
| 3355 | }; |
| 3356 | #endif |
| 3357 | |
| 3358 | |
| 3359 | #if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE) |
| 3360 | |
| 3361 | static struct gpio_led gpio_exp_leds_config[] = { |
| 3362 | { |
| 3363 | .name = "left_led1:green", |
| 3364 | .gpio = GPIO_LEFT_LED_1, |
| 3365 | .active_low = 1, |
| 3366 | .retain_state_suspended = 0, |
| 3367 | .default_state = LEDS_GPIO_DEFSTATE_OFF, |
| 3368 | }, |
| 3369 | { |
| 3370 | .name = "left_led2:red", |
| 3371 | .gpio = GPIO_LEFT_LED_2, |
| 3372 | .active_low = 1, |
| 3373 | .retain_state_suspended = 0, |
| 3374 | .default_state = LEDS_GPIO_DEFSTATE_OFF, |
| 3375 | }, |
| 3376 | { |
| 3377 | .name = "left_led3:green", |
| 3378 | .gpio = GPIO_LEFT_LED_3, |
| 3379 | .active_low = 1, |
| 3380 | .retain_state_suspended = 0, |
| 3381 | .default_state = LEDS_GPIO_DEFSTATE_OFF, |
| 3382 | }, |
| 3383 | { |
| 3384 | .name = "wlan_led:orange", |
| 3385 | .gpio = GPIO_LEFT_LED_WLAN, |
| 3386 | .active_low = 1, |
| 3387 | .retain_state_suspended = 0, |
| 3388 | .default_state = LEDS_GPIO_DEFSTATE_OFF, |
| 3389 | }, |
| 3390 | { |
| 3391 | .name = "left_led5:green", |
| 3392 | .gpio = GPIO_LEFT_LED_5, |
| 3393 | .active_low = 1, |
| 3394 | .retain_state_suspended = 0, |
| 3395 | .default_state = LEDS_GPIO_DEFSTATE_OFF, |
| 3396 | }, |
| 3397 | { |
| 3398 | .name = "right_led1:green", |
| 3399 | .gpio = GPIO_RIGHT_LED_1, |
| 3400 | .active_low = 1, |
| 3401 | .retain_state_suspended = 0, |
| 3402 | .default_state = LEDS_GPIO_DEFSTATE_OFF, |
| 3403 | }, |
| 3404 | { |
| 3405 | .name = "right_led2:red", |
| 3406 | .gpio = GPIO_RIGHT_LED_2, |
| 3407 | .active_low = 1, |
| 3408 | .retain_state_suspended = 0, |
| 3409 | .default_state = LEDS_GPIO_DEFSTATE_OFF, |
| 3410 | }, |
| 3411 | { |
| 3412 | .name = "right_led3:green", |
| 3413 | .gpio = GPIO_RIGHT_LED_3, |
| 3414 | .active_low = 1, |
| 3415 | .retain_state_suspended = 0, |
| 3416 | .default_state = LEDS_GPIO_DEFSTATE_OFF, |
| 3417 | }, |
| 3418 | { |
| 3419 | .name = "bt_led:blue", |
| 3420 | .gpio = GPIO_RIGHT_LED_BT, |
| 3421 | .active_low = 1, |
| 3422 | .retain_state_suspended = 0, |
| 3423 | .default_state = LEDS_GPIO_DEFSTATE_OFF, |
| 3424 | }, |
| 3425 | { |
| 3426 | .name = "right_led5:green", |
| 3427 | .gpio = GPIO_RIGHT_LED_5, |
| 3428 | .active_low = 1, |
| 3429 | .retain_state_suspended = 0, |
| 3430 | .default_state = LEDS_GPIO_DEFSTATE_OFF, |
| 3431 | }, |
| 3432 | }; |
| 3433 | |
| 3434 | static struct gpio_led_platform_data gpio_leds_pdata = { |
| 3435 | .num_leds = ARRAY_SIZE(gpio_exp_leds_config), |
| 3436 | .leds = gpio_exp_leds_config, |
| 3437 | }; |
| 3438 | |
| 3439 | static struct platform_device gpio_leds = { |
| 3440 | .name = "leds-gpio", |
| 3441 | .id = -1, |
| 3442 | .dev = { |
| 3443 | .platform_data = &gpio_leds_pdata, |
| 3444 | }, |
| 3445 | }; |
| 3446 | |
| 3447 | static struct gpio_led fluid_gpio_leds[] = { |
| 3448 | { |
| 3449 | .name = "dual_led:green", |
| 3450 | .gpio = GPIO_LED1_GREEN_N, |
| 3451 | .default_state = LEDS_GPIO_DEFSTATE_OFF, |
| 3452 | .active_low = 1, |
| 3453 | .retain_state_suspended = 0, |
| 3454 | }, |
| 3455 | { |
| 3456 | .name = "dual_led:red", |
| 3457 | .gpio = GPIO_LED2_RED_N, |
| 3458 | .default_state = LEDS_GPIO_DEFSTATE_OFF, |
| 3459 | .active_low = 1, |
| 3460 | .retain_state_suspended = 0, |
| 3461 | }, |
| 3462 | }; |
| 3463 | |
| 3464 | static struct gpio_led_platform_data gpio_led_pdata = { |
| 3465 | .leds = fluid_gpio_leds, |
| 3466 | .num_leds = ARRAY_SIZE(fluid_gpio_leds), |
| 3467 | }; |
| 3468 | |
| 3469 | static struct platform_device fluid_leds_gpio = { |
| 3470 | .name = "leds-gpio", |
| 3471 | .id = -1, |
| 3472 | .dev = { |
| 3473 | .platform_data = &gpio_led_pdata, |
| 3474 | }, |
| 3475 | }; |
| 3476 | |
| 3477 | #endif |
| 3478 | |
| 3479 | #if defined(CONFIG_MSM_RPM_LOG) || defined(CONFIG_MSM_RPM_LOG_MODULE) |
| 3480 | |
| 3481 | static struct msm_rpm_log_platform_data msm_rpm_log_pdata = { |
| 3482 | .phys_addr_base = 0x00106000, |
| 3483 | .reg_offsets = { |
| 3484 | [MSM_RPM_LOG_PAGE_INDICES] = 0x00000C80, |
| 3485 | [MSM_RPM_LOG_PAGE_BUFFER] = 0x00000CA0, |
| 3486 | }, |
| 3487 | .phys_size = SZ_8K, |
| 3488 | .log_len = 4096, /* log's buffer length in bytes */ |
| 3489 | .log_len_mask = (4096 >> 2) - 1, /* length mask in units of u32 */ |
| 3490 | }; |
| 3491 | |
| 3492 | static struct platform_device msm_rpm_log_device = { |
| 3493 | .name = "msm_rpm_log", |
| 3494 | .id = -1, |
| 3495 | .dev = { |
| 3496 | .platform_data = &msm_rpm_log_pdata, |
| 3497 | }, |
| 3498 | }; |
| 3499 | #endif |
| 3500 | |
| 3501 | #ifdef CONFIG_BATTERY_MSM8X60 |
| 3502 | static struct msm_charger_platform_data msm_charger_data = { |
| 3503 | .safety_time = 180, |
| 3504 | .update_time = 1, |
| 3505 | .max_voltage = 4200, |
| 3506 | .min_voltage = 3200, |
| 3507 | }; |
| 3508 | |
| 3509 | static struct platform_device msm_charger_device = { |
| 3510 | .name = "msm-charger", |
| 3511 | .id = -1, |
| 3512 | .dev = { |
| 3513 | .platform_data = &msm_charger_data, |
| 3514 | } |
| 3515 | }; |
| 3516 | #endif |
| 3517 | |
| 3518 | /* |
| 3519 | * Consumer specific regulator names: |
| 3520 | * regulator name consumer dev_name |
| 3521 | */ |
| 3522 | static struct regulator_consumer_supply vreg_consumers_PM8058_L0[] = { |
| 3523 | REGULATOR_SUPPLY("8058_l0", NULL), |
| 3524 | }; |
| 3525 | static struct regulator_consumer_supply vreg_consumers_PM8058_L1[] = { |
| 3526 | REGULATOR_SUPPLY("8058_l1", NULL), |
| 3527 | }; |
| 3528 | static struct regulator_consumer_supply vreg_consumers_PM8058_L2[] = { |
| 3529 | REGULATOR_SUPPLY("8058_l2", NULL), |
| 3530 | }; |
| 3531 | static struct regulator_consumer_supply vreg_consumers_PM8058_L3[] = { |
| 3532 | REGULATOR_SUPPLY("8058_l3", NULL), |
| 3533 | }; |
| 3534 | static struct regulator_consumer_supply vreg_consumers_PM8058_L4[] = { |
| 3535 | REGULATOR_SUPPLY("8058_l4", NULL), |
| 3536 | }; |
| 3537 | static struct regulator_consumer_supply vreg_consumers_PM8058_L5[] = { |
| 3538 | REGULATOR_SUPPLY("8058_l5", NULL), |
| 3539 | }; |
| 3540 | static struct regulator_consumer_supply vreg_consumers_PM8058_L6[] = { |
| 3541 | REGULATOR_SUPPLY("8058_l6", NULL), |
| 3542 | }; |
| 3543 | static struct regulator_consumer_supply vreg_consumers_PM8058_L7[] = { |
| 3544 | REGULATOR_SUPPLY("8058_l7", NULL), |
| 3545 | }; |
| 3546 | static struct regulator_consumer_supply vreg_consumers_PM8058_L8[] = { |
| 3547 | REGULATOR_SUPPLY("8058_l8", NULL), |
| 3548 | }; |
| 3549 | static struct regulator_consumer_supply vreg_consumers_PM8058_L9[] = { |
| 3550 | REGULATOR_SUPPLY("8058_l9", NULL), |
| 3551 | }; |
| 3552 | static struct regulator_consumer_supply vreg_consumers_PM8058_L10[] = { |
| 3553 | REGULATOR_SUPPLY("8058_l10", NULL), |
| 3554 | }; |
| 3555 | static struct regulator_consumer_supply vreg_consumers_PM8058_L11[] = { |
| 3556 | REGULATOR_SUPPLY("8058_l11", NULL), |
| 3557 | }; |
| 3558 | static struct regulator_consumer_supply vreg_consumers_PM8058_L12[] = { |
| 3559 | REGULATOR_SUPPLY("8058_l12", NULL), |
| 3560 | }; |
| 3561 | static struct regulator_consumer_supply vreg_consumers_PM8058_L13[] = { |
| 3562 | REGULATOR_SUPPLY("8058_l13", NULL), |
| 3563 | }; |
| 3564 | static struct regulator_consumer_supply vreg_consumers_PM8058_L14[] = { |
| 3565 | REGULATOR_SUPPLY("8058_l14", NULL), |
| 3566 | }; |
| 3567 | static struct regulator_consumer_supply vreg_consumers_PM8058_L15[] = { |
| 3568 | REGULATOR_SUPPLY("8058_l15", NULL), |
| 3569 | }; |
| 3570 | static struct regulator_consumer_supply vreg_consumers_PM8058_L16[] = { |
| 3571 | REGULATOR_SUPPLY("8058_l16", NULL), |
| 3572 | }; |
| 3573 | static struct regulator_consumer_supply vreg_consumers_PM8058_L17[] = { |
| 3574 | REGULATOR_SUPPLY("8058_l17", NULL), |
| 3575 | }; |
| 3576 | static struct regulator_consumer_supply vreg_consumers_PM8058_L18[] = { |
| 3577 | REGULATOR_SUPPLY("8058_l18", NULL), |
| 3578 | }; |
| 3579 | static struct regulator_consumer_supply vreg_consumers_PM8058_L19[] = { |
| 3580 | REGULATOR_SUPPLY("8058_l19", NULL), |
| 3581 | }; |
| 3582 | static struct regulator_consumer_supply vreg_consumers_PM8058_L20[] = { |
| 3583 | REGULATOR_SUPPLY("8058_l20", NULL), |
| 3584 | }; |
| 3585 | static struct regulator_consumer_supply vreg_consumers_PM8058_L21[] = { |
| 3586 | REGULATOR_SUPPLY("8058_l21", NULL), |
| 3587 | }; |
| 3588 | static struct regulator_consumer_supply vreg_consumers_PM8058_L22[] = { |
| 3589 | REGULATOR_SUPPLY("8058_l22", NULL), |
| 3590 | }; |
| 3591 | static struct regulator_consumer_supply vreg_consumers_PM8058_L23[] = { |
| 3592 | REGULATOR_SUPPLY("8058_l23", NULL), |
| 3593 | }; |
| 3594 | static struct regulator_consumer_supply vreg_consumers_PM8058_L24[] = { |
| 3595 | REGULATOR_SUPPLY("8058_l24", NULL), |
| 3596 | }; |
| 3597 | static struct regulator_consumer_supply vreg_consumers_PM8058_L25[] = { |
| 3598 | REGULATOR_SUPPLY("8058_l25", NULL), |
| 3599 | }; |
| 3600 | static struct regulator_consumer_supply vreg_consumers_PM8058_S0[] = { |
| 3601 | REGULATOR_SUPPLY("8058_s0", NULL), |
| 3602 | }; |
| 3603 | static struct regulator_consumer_supply vreg_consumers_PM8058_S1[] = { |
| 3604 | REGULATOR_SUPPLY("8058_s1", NULL), |
| 3605 | }; |
| 3606 | static struct regulator_consumer_supply vreg_consumers_PM8058_S2[] = { |
| 3607 | REGULATOR_SUPPLY("8058_s2", NULL), |
| 3608 | }; |
| 3609 | static struct regulator_consumer_supply vreg_consumers_PM8058_S3[] = { |
| 3610 | REGULATOR_SUPPLY("8058_s3", NULL), |
| 3611 | }; |
| 3612 | static struct regulator_consumer_supply vreg_consumers_PM8058_S4[] = { |
| 3613 | REGULATOR_SUPPLY("8058_s4", NULL), |
| 3614 | }; |
| 3615 | static struct regulator_consumer_supply vreg_consumers_PM8058_LVS0[] = { |
| 3616 | REGULATOR_SUPPLY("8058_lvs0", NULL), |
| 3617 | }; |
| 3618 | static struct regulator_consumer_supply vreg_consumers_PM8058_LVS1[] = { |
| 3619 | REGULATOR_SUPPLY("8058_lvs1", NULL), |
| 3620 | }; |
| 3621 | static struct regulator_consumer_supply vreg_consumers_PM8058_NCP[] = { |
| 3622 | REGULATOR_SUPPLY("8058_ncp", NULL), |
| 3623 | }; |
| 3624 | |
| 3625 | static struct regulator_consumer_supply vreg_consumers_PM8901_L0[] = { |
| 3626 | REGULATOR_SUPPLY("8901_l0", NULL), |
| 3627 | }; |
| 3628 | static struct regulator_consumer_supply vreg_consumers_PM8901_L1[] = { |
| 3629 | REGULATOR_SUPPLY("8901_l1", NULL), |
| 3630 | }; |
| 3631 | static struct regulator_consumer_supply vreg_consumers_PM8901_L2[] = { |
| 3632 | REGULATOR_SUPPLY("8901_l2", NULL), |
| 3633 | }; |
| 3634 | static struct regulator_consumer_supply vreg_consumers_PM8901_L3[] = { |
| 3635 | REGULATOR_SUPPLY("8901_l3", NULL), |
| 3636 | }; |
| 3637 | static struct regulator_consumer_supply vreg_consumers_PM8901_L4[] = { |
| 3638 | REGULATOR_SUPPLY("8901_l4", NULL), |
| 3639 | }; |
| 3640 | static struct regulator_consumer_supply vreg_consumers_PM8901_L5[] = { |
| 3641 | REGULATOR_SUPPLY("8901_l5", NULL), |
| 3642 | }; |
| 3643 | static struct regulator_consumer_supply vreg_consumers_PM8901_L6[] = { |
| 3644 | REGULATOR_SUPPLY("8901_l6", NULL), |
| 3645 | }; |
| 3646 | static struct regulator_consumer_supply vreg_consumers_PM8901_S2[] = { |
| 3647 | REGULATOR_SUPPLY("8901_s2", NULL), |
| 3648 | }; |
| 3649 | static struct regulator_consumer_supply vreg_consumers_PM8901_S3[] = { |
| 3650 | REGULATOR_SUPPLY("8901_s3", NULL), |
| 3651 | }; |
| 3652 | static struct regulator_consumer_supply vreg_consumers_PM8901_S4[] = { |
| 3653 | REGULATOR_SUPPLY("8901_s4", NULL), |
| 3654 | }; |
| 3655 | static struct regulator_consumer_supply vreg_consumers_PM8901_LVS0[] = { |
| 3656 | REGULATOR_SUPPLY("8901_lvs0", NULL), |
| 3657 | }; |
| 3658 | static struct regulator_consumer_supply vreg_consumers_PM8901_LVS1[] = { |
| 3659 | REGULATOR_SUPPLY("8901_lvs1", NULL), |
| 3660 | }; |
| 3661 | static struct regulator_consumer_supply vreg_consumers_PM8901_LVS2[] = { |
| 3662 | REGULATOR_SUPPLY("8901_lvs2", NULL), |
| 3663 | }; |
| 3664 | static struct regulator_consumer_supply vreg_consumers_PM8901_LVS3[] = { |
| 3665 | REGULATOR_SUPPLY("8901_lvs3", NULL), |
| 3666 | }; |
| 3667 | static struct regulator_consumer_supply vreg_consumers_PM8901_MVS0[] = { |
| 3668 | REGULATOR_SUPPLY("8901_mvs0", NULL), |
| 3669 | }; |
| 3670 | |
| 3671 | #define RPM_VREG_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, \ |
| 3672 | _default_uV, _peak_uA, _avg_uA, _pull_down, _pin_ctrl, \ |
| 3673 | _freq, _pin_fn, _rpm_mode, _state, _sleep_selectable, \ |
| 3674 | _always_on) \ |
| 3675 | [RPM_VREG_ID_##_id] = { \ |
| 3676 | .init_data = { \ |
| 3677 | .constraints = { \ |
| 3678 | .valid_modes_mask = _modes, \ |
| 3679 | .valid_ops_mask = _ops, \ |
| 3680 | .min_uV = _min_uV, \ |
| 3681 | .max_uV = _max_uV, \ |
| 3682 | .input_uV = _min_uV, \ |
| 3683 | .apply_uV = _apply_uV, \ |
| 3684 | .always_on = _always_on, \ |
| 3685 | }, \ |
| 3686 | .consumer_supplies = vreg_consumers_##_id, \ |
| 3687 | .num_consumer_supplies = \ |
| 3688 | ARRAY_SIZE(vreg_consumers_##_id), \ |
| 3689 | }, \ |
| 3690 | .default_uV = _default_uV, \ |
| 3691 | .peak_uA = _peak_uA, \ |
| 3692 | .avg_uA = _avg_uA, \ |
| 3693 | .pull_down_enable = _pull_down, \ |
| 3694 | .pin_ctrl = _pin_ctrl, \ |
| 3695 | .freq = _freq, \ |
| 3696 | .pin_fn = _pin_fn, \ |
| 3697 | .mode = _rpm_mode, \ |
| 3698 | .state = _state, \ |
| 3699 | .sleep_selectable = _sleep_selectable, \ |
| 3700 | } |
| 3701 | |
| 3702 | /* |
| 3703 | * The default LPM/HPM state of an RPM controlled regulator can be controlled |
| 3704 | * via the peak_uA value specified in the table below. If the value is less |
| 3705 | * than the high power min threshold for the regulator, then the regulator will |
| 3706 | * be set to LPM. Otherwise, it will be set to HPM. |
| 3707 | * |
| 3708 | * This value can be further overridden by specifying an initial mode via |
| 3709 | * .init_data.constraints.initial_mode. |
| 3710 | */ |
| 3711 | |
| 3712 | #define RPM_VREG_INIT_LDO(_id, _always_on, _pd, _sleep_selectable, _min_uV, \ |
| 3713 | _max_uV, _init_peak_uA, _pin_ctrl) \ |
| 3714 | RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_FAST | \ |
| 3715 | REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE | \ |
| 3716 | REGULATOR_MODE_STANDBY, REGULATOR_CHANGE_VOLTAGE | \ |
| 3717 | REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \ |
| 3718 | REGULATOR_CHANGE_DRMS, 0, _min_uV, _init_peak_uA, \ |
| 3719 | _init_peak_uA, _pd, _pin_ctrl, RPM_VREG_FREQ_NONE, \ |
| 3720 | RPM_VREG_PIN_FN_ENABLE, RPM_VREG_MODE_NONE, \ |
| 3721 | RPM_VREG_STATE_OFF, _sleep_selectable, _always_on) |
| 3722 | |
| 3723 | #define RPM_VREG_INIT_LDO_PF(_id, _always_on, _pd, _sleep_selectable, _min_uV, \ |
| 3724 | _max_uV, _init_peak_uA, _pin_ctrl, _pin_fn) \ |
| 3725 | RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_FAST | \ |
| 3726 | REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE | \ |
| 3727 | REGULATOR_MODE_STANDBY, REGULATOR_CHANGE_VOLTAGE | \ |
| 3728 | REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \ |
| 3729 | REGULATOR_CHANGE_DRMS, 0, _min_uV, _init_peak_uA, \ |
| 3730 | _init_peak_uA, _pd, _pin_ctrl, RPM_VREG_FREQ_NONE, \ |
| 3731 | _pin_fn, RPM_VREG_MODE_NONE, RPM_VREG_STATE_OFF, \ |
| 3732 | _sleep_selectable, _always_on) |
| 3733 | |
| 3734 | #define RPM_VREG_INIT_SMPS(_id, _always_on, _pd, _sleep_selectable, _min_uV, \ |
| 3735 | _max_uV, _init_peak_uA, _pin_ctrl, _freq) \ |
| 3736 | RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_FAST | \ |
| 3737 | REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE | \ |
| 3738 | REGULATOR_MODE_STANDBY, REGULATOR_CHANGE_VOLTAGE | \ |
| 3739 | REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \ |
| 3740 | REGULATOR_CHANGE_DRMS, 0, _min_uV, _init_peak_uA, \ |
| 3741 | _init_peak_uA, _pd, _pin_ctrl, _freq, \ |
| 3742 | RPM_VREG_PIN_FN_ENABLE, RPM_VREG_MODE_NONE, \ |
| 3743 | RPM_VREG_STATE_OFF, _sleep_selectable, _always_on) |
| 3744 | |
| 3745 | #define RPM_VREG_INIT_VS(_id, _always_on, _pd, _sleep_selectable, _pin_ctrl) \ |
| 3746 | RPM_VREG_INIT(_id, 0, 0, REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE, \ |
| 3747 | REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE, 0, 0, \ |
| 3748 | 1000, 1000, _pd, _pin_ctrl, RPM_VREG_FREQ_NONE, \ |
| 3749 | RPM_VREG_PIN_FN_ENABLE, RPM_VREG_MODE_NONE, \ |
| 3750 | RPM_VREG_STATE_OFF, _sleep_selectable, _always_on) |
| 3751 | |
| 3752 | #define RPM_VREG_INIT_NCP(_id, _always_on, _pd, _sleep_selectable, _min_uV, \ |
| 3753 | _max_uV, _pin_ctrl) \ |
| 3754 | RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_NORMAL, \ |
| 3755 | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS, 0, \ |
| 3756 | _min_uV, 1000, 1000, _pd, _pin_ctrl, RPM_VREG_FREQ_NONE, \ |
| 3757 | RPM_VREG_PIN_FN_ENABLE, RPM_VREG_MODE_NONE, \ |
| 3758 | RPM_VREG_STATE_OFF, _sleep_selectable, _always_on) |
| 3759 | |
| 3760 | #define LDO50HMIN RPM_VREG_LDO_50_HPM_MIN_LOAD |
| 3761 | #define LDO150HMIN RPM_VREG_LDO_150_HPM_MIN_LOAD |
| 3762 | #define LDO300HMIN RPM_VREG_LDO_300_HPM_MIN_LOAD |
| 3763 | #define SMPS_HMIN RPM_VREG_SMPS_HPM_MIN_LOAD |
| 3764 | #define FTS_HMIN RPM_VREG_FTSMPS_HPM_MIN_LOAD |
| 3765 | |
| 3766 | static struct rpm_vreg_pdata rpm_vreg_init_pdata[RPM_VREG_ID_MAX] = { |
| 3767 | RPM_VREG_INIT_LDO(PM8058_L0, 0, 1, 0, 1200000, 1200000, LDO150HMIN, 0), |
| 3768 | RPM_VREG_INIT_LDO(PM8058_L1, 0, 1, 0, 1200000, 1200000, LDO300HMIN, 0), |
| 3769 | RPM_VREG_INIT_LDO(PM8058_L2, 0, 1, 0, 1800000, 2600000, LDO300HMIN, 0), |
| 3770 | RPM_VREG_INIT_LDO(PM8058_L3, 0, 1, 0, 1800000, 1800000, LDO150HMIN, 0), |
| 3771 | RPM_VREG_INIT_LDO(PM8058_L4, 0, 1, 0, 2850000, 2850000, LDO50HMIN, 0), |
| 3772 | RPM_VREG_INIT_LDO(PM8058_L5, 0, 1, 0, 2850000, 2850000, LDO300HMIN, 0), |
| 3773 | RPM_VREG_INIT_LDO(PM8058_L6, 0, 1, 0, 3000000, 3600000, LDO50HMIN, 0), |
| 3774 | RPM_VREG_INIT_LDO(PM8058_L7, 0, 1, 0, 1800000, 1800000, LDO50HMIN, 0), |
| 3775 | RPM_VREG_INIT_LDO_PF(PM8058_L8, 0, 1, 0, 2900000, 3050000, LDO300HMIN, |
| 3776 | RPM_VREG_PIN_CTRL_NONE, RPM_VREG_PIN_FN_SLEEP_B), |
| 3777 | RPM_VREG_INIT_LDO(PM8058_L9, 0, 1, 0, 1800000, 1800000, LDO300HMIN, 0), |
| 3778 | RPM_VREG_INIT_LDO(PM8058_L10, 0, 1, 0, 2600000, 2600000, LDO300HMIN, 0), |
| 3779 | RPM_VREG_INIT_LDO(PM8058_L11, 0, 1, 0, 1500000, 1500000, LDO150HMIN, 0), |
| 3780 | RPM_VREG_INIT_LDO(PM8058_L12, 0, 1, 0, 2900000, 2900000, LDO150HMIN, 0), |
| 3781 | RPM_VREG_INIT_LDO(PM8058_L13, 0, 1, 0, 2050000, 2050000, LDO300HMIN, 0), |
| 3782 | RPM_VREG_INIT_LDO(PM8058_L14, 0, 0, 0, 2850000, 2850000, LDO300HMIN, 0), |
| 3783 | RPM_VREG_INIT_LDO(PM8058_L15, 0, 1, 0, 2850000, 2850000, LDO300HMIN, 0), |
| 3784 | RPM_VREG_INIT_LDO(PM8058_L16, 1, 1, 0, 1800000, 1800000, LDO300HMIN, 0), |
| 3785 | RPM_VREG_INIT_LDO(PM8058_L17, 0, 1, 0, 2600000, 2600000, LDO150HMIN, 0), |
| 3786 | RPM_VREG_INIT_LDO(PM8058_L18, 0, 1, 0, 2200000, 2200000, LDO150HMIN, 0), |
| 3787 | RPM_VREG_INIT_LDO(PM8058_L19, 0, 1, 0, 2500000, 2500000, LDO150HMIN, 0), |
| 3788 | RPM_VREG_INIT_LDO_PF(PM8058_L20, 0, 1, 0, 1800000, 1800000, LDO150HMIN, |
| 3789 | RPM_VREG_PIN_CTRL_NONE, RPM_VREG_PIN_FN_SLEEP_B), |
| 3790 | RPM_VREG_INIT_LDO_PF(PM8058_L21, 1, 1, 0, 1200000, 1200000, LDO150HMIN, |
| 3791 | RPM_VREG_PIN_CTRL_NONE, RPM_VREG_PIN_FN_SLEEP_B), |
| 3792 | RPM_VREG_INIT_LDO(PM8058_L22, 0, 1, 0, 1200000, 1200000, LDO300HMIN, 0), |
| 3793 | RPM_VREG_INIT_LDO(PM8058_L23, 0, 1, 0, 1200000, 1200000, LDO300HMIN, 0), |
| 3794 | RPM_VREG_INIT_LDO(PM8058_L24, 0, 1, 0, 1200000, 1200000, LDO150HMIN, 0), |
| 3795 | RPM_VREG_INIT_LDO(PM8058_L25, 0, 1, 0, 1200000, 1200000, LDO150HMIN, 0), |
| 3796 | |
| 3797 | RPM_VREG_INIT_SMPS(PM8058_S0, 0, 1, 1, 500000, 1250000, SMPS_HMIN, 0, |
| 3798 | RPM_VREG_FREQ_1p60), |
| 3799 | RPM_VREG_INIT_SMPS(PM8058_S1, 0, 1, 1, 500000, 1250000, SMPS_HMIN, 0, |
| 3800 | RPM_VREG_FREQ_1p60), |
| 3801 | RPM_VREG_INIT_SMPS(PM8058_S2, 0, 1, 1, 1200000, 1400000, SMPS_HMIN, |
| 3802 | RPM_VREG_PIN_CTRL_A0, RPM_VREG_FREQ_1p60), |
| 3803 | RPM_VREG_INIT_SMPS(PM8058_S3, 1, 1, 0, 1800000, 1800000, SMPS_HMIN, 0, |
| 3804 | RPM_VREG_FREQ_1p60), |
| 3805 | RPM_VREG_INIT_SMPS(PM8058_S4, 1, 1, 0, 2200000, 2200000, SMPS_HMIN, 0, |
| 3806 | RPM_VREG_FREQ_1p60), |
| 3807 | |
| 3808 | RPM_VREG_INIT_VS(PM8058_LVS0, 0, 1, 0, 0), |
| 3809 | RPM_VREG_INIT_VS(PM8058_LVS1, 0, 1, 0, 0), |
| 3810 | |
| 3811 | RPM_VREG_INIT_NCP(PM8058_NCP, 0, 1, 0, 1800000, 1800000, 0), |
| 3812 | |
| 3813 | RPM_VREG_INIT_LDO(PM8901_L0, 0, 1, 0, 1200000, 1200000, LDO300HMIN, |
| 3814 | RPM_VREG_PIN_CTRL_A0), |
| 3815 | RPM_VREG_INIT_LDO(PM8901_L1, 0, 1, 0, 3300000, 3300000, LDO300HMIN, 0), |
| 3816 | RPM_VREG_INIT_LDO(PM8901_L2, 0, 1, 0, 2850000, 3300000, LDO300HMIN, 0), |
| 3817 | RPM_VREG_INIT_LDO(PM8901_L3, 0, 1, 0, 3300000, 3300000, LDO300HMIN, 0), |
| 3818 | RPM_VREG_INIT_LDO(PM8901_L4, 0, 1, 0, 2600000, 2600000, LDO300HMIN, 0), |
| 3819 | RPM_VREG_INIT_LDO(PM8901_L5, 0, 1, 0, 2850000, 2850000, LDO300HMIN, 0), |
| 3820 | RPM_VREG_INIT_LDO(PM8901_L6, 0, 1, 0, 2200000, 2200000, LDO300HMIN, 0), |
| 3821 | |
| 3822 | RPM_VREG_INIT_SMPS(PM8901_S2, 0, 1, 0, 1300000, 1300000, FTS_HMIN, 0, |
| 3823 | RPM_VREG_FREQ_1p60), |
| 3824 | RPM_VREG_INIT_SMPS(PM8901_S3, 0, 1, 0, 1100000, 1100000, FTS_HMIN, 0, |
| 3825 | RPM_VREG_FREQ_1p60), |
| 3826 | RPM_VREG_INIT_SMPS(PM8901_S4, 0, 1, 0, 1225000, 1225000, FTS_HMIN, |
| 3827 | RPM_VREG_PIN_CTRL_A0, RPM_VREG_FREQ_1p60), |
| 3828 | |
| 3829 | RPM_VREG_INIT_VS(PM8901_LVS0, 1, 1, 0, 0), |
| 3830 | RPM_VREG_INIT_VS(PM8901_LVS1, 0, 1, 0, 0), |
| 3831 | RPM_VREG_INIT_VS(PM8901_LVS2, 0, 1, 0, 0), |
| 3832 | RPM_VREG_INIT_VS(PM8901_LVS3, 0, 1, 0, 0), |
| 3833 | RPM_VREG_INIT_VS(PM8901_MVS0, 0, 1, 0, 0), |
| 3834 | }; |
| 3835 | |
| 3836 | #define RPM_VREG(_id) \ |
| 3837 | [_id] = { \ |
| 3838 | .name = "rpm-regulator", \ |
| 3839 | .id = _id, \ |
| 3840 | .dev = { \ |
| 3841 | .platform_data = &rpm_vreg_init_pdata[_id], \ |
| 3842 | }, \ |
| 3843 | } |
| 3844 | |
| 3845 | static struct platform_device rpm_vreg_device[RPM_VREG_ID_MAX] = { |
| 3846 | RPM_VREG(RPM_VREG_ID_PM8058_L0), |
| 3847 | RPM_VREG(RPM_VREG_ID_PM8058_L1), |
| 3848 | RPM_VREG(RPM_VREG_ID_PM8058_L2), |
| 3849 | RPM_VREG(RPM_VREG_ID_PM8058_L3), |
| 3850 | RPM_VREG(RPM_VREG_ID_PM8058_L4), |
| 3851 | RPM_VREG(RPM_VREG_ID_PM8058_L5), |
| 3852 | RPM_VREG(RPM_VREG_ID_PM8058_L6), |
| 3853 | RPM_VREG(RPM_VREG_ID_PM8058_L7), |
| 3854 | RPM_VREG(RPM_VREG_ID_PM8058_L8), |
| 3855 | RPM_VREG(RPM_VREG_ID_PM8058_L9), |
| 3856 | RPM_VREG(RPM_VREG_ID_PM8058_L10), |
| 3857 | RPM_VREG(RPM_VREG_ID_PM8058_L11), |
| 3858 | RPM_VREG(RPM_VREG_ID_PM8058_L12), |
| 3859 | RPM_VREG(RPM_VREG_ID_PM8058_L13), |
| 3860 | RPM_VREG(RPM_VREG_ID_PM8058_L14), |
| 3861 | RPM_VREG(RPM_VREG_ID_PM8058_L15), |
| 3862 | RPM_VREG(RPM_VREG_ID_PM8058_L16), |
| 3863 | RPM_VREG(RPM_VREG_ID_PM8058_L17), |
| 3864 | RPM_VREG(RPM_VREG_ID_PM8058_L18), |
| 3865 | RPM_VREG(RPM_VREG_ID_PM8058_L19), |
| 3866 | RPM_VREG(RPM_VREG_ID_PM8058_L20), |
| 3867 | RPM_VREG(RPM_VREG_ID_PM8058_L21), |
| 3868 | RPM_VREG(RPM_VREG_ID_PM8058_L22), |
| 3869 | RPM_VREG(RPM_VREG_ID_PM8058_L23), |
| 3870 | RPM_VREG(RPM_VREG_ID_PM8058_L24), |
| 3871 | RPM_VREG(RPM_VREG_ID_PM8058_L25), |
| 3872 | RPM_VREG(RPM_VREG_ID_PM8058_S0), |
| 3873 | RPM_VREG(RPM_VREG_ID_PM8058_S1), |
| 3874 | RPM_VREG(RPM_VREG_ID_PM8058_S2), |
| 3875 | RPM_VREG(RPM_VREG_ID_PM8058_S3), |
| 3876 | RPM_VREG(RPM_VREG_ID_PM8058_S4), |
| 3877 | RPM_VREG(RPM_VREG_ID_PM8058_LVS0), |
| 3878 | RPM_VREG(RPM_VREG_ID_PM8058_LVS1), |
| 3879 | RPM_VREG(RPM_VREG_ID_PM8058_NCP), |
| 3880 | RPM_VREG(RPM_VREG_ID_PM8901_L0), |
| 3881 | RPM_VREG(RPM_VREG_ID_PM8901_L1), |
| 3882 | RPM_VREG(RPM_VREG_ID_PM8901_L2), |
| 3883 | RPM_VREG(RPM_VREG_ID_PM8901_L3), |
| 3884 | RPM_VREG(RPM_VREG_ID_PM8901_L4), |
| 3885 | RPM_VREG(RPM_VREG_ID_PM8901_L5), |
| 3886 | RPM_VREG(RPM_VREG_ID_PM8901_L6), |
| 3887 | RPM_VREG(RPM_VREG_ID_PM8901_S2), |
| 3888 | RPM_VREG(RPM_VREG_ID_PM8901_S3), |
| 3889 | RPM_VREG(RPM_VREG_ID_PM8901_S4), |
| 3890 | RPM_VREG(RPM_VREG_ID_PM8901_LVS0), |
| 3891 | RPM_VREG(RPM_VREG_ID_PM8901_LVS1), |
| 3892 | RPM_VREG(RPM_VREG_ID_PM8901_LVS2), |
| 3893 | RPM_VREG(RPM_VREG_ID_PM8901_LVS3), |
| 3894 | RPM_VREG(RPM_VREG_ID_PM8901_MVS0), |
| 3895 | }; |
| 3896 | |
| 3897 | static struct platform_device *early_regulators[] __initdata = { |
| 3898 | &msm_device_saw_s0, |
| 3899 | &msm_device_saw_s1, |
| 3900 | #ifdef CONFIG_PMIC8058 |
| 3901 | &rpm_vreg_device[RPM_VREG_ID_PM8058_S0], |
| 3902 | &rpm_vreg_device[RPM_VREG_ID_PM8058_S1], |
| 3903 | #endif |
| 3904 | }; |
| 3905 | |
| 3906 | static struct platform_device *early_devices[] __initdata = { |
| 3907 | #ifdef CONFIG_MSM_BUS_SCALING |
| 3908 | &msm_bus_apps_fabric, |
| 3909 | &msm_bus_sys_fabric, |
| 3910 | &msm_bus_mm_fabric, |
| 3911 | &msm_bus_sys_fpb, |
| 3912 | &msm_bus_cpss_fpb, |
| 3913 | #endif |
| 3914 | &msm_device_dmov_adm0, |
| 3915 | &msm_device_dmov_adm1, |
| 3916 | }; |
| 3917 | |
| 3918 | #if (defined(CONFIG_MARIMBA_CORE)) && \ |
| 3919 | (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE)) |
| 3920 | |
| 3921 | static int bluetooth_power(int); |
| 3922 | static struct platform_device msm_bt_power_device = { |
| 3923 | .name = "bt_power", |
| 3924 | .id = -1, |
| 3925 | .dev = { |
| 3926 | .platform_data = &bluetooth_power, |
| 3927 | }, |
| 3928 | }; |
| 3929 | #endif |
| 3930 | |
| 3931 | static struct platform_device msm_tsens_device = { |
| 3932 | .name = "tsens-tm", |
| 3933 | .id = -1, |
| 3934 | }; |
| 3935 | |
| 3936 | static struct platform_device *rumi_sim_devices[] __initdata = { |
| 3937 | &smc91x_device, |
| 3938 | &msm_device_uart_dm12, |
| 3939 | #ifdef CONFIG_I2C_QUP |
| 3940 | &msm_gsbi3_qup_i2c_device, |
| 3941 | &msm_gsbi4_qup_i2c_device, |
| 3942 | &msm_gsbi7_qup_i2c_device, |
| 3943 | &msm_gsbi8_qup_i2c_device, |
| 3944 | &msm_gsbi9_qup_i2c_device, |
| 3945 | &msm_gsbi12_qup_i2c_device, |
| 3946 | #endif |
| 3947 | #ifdef CONFIG_I2C_SSBI |
| 3948 | &msm_device_ssbi1, |
| 3949 | &msm_device_ssbi2, |
| 3950 | &msm_device_ssbi3, |
| 3951 | #endif |
| 3952 | #ifdef CONFIG_ANDROID_PMEM |
| 3953 | &android_pmem_device, |
| 3954 | &android_pmem_adsp_device, |
| 3955 | &android_pmem_audio_device, |
| 3956 | &android_pmem_smipool_device, |
| 3957 | #endif |
| 3958 | #ifdef CONFIG_MSM_ROTATOR |
| 3959 | &msm_rotator_device, |
| 3960 | #endif |
| 3961 | &msm_fb_device, |
| 3962 | &msm_kgsl_3d0, |
| 3963 | &msm_kgsl_2d0, |
| 3964 | &msm_kgsl_2d1, |
| 3965 | &lcdc_samsung_panel_device, |
| 3966 | #ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL |
| 3967 | &hdmi_msm_device, |
| 3968 | #endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */ |
| 3969 | #ifdef CONFIG_MSM_CAMERA |
| 3970 | #ifdef CONFIG_MT9E013 |
| 3971 | &msm_camera_sensor_mt9e013, |
| 3972 | #endif |
| 3973 | #ifdef CONFIG_IMX074 |
| 3974 | &msm_camera_sensor_imx074, |
| 3975 | #endif |
Jilai Wang | 971f97f | 2011-07-13 14:25:25 -0400 | [diff] [blame^] | 3976 | #ifdef CONFIG_VX6953 |
| 3977 | &msm_camera_sensor_vx6953, |
| 3978 | #endif |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 3979 | #ifdef CONFIG_WEBCAM_OV7692 |
| 3980 | &msm_camera_sensor_webcam_ov7692, |
| 3981 | #endif |
| 3982 | #ifdef CONFIG_WEBCAM_OV9726 |
| 3983 | &msm_camera_sensor_webcam_ov9726, |
| 3984 | #endif |
| 3985 | #ifdef CONFIG_QS_S5K4E1 |
| 3986 | &msm_camera_sensor_qs_s5k4e1, |
| 3987 | #endif |
| 3988 | #endif |
| 3989 | #ifdef CONFIG_MSM_GEMINI |
| 3990 | &msm_gemini_device, |
| 3991 | #endif |
| 3992 | #ifdef CONFIG_MSM_VPE |
| 3993 | &msm_vpe_device, |
| 3994 | #endif |
| 3995 | &msm_device_vidc, |
| 3996 | }; |
| 3997 | |
| 3998 | #if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE) |
| 3999 | enum { |
| 4000 | SX150X_CORE, |
| 4001 | SX150X_DOCKING, |
| 4002 | SX150X_SURF, |
| 4003 | SX150X_LEFT_FHA, |
| 4004 | SX150X_RIGHT_FHA, |
| 4005 | SX150X_SOUTH, |
| 4006 | SX150X_NORTH, |
| 4007 | SX150X_CORE_FLUID, |
| 4008 | }; |
| 4009 | |
| 4010 | static struct sx150x_platform_data sx150x_data[] __initdata = { |
| 4011 | [SX150X_CORE] = { |
| 4012 | .gpio_base = GPIO_CORE_EXPANDER_BASE, |
| 4013 | .oscio_is_gpo = false, |
| 4014 | .io_pullup_ena = 0x0c08, |
| 4015 | .io_pulldn_ena = 0x4060, |
| 4016 | .io_open_drain_ena = 0x000c, |
| 4017 | .io_polarity = 0, |
| 4018 | .irq_summary = -1, /* see fixup_i2c_configs() */ |
| 4019 | .irq_base = GPIO_EXPANDER_IRQ_BASE, |
| 4020 | }, |
| 4021 | [SX150X_DOCKING] = { |
| 4022 | .gpio_base = GPIO_DOCKING_EXPANDER_BASE, |
| 4023 | .oscio_is_gpo = false, |
| 4024 | .io_pullup_ena = 0x5e06, |
| 4025 | .io_pulldn_ena = 0x81b8, |
| 4026 | .io_open_drain_ena = 0, |
| 4027 | .io_polarity = 0, |
| 4028 | .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, |
| 4029 | UI_INT2_N), |
| 4030 | .irq_base = GPIO_EXPANDER_IRQ_BASE + |
| 4031 | GPIO_DOCKING_EXPANDER_BASE - |
| 4032 | GPIO_EXPANDER_GPIO_BASE, |
| 4033 | }, |
| 4034 | [SX150X_SURF] = { |
| 4035 | .gpio_base = GPIO_SURF_EXPANDER_BASE, |
| 4036 | .oscio_is_gpo = false, |
| 4037 | .io_pullup_ena = 0, |
| 4038 | .io_pulldn_ena = 0, |
| 4039 | .io_open_drain_ena = 0, |
| 4040 | .io_polarity = 0, |
| 4041 | .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, |
| 4042 | UI_INT1_N), |
| 4043 | .irq_base = GPIO_EXPANDER_IRQ_BASE + |
| 4044 | GPIO_SURF_EXPANDER_BASE - |
| 4045 | GPIO_EXPANDER_GPIO_BASE, |
| 4046 | }, |
| 4047 | [SX150X_LEFT_FHA] = { |
| 4048 | .gpio_base = GPIO_LEFT_KB_EXPANDER_BASE, |
| 4049 | .oscio_is_gpo = false, |
| 4050 | .io_pullup_ena = 0, |
| 4051 | .io_pulldn_ena = 0x40, |
| 4052 | .io_open_drain_ena = 0, |
| 4053 | .io_polarity = 0, |
| 4054 | .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, |
| 4055 | UI_INT3_N), |
| 4056 | .irq_base = GPIO_EXPANDER_IRQ_BASE + |
| 4057 | GPIO_LEFT_KB_EXPANDER_BASE - |
| 4058 | GPIO_EXPANDER_GPIO_BASE, |
| 4059 | }, |
| 4060 | [SX150X_RIGHT_FHA] = { |
| 4061 | .gpio_base = GPIO_RIGHT_KB_EXPANDER_BASE, |
| 4062 | .oscio_is_gpo = true, |
| 4063 | .io_pullup_ena = 0, |
| 4064 | .io_pulldn_ena = 0, |
| 4065 | .io_open_drain_ena = 0, |
| 4066 | .io_polarity = 0, |
| 4067 | .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, |
| 4068 | UI_INT3_N), |
| 4069 | .irq_base = GPIO_EXPANDER_IRQ_BASE + |
| 4070 | GPIO_RIGHT_KB_EXPANDER_BASE - |
| 4071 | GPIO_EXPANDER_GPIO_BASE, |
| 4072 | }, |
| 4073 | [SX150X_SOUTH] = { |
| 4074 | .gpio_base = GPIO_SOUTH_EXPANDER_BASE, |
| 4075 | .irq_base = GPIO_EXPANDER_IRQ_BASE + |
| 4076 | GPIO_SOUTH_EXPANDER_BASE - |
| 4077 | GPIO_EXPANDER_GPIO_BASE, |
| 4078 | .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT3_N), |
| 4079 | }, |
| 4080 | [SX150X_NORTH] = { |
| 4081 | .gpio_base = GPIO_NORTH_EXPANDER_BASE, |
| 4082 | .irq_base = GPIO_EXPANDER_IRQ_BASE + |
| 4083 | GPIO_NORTH_EXPANDER_BASE - |
| 4084 | GPIO_EXPANDER_GPIO_BASE, |
| 4085 | .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT3_N), |
| 4086 | .oscio_is_gpo = true, |
| 4087 | .io_open_drain_ena = 0x30, |
| 4088 | }, |
| 4089 | [SX150X_CORE_FLUID] = { |
| 4090 | .gpio_base = GPIO_CORE_EXPANDER_BASE, |
| 4091 | .oscio_is_gpo = false, |
| 4092 | .io_pullup_ena = 0x0408, |
| 4093 | .io_pulldn_ena = 0x4060, |
| 4094 | .io_open_drain_ena = 0x0008, |
| 4095 | .io_polarity = 0, |
| 4096 | .irq_summary = -1, /* see fixup_i2c_configs() */ |
| 4097 | .irq_base = GPIO_EXPANDER_IRQ_BASE, |
| 4098 | }, |
| 4099 | }; |
| 4100 | |
| 4101 | #ifdef CONFIG_SENSORS_MSM_ADC |
| 4102 | /* Configuration of EPM expander is done when client |
| 4103 | * request an adc read |
| 4104 | */ |
| 4105 | static struct sx150x_platform_data sx150x_epmdata = { |
| 4106 | .gpio_base = GPIO_EPM_EXPANDER_BASE, |
| 4107 | .irq_base = GPIO_EXPANDER_IRQ_BASE + |
| 4108 | GPIO_EPM_EXPANDER_BASE - |
| 4109 | GPIO_EXPANDER_GPIO_BASE, |
| 4110 | .irq_summary = -1, |
| 4111 | }; |
| 4112 | #endif |
| 4113 | |
| 4114 | /* sx150x_low_power_cfg |
| 4115 | * |
| 4116 | * This data and init function are used to put unused gpio-expander output |
| 4117 | * lines into their low-power states at boot. The init |
| 4118 | * function must be deferred until a later init stage because the i2c |
| 4119 | * gpio expander drivers do not probe until after they are registered |
| 4120 | * (see register_i2c_devices) and the work-queues for those registrations |
| 4121 | * are processed. Because these lines are unused, there is no risk of |
| 4122 | * competing with a device driver for the gpio. |
| 4123 | * |
| 4124 | * gpio lines whose low-power states are input are naturally in their low- |
| 4125 | * power configurations once probed, see the platform data structures above. |
| 4126 | */ |
| 4127 | struct sx150x_low_power_cfg { |
| 4128 | unsigned gpio; |
| 4129 | unsigned val; |
| 4130 | }; |
| 4131 | |
| 4132 | static struct sx150x_low_power_cfg |
| 4133 | common_sx150x_lp_cfgs[] __initdata = { |
| 4134 | {GPIO_WLAN_DEEP_SLEEP_N, 0}, |
| 4135 | {GPIO_EXT_GPS_LNA_EN, 0}, |
| 4136 | {GPIO_MSM_WAKES_BT, 0}, |
| 4137 | {GPIO_USB_UICC_EN, 0}, |
| 4138 | {GPIO_BATT_GAUGE_EN, 0}, |
| 4139 | }; |
| 4140 | |
| 4141 | static struct sx150x_low_power_cfg |
| 4142 | surf_ffa_sx150x_lp_cfgs[] __initdata = { |
| 4143 | {GPIO_MIPI_DSI_RST_N, 0}, |
| 4144 | {GPIO_DONGLE_PWR_EN, 0}, |
| 4145 | {GPIO_CAP_TS_SLEEP, 1}, |
| 4146 | {GPIO_WEB_CAMIF_RESET_N, 0}, |
| 4147 | }; |
| 4148 | |
| 4149 | static void __init |
| 4150 | cfg_gpio_low_power(struct sx150x_low_power_cfg *cfgs, unsigned nelems) |
| 4151 | { |
| 4152 | unsigned n; |
| 4153 | int rc; |
| 4154 | |
| 4155 | for (n = 0; n < nelems; ++n) { |
| 4156 | rc = gpio_request(cfgs[n].gpio, NULL); |
| 4157 | if (!rc) { |
| 4158 | rc = gpio_direction_output(cfgs[n].gpio, cfgs[n].val); |
| 4159 | gpio_free(cfgs[n].gpio); |
| 4160 | } |
| 4161 | |
| 4162 | if (rc) { |
| 4163 | printk(KERN_NOTICE "%s: failed to sleep gpio %d: %d\n", |
| 4164 | __func__, cfgs[n].gpio, rc); |
| 4165 | } |
Steve Muckle | 9161d30 | 2010-02-11 11:50:40 -0800 | [diff] [blame] | 4166 | } |
Steve Muckle | a55df6e | 2010-01-07 12:43:24 -0800 | [diff] [blame] | 4167 | } |
| 4168 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 4169 | static int __init cfg_sx150xs_low_power(void) |
Steve Muckle | a55df6e | 2010-01-07 12:43:24 -0800 | [diff] [blame] | 4170 | { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 4171 | cfg_gpio_low_power(common_sx150x_lp_cfgs, |
| 4172 | ARRAY_SIZE(common_sx150x_lp_cfgs)); |
| 4173 | if (!machine_is_msm8x60_fluid()) |
| 4174 | cfg_gpio_low_power(surf_ffa_sx150x_lp_cfgs, |
| 4175 | ARRAY_SIZE(surf_ffa_sx150x_lp_cfgs)); |
| 4176 | return 0; |
| 4177 | } |
| 4178 | module_init(cfg_sx150xs_low_power); |
| 4179 | |
| 4180 | #ifdef CONFIG_I2C |
| 4181 | static struct i2c_board_info core_expander_i2c_info[] __initdata = { |
| 4182 | { |
| 4183 | I2C_BOARD_INFO("sx1509q", 0x3e), |
| 4184 | .platform_data = &sx150x_data[SX150X_CORE] |
| 4185 | }, |
| 4186 | }; |
| 4187 | |
| 4188 | static struct i2c_board_info docking_expander_i2c_info[] __initdata = { |
| 4189 | { |
| 4190 | I2C_BOARD_INFO("sx1509q", 0x3f), |
| 4191 | .platform_data = &sx150x_data[SX150X_DOCKING] |
| 4192 | }, |
| 4193 | }; |
| 4194 | |
| 4195 | static struct i2c_board_info surf_expanders_i2c_info[] __initdata = { |
| 4196 | { |
| 4197 | I2C_BOARD_INFO("sx1509q", 0x70), |
| 4198 | .platform_data = &sx150x_data[SX150X_SURF] |
| 4199 | } |
| 4200 | }; |
| 4201 | |
| 4202 | static struct i2c_board_info fha_expanders_i2c_info[] __initdata = { |
| 4203 | { |
| 4204 | I2C_BOARD_INFO("sx1508q", 0x21), |
| 4205 | .platform_data = &sx150x_data[SX150X_LEFT_FHA] |
| 4206 | }, |
| 4207 | { |
| 4208 | I2C_BOARD_INFO("sx1508q", 0x22), |
| 4209 | .platform_data = &sx150x_data[SX150X_RIGHT_FHA] |
| 4210 | } |
| 4211 | }; |
| 4212 | |
| 4213 | static struct i2c_board_info fluid_expanders_i2c_info[] __initdata = { |
| 4214 | { |
| 4215 | I2C_BOARD_INFO("sx1508q", 0x23), |
| 4216 | .platform_data = &sx150x_data[SX150X_SOUTH] |
| 4217 | }, |
| 4218 | { |
| 4219 | I2C_BOARD_INFO("sx1508q", 0x20), |
| 4220 | .platform_data = &sx150x_data[SX150X_NORTH] |
| 4221 | } |
| 4222 | }; |
| 4223 | |
| 4224 | static struct i2c_board_info fluid_core_expander_i2c_info[] __initdata = { |
| 4225 | { |
| 4226 | I2C_BOARD_INFO("sx1509q", 0x3e), |
| 4227 | .platform_data = &sx150x_data[SX150X_CORE_FLUID] |
| 4228 | }, |
| 4229 | }; |
| 4230 | |
| 4231 | #ifdef CONFIG_SENSORS_MSM_ADC |
| 4232 | static struct i2c_board_info fluid_expanders_i2c_epm_info[] = { |
| 4233 | { |
| 4234 | I2C_BOARD_INFO("sx1509q", 0x3e), |
| 4235 | .platform_data = &sx150x_epmdata |
| 4236 | }, |
| 4237 | }; |
| 4238 | #endif |
| 4239 | #endif |
| 4240 | #endif |
| 4241 | |
| 4242 | #ifdef CONFIG_SENSORS_MSM_ADC |
| 4243 | static struct resource resources_adc[] = { |
| 4244 | { |
| 4245 | .start = PM8058_ADC_IRQ(PM8058_IRQ_BASE), |
| 4246 | .end = PM8058_ADC_IRQ(PM8058_IRQ_BASE), |
| 4247 | .flags = IORESOURCE_IRQ, |
| 4248 | }, |
| 4249 | }; |
| 4250 | |
| 4251 | static struct adc_access_fn xoadc_fn = { |
| 4252 | pm8058_xoadc_select_chan_and_start_conv, |
| 4253 | pm8058_xoadc_read_adc_code, |
| 4254 | pm8058_xoadc_get_properties, |
| 4255 | pm8058_xoadc_slot_request, |
| 4256 | pm8058_xoadc_restore_slot, |
| 4257 | pm8058_xoadc_calibrate, |
| 4258 | }; |
| 4259 | |
| 4260 | #if defined(CONFIG_I2C) && \ |
| 4261 | (defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)) |
| 4262 | static struct regulator *vreg_adc_epm1; |
| 4263 | |
| 4264 | static struct i2c_client *epm_expander_i2c_register_board(void) |
| 4265 | |
| 4266 | { |
| 4267 | struct i2c_adapter *i2c_adap; |
| 4268 | struct i2c_client *client = NULL; |
| 4269 | i2c_adap = i2c_get_adapter(0x0); |
| 4270 | |
| 4271 | if (i2c_adap == NULL) |
| 4272 | printk(KERN_ERR "\nepm_expander_i2c_adapter is NULL\n"); |
| 4273 | |
| 4274 | if (i2c_adap != NULL) |
| 4275 | client = i2c_new_device(i2c_adap, |
| 4276 | &fluid_expanders_i2c_epm_info[0]); |
| 4277 | return client; |
| 4278 | |
| 4279 | } |
| 4280 | |
| 4281 | static unsigned int msm_adc_gpio_configure_expander_enable(void) |
| 4282 | { |
| 4283 | int rc = 0; |
| 4284 | static struct i2c_client *epm_i2c_client; |
| 4285 | |
| 4286 | printk(KERN_DEBUG "Enter msm_adc_gpio_configure_expander_enable\n"); |
| 4287 | |
| 4288 | vreg_adc_epm1 = regulator_get(NULL, "8058_s3"); |
| 4289 | |
| 4290 | if (IS_ERR(vreg_adc_epm1)) { |
| 4291 | printk(KERN_ERR "%s: Unable to get 8058_s3\n", __func__); |
| 4292 | return 0; |
| 4293 | } |
| 4294 | |
| 4295 | rc = regulator_set_voltage(vreg_adc_epm1, 1800000, 1800000); |
| 4296 | if (rc) |
| 4297 | printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: " |
| 4298 | "regulator set voltage failed\n"); |
| 4299 | |
| 4300 | rc = regulator_enable(vreg_adc_epm1); |
| 4301 | if (rc) { |
| 4302 | printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: " |
| 4303 | "Error while enabling regulator for epm s3 %d\n", rc); |
| 4304 | return rc; |
| 4305 | } |
| 4306 | |
| 4307 | printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: Start" |
| 4308 | " setting the value of the EPM 3.3, 5v and lvlsft\n"); |
| 4309 | |
| 4310 | msleep(1000); |
| 4311 | |
| 4312 | rc = gpio_request(GPIO_EPM_5V_BOOST_EN, "boost_epm_5v"); |
| 4313 | if (!rc) { |
| 4314 | printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: " |
| 4315 | "Configure 5v boost\n"); |
| 4316 | gpio_direction_output(GPIO_EPM_5V_BOOST_EN, 1); |
| 4317 | } else { |
| 4318 | printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: " |
| 4319 | "Error for epm 5v boost en\n"); |
| 4320 | goto exit_vreg_epm; |
| 4321 | } |
| 4322 | |
| 4323 | msleep(500); |
| 4324 | |
| 4325 | rc = gpio_request(GPIO_EPM_3_3V_EN, "epm_3_3v"); |
| 4326 | if (!rc) { |
| 4327 | gpio_direction_output(GPIO_EPM_3_3V_EN, 1); |
| 4328 | printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: " |
| 4329 | "Configure epm 3.3v\n"); |
| 4330 | } else { |
| 4331 | printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: " |
| 4332 | "Error for gpio 3.3ven\n"); |
| 4333 | goto exit_vreg_epm; |
| 4334 | } |
| 4335 | msleep(500); |
| 4336 | |
| 4337 | printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: " |
| 4338 | "Trying to request EPM LVLSFT_EN\n"); |
| 4339 | rc = gpio_request(GPIO_EPM_LVLSFT_EN, "lvsft_en"); |
| 4340 | if (!rc) { |
| 4341 | gpio_direction_output(GPIO_EPM_LVLSFT_EN, 1); |
| 4342 | printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: " |
| 4343 | "Configure the lvlsft\n"); |
| 4344 | } else { |
| 4345 | printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: " |
| 4346 | "Error for epm lvlsft_en\n"); |
| 4347 | goto exit_vreg_epm; |
| 4348 | } |
| 4349 | |
| 4350 | msleep(500); |
| 4351 | |
| 4352 | if (!epm_i2c_client) |
| 4353 | epm_i2c_client = epm_expander_i2c_register_board(); |
| 4354 | |
| 4355 | rc = gpio_request(GPIO_PWR_MON_ENABLE, "pwr_mon_enable"); |
| 4356 | if (!rc) |
| 4357 | rc = gpio_direction_output(GPIO_PWR_MON_ENABLE, 1); |
| 4358 | if (rc) { |
| 4359 | printk(KERN_ERR "msm_adc_gpio_configure_expander_enable" |
| 4360 | ": GPIO PWR MON Enable issue\n"); |
| 4361 | goto exit_vreg_epm; |
| 4362 | } |
| 4363 | |
| 4364 | msleep(1000); |
| 4365 | |
| 4366 | rc = gpio_request(GPIO_ADC1_PWDN_N, "adc1_pwdn"); |
| 4367 | if (!rc) { |
| 4368 | rc = gpio_direction_output(GPIO_ADC1_PWDN_N, 1); |
| 4369 | if (rc) { |
| 4370 | printk(KERN_ERR "msm_adc_gpio_configure_expander_enable" |
| 4371 | ": ADC1_PWDN error direction out\n"); |
| 4372 | goto exit_vreg_epm; |
| 4373 | } |
| 4374 | } |
| 4375 | |
| 4376 | msleep(100); |
| 4377 | |
| 4378 | rc = gpio_request(GPIO_ADC2_PWDN_N, "adc2_pwdn"); |
| 4379 | if (!rc) { |
| 4380 | rc = gpio_direction_output(GPIO_ADC2_PWDN_N, 1); |
| 4381 | if (rc) { |
| 4382 | printk(KERN_ERR "msm_adc_gpio_configure_expander_enable" |
| 4383 | ": ADC2_PWD error direction out\n"); |
| 4384 | goto exit_vreg_epm; |
| 4385 | } |
| 4386 | } |
| 4387 | |
| 4388 | msleep(1000); |
| 4389 | |
| 4390 | rc = gpio_request(GPIO_PWR_MON_START, "pwr_mon_start"); |
| 4391 | if (!rc) { |
| 4392 | rc = gpio_direction_output(GPIO_PWR_MON_START, 0); |
| 4393 | if (rc) { |
| 4394 | printk(KERN_ERR "msm_adc_gpio_configure_expander_enable" |
| 4395 | "Gpio request problem %d\n", rc); |
| 4396 | goto exit_vreg_epm; |
| 4397 | } |
| 4398 | } |
| 4399 | |
| 4400 | rc = gpio_request(GPIO_EPM_SPI_ADC1_CS_N, "spi_adc1_cs"); |
| 4401 | if (!rc) { |
| 4402 | rc = gpio_direction_output(GPIO_EPM_SPI_ADC1_CS_N, 0); |
| 4403 | if (rc) { |
| 4404 | printk(KERN_ERR "msm_adc_gpio_configure_expander_enable" |
| 4405 | ": EPM_SPI_ADC1_CS_N error\n"); |
| 4406 | goto exit_vreg_epm; |
| 4407 | } |
| 4408 | } |
| 4409 | |
| 4410 | rc = gpio_request(GPIO_EPM_SPI_ADC2_CS_N, "spi_adc2_cs"); |
| 4411 | if (!rc) { |
| 4412 | rc = gpio_direction_output(GPIO_EPM_SPI_ADC2_CS_N, 0); |
| 4413 | if (rc) { |
| 4414 | printk(KERN_ERR "msm_adc_gpio_configure_expander_enable" |
| 4415 | ": EPM_SPI_ADC2_Cs_N error\n"); |
| 4416 | goto exit_vreg_epm; |
| 4417 | } |
| 4418 | } |
| 4419 | |
| 4420 | printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: Set " |
| 4421 | "the power monitor reset for epm\n"); |
| 4422 | |
| 4423 | rc = gpio_request(GPIO_PWR_MON_RESET_N, "pwr_mon_reset_n"); |
| 4424 | if (!rc) { |
| 4425 | gpio_direction_output(GPIO_PWR_MON_RESET_N, 0); |
| 4426 | if (rc) { |
| 4427 | printk(KERN_ERR "msm_adc_gpio_configure_expander_enable" |
| 4428 | ": Error in the power mon reset\n"); |
| 4429 | goto exit_vreg_epm; |
| 4430 | } |
| 4431 | } |
| 4432 | |
| 4433 | msleep(1000); |
| 4434 | |
| 4435 | gpio_set_value_cansleep(GPIO_PWR_MON_RESET_N, 1); |
| 4436 | |
| 4437 | msleep(500); |
| 4438 | |
| 4439 | gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1); |
| 4440 | |
| 4441 | gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1); |
| 4442 | |
| 4443 | return rc; |
| 4444 | |
| 4445 | exit_vreg_epm: |
| 4446 | regulator_disable(vreg_adc_epm1); |
| 4447 | |
| 4448 | printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: Exit." |
| 4449 | " rc = %d.\n", rc); |
| 4450 | return rc; |
| 4451 | }; |
| 4452 | |
| 4453 | static unsigned int msm_adc_gpio_configure_expander_disable(void) |
| 4454 | { |
| 4455 | int rc = 0; |
| 4456 | |
| 4457 | gpio_set_value_cansleep(GPIO_PWR_MON_RESET_N, 0); |
| 4458 | gpio_free(GPIO_PWR_MON_RESET_N); |
| 4459 | |
| 4460 | gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 0); |
| 4461 | gpio_free(GPIO_EPM_SPI_ADC1_CS_N); |
| 4462 | |
| 4463 | gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 0); |
| 4464 | gpio_free(GPIO_EPM_SPI_ADC2_CS_N); |
| 4465 | |
| 4466 | gpio_set_value_cansleep(GPIO_PWR_MON_START, 0); |
| 4467 | gpio_free(GPIO_PWR_MON_START); |
| 4468 | |
| 4469 | gpio_direction_output(GPIO_ADC1_PWDN_N, 0); |
| 4470 | gpio_free(GPIO_ADC1_PWDN_N); |
| 4471 | |
| 4472 | gpio_direction_output(GPIO_ADC2_PWDN_N, 0); |
| 4473 | gpio_free(GPIO_ADC2_PWDN_N); |
| 4474 | |
| 4475 | gpio_set_value_cansleep(GPIO_PWR_MON_ENABLE, 0); |
| 4476 | gpio_free(GPIO_PWR_MON_ENABLE); |
| 4477 | |
| 4478 | gpio_set_value_cansleep(GPIO_EPM_LVLSFT_EN, 0); |
| 4479 | gpio_free(GPIO_EPM_LVLSFT_EN); |
| 4480 | |
| 4481 | gpio_set_value_cansleep(GPIO_EPM_5V_BOOST_EN, 0); |
| 4482 | gpio_free(GPIO_EPM_5V_BOOST_EN); |
| 4483 | |
| 4484 | gpio_set_value_cansleep(GPIO_EPM_3_3V_EN, 0); |
| 4485 | gpio_free(GPIO_EPM_3_3V_EN); |
| 4486 | |
| 4487 | rc = regulator_disable(vreg_adc_epm1); |
| 4488 | if (rc) |
| 4489 | printk(KERN_DEBUG "msm_adc_gpio_configure_expander_disable: " |
| 4490 | "Error while enabling regulator for epm s3 %d\n", rc); |
| 4491 | regulator_put(vreg_adc_epm1); |
| 4492 | |
| 4493 | printk(KERN_DEBUG "Exi msm_adc_gpio_configure_expander_disable\n"); |
| 4494 | return rc; |
| 4495 | }; |
| 4496 | |
| 4497 | unsigned int msm_adc_gpio_expander_enable(int cs_enable) |
| 4498 | { |
| 4499 | int rc = 0; |
| 4500 | |
| 4501 | printk(KERN_DEBUG "msm_adc_gpio_expander_enable: cs_enable = %d", |
| 4502 | cs_enable); |
| 4503 | |
| 4504 | if (cs_enable < 16) { |
| 4505 | gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 0); |
| 4506 | gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1); |
| 4507 | } else { |
| 4508 | gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 0); |
| 4509 | gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1); |
| 4510 | } |
| 4511 | return rc; |
| 4512 | }; |
| 4513 | |
| 4514 | unsigned int msm_adc_gpio_expander_disable(int cs_disable) |
| 4515 | { |
| 4516 | int rc = 0; |
| 4517 | |
| 4518 | printk(KERN_DEBUG "Enter msm_adc_gpio_expander_disable.\n"); |
| 4519 | |
| 4520 | gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1); |
| 4521 | |
| 4522 | gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1); |
| 4523 | |
| 4524 | return rc; |
| 4525 | }; |
| 4526 | #endif |
| 4527 | |
| 4528 | static struct msm_adc_channels msm_adc_channels_data[] = { |
| 4529 | {"vbatt", CHANNEL_ADC_VBATT, 0, &xoadc_fn, CHAN_PATH_TYPE2, |
| 4530 | ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default}, |
| 4531 | {"vcoin", CHANNEL_ADC_VCOIN, 0, &xoadc_fn, CHAN_PATH_TYPE1, |
| 4532 | ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default}, |
| 4533 | {"vcharger_channel", CHANNEL_ADC_VCHG, 0, &xoadc_fn, CHAN_PATH_TYPE3, |
| 4534 | ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE4, scale_default}, |
| 4535 | {"charger_current_monitor", CHANNEL_ADC_CHG_MONITOR, 0, &xoadc_fn, |
| 4536 | CHAN_PATH_TYPE4, |
| 4537 | ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_default}, |
| 4538 | {"vph_pwr", CHANNEL_ADC_VPH_PWR, 0, &xoadc_fn, CHAN_PATH_TYPE5, |
| 4539 | ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default}, |
| 4540 | {"usb_vbus", CHANNEL_ADC_USB_VBUS, 0, &xoadc_fn, CHAN_PATH_TYPE11, |
| 4541 | ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default}, |
| 4542 | {"pmic_therm", CHANNEL_ADC_DIE_TEMP, 0, &xoadc_fn, CHAN_PATH_TYPE12, |
| 4543 | ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_pmic_therm}, |
| 4544 | {"pmic_therm_4K", CHANNEL_ADC_DIE_TEMP_4K, 0, &xoadc_fn, |
| 4545 | CHAN_PATH_TYPE12, |
| 4546 | ADC_CONFIG_TYPE1, ADC_CALIB_CONFIG_TYPE7, scale_pmic_therm}, |
| 4547 | {"xo_therm", CHANNEL_ADC_XOTHERM, 0, &xoadc_fn, CHAN_PATH_TYPE_NONE, |
| 4548 | ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE5, tdkntcgtherm}, |
| 4549 | {"xo_therm_4K", CHANNEL_ADC_XOTHERM_4K, 0, &xoadc_fn, |
| 4550 | CHAN_PATH_TYPE_NONE, |
| 4551 | ADC_CONFIG_TYPE1, ADC_CALIB_CONFIG_TYPE6, tdkntcgtherm}, |
| 4552 | {"hdset_detect", CHANNEL_ADC_HDSET, 0, &xoadc_fn, CHAN_PATH_TYPE6, |
| 4553 | ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_default}, |
| 4554 | {"chg_batt_amon", CHANNEL_ADC_BATT_AMON, 0, &xoadc_fn, CHAN_PATH_TYPE10, |
| 4555 | ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, |
| 4556 | scale_xtern_chgr_cur}, |
| 4557 | {"msm_therm", CHANNEL_ADC_MSM_THERM, 0, &xoadc_fn, CHAN_PATH_TYPE8, |
| 4558 | ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_msm_therm}, |
| 4559 | {"batt_therm", CHANNEL_ADC_BATT_THERM, 0, &xoadc_fn, CHAN_PATH_TYPE7, |
| 4560 | ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_batt_therm}, |
| 4561 | {"batt_id", CHANNEL_ADC_BATT_ID, 0, &xoadc_fn, CHAN_PATH_TYPE9, |
| 4562 | ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default}, |
| 4563 | {"ref_625mv", CHANNEL_ADC_625_REF, 0, &xoadc_fn, CHAN_PATH_TYPE15, |
| 4564 | ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default}, |
| 4565 | {"ref_1250mv", CHANNEL_ADC_1250_REF, 0, &xoadc_fn, CHAN_PATH_TYPE13, |
| 4566 | ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default}, |
| 4567 | {"ref_325mv", CHANNEL_ADC_325_REF, 0, &xoadc_fn, CHAN_PATH_TYPE14, |
| 4568 | ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default}, |
| 4569 | }; |
| 4570 | |
| 4571 | static char *msm_adc_fluid_device_names[] = { |
| 4572 | "ADS_ADC1", |
| 4573 | "ADS_ADC2", |
| 4574 | }; |
| 4575 | |
| 4576 | static struct msm_adc_platform_data msm_adc_pdata = { |
| 4577 | .channel = msm_adc_channels_data, |
| 4578 | .num_chan_supported = ARRAY_SIZE(msm_adc_channels_data), |
| 4579 | #if defined(CONFIG_I2C) && \ |
| 4580 | (defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)) |
| 4581 | .adc_gpio_enable = msm_adc_gpio_expander_enable, |
| 4582 | .adc_gpio_disable = msm_adc_gpio_expander_disable, |
| 4583 | .adc_fluid_enable = msm_adc_gpio_configure_expander_enable, |
| 4584 | .adc_fluid_disable = msm_adc_gpio_configure_expander_disable, |
| 4585 | #endif |
| 4586 | }; |
| 4587 | |
| 4588 | static struct platform_device msm_adc_device = { |
| 4589 | .name = "msm_adc", |
| 4590 | .id = -1, |
| 4591 | .dev = { |
| 4592 | .platform_data = &msm_adc_pdata, |
| 4593 | }, |
| 4594 | }; |
| 4595 | |
| 4596 | static void pmic8058_xoadc_mpp_config(void) |
| 4597 | { |
| 4598 | int rc; |
| 4599 | |
| 4600 | rc = pm8901_mpp_config_digital_out(XOADC_MPP_4, |
| 4601 | PM8901_MPP_DIG_LEVEL_S4, PM_MPP_DOUT_CTL_LOW); |
| 4602 | if (rc) |
| 4603 | pr_err("%s: Config mpp4 on pmic 8901 failed\n", __func__); |
| 4604 | |
| 4605 | rc = pm8058_mpp_config_analog_input(XOADC_MPP_3, |
| 4606 | PM_MPP_AIN_AMUX_CH5, PM_MPP_AOUT_CTL_DISABLE); |
| 4607 | if (rc) |
| 4608 | pr_err("%s: Config mpp3 on pmic 8058 failed\n", __func__); |
| 4609 | |
| 4610 | rc = pm8058_mpp_config_analog_input(XOADC_MPP_5, |
| 4611 | PM_MPP_AIN_AMUX_CH9, PM_MPP_AOUT_CTL_DISABLE); |
| 4612 | if (rc) |
| 4613 | pr_err("%s: Config mpp5 on pmic 8058 failed\n", __func__); |
| 4614 | |
| 4615 | rc = pm8058_mpp_config_analog_input(XOADC_MPP_7, |
| 4616 | PM_MPP_AIN_AMUX_CH6, PM_MPP_AOUT_CTL_DISABLE); |
| 4617 | if (rc) |
| 4618 | pr_err("%s: Config mpp7 on pmic 8058 failed\n", __func__); |
| 4619 | |
| 4620 | rc = pm8058_mpp_config_analog_input(XOADC_MPP_8, |
| 4621 | PM_MPP_AIN_AMUX_CH8, PM_MPP_AOUT_CTL_DISABLE); |
| 4622 | if (rc) |
| 4623 | pr_err("%s: Config mpp8 on pmic 8058 failed\n", __func__); |
| 4624 | |
| 4625 | rc = pm8058_mpp_config_analog_input(XOADC_MPP_10, |
| 4626 | PM_MPP_AIN_AMUX_CH7, PM_MPP_AOUT_CTL_DISABLE); |
| 4627 | if (rc) |
| 4628 | pr_err("%s: Config mpp10 on pmic 8058 failed\n", __func__); |
| 4629 | } |
| 4630 | |
| 4631 | static struct regulator *vreg_ldo18_adc; |
| 4632 | |
| 4633 | static int pmic8058_xoadc_vreg_config(int on) |
| 4634 | { |
| 4635 | int rc; |
| 4636 | |
| 4637 | if (on) { |
| 4638 | rc = regulator_enable(vreg_ldo18_adc); |
| 4639 | if (rc) |
| 4640 | pr_err("%s: Enable of regulator ldo18_adc " |
| 4641 | "failed\n", __func__); |
| 4642 | } else { |
| 4643 | rc = regulator_disable(vreg_ldo18_adc); |
| 4644 | if (rc) |
| 4645 | pr_err("%s: Disable of regulator ldo18_adc " |
| 4646 | "failed\n", __func__); |
| 4647 | } |
| 4648 | |
| 4649 | return rc; |
| 4650 | } |
| 4651 | |
| 4652 | static int pmic8058_xoadc_vreg_setup(void) |
| 4653 | { |
| 4654 | int rc; |
| 4655 | |
| 4656 | vreg_ldo18_adc = regulator_get(NULL, "8058_l18"); |
| 4657 | if (IS_ERR(vreg_ldo18_adc)) { |
| 4658 | printk(KERN_ERR "%s: vreg get failed (%ld)\n", |
| 4659 | __func__, PTR_ERR(vreg_ldo18_adc)); |
| 4660 | rc = PTR_ERR(vreg_ldo18_adc); |
| 4661 | goto fail; |
| 4662 | } |
| 4663 | |
| 4664 | rc = regulator_set_voltage(vreg_ldo18_adc, 2200000, 2200000); |
| 4665 | if (rc) { |
| 4666 | pr_err("%s: unable to set ldo18 voltage to 2.2V\n", __func__); |
| 4667 | goto fail; |
| 4668 | } |
| 4669 | |
| 4670 | return rc; |
| 4671 | fail: |
| 4672 | regulator_put(vreg_ldo18_adc); |
| 4673 | return rc; |
| 4674 | } |
| 4675 | |
| 4676 | static void pmic8058_xoadc_vreg_shutdown(void) |
| 4677 | { |
| 4678 | regulator_put(vreg_ldo18_adc); |
| 4679 | } |
| 4680 | |
| 4681 | /* usec. For this ADC, |
| 4682 | * this time represents clk rate @ txco w/ 1024 decimation ratio. |
| 4683 | * Each channel has different configuration, thus at the time of starting |
| 4684 | * the conversion, xoadc will return actual conversion time |
| 4685 | * */ |
| 4686 | static struct adc_properties pm8058_xoadc_data = { |
| 4687 | .adc_reference = 2200, /* milli-voltage for this adc */ |
| 4688 | .bitresolution = 15, |
| 4689 | .bipolar = 0, |
| 4690 | .conversiontime = 54, |
| 4691 | }; |
| 4692 | |
| 4693 | static struct xoadc_platform_data xoadc_pdata = { |
| 4694 | .xoadc_prop = &pm8058_xoadc_data, |
| 4695 | .xoadc_mpp_config = pmic8058_xoadc_mpp_config, |
| 4696 | .xoadc_vreg_set = pmic8058_xoadc_vreg_config, |
| 4697 | .xoadc_num = XOADC_PMIC_0, |
| 4698 | .xoadc_vreg_setup = pmic8058_xoadc_vreg_setup, |
| 4699 | .xoadc_vreg_shutdown = pmic8058_xoadc_vreg_shutdown, |
| 4700 | }; |
| 4701 | #endif |
| 4702 | |
| 4703 | #ifdef CONFIG_MSM_SDIO_AL |
| 4704 | |
| 4705 | static unsigned mdm2ap_status = 140; |
| 4706 | |
| 4707 | static int configure_mdm2ap_status(int on) |
| 4708 | { |
| 4709 | int ret = 0; |
| 4710 | if (on) |
| 4711 | ret = msm_gpiomux_get(mdm2ap_status); |
| 4712 | else |
| 4713 | ret = msm_gpiomux_put(mdm2ap_status); |
| 4714 | |
| 4715 | if (ret) |
| 4716 | pr_err("%s: mdm2ap_status config failed, on = %d\n", __func__, |
| 4717 | on); |
| 4718 | |
| 4719 | return ret; |
| 4720 | } |
| 4721 | |
| 4722 | |
| 4723 | static int get_mdm2ap_status(void) |
| 4724 | { |
| 4725 | return gpio_get_value(mdm2ap_status); |
| 4726 | } |
| 4727 | |
| 4728 | static struct sdio_al_platform_data sdio_al_pdata = { |
| 4729 | .config_mdm2ap_status = configure_mdm2ap_status, |
| 4730 | .get_mdm2ap_status = get_mdm2ap_status, |
| 4731 | .allow_sdioc_version_major_2 = 0, |
| 4732 | .peer_sdioc_version_minor = 0x0101, |
| 4733 | .peer_sdioc_version_major = 0x0004, |
| 4734 | .peer_sdioc_boot_version_minor = 0x0001, |
| 4735 | .peer_sdioc_boot_version_major = 0x0003 |
| 4736 | }; |
| 4737 | |
| 4738 | struct platform_device msm_device_sdio_al = { |
| 4739 | .name = "msm_sdio_al", |
| 4740 | .id = -1, |
| 4741 | .dev = { |
| 4742 | .platform_data = &sdio_al_pdata, |
| 4743 | }, |
| 4744 | }; |
| 4745 | |
| 4746 | #endif /* CONFIG_MSM_SDIO_AL */ |
| 4747 | |
Praveen Chidambaram | 043f4ce | 2011-08-02 09:37:59 -0600 | [diff] [blame] | 4748 | static struct platform_device msm_rpm_device = { |
| 4749 | .name = "msm_rpm", |
| 4750 | .id = -1, |
| 4751 | }; |
| 4752 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 4753 | static struct platform_device *charm_devices[] __initdata = { |
| 4754 | &msm_charm_modem, |
| 4755 | #ifdef CONFIG_MSM_SDIO_AL |
| 4756 | &msm_device_sdio_al, |
| 4757 | #endif |
| 4758 | }; |
| 4759 | |
| 4760 | static struct platform_device *surf_devices[] __initdata = { |
| 4761 | &msm_device_smd, |
| 4762 | &msm_device_uart_dm12, |
| 4763 | #ifdef CONFIG_I2C_QUP |
| 4764 | &msm_gsbi3_qup_i2c_device, |
| 4765 | &msm_gsbi4_qup_i2c_device, |
| 4766 | &msm_gsbi7_qup_i2c_device, |
| 4767 | &msm_gsbi8_qup_i2c_device, |
| 4768 | &msm_gsbi9_qup_i2c_device, |
| 4769 | &msm_gsbi12_qup_i2c_device, |
| 4770 | #endif |
| 4771 | #ifdef CONFIG_SERIAL_MSM_HS |
| 4772 | &msm_device_uart_dm1, |
| 4773 | #endif |
| 4774 | #ifdef CONFIG_I2C_SSBI |
| 4775 | &msm_device_ssbi1, |
| 4776 | &msm_device_ssbi2, |
| 4777 | &msm_device_ssbi3, |
| 4778 | #endif |
| 4779 | #if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE) |
| 4780 | &isp1763_device, |
| 4781 | #endif |
| 4782 | |
| 4783 | &asoc_msm_pcm, |
| 4784 | &asoc_msm_dai0, |
| 4785 | &asoc_msm_dai1, |
| 4786 | #if defined (CONFIG_MSM_8x60_VOIP) |
| 4787 | &asoc_msm_mvs, |
| 4788 | &asoc_mvs_dai0, |
| 4789 | &asoc_mvs_dai1, |
| 4790 | #endif |
| 4791 | #if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_HCD) |
| 4792 | &msm_device_otg, |
| 4793 | #endif |
| 4794 | #ifdef CONFIG_USB_GADGET_MSM_72K |
| 4795 | &msm_device_gadget_peripheral, |
| 4796 | #endif |
| 4797 | #ifdef CONFIG_USB_G_ANDROID |
| 4798 | &android_usb_device, |
| 4799 | #endif |
| 4800 | #ifdef CONFIG_BATTERY_MSM |
| 4801 | &msm_batt_device, |
| 4802 | #endif |
| 4803 | #ifdef CONFIG_ANDROID_PMEM |
| 4804 | &android_pmem_device, |
| 4805 | &android_pmem_adsp_device, |
| 4806 | &android_pmem_audio_device, |
| 4807 | &android_pmem_smipool_device, |
| 4808 | #endif |
| 4809 | #ifdef CONFIG_MSM_ROTATOR |
| 4810 | &msm_rotator_device, |
| 4811 | #endif |
| 4812 | &msm_fb_device, |
| 4813 | &msm_kgsl_3d0, |
| 4814 | &msm_kgsl_2d0, |
| 4815 | &msm_kgsl_2d1, |
| 4816 | &lcdc_samsung_panel_device, |
| 4817 | #ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT |
| 4818 | &lcdc_samsung_oled_panel_device, |
| 4819 | #endif |
| 4820 | #ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA |
| 4821 | &lcdc_auo_wvga_panel_device, |
| 4822 | #endif |
| 4823 | #ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL |
| 4824 | &hdmi_msm_device, |
| 4825 | #endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */ |
| 4826 | #ifdef CONFIG_FB_MSM_MIPI_DSI |
| 4827 | &mipi_dsi_toshiba_panel_device, |
| 4828 | &mipi_dsi_novatek_panel_device, |
| 4829 | #endif |
| 4830 | #ifdef CONFIG_MSM_CAMERA |
| 4831 | #ifdef CONFIG_MT9E013 |
| 4832 | &msm_camera_sensor_mt9e013, |
| 4833 | #endif |
| 4834 | #ifdef CONFIG_IMX074 |
| 4835 | &msm_camera_sensor_imx074, |
| 4836 | #endif |
| 4837 | #ifdef CONFIG_WEBCAM_OV7692 |
| 4838 | &msm_camera_sensor_webcam_ov7692, |
| 4839 | #endif |
| 4840 | #ifdef CONFIG_WEBCAM_OV9726 |
| 4841 | &msm_camera_sensor_webcam_ov9726, |
| 4842 | #endif |
| 4843 | #ifdef CONFIG_QS_S5K4E1 |
| 4844 | &msm_camera_sensor_qs_s5k4e1, |
| 4845 | #endif |
Jilai Wang | 971f97f | 2011-07-13 14:25:25 -0400 | [diff] [blame^] | 4846 | #ifdef CONFIG_VX6953 |
| 4847 | &msm_camera_sensor_vx6953, |
| 4848 | #endif |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 4849 | #endif |
| 4850 | #ifdef CONFIG_MSM_GEMINI |
| 4851 | &msm_gemini_device, |
| 4852 | #endif |
| 4853 | #ifdef CONFIG_MSM_VPE |
| 4854 | &msm_vpe_device, |
| 4855 | #endif |
| 4856 | |
| 4857 | #if defined(CONFIG_MSM_RPM_LOG) || defined(CONFIG_MSM_RPM_LOG_MODULE) |
| 4858 | &msm_rpm_log_device, |
| 4859 | #endif |
| 4860 | #if defined(CONFIG_MSM_RPM_STATS_LOG) |
| 4861 | &msm_rpm_stat_device, |
| 4862 | #endif |
| 4863 | &msm_device_vidc, |
| 4864 | #if (defined(CONFIG_MARIMBA_CORE)) && \ |
| 4865 | (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE)) |
| 4866 | &msm_bt_power_device, |
| 4867 | #endif |
| 4868 | #ifdef CONFIG_SENSORS_MSM_ADC |
| 4869 | &msm_adc_device, |
| 4870 | #endif |
| 4871 | #ifdef CONFIG_PMIC8058 |
| 4872 | &rpm_vreg_device[RPM_VREG_ID_PM8058_L0], |
| 4873 | &rpm_vreg_device[RPM_VREG_ID_PM8058_L1], |
| 4874 | &rpm_vreg_device[RPM_VREG_ID_PM8058_L2], |
| 4875 | &rpm_vreg_device[RPM_VREG_ID_PM8058_L3], |
| 4876 | &rpm_vreg_device[RPM_VREG_ID_PM8058_L4], |
| 4877 | &rpm_vreg_device[RPM_VREG_ID_PM8058_L5], |
| 4878 | &rpm_vreg_device[RPM_VREG_ID_PM8058_L6], |
| 4879 | &rpm_vreg_device[RPM_VREG_ID_PM8058_L7], |
| 4880 | &rpm_vreg_device[RPM_VREG_ID_PM8058_L8], |
| 4881 | &rpm_vreg_device[RPM_VREG_ID_PM8058_L9], |
| 4882 | &rpm_vreg_device[RPM_VREG_ID_PM8058_L10], |
| 4883 | &rpm_vreg_device[RPM_VREG_ID_PM8058_L11], |
| 4884 | &rpm_vreg_device[RPM_VREG_ID_PM8058_L12], |
| 4885 | &rpm_vreg_device[RPM_VREG_ID_PM8058_L13], |
| 4886 | &rpm_vreg_device[RPM_VREG_ID_PM8058_L14], |
| 4887 | &rpm_vreg_device[RPM_VREG_ID_PM8058_L15], |
| 4888 | &rpm_vreg_device[RPM_VREG_ID_PM8058_L16], |
| 4889 | &rpm_vreg_device[RPM_VREG_ID_PM8058_L17], |
| 4890 | &rpm_vreg_device[RPM_VREG_ID_PM8058_L18], |
| 4891 | &rpm_vreg_device[RPM_VREG_ID_PM8058_L19], |
| 4892 | &rpm_vreg_device[RPM_VREG_ID_PM8058_L20], |
| 4893 | &rpm_vreg_device[RPM_VREG_ID_PM8058_L21], |
| 4894 | &rpm_vreg_device[RPM_VREG_ID_PM8058_L22], |
| 4895 | &rpm_vreg_device[RPM_VREG_ID_PM8058_L23], |
| 4896 | &rpm_vreg_device[RPM_VREG_ID_PM8058_L24], |
| 4897 | &rpm_vreg_device[RPM_VREG_ID_PM8058_L25], |
| 4898 | &rpm_vreg_device[RPM_VREG_ID_PM8058_S2], |
| 4899 | &rpm_vreg_device[RPM_VREG_ID_PM8058_S3], |
| 4900 | &rpm_vreg_device[RPM_VREG_ID_PM8058_S4], |
| 4901 | &rpm_vreg_device[RPM_VREG_ID_PM8058_LVS0], |
| 4902 | &rpm_vreg_device[RPM_VREG_ID_PM8058_LVS1], |
| 4903 | &rpm_vreg_device[RPM_VREG_ID_PM8058_NCP], |
| 4904 | #endif |
| 4905 | #ifdef CONFIG_PMIC8901 |
| 4906 | &rpm_vreg_device[RPM_VREG_ID_PM8901_L0], |
| 4907 | &rpm_vreg_device[RPM_VREG_ID_PM8901_L1], |
| 4908 | &rpm_vreg_device[RPM_VREG_ID_PM8901_L2], |
| 4909 | &rpm_vreg_device[RPM_VREG_ID_PM8901_L3], |
| 4910 | &rpm_vreg_device[RPM_VREG_ID_PM8901_L4], |
| 4911 | &rpm_vreg_device[RPM_VREG_ID_PM8901_L5], |
| 4912 | &rpm_vreg_device[RPM_VREG_ID_PM8901_L6], |
| 4913 | &rpm_vreg_device[RPM_VREG_ID_PM8901_S2], |
| 4914 | &rpm_vreg_device[RPM_VREG_ID_PM8901_S3], |
| 4915 | &rpm_vreg_device[RPM_VREG_ID_PM8901_S4], |
| 4916 | &rpm_vreg_device[RPM_VREG_ID_PM8901_LVS0], |
| 4917 | &rpm_vreg_device[RPM_VREG_ID_PM8901_LVS1], |
| 4918 | &rpm_vreg_device[RPM_VREG_ID_PM8901_LVS2], |
| 4919 | &rpm_vreg_device[RPM_VREG_ID_PM8901_LVS3], |
| 4920 | &rpm_vreg_device[RPM_VREG_ID_PM8901_MVS0], |
| 4921 | #endif |
| 4922 | |
| 4923 | #if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \ |
| 4924 | defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE) |
| 4925 | &qcrypto_device, |
| 4926 | #endif |
| 4927 | |
| 4928 | #if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \ |
| 4929 | defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE) |
| 4930 | &qcedev_device, |
| 4931 | #endif |
| 4932 | |
| 4933 | #ifdef CONFIG_MSM_SDIO_AL |
| 4934 | &msm_device_sdio_al, |
| 4935 | #endif |
| 4936 | |
| 4937 | #if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE) |
| 4938 | #ifdef CONFIG_MSM_USE_TSIF1 |
| 4939 | &msm_device_tsif[1], |
| 4940 | #else |
| 4941 | &msm_device_tsif[0], |
| 4942 | #endif /* CONFIG_MSM_USE_TSIF1 */ |
| 4943 | #endif /* CONFIG_TSIF */ |
| 4944 | |
| 4945 | #ifdef CONFIG_HW_RANDOM_MSM |
| 4946 | &msm_device_rng, |
| 4947 | #endif |
| 4948 | |
| 4949 | &msm_tsens_device, |
Praveen Chidambaram | 043f4ce | 2011-08-02 09:37:59 -0600 | [diff] [blame] | 4950 | &msm_rpm_device, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 4951 | |
| 4952 | }; |
| 4953 | |
| 4954 | static struct memtype_reserve msm8x60_reserve_table[] __initdata = { |
| 4955 | /* Kernel SMI memory pool for video core, used for firmware */ |
| 4956 | /* and encoder, decoder scratch buffers */ |
| 4957 | /* Kernel SMI memory pool should always precede the user space */ |
| 4958 | /* SMI memory pool, as the video core will use offset address */ |
| 4959 | /* from the Firmware base */ |
| 4960 | [MEMTYPE_SMI_KERNEL] = { |
| 4961 | .start = KERNEL_SMI_BASE, |
| 4962 | .limit = KERNEL_SMI_SIZE, |
| 4963 | .size = KERNEL_SMI_SIZE, |
| 4964 | .flags = MEMTYPE_FLAGS_FIXED, |
| 4965 | }, |
| 4966 | /* User space SMI memory pool for video core */ |
| 4967 | /* used for encoder, decoder input & output buffers */ |
| 4968 | [MEMTYPE_SMI] = { |
| 4969 | .start = USER_SMI_BASE, |
| 4970 | .limit = USER_SMI_SIZE, |
| 4971 | .flags = MEMTYPE_FLAGS_FIXED, |
| 4972 | }, |
| 4973 | [MEMTYPE_EBI0] = { |
| 4974 | .flags = MEMTYPE_FLAGS_1M_ALIGN, |
| 4975 | }, |
| 4976 | [MEMTYPE_EBI1] = { |
| 4977 | .flags = MEMTYPE_FLAGS_1M_ALIGN, |
| 4978 | }, |
| 4979 | }; |
| 4980 | |
| 4981 | static void __init size_pmem_devices(void) |
| 4982 | { |
| 4983 | #ifdef CONFIG_ANDROID_PMEM |
| 4984 | android_pmem_adsp_pdata.size = pmem_adsp_size; |
| 4985 | android_pmem_smipool_pdata.size = MSM_PMEM_SMIPOOL_SIZE; |
| 4986 | android_pmem_audio_pdata.size = MSM_PMEM_AUDIO_SIZE; |
| 4987 | android_pmem_pdata.size = pmem_sf_size; |
| 4988 | #endif |
| 4989 | } |
| 4990 | |
| 4991 | static void __init reserve_memory_for(struct android_pmem_platform_data *p) |
| 4992 | { |
| 4993 | msm8x60_reserve_table[p->memory_type].size += p->size; |
| 4994 | } |
| 4995 | |
| 4996 | static void __init reserve_pmem_memory(void) |
| 4997 | { |
| 4998 | #ifdef CONFIG_ANDROID_PMEM |
| 4999 | reserve_memory_for(&android_pmem_adsp_pdata); |
| 5000 | reserve_memory_for(&android_pmem_smipool_pdata); |
| 5001 | reserve_memory_for(&android_pmem_audio_pdata); |
| 5002 | reserve_memory_for(&android_pmem_pdata); |
| 5003 | msm8x60_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size; |
| 5004 | #endif |
| 5005 | } |
| 5006 | |
| 5007 | static void __init msm8x60_calculate_reserve_sizes(void) |
| 5008 | { |
| 5009 | size_pmem_devices(); |
| 5010 | reserve_pmem_memory(); |
| 5011 | } |
| 5012 | |
| 5013 | static int msm8x60_paddr_to_memtype(unsigned int paddr) |
| 5014 | { |
| 5015 | if (paddr >= 0x40000000 && paddr < 0x60000000) |
| 5016 | return MEMTYPE_EBI1; |
| 5017 | if (paddr >= 0x38000000 && paddr < 0x40000000) |
| 5018 | return MEMTYPE_SMI; |
| 5019 | return MEMTYPE_NONE; |
| 5020 | } |
| 5021 | |
| 5022 | static struct reserve_info msm8x60_reserve_info __initdata = { |
| 5023 | .memtype_reserve_table = msm8x60_reserve_table, |
| 5024 | .calculate_reserve_sizes = msm8x60_calculate_reserve_sizes, |
| 5025 | .paddr_to_memtype = msm8x60_paddr_to_memtype, |
| 5026 | }; |
| 5027 | |
| 5028 | static void __init msm8x60_reserve(void) |
| 5029 | { |
| 5030 | reserve_info = &msm8x60_reserve_info; |
| 5031 | msm_reserve(); |
| 5032 | } |
| 5033 | |
| 5034 | #define EXT_CHG_VALID_MPP 10 |
| 5035 | #define EXT_CHG_VALID_MPP_2 11 |
| 5036 | |
| 5037 | #ifdef CONFIG_ISL9519_CHARGER |
| 5038 | static int isl_detection_setup(void) |
| 5039 | { |
| 5040 | int ret = 0; |
| 5041 | |
| 5042 | ret = pm8058_mpp_config_digital_in(EXT_CHG_VALID_MPP, |
| 5043 | PM8058_MPP_DIG_LEVEL_S3, |
| 5044 | PM_MPP_DIN_TO_INT); |
| 5045 | ret |= pm8058_mpp_config_bi_dir(EXT_CHG_VALID_MPP_2, |
| 5046 | PM8058_MPP_DIG_LEVEL_S3, |
| 5047 | PM_MPP_BI_PULLUP_10KOHM |
| 5048 | ); |
| 5049 | return ret; |
| 5050 | } |
| 5051 | |
| 5052 | static struct isl_platform_data isl_data __initdata = { |
| 5053 | .chgcurrent = 700, |
| 5054 | .valid_n_gpio = PM8058_MPP_PM_TO_SYS(10), |
| 5055 | .chg_detection_config = isl_detection_setup, |
| 5056 | .max_system_voltage = 4200, |
| 5057 | .min_system_voltage = 3200, |
| 5058 | .term_current = 120, |
| 5059 | .input_current = 2048, |
| 5060 | }; |
| 5061 | |
| 5062 | static struct i2c_board_info isl_charger_i2c_info[] __initdata = { |
| 5063 | { |
| 5064 | I2C_BOARD_INFO("isl9519q", 0x9), |
| 5065 | .irq = PM8058_CBLPWR_IRQ(PM8058_IRQ_BASE), |
| 5066 | .platform_data = &isl_data, |
| 5067 | }, |
| 5068 | }; |
| 5069 | #endif |
| 5070 | |
| 5071 | #if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE) |
| 5072 | static int smb137b_detection_setup(void) |
| 5073 | { |
| 5074 | int ret = 0; |
| 5075 | |
| 5076 | ret = pm8058_mpp_config_digital_in(EXT_CHG_VALID_MPP, |
| 5077 | PM8058_MPP_DIG_LEVEL_S3, |
| 5078 | PM_MPP_DIN_TO_INT); |
| 5079 | ret |= pm8058_mpp_config_bi_dir(EXT_CHG_VALID_MPP_2, |
| 5080 | PM8058_MPP_DIG_LEVEL_S3, |
| 5081 | PM_MPP_BI_PULLUP_10KOHM); |
| 5082 | return ret; |
| 5083 | } |
| 5084 | |
| 5085 | static struct smb137b_platform_data smb137b_data __initdata = { |
| 5086 | .chg_detection_config = smb137b_detection_setup, |
| 5087 | .valid_n_gpio = PM8058_MPP_PM_TO_SYS(10), |
| 5088 | .batt_mah_rating = 950, |
| 5089 | }; |
| 5090 | |
| 5091 | static struct i2c_board_info smb137b_charger_i2c_info[] __initdata = { |
| 5092 | { |
| 5093 | I2C_BOARD_INFO("smb137b", 0x08), |
| 5094 | .irq = PM8058_CBLPWR_IRQ(PM8058_IRQ_BASE), |
| 5095 | .platform_data = &smb137b_data, |
| 5096 | }, |
| 5097 | }; |
| 5098 | #endif |
| 5099 | |
| 5100 | #ifdef CONFIG_PMIC8058 |
| 5101 | #define PMIC_GPIO_SDC3_DET 22 |
| 5102 | |
| 5103 | static int pm8058_gpios_init(void) |
| 5104 | { |
| 5105 | int i; |
| 5106 | int rc; |
| 5107 | struct pm8058_gpio_cfg { |
| 5108 | int gpio; |
| 5109 | struct pm8058_gpio cfg; |
| 5110 | }; |
| 5111 | |
| 5112 | struct pm8058_gpio_cfg gpio_cfgs[] = { |
| 5113 | { /* FFA ethernet */ |
| 5114 | 6, |
| 5115 | { |
| 5116 | .direction = PM_GPIO_DIR_IN, |
| 5117 | .pull = PM_GPIO_PULL_DN, |
| 5118 | .vin_sel = 2, |
| 5119 | .function = PM_GPIO_FUNC_NORMAL, |
| 5120 | .inv_int_pol = 0, |
| 5121 | }, |
| 5122 | }, |
| 5123 | #ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION |
| 5124 | { |
| 5125 | PMIC_GPIO_SDC3_DET - 1, |
| 5126 | { |
| 5127 | .direction = PM_GPIO_DIR_IN, |
| 5128 | .pull = PM_GPIO_PULL_UP_30, |
| 5129 | .vin_sel = 2, |
| 5130 | .function = PM_GPIO_FUNC_NORMAL, |
| 5131 | .inv_int_pol = 0, |
| 5132 | }, |
| 5133 | }, |
| 5134 | #endif |
| 5135 | { /* core&surf gpio expander */ |
| 5136 | UI_INT1_N, |
| 5137 | { |
| 5138 | .direction = PM_GPIO_DIR_IN, |
| 5139 | .pull = PM_GPIO_PULL_NO, |
| 5140 | .vin_sel = PM_GPIO_VIN_S3, |
| 5141 | .function = PM_GPIO_FUNC_NORMAL, |
| 5142 | .inv_int_pol = 0, |
| 5143 | }, |
| 5144 | }, |
| 5145 | { /* docking gpio expander */ |
| 5146 | UI_INT2_N, |
| 5147 | { |
| 5148 | .direction = PM_GPIO_DIR_IN, |
| 5149 | .pull = PM_GPIO_PULL_NO, |
| 5150 | .vin_sel = PM_GPIO_VIN_S3, |
| 5151 | .function = PM_GPIO_FUNC_NORMAL, |
| 5152 | .inv_int_pol = 0, |
| 5153 | }, |
| 5154 | }, |
| 5155 | { /* FHA/keypad gpio expanders */ |
| 5156 | UI_INT3_N, |
| 5157 | { |
| 5158 | .direction = PM_GPIO_DIR_IN, |
| 5159 | .pull = PM_GPIO_PULL_NO, |
| 5160 | .vin_sel = PM_GPIO_VIN_S3, |
| 5161 | .function = PM_GPIO_FUNC_NORMAL, |
| 5162 | .inv_int_pol = 0, |
| 5163 | }, |
| 5164 | }, |
| 5165 | { /* TouchDisc Interrupt */ |
| 5166 | 5, |
| 5167 | { |
| 5168 | .direction = PM_GPIO_DIR_IN, |
| 5169 | .pull = PM_GPIO_PULL_UP_1P5, |
| 5170 | .vin_sel = 2, |
| 5171 | .function = PM_GPIO_FUNC_NORMAL, |
| 5172 | .inv_int_pol = 0, |
| 5173 | } |
| 5174 | }, |
| 5175 | { /* Timpani Reset */ |
| 5176 | 20, |
| 5177 | { |
| 5178 | .direction = PM_GPIO_DIR_OUT, |
| 5179 | .output_value = 1, |
| 5180 | .output_buffer = PM_GPIO_OUT_BUF_CMOS, |
| 5181 | .pull = PM_GPIO_PULL_DN, |
| 5182 | .out_strength = PM_GPIO_STRENGTH_HIGH, |
| 5183 | .function = PM_GPIO_FUNC_NORMAL, |
| 5184 | .vin_sel = 2, |
| 5185 | .inv_int_pol = 0, |
| 5186 | } |
| 5187 | }, |
| 5188 | { /* PMIC ID interrupt */ |
| 5189 | 36, |
| 5190 | { |
| 5191 | .direction = PM_GPIO_DIR_IN, |
| 5192 | .pull = PM_GPIO_PULL_UP_1P5, |
| 5193 | .function = PM_GPIO_FUNC_NORMAL, |
| 5194 | .vin_sel = 2, |
| 5195 | .inv_int_pol = 0, |
| 5196 | } |
| 5197 | }, |
| 5198 | }; |
| 5199 | |
| 5200 | #if defined(CONFIG_HAPTIC_ISA1200) || \ |
| 5201 | defined(CONFIG_HAPTIC_ISA1200_MODULE) |
| 5202 | |
| 5203 | struct pm8058_gpio_cfg en_hap_gpio_cfg = { |
| 5204 | PMIC_GPIO_HAP_ENABLE, |
| 5205 | { |
| 5206 | .direction = PM_GPIO_DIR_OUT, |
| 5207 | .pull = PM_GPIO_PULL_NO, |
| 5208 | .out_strength = PM_GPIO_STRENGTH_HIGH, |
| 5209 | .function = PM_GPIO_FUNC_NORMAL, |
| 5210 | .inv_int_pol = 0, |
| 5211 | .vin_sel = 2, |
| 5212 | .output_buffer = PM_GPIO_OUT_BUF_CMOS, |
| 5213 | .output_value = 0, |
| 5214 | } |
| 5215 | |
| 5216 | }; |
| 5217 | #endif |
| 5218 | |
| 5219 | #if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE) |
| 5220 | struct pm8058_gpio_cfg line_in_gpio_cfg = { |
| 5221 | 18, |
| 5222 | { |
| 5223 | .direction = PM_GPIO_DIR_IN, |
| 5224 | .pull = PM_GPIO_PULL_UP_1P5, |
| 5225 | .vin_sel = 2, |
| 5226 | .function = PM_GPIO_FUNC_NORMAL, |
| 5227 | .inv_int_pol = 0, |
| 5228 | } |
| 5229 | }; |
| 5230 | #endif |
| 5231 | |
| 5232 | #if defined(CONFIG_QS_S5K4E1) |
| 5233 | { |
| 5234 | struct pm8058_gpio_cfg qs_hc37_cam_pd_gpio_cfg = { |
| 5235 | 26, |
| 5236 | { |
| 5237 | .direction = PM_GPIO_DIR_OUT, |
| 5238 | .output_value = 0, |
| 5239 | .output_buffer = PM_GPIO_OUT_BUF_CMOS, |
| 5240 | .pull = PM_GPIO_PULL_DN, |
| 5241 | .out_strength = PM_GPIO_STRENGTH_HIGH, |
| 5242 | .function = PM_GPIO_FUNC_NORMAL, |
| 5243 | .vin_sel = 2, |
| 5244 | .inv_int_pol = 0, |
| 5245 | } |
| 5246 | }; |
| 5247 | #endif |
| 5248 | |
| 5249 | #if defined(CONFIG_HAPTIC_ISA1200) || \ |
| 5250 | defined(CONFIG_HAPTIC_ISA1200_MODULE) |
| 5251 | if (machine_is_msm8x60_fluid()) { |
| 5252 | rc = pm8058_gpio_config(en_hap_gpio_cfg.gpio, |
| 5253 | &en_hap_gpio_cfg.cfg); |
| 5254 | if (rc < 0) { |
| 5255 | pr_err("%s pmic haptics gpio config failed\n", |
| 5256 | __func__); |
| 5257 | return rc; |
| 5258 | } |
| 5259 | } |
| 5260 | #endif |
| 5261 | |
| 5262 | #if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE) |
| 5263 | /* Line_in only for 8660 ffa & surf */ |
| 5264 | if (machine_is_msm8x60_ffa() || machine_is_msm8x60_surf() || |
Zhang Chang Ken | 6baadf0 | 2011-08-05 09:48:15 -0400 | [diff] [blame] | 5265 | machine_is_msm8x60_fusion() || machine_is_msm8x60_dragon() || |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 5266 | machine_is_msm8x60_fusn_ffa()) { |
| 5267 | rc = pm8058_gpio_config(line_in_gpio_cfg.gpio, |
| 5268 | &line_in_gpio_cfg.cfg); |
| 5269 | if (rc < 0) { |
| 5270 | pr_err("%s pmic line_in gpio config failed\n", |
| 5271 | __func__); |
| 5272 | return rc; |
| 5273 | } |
| 5274 | } |
| 5275 | #endif |
| 5276 | |
| 5277 | #if defined(CONFIG_QS_S5K4E1) |
| 5278 | /* qs_cam_hc37_cam_pd only for 8660 fluid qs camera*/ |
| 5279 | if (machine_is_msm8x60_fluid()) { |
| 5280 | rc = pm8058_gpio_config(qs_hc37_cam_pd_gpio_cfg.gpio, |
| 5281 | &qs_hc37_cam_pd_gpio_cfg.cfg); |
| 5282 | if (rc < 0) { |
| 5283 | pr_err("%s pmic qs_hc37_cam_pd gpio config failed\n", |
| 5284 | __func__); |
| 5285 | return rc; |
| 5286 | } |
| 5287 | } |
| 5288 | } |
| 5289 | #endif |
| 5290 | |
| 5291 | for (i = 0; i < ARRAY_SIZE(gpio_cfgs); ++i) { |
| 5292 | rc = pm8058_gpio_config(gpio_cfgs[i].gpio, |
| 5293 | &gpio_cfgs[i].cfg); |
| 5294 | if (rc < 0) { |
| 5295 | pr_err("%s pmic gpio config failed\n", |
| 5296 | __func__); |
| 5297 | return rc; |
| 5298 | } |
| 5299 | } |
| 5300 | |
| 5301 | return 0; |
| 5302 | } |
| 5303 | |
| 5304 | static const unsigned int ffa_keymap[] = { |
| 5305 | KEY(0, 0, KEY_FN_F1), /* LS - PUSH1 */ |
| 5306 | KEY(0, 1, KEY_UP), /* NAV - UP */ |
| 5307 | KEY(0, 2, KEY_LEFT), /* NAV - LEFT */ |
| 5308 | KEY(0, 3, KEY_VOLUMEUP), /* Shuttle SW_UP */ |
| 5309 | |
| 5310 | KEY(1, 0, KEY_FN_F2), /* LS - PUSH2 */ |
| 5311 | KEY(1, 1, KEY_RIGHT), /* NAV - RIGHT */ |
| 5312 | KEY(1, 2, KEY_DOWN), /* NAV - DOWN */ |
| 5313 | KEY(1, 3, KEY_VOLUMEDOWN), |
| 5314 | |
| 5315 | KEY(2, 3, KEY_ENTER), /* SW_PUSH key */ |
| 5316 | |
| 5317 | KEY(4, 0, KEY_CAMERA_FOCUS), /* RS - PUSH1 */ |
| 5318 | KEY(4, 1, KEY_UP), /* USER_UP */ |
| 5319 | KEY(4, 2, KEY_LEFT), /* USER_LEFT */ |
| 5320 | KEY(4, 3, KEY_HOME), /* Right switch: MIC Bd */ |
| 5321 | KEY(4, 4, KEY_FN_F3), /* Reserved MIC */ |
| 5322 | |
| 5323 | KEY(5, 0, KEY_CAMERA), /* RS - PUSH2 */ |
| 5324 | KEY(5, 1, KEY_RIGHT), /* USER_RIGHT */ |
| 5325 | KEY(5, 2, KEY_DOWN), /* USER_DOWN */ |
| 5326 | KEY(5, 3, KEY_BACK), /* Left switch: MIC */ |
| 5327 | KEY(5, 4, KEY_MENU), /* Center switch: MIC */ |
| 5328 | }; |
| 5329 | |
Zhang Chang Ken | 683be17 | 2011-08-10 17:45:34 -0400 | [diff] [blame] | 5330 | static const unsigned int dragon_keymap[] = { |
| 5331 | KEY(0, 0, KEY_MENU), |
| 5332 | KEY(0, 2, KEY_1), |
| 5333 | KEY(0, 3, KEY_4), |
| 5334 | KEY(0, 4, KEY_7), |
| 5335 | |
| 5336 | KEY(1, 0, KEY_UP), |
| 5337 | KEY(1, 1, KEY_LEFT), |
| 5338 | KEY(1, 2, KEY_DOWN), |
| 5339 | KEY(1, 3, KEY_5), |
| 5340 | KEY(1, 4, KEY_8), |
| 5341 | |
| 5342 | KEY(2, 0, KEY_HOME), |
| 5343 | KEY(2, 1, KEY_REPLY), |
| 5344 | KEY(2, 2, KEY_2), |
| 5345 | KEY(2, 3, KEY_6), |
| 5346 | KEY(2, 4, KEY_0), |
| 5347 | |
| 5348 | KEY(3, 0, KEY_VOLUMEUP), |
| 5349 | KEY(3, 1, KEY_RIGHT), |
| 5350 | KEY(3, 2, KEY_3), |
| 5351 | KEY(3, 3, KEY_9), |
| 5352 | KEY(3, 4, KEY_SWITCHVIDEOMODE), |
| 5353 | |
| 5354 | KEY(4, 0, KEY_VOLUMEDOWN), |
| 5355 | KEY(4, 1, KEY_BACK), |
| 5356 | KEY(4, 2, KEY_CAMERA), |
| 5357 | KEY(4, 3, KEY_KBDILLUMTOGGLE), |
| 5358 | }; |
| 5359 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 5360 | static struct resource resources_keypad[] = { |
| 5361 | { |
| 5362 | .start = PM8058_KEYPAD_IRQ(PM8058_IRQ_BASE), |
| 5363 | .end = PM8058_KEYPAD_IRQ(PM8058_IRQ_BASE), |
| 5364 | .flags = IORESOURCE_IRQ, |
| 5365 | }, |
| 5366 | { |
| 5367 | .start = PM8058_KEYSTUCK_IRQ(PM8058_IRQ_BASE), |
| 5368 | .end = PM8058_KEYSTUCK_IRQ(PM8058_IRQ_BASE), |
| 5369 | .flags = IORESOURCE_IRQ, |
| 5370 | }, |
| 5371 | }; |
| 5372 | |
| 5373 | static struct matrix_keymap_data ffa_keymap_data = { |
| 5374 | .keymap_size = ARRAY_SIZE(ffa_keymap), |
| 5375 | .keymap = ffa_keymap, |
| 5376 | }; |
| 5377 | |
| 5378 | static struct pmic8058_keypad_data ffa_keypad_data = { |
| 5379 | .input_name = "ffa-keypad", |
| 5380 | .input_phys_device = "ffa-keypad/input0", |
| 5381 | .num_rows = 6, |
| 5382 | .num_cols = 5, |
| 5383 | .rows_gpio_start = 8, |
| 5384 | .cols_gpio_start = 0, |
| 5385 | .debounce_ms = {8, 10}, |
| 5386 | .scan_delay_ms = 32, |
| 5387 | .row_hold_ns = 91500, |
| 5388 | .wakeup = 1, |
| 5389 | .keymap_data = &ffa_keymap_data, |
| 5390 | }; |
| 5391 | |
Zhang Chang Ken | 683be17 | 2011-08-10 17:45:34 -0400 | [diff] [blame] | 5392 | static struct matrix_keymap_data dragon_keymap_data = { |
| 5393 | .keymap_size = ARRAY_SIZE(dragon_keymap), |
| 5394 | .keymap = dragon_keymap, |
| 5395 | }; |
| 5396 | |
| 5397 | static struct pmic8058_keypad_data dragon_keypad_data = { |
| 5398 | .input_name = "dragon-keypad", |
| 5399 | .input_phys_device = "dragon-keypad/input0", |
| 5400 | .num_rows = 6, |
| 5401 | .num_cols = 5, |
| 5402 | .rows_gpio_start = 8, |
| 5403 | .cols_gpio_start = 0, |
| 5404 | .debounce_ms = {8, 10}, |
| 5405 | .scan_delay_ms = 32, |
| 5406 | .row_hold_ns = 91500, |
| 5407 | .wakeup = 1, |
| 5408 | .keymap_data = &dragon_keymap_data, |
| 5409 | }; |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 5410 | static const unsigned int fluid_keymap[] = { |
| 5411 | KEY(0, 0, KEY_FN_F1), /* LS - PUSH1 */ |
| 5412 | KEY(0, 1, KEY_UP), /* NAV - UP */ |
| 5413 | KEY(0, 2, KEY_LEFT), /* NAV - LEFT */ |
| 5414 | KEY(0, 3, KEY_VOLUMEDOWN), /* Shuttle SW_UP */ |
| 5415 | |
| 5416 | KEY(1, 0, KEY_FN_F2), /* LS - PUSH2 */ |
| 5417 | KEY(1, 1, KEY_RIGHT), /* NAV - RIGHT */ |
| 5418 | KEY(1, 2, KEY_DOWN), /* NAV - DOWN */ |
| 5419 | KEY(1, 3, KEY_VOLUMEUP), |
| 5420 | |
| 5421 | KEY(2, 3, KEY_ENTER), /* SW_PUSH key */ |
| 5422 | |
| 5423 | KEY(4, 0, KEY_CAMERA_FOCUS), /* RS - PUSH1 */ |
| 5424 | KEY(4, 1, KEY_UP), /* USER_UP */ |
| 5425 | KEY(4, 2, KEY_LEFT), /* USER_LEFT */ |
| 5426 | KEY(4, 3, KEY_HOME), /* Right switch: MIC Bd */ |
| 5427 | KEY(4, 4, KEY_FN_F3), /* Reserved MIC */ |
| 5428 | |
Jilai Wang | 9a89510 | 2011-07-12 14:00:35 -0400 | [diff] [blame] | 5429 | KEY(5, 0, KEY_CAMERA), /* RS - PUSH2 */ |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 5430 | KEY(5, 1, KEY_RIGHT), /* USER_RIGHT */ |
| 5431 | KEY(5, 2, KEY_DOWN), /* USER_DOWN */ |
| 5432 | KEY(5, 3, KEY_BACK), /* Left switch: MIC */ |
| 5433 | KEY(5, 4, KEY_MENU), /* Center switch: MIC */ |
| 5434 | }; |
| 5435 | |
| 5436 | static struct matrix_keymap_data fluid_keymap_data = { |
| 5437 | .keymap_size = ARRAY_SIZE(fluid_keymap), |
| 5438 | .keymap = fluid_keymap, |
| 5439 | }; |
| 5440 | |
| 5441 | static struct pmic8058_keypad_data fluid_keypad_data = { |
| 5442 | .input_name = "fluid-keypad", |
| 5443 | .input_phys_device = "fluid-keypad/input0", |
| 5444 | .num_rows = 6, |
| 5445 | .num_cols = 5, |
| 5446 | .rows_gpio_start = 8, |
| 5447 | .cols_gpio_start = 0, |
| 5448 | .debounce_ms = {8, 10}, |
| 5449 | .scan_delay_ms = 32, |
| 5450 | .row_hold_ns = 91500, |
| 5451 | .wakeup = 1, |
| 5452 | .keymap_data = &fluid_keymap_data, |
| 5453 | }; |
| 5454 | |
| 5455 | static struct resource resources_pwrkey[] = { |
| 5456 | { |
| 5457 | .start = PM8058_PWRKEY_REL_IRQ(PM8058_IRQ_BASE), |
| 5458 | .end = PM8058_PWRKEY_REL_IRQ(PM8058_IRQ_BASE), |
| 5459 | .flags = IORESOURCE_IRQ, |
| 5460 | }, |
| 5461 | { |
| 5462 | .start = PM8058_PWRKEY_PRESS_IRQ(PM8058_IRQ_BASE), |
| 5463 | .end = PM8058_PWRKEY_PRESS_IRQ(PM8058_IRQ_BASE), |
| 5464 | .flags = IORESOURCE_IRQ, |
| 5465 | }, |
| 5466 | }; |
| 5467 | |
| 5468 | static struct pmic8058_pwrkey_pdata pwrkey_pdata = { |
| 5469 | .pull_up = 1, |
| 5470 | .kpd_trigger_delay_us = 970, |
| 5471 | .wakeup = 1, |
| 5472 | .pwrkey_time_ms = 500, |
| 5473 | }; |
| 5474 | |
| 5475 | static struct pmic8058_vibrator_pdata pmic_vib_pdata = { |
| 5476 | .initial_vibrate_ms = 500, |
| 5477 | .level_mV = 3000, |
| 5478 | .max_timeout_ms = 15000, |
| 5479 | }; |
| 5480 | |
| 5481 | #if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE) |
| 5482 | #define PM8058_OTHC_CNTR_BASE0 0xA0 |
| 5483 | #define PM8058_OTHC_CNTR_BASE1 0x134 |
| 5484 | #define PM8058_OTHC_CNTR_BASE2 0x137 |
| 5485 | #define PM8058_LINE_IN_DET_GPIO PM8058_GPIO_PM_TO_SYS(18) |
| 5486 | |
| 5487 | static struct othc_accessory_info othc_accessories[] = { |
| 5488 | { |
| 5489 | .accessory = OTHC_SVIDEO_OUT, |
| 5490 | .detect_flags = OTHC_MICBIAS_DETECT | OTHC_SWITCH_DETECT |
| 5491 | | OTHC_ADC_DETECT, |
| 5492 | .key_code = SW_VIDEOOUT_INSERT, |
| 5493 | .enabled = false, |
| 5494 | .adc_thres = { |
| 5495 | .min_threshold = 20, |
| 5496 | .max_threshold = 40, |
| 5497 | }, |
| 5498 | }, |
| 5499 | { |
| 5500 | .accessory = OTHC_ANC_HEADPHONE, |
| 5501 | .detect_flags = OTHC_MICBIAS_DETECT | OTHC_GPIO_DETECT | |
| 5502 | OTHC_SWITCH_DETECT, |
| 5503 | .gpio = PM8058_LINE_IN_DET_GPIO, |
| 5504 | .active_low = 1, |
| 5505 | .key_code = SW_HEADPHONE_INSERT, |
| 5506 | .enabled = true, |
| 5507 | }, |
| 5508 | { |
| 5509 | .accessory = OTHC_ANC_HEADSET, |
| 5510 | .detect_flags = OTHC_MICBIAS_DETECT | OTHC_GPIO_DETECT, |
| 5511 | .gpio = PM8058_LINE_IN_DET_GPIO, |
| 5512 | .active_low = 1, |
| 5513 | .key_code = SW_HEADPHONE_INSERT, |
| 5514 | .enabled = true, |
| 5515 | }, |
| 5516 | { |
| 5517 | .accessory = OTHC_HEADPHONE, |
| 5518 | .detect_flags = OTHC_MICBIAS_DETECT | OTHC_SWITCH_DETECT, |
| 5519 | .key_code = SW_HEADPHONE_INSERT, |
| 5520 | .enabled = true, |
| 5521 | }, |
| 5522 | { |
| 5523 | .accessory = OTHC_MICROPHONE, |
| 5524 | .detect_flags = OTHC_GPIO_DETECT, |
| 5525 | .gpio = PM8058_LINE_IN_DET_GPIO, |
| 5526 | .active_low = 1, |
| 5527 | .key_code = SW_MICROPHONE_INSERT, |
| 5528 | .enabled = true, |
| 5529 | }, |
| 5530 | { |
| 5531 | .accessory = OTHC_HEADSET, |
| 5532 | .detect_flags = OTHC_MICBIAS_DETECT, |
| 5533 | .key_code = SW_HEADPHONE_INSERT, |
| 5534 | .enabled = true, |
| 5535 | }, |
| 5536 | }; |
| 5537 | |
| 5538 | static struct othc_switch_info switch_info[] = { |
| 5539 | { |
| 5540 | .min_adc_threshold = 0, |
| 5541 | .max_adc_threshold = 100, |
| 5542 | .key_code = KEY_PLAYPAUSE, |
| 5543 | }, |
| 5544 | { |
| 5545 | .min_adc_threshold = 100, |
| 5546 | .max_adc_threshold = 200, |
| 5547 | .key_code = KEY_REWIND, |
| 5548 | }, |
| 5549 | { |
| 5550 | .min_adc_threshold = 200, |
| 5551 | .max_adc_threshold = 500, |
| 5552 | .key_code = KEY_FASTFORWARD, |
| 5553 | }, |
| 5554 | }; |
| 5555 | |
| 5556 | static struct othc_n_switch_config switch_config = { |
| 5557 | .voltage_settling_time_ms = 0, |
| 5558 | .num_adc_samples = 3, |
| 5559 | .adc_channel = CHANNEL_ADC_HDSET, |
| 5560 | .switch_info = switch_info, |
| 5561 | .num_keys = ARRAY_SIZE(switch_info), |
| 5562 | .default_sw_en = true, |
| 5563 | .default_sw_idx = 0, |
| 5564 | }; |
| 5565 | |
| 5566 | static struct hsed_bias_config hsed_bias_config = { |
| 5567 | /* HSED mic bias config info */ |
| 5568 | .othc_headset = OTHC_HEADSET_NO, |
| 5569 | .othc_lowcurr_thresh_uA = 100, |
| 5570 | .othc_highcurr_thresh_uA = 600, |
| 5571 | .othc_hyst_prediv_us = 7800, |
| 5572 | .othc_period_clkdiv_us = 62500, |
| 5573 | .othc_hyst_clk_us = 121000, |
| 5574 | .othc_period_clk_us = 312500, |
| 5575 | .othc_wakeup = 1, |
| 5576 | }; |
| 5577 | |
| 5578 | static struct othc_hsed_config hsed_config_1 = { |
| 5579 | .hsed_bias_config = &hsed_bias_config, |
| 5580 | /* |
| 5581 | * The detection delay and switch reporting delay are |
| 5582 | * required to encounter a hardware bug (spurious switch |
| 5583 | * interrupts on slow insertion/removal of the headset). |
| 5584 | * This will introduce a delay in reporting the accessory |
| 5585 | * insertion and removal to the userspace. |
| 5586 | */ |
| 5587 | .detection_delay_ms = 1500, |
| 5588 | /* Switch info */ |
| 5589 | .switch_debounce_ms = 1500, |
| 5590 | .othc_support_n_switch = false, |
| 5591 | .switch_config = &switch_config, |
| 5592 | .ir_gpio = -1, |
| 5593 | /* Accessory info */ |
| 5594 | .accessories_support = true, |
| 5595 | .accessories = othc_accessories, |
| 5596 | .othc_num_accessories = ARRAY_SIZE(othc_accessories), |
| 5597 | }; |
| 5598 | |
| 5599 | static struct othc_regulator_config othc_reg = { |
| 5600 | .regulator = "8058_l5", |
| 5601 | .max_uV = 2850000, |
| 5602 | .min_uV = 2850000, |
| 5603 | }; |
| 5604 | |
| 5605 | /* MIC_BIAS0 is configured as normal MIC BIAS */ |
| 5606 | static struct pmic8058_othc_config_pdata othc_config_pdata_0 = { |
| 5607 | .micbias_select = OTHC_MICBIAS_0, |
| 5608 | .micbias_capability = OTHC_MICBIAS, |
| 5609 | .micbias_enable = OTHC_SIGNAL_OFF, |
| 5610 | .micbias_regulator = &othc_reg, |
| 5611 | }; |
| 5612 | |
| 5613 | /* MIC_BIAS1 is configured as HSED_BIAS for OTHC */ |
| 5614 | static struct pmic8058_othc_config_pdata othc_config_pdata_1 = { |
| 5615 | .micbias_select = OTHC_MICBIAS_1, |
| 5616 | .micbias_capability = OTHC_MICBIAS_HSED, |
| 5617 | .micbias_enable = OTHC_SIGNAL_PWM_TCXO, |
| 5618 | .micbias_regulator = &othc_reg, |
| 5619 | .hsed_config = &hsed_config_1, |
| 5620 | .hsed_name = "8660_handset", |
| 5621 | }; |
| 5622 | |
| 5623 | /* MIC_BIAS2 is configured as normal MIC BIAS */ |
| 5624 | static struct pmic8058_othc_config_pdata othc_config_pdata_2 = { |
| 5625 | .micbias_select = OTHC_MICBIAS_2, |
| 5626 | .micbias_capability = OTHC_MICBIAS, |
| 5627 | .micbias_enable = OTHC_SIGNAL_OFF, |
| 5628 | .micbias_regulator = &othc_reg, |
| 5629 | }; |
| 5630 | |
| 5631 | static struct resource resources_othc_0[] = { |
| 5632 | { |
| 5633 | .name = "othc_base", |
| 5634 | .start = PM8058_OTHC_CNTR_BASE0, |
| 5635 | .end = PM8058_OTHC_CNTR_BASE0, |
| 5636 | .flags = IORESOURCE_IO, |
| 5637 | }, |
| 5638 | }; |
| 5639 | |
| 5640 | static struct resource resources_othc_1[] = { |
| 5641 | { |
| 5642 | .start = PM8058_SW_1_IRQ(PM8058_IRQ_BASE), |
| 5643 | .end = PM8058_SW_1_IRQ(PM8058_IRQ_BASE), |
| 5644 | .flags = IORESOURCE_IRQ, |
| 5645 | }, |
| 5646 | { |
| 5647 | .start = PM8058_IR_1_IRQ(PM8058_IRQ_BASE), |
| 5648 | .end = PM8058_IR_1_IRQ(PM8058_IRQ_BASE), |
| 5649 | .flags = IORESOURCE_IRQ, |
| 5650 | }, |
| 5651 | { |
| 5652 | .name = "othc_base", |
| 5653 | .start = PM8058_OTHC_CNTR_BASE1, |
| 5654 | .end = PM8058_OTHC_CNTR_BASE1, |
| 5655 | .flags = IORESOURCE_IO, |
| 5656 | }, |
| 5657 | }; |
| 5658 | |
| 5659 | static struct resource resources_othc_2[] = { |
| 5660 | { |
| 5661 | .name = "othc_base", |
| 5662 | .start = PM8058_OTHC_CNTR_BASE2, |
| 5663 | .end = PM8058_OTHC_CNTR_BASE2, |
| 5664 | .flags = IORESOURCE_IO, |
| 5665 | }, |
| 5666 | }; |
| 5667 | |
| 5668 | static void __init msm8x60_init_pm8058_othc(void) |
| 5669 | { |
| 5670 | int i; |
| 5671 | |
| 5672 | if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2 || |
| 5673 | machine_is_msm8x60_fluid() || machine_is_msm8x60_fusion() || |
| 5674 | machine_is_msm8x60_fusn_ffa()) { |
| 5675 | /* 3-switch headset supported only by V2 FFA and FLUID */ |
| 5676 | hsed_config_1.accessories_adc_support = true, |
| 5677 | /* ADC based accessory detection works only on V2 and FLUID */ |
| 5678 | hsed_config_1.accessories_adc_channel = CHANNEL_ADC_HDSET, |
| 5679 | hsed_config_1.othc_support_n_switch = true; |
| 5680 | } |
| 5681 | |
| 5682 | /* IR GPIO is absent on FLUID */ |
| 5683 | if (machine_is_msm8x60_fluid()) |
| 5684 | hsed_config_1.ir_gpio = -1; |
| 5685 | |
| 5686 | for (i = 0; i < ARRAY_SIZE(othc_accessories); i++) { |
| 5687 | if (machine_is_msm8x60_fluid()) { |
| 5688 | switch (othc_accessories[i].accessory) { |
| 5689 | case OTHC_ANC_HEADPHONE: |
| 5690 | case OTHC_ANC_HEADSET: |
| 5691 | othc_accessories[i].gpio = GPIO_HEADSET_DET_N; |
| 5692 | break; |
| 5693 | case OTHC_MICROPHONE: |
| 5694 | othc_accessories[i].enabled = false; |
| 5695 | break; |
| 5696 | case OTHC_SVIDEO_OUT: |
| 5697 | othc_accessories[i].enabled = true; |
| 5698 | hsed_config_1.video_out_gpio = GPIO_HS_SW_DIR; |
| 5699 | break; |
| 5700 | } |
| 5701 | } |
| 5702 | } |
| 5703 | } |
| 5704 | #endif |
| 5705 | |
| 5706 | static struct resource resources_pm8058_charger[] = { |
| 5707 | { .name = "CHGVAL", |
| 5708 | .start = PM8058_CHGVAL_IRQ(PM8058_IRQ_BASE), |
| 5709 | .end = PM8058_CHGVAL_IRQ(PM8058_IRQ_BASE), |
| 5710 | .flags = IORESOURCE_IRQ, |
| 5711 | }, |
| 5712 | { .name = "CHGINVAL", |
| 5713 | .start = PM8058_CHGINVAL_IRQ(PM8058_IRQ_BASE), |
| 5714 | .end = PM8058_CHGINVAL_IRQ(PM8058_IRQ_BASE), |
| 5715 | .flags = IORESOURCE_IRQ, |
| 5716 | }, |
| 5717 | { |
| 5718 | .name = "CHGILIM", |
| 5719 | .start = PM8058_CHGILIM_IRQ(PM8058_IRQ_BASE), |
| 5720 | .end = PM8058_CHGILIM_IRQ(PM8058_IRQ_BASE), |
| 5721 | .flags = IORESOURCE_IRQ, |
| 5722 | }, |
| 5723 | { |
| 5724 | .name = "VCP", |
| 5725 | .start = PM8058_VCP_IRQ(PM8058_IRQ_BASE), |
| 5726 | .end = PM8058_VCP_IRQ(PM8058_IRQ_BASE), |
| 5727 | .flags = IORESOURCE_IRQ, |
| 5728 | }, |
| 5729 | { |
| 5730 | .name = "ATC_DONE", |
| 5731 | .start = PM8058_ATC_DONE_IRQ(PM8058_IRQ_BASE), |
| 5732 | .end = PM8058_ATC_DONE_IRQ(PM8058_IRQ_BASE), |
| 5733 | .flags = IORESOURCE_IRQ, |
| 5734 | }, |
| 5735 | { |
| 5736 | .name = "ATCFAIL", |
| 5737 | .start = PM8058_ATCFAIL_IRQ(PM8058_IRQ_BASE), |
| 5738 | .end = PM8058_ATCFAIL_IRQ(PM8058_IRQ_BASE), |
| 5739 | .flags = IORESOURCE_IRQ, |
| 5740 | }, |
| 5741 | { |
| 5742 | .name = "AUTO_CHGDONE", |
| 5743 | .start = PM8058_AUTO_CHGDONE_IRQ(PM8058_IRQ_BASE), |
| 5744 | .end = PM8058_AUTO_CHGDONE_IRQ(PM8058_IRQ_BASE), |
| 5745 | .flags = IORESOURCE_IRQ, |
| 5746 | }, |
| 5747 | { |
| 5748 | .name = "AUTO_CHGFAIL", |
| 5749 | .start = PM8058_AUTO_CHGFAIL_IRQ(PM8058_IRQ_BASE), |
| 5750 | .end = PM8058_AUTO_CHGFAIL_IRQ(PM8058_IRQ_BASE), |
| 5751 | .flags = IORESOURCE_IRQ, |
| 5752 | }, |
| 5753 | { |
| 5754 | .name = "CHGSTATE", |
| 5755 | .start = PM8058_CHGSTATE_IRQ(PM8058_IRQ_BASE), |
| 5756 | .end = PM8058_CHGSTATE_IRQ(PM8058_IRQ_BASE), |
| 5757 | .flags = IORESOURCE_IRQ, |
| 5758 | }, |
| 5759 | { |
| 5760 | .name = "FASTCHG", |
| 5761 | .start = PM8058_FASTCHG_IRQ(PM8058_IRQ_BASE), |
| 5762 | .end = PM8058_FASTCHG_IRQ(PM8058_IRQ_BASE), |
| 5763 | .flags = IORESOURCE_IRQ, |
| 5764 | }, |
| 5765 | { |
| 5766 | .name = "CHG_END", |
| 5767 | .start = PM8058_CHG_END_IRQ(PM8058_IRQ_BASE), |
| 5768 | .end = PM8058_CHG_END_IRQ(PM8058_IRQ_BASE), |
| 5769 | .flags = IORESOURCE_IRQ, |
| 5770 | }, |
| 5771 | { |
| 5772 | .name = "BATTTEMP", |
| 5773 | .start = PM8058_BATTTEMP_IRQ(PM8058_IRQ_BASE), |
| 5774 | .end = PM8058_BATTTEMP_IRQ(PM8058_IRQ_BASE), |
| 5775 | .flags = IORESOURCE_IRQ, |
| 5776 | }, |
| 5777 | { |
| 5778 | .name = "CHGHOT", |
| 5779 | .start = PM8058_CHGHOT_IRQ(PM8058_IRQ_BASE), |
| 5780 | .end = PM8058_CHGHOT_IRQ(PM8058_IRQ_BASE), |
| 5781 | .flags = IORESOURCE_IRQ, |
| 5782 | }, |
| 5783 | { |
| 5784 | .name = "CHGTLIMIT", |
| 5785 | .start = PM8058_CHGTLIMIT_IRQ(PM8058_IRQ_BASE), |
| 5786 | .end = PM8058_CHGTLIMIT_IRQ(PM8058_IRQ_BASE), |
| 5787 | .flags = IORESOURCE_IRQ, |
| 5788 | }, |
| 5789 | { |
| 5790 | .name = "CHG_GONE", |
| 5791 | .start = PM8058_CHG_GONE_IRQ(PM8058_IRQ_BASE), |
| 5792 | .end = PM8058_CHG_GONE_IRQ(PM8058_IRQ_BASE), |
| 5793 | .flags = IORESOURCE_IRQ, |
| 5794 | }, |
| 5795 | { |
| 5796 | .name = "VCPMAJOR", |
| 5797 | .start = PM8058_VCPMAJOR_IRQ(PM8058_IRQ_BASE), |
| 5798 | .end = PM8058_VCPMAJOR_IRQ(PM8058_IRQ_BASE), |
| 5799 | .flags = IORESOURCE_IRQ, |
| 5800 | }, |
| 5801 | { |
| 5802 | .name = "VBATDET", |
| 5803 | .start = PM8058_VBATDET_IRQ(PM8058_IRQ_BASE), |
| 5804 | .end = PM8058_VBATDET_IRQ(PM8058_IRQ_BASE), |
| 5805 | .flags = IORESOURCE_IRQ, |
| 5806 | }, |
| 5807 | { |
| 5808 | .name = "BATFET", |
| 5809 | .start = PM8058_BATFET_IRQ(PM8058_IRQ_BASE), |
| 5810 | .end = PM8058_BATFET_IRQ(PM8058_IRQ_BASE), |
| 5811 | .flags = IORESOURCE_IRQ, |
| 5812 | }, |
| 5813 | { |
| 5814 | .name = "BATT_REPLACE", |
| 5815 | .start = PM8058_BATT_REPLACE_IRQ(PM8058_IRQ_BASE), |
| 5816 | .end = PM8058_BATT_REPLACE_IRQ(PM8058_IRQ_BASE), |
| 5817 | .flags = IORESOURCE_IRQ, |
| 5818 | }, |
| 5819 | { |
| 5820 | .name = "BATTCONNECT", |
| 5821 | .start = PM8058_BATTCONNECT_IRQ(PM8058_IRQ_BASE), |
| 5822 | .end = PM8058_BATTCONNECT_IRQ(PM8058_IRQ_BASE), |
| 5823 | .flags = IORESOURCE_IRQ, |
| 5824 | }, |
| 5825 | { |
| 5826 | .name = "VBATDET_LOW", |
| 5827 | .start = PM8058_VBATDET_LOW_IRQ(PM8058_IRQ_BASE), |
| 5828 | .end = PM8058_VBATDET_LOW_IRQ(PM8058_IRQ_BASE), |
| 5829 | .flags = IORESOURCE_IRQ, |
| 5830 | }, |
| 5831 | }; |
| 5832 | |
| 5833 | static int pm8058_pwm_config(struct pwm_device *pwm, int ch, int on) |
| 5834 | { |
| 5835 | struct pm8058_gpio pwm_gpio_config = { |
| 5836 | .direction = PM_GPIO_DIR_OUT, |
| 5837 | .output_buffer = PM_GPIO_OUT_BUF_CMOS, |
| 5838 | .output_value = 0, |
| 5839 | .pull = PM_GPIO_PULL_NO, |
| 5840 | .vin_sel = PM_GPIO_VIN_VPH, |
| 5841 | .out_strength = PM_GPIO_STRENGTH_HIGH, |
| 5842 | .function = PM_GPIO_FUNC_2, |
| 5843 | }; |
| 5844 | |
| 5845 | int rc = -EINVAL; |
| 5846 | int id, mode, max_mA; |
| 5847 | |
| 5848 | id = mode = max_mA = 0; |
| 5849 | switch (ch) { |
| 5850 | case 0: |
| 5851 | case 1: |
| 5852 | case 2: |
| 5853 | if (on) { |
| 5854 | id = 24 + ch; |
| 5855 | rc = pm8058_gpio_config(id - 1, &pwm_gpio_config); |
| 5856 | if (rc) |
| 5857 | pr_err("%s: pm8058_gpio_config(%d): rc=%d\n", |
| 5858 | __func__, id, rc); |
| 5859 | } |
| 5860 | break; |
| 5861 | |
| 5862 | case 6: |
| 5863 | id = PM_PWM_LED_FLASH; |
| 5864 | mode = PM_PWM_CONF_PWM1; |
| 5865 | max_mA = 300; |
| 5866 | break; |
| 5867 | |
| 5868 | case 7: |
| 5869 | id = PM_PWM_LED_FLASH1; |
| 5870 | mode = PM_PWM_CONF_PWM1; |
| 5871 | max_mA = 300; |
| 5872 | break; |
| 5873 | |
| 5874 | default: |
| 5875 | break; |
| 5876 | } |
| 5877 | |
| 5878 | if (ch >= 6 && ch <= 7) { |
| 5879 | if (!on) { |
| 5880 | mode = PM_PWM_CONF_NONE; |
| 5881 | max_mA = 0; |
| 5882 | } |
| 5883 | rc = pm8058_pwm_config_led(pwm, id, mode, max_mA); |
| 5884 | if (rc) |
| 5885 | pr_err("%s: pm8058_pwm_config_led(ch=%d): rc=%d\n", |
| 5886 | __func__, ch, rc); |
| 5887 | } |
| 5888 | return rc; |
| 5889 | |
| 5890 | } |
| 5891 | |
| 5892 | static struct pm8058_pwm_pdata pm8058_pwm_data = { |
| 5893 | .config = pm8058_pwm_config, |
| 5894 | }; |
| 5895 | |
| 5896 | #define PM8058_GPIO_INT 88 |
| 5897 | |
| 5898 | static struct pm8058_gpio_platform_data pm8058_gpio_data = { |
| 5899 | .gpio_base = PM8058_GPIO_PM_TO_SYS(0), |
| 5900 | .irq_base = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 0), |
| 5901 | .init = pm8058_gpios_init, |
| 5902 | }; |
| 5903 | |
| 5904 | static struct pm8058_gpio_platform_data pm8058_mpp_data = { |
| 5905 | .gpio_base = PM8058_GPIO_PM_TO_SYS(PM8058_GPIOS), |
| 5906 | .irq_base = PM8058_MPP_IRQ(PM8058_IRQ_BASE, 0), |
| 5907 | }; |
| 5908 | |
| 5909 | static struct resource resources_rtc[] = { |
| 5910 | { |
| 5911 | .start = PM8058_RTC_IRQ(PM8058_IRQ_BASE), |
| 5912 | .end = PM8058_RTC_IRQ(PM8058_IRQ_BASE), |
| 5913 | .flags = IORESOURCE_IRQ, |
| 5914 | }, |
| 5915 | { |
| 5916 | .start = PM8058_RTC_ALARM_IRQ(PM8058_IRQ_BASE), |
| 5917 | .end = PM8058_RTC_ALARM_IRQ(PM8058_IRQ_BASE), |
| 5918 | .flags = IORESOURCE_IRQ, |
| 5919 | }, |
| 5920 | }; |
| 5921 | |
Ashay Jaiswal | 4d1ab55 | 2011-07-15 11:30:49 +0530 | [diff] [blame] | 5922 | static struct pm8058_rtc_platform_data pm8058_rtc_pdata = { |
| 5923 | .rtc_alarm_powerup = false, |
| 5924 | }; |
| 5925 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 5926 | static struct pmic8058_led pmic8058_flash_leds[] = { |
| 5927 | [0] = { |
| 5928 | .name = "camera:flash0", |
| 5929 | .max_brightness = 15, |
| 5930 | .id = PMIC8058_ID_FLASH_LED_0, |
| 5931 | }, |
| 5932 | [1] = { |
| 5933 | .name = "camera:flash1", |
| 5934 | .max_brightness = 15, |
| 5935 | .id = PMIC8058_ID_FLASH_LED_1, |
| 5936 | }, |
| 5937 | }; |
| 5938 | |
| 5939 | static struct pmic8058_leds_platform_data pm8058_flash_leds_data = { |
| 5940 | .num_leds = ARRAY_SIZE(pmic8058_flash_leds), |
| 5941 | .leds = pmic8058_flash_leds, |
| 5942 | }; |
| 5943 | |
Terence Hampson | c0b6dfb | 2011-07-15 11:07:17 -0400 | [diff] [blame] | 5944 | static struct pmic8058_led pmic8058_dragon_leds[] = { |
| 5945 | [0] = { |
| 5946 | /* RED */ |
| 5947 | .name = "led_drv0", |
| 5948 | .max_brightness = 15, |
| 5949 | .id = PMIC8058_ID_LED_0, |
| 5950 | },/* 300 mA flash led0 drv sink */ |
| 5951 | [1] = { |
| 5952 | /* Yellow */ |
| 5953 | .name = "led_drv1", |
| 5954 | .max_brightness = 15, |
| 5955 | .id = PMIC8058_ID_LED_1, |
| 5956 | },/* 300 mA flash led0 drv sink */ |
| 5957 | [2] = { |
| 5958 | /* Green */ |
| 5959 | .name = "led_drv2", |
| 5960 | .max_brightness = 15, |
| 5961 | .id = PMIC8058_ID_LED_2, |
| 5962 | },/* 300 mA flash led0 drv sink */ |
| 5963 | [3] = { |
| 5964 | .name = "led_psensor", |
| 5965 | .max_brightness = 15, |
| 5966 | .id = PMIC8058_ID_LED_KB_LIGHT, |
| 5967 | },/* 300 mA flash led0 drv sink */ |
| 5968 | }; |
| 5969 | |
| 5970 | static struct pmic8058_leds_platform_data pm8058_dragon_leds_data = { |
| 5971 | .num_leds = ARRAY_SIZE(pmic8058_dragon_leds), |
| 5972 | .leds = pmic8058_dragon_leds, |
| 5973 | }; |
| 5974 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 5975 | static struct pmic8058_led pmic8058_fluid_flash_leds[] = { |
| 5976 | [0] = { |
| 5977 | .name = "led:drv0", |
| 5978 | .max_brightness = 15, |
| 5979 | .id = PMIC8058_ID_FLASH_LED_0, |
| 5980 | },/* 300 mA flash led0 drv sink */ |
| 5981 | [1] = { |
| 5982 | .name = "led:drv1", |
| 5983 | .max_brightness = 15, |
| 5984 | .id = PMIC8058_ID_FLASH_LED_1, |
| 5985 | },/* 300 mA flash led1 sink */ |
| 5986 | [2] = { |
| 5987 | .name = "led:drv2", |
| 5988 | .max_brightness = 20, |
| 5989 | .id = PMIC8058_ID_LED_0, |
| 5990 | },/* 40 mA led0 sink */ |
| 5991 | [3] = { |
| 5992 | .name = "keypad:drv", |
| 5993 | .max_brightness = 15, |
| 5994 | .id = PMIC8058_ID_LED_KB_LIGHT, |
| 5995 | },/* 300 mA keypad drv sink */ |
| 5996 | }; |
| 5997 | |
| 5998 | static struct pmic8058_leds_platform_data pm8058_fluid_flash_leds_data = { |
| 5999 | .num_leds = ARRAY_SIZE(pmic8058_fluid_flash_leds), |
| 6000 | .leds = pmic8058_fluid_flash_leds, |
| 6001 | }; |
| 6002 | |
| 6003 | static struct resource resources_temp_alarm[] = { |
| 6004 | { |
| 6005 | .start = PM8058_TEMP_ALARM_IRQ(PM8058_IRQ_BASE), |
| 6006 | .end = PM8058_TEMP_ALARM_IRQ(PM8058_IRQ_BASE), |
| 6007 | .flags = IORESOURCE_IRQ, |
| 6008 | }, |
| 6009 | }; |
| 6010 | |
| 6011 | static struct resource resources_pm8058_misc[] = { |
| 6012 | { |
| 6013 | .start = PM8058_OSCHALT_IRQ(PM8058_IRQ_BASE), |
| 6014 | .end = PM8058_OSCHALT_IRQ(PM8058_IRQ_BASE), |
| 6015 | .flags = IORESOURCE_IRQ, |
| 6016 | }, |
| 6017 | }; |
| 6018 | |
| 6019 | static struct resource resources_pm8058_batt_alarm[] = { |
| 6020 | { |
| 6021 | .start = PM8058_BATT_ALARM_IRQ(PM8058_IRQ_BASE), |
| 6022 | .end = PM8058_BATT_ALARM_IRQ(PM8058_IRQ_BASE), |
| 6023 | .flags = IORESOURCE_IRQ, |
| 6024 | }, |
| 6025 | }; |
| 6026 | |
| 6027 | #define PM8058_SUBDEV_KPD 0 |
| 6028 | #define PM8058_SUBDEV_LED 1 |
| 6029 | #define PM8058_SUBDEV_VIB 2 |
| 6030 | |
| 6031 | static struct mfd_cell pm8058_subdevs[] = { |
| 6032 | { |
| 6033 | .name = "pm8058-keypad", |
| 6034 | .id = -1, |
| 6035 | .num_resources = ARRAY_SIZE(resources_keypad), |
| 6036 | .resources = resources_keypad, |
| 6037 | }, |
| 6038 | { .name = "pm8058-led", |
| 6039 | .id = -1, |
| 6040 | }, |
| 6041 | { |
| 6042 | .name = "pm8058-vib", |
| 6043 | .id = -1, |
| 6044 | }, |
| 6045 | { .name = "pm8058-gpio", |
| 6046 | .id = -1, |
| 6047 | .platform_data = &pm8058_gpio_data, |
| 6048 | .pdata_size = sizeof(pm8058_gpio_data), |
| 6049 | }, |
| 6050 | { .name = "pm8058-mpp", |
| 6051 | .id = -1, |
| 6052 | .platform_data = &pm8058_mpp_data, |
| 6053 | .pdata_size = sizeof(pm8058_mpp_data), |
| 6054 | }, |
| 6055 | { .name = "pm8058-pwrkey", |
| 6056 | .id = -1, |
| 6057 | .resources = resources_pwrkey, |
| 6058 | .num_resources = ARRAY_SIZE(resources_pwrkey), |
| 6059 | .platform_data = &pwrkey_pdata, |
| 6060 | .pdata_size = sizeof(pwrkey_pdata), |
| 6061 | }, |
| 6062 | { |
| 6063 | .name = "pm8058-pwm", |
| 6064 | .id = -1, |
| 6065 | .platform_data = &pm8058_pwm_data, |
| 6066 | .pdata_size = sizeof(pm8058_pwm_data), |
| 6067 | }, |
| 6068 | #ifdef CONFIG_SENSORS_MSM_ADC |
| 6069 | { |
| 6070 | .name = "pm8058-xoadc", |
| 6071 | .id = -1, |
| 6072 | .num_resources = ARRAY_SIZE(resources_adc), |
| 6073 | .resources = resources_adc, |
| 6074 | .platform_data = &xoadc_pdata, |
| 6075 | .pdata_size = sizeof(xoadc_pdata), |
| 6076 | }, |
| 6077 | #endif |
| 6078 | #if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE) |
| 6079 | { |
| 6080 | .name = "pm8058-othc", |
| 6081 | .id = 0, |
| 6082 | .platform_data = &othc_config_pdata_0, |
| 6083 | .pdata_size = sizeof(othc_config_pdata_0), |
| 6084 | .num_resources = ARRAY_SIZE(resources_othc_0), |
| 6085 | .resources = resources_othc_0, |
| 6086 | }, |
| 6087 | { |
| 6088 | /* OTHC1 module has headset/switch dection */ |
| 6089 | .name = "pm8058-othc", |
| 6090 | .id = 1, |
| 6091 | .num_resources = ARRAY_SIZE(resources_othc_1), |
| 6092 | .resources = resources_othc_1, |
| 6093 | .platform_data = &othc_config_pdata_1, |
| 6094 | .pdata_size = sizeof(othc_config_pdata_1), |
| 6095 | }, |
| 6096 | { |
| 6097 | .name = "pm8058-othc", |
| 6098 | .id = 2, |
| 6099 | .platform_data = &othc_config_pdata_2, |
| 6100 | .pdata_size = sizeof(othc_config_pdata_2), |
| 6101 | .num_resources = ARRAY_SIZE(resources_othc_2), |
| 6102 | .resources = resources_othc_2, |
| 6103 | }, |
| 6104 | #endif |
| 6105 | { |
| 6106 | .name = "pm8058-rtc", |
| 6107 | .id = -1, |
| 6108 | .num_resources = ARRAY_SIZE(resources_rtc), |
| 6109 | .resources = resources_rtc, |
Ashay Jaiswal | 4d1ab55 | 2011-07-15 11:30:49 +0530 | [diff] [blame] | 6110 | .platform_data = &pm8058_rtc_pdata, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 6111 | }, |
| 6112 | { |
| 6113 | .name = "pm8058-tm", |
| 6114 | .id = -1, |
| 6115 | .num_resources = ARRAY_SIZE(resources_temp_alarm), |
| 6116 | .resources = resources_temp_alarm, |
| 6117 | }, |
| 6118 | { .name = "pm8058-upl", |
| 6119 | .id = -1, |
| 6120 | }, |
| 6121 | { |
| 6122 | .name = "pm8058-misc", |
| 6123 | .id = -1, |
| 6124 | .num_resources = ARRAY_SIZE(resources_pm8058_misc), |
| 6125 | .resources = resources_pm8058_misc, |
| 6126 | }, |
| 6127 | { .name = "pm8058-batt-alarm", |
| 6128 | .id = -1, |
| 6129 | .num_resources = ARRAY_SIZE(resources_pm8058_batt_alarm), |
| 6130 | .resources = resources_pm8058_batt_alarm, |
| 6131 | }, |
| 6132 | }; |
| 6133 | |
| 6134 | static struct mfd_cell pm8058_charger_sub_dev = { |
| 6135 | .name = "pm8058-charger", |
| 6136 | .id = -1, |
| 6137 | .num_resources = ARRAY_SIZE(resources_pm8058_charger), |
| 6138 | .resources = resources_pm8058_charger, |
| 6139 | }; |
| 6140 | |
| 6141 | static struct pm8058_platform_data pm8058_platform_data = { |
| 6142 | .irq_base = PM8058_IRQ_BASE, |
| 6143 | |
| 6144 | .num_subdevs = ARRAY_SIZE(pm8058_subdevs), |
| 6145 | .sub_devices = pm8058_subdevs, |
| 6146 | .irq_trigger_flags = IRQF_TRIGGER_LOW, |
| 6147 | }; |
| 6148 | |
| 6149 | static struct i2c_board_info pm8058_boardinfo[] __initdata = { |
| 6150 | { |
| 6151 | I2C_BOARD_INFO("pm8058-core", 0x55), |
| 6152 | .irq = MSM_GPIO_TO_INT(PM8058_GPIO_INT), |
| 6153 | .platform_data = &pm8058_platform_data, |
| 6154 | }, |
| 6155 | }; |
| 6156 | #endif /* CONFIG_PMIC8058 */ |
| 6157 | |
| 6158 | #if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \ |
| 6159 | defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE) |
| 6160 | #define TDISC_I2C_SLAVE_ADDR 0x67 |
| 6161 | #define PMIC_GPIO_TDISC PM8058_GPIO_PM_TO_SYS(5) |
| 6162 | #define TDISC_INT PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 5) |
| 6163 | |
| 6164 | static const char *vregs_tdisc_name[] = { |
| 6165 | "8058_l5", |
| 6166 | "8058_s3", |
| 6167 | }; |
| 6168 | |
| 6169 | static const int vregs_tdisc_val[] = { |
| 6170 | 2850000,/* uV */ |
| 6171 | 1800000, |
| 6172 | }; |
| 6173 | static struct regulator *vregs_tdisc[ARRAY_SIZE(vregs_tdisc_name)]; |
| 6174 | |
| 6175 | static int tdisc_shinetsu_setup(void) |
| 6176 | { |
| 6177 | int rc, i; |
| 6178 | |
| 6179 | rc = gpio_request(PMIC_GPIO_TDISC, "tdisc_interrupt"); |
| 6180 | if (rc) { |
| 6181 | pr_err("%s: gpio_request failed for PMIC_GPIO_TDISC\n", |
| 6182 | __func__); |
| 6183 | return rc; |
| 6184 | } |
| 6185 | |
| 6186 | rc = gpio_request(GPIO_JOYSTICK_EN, "tdisc_oe"); |
| 6187 | if (rc) { |
| 6188 | pr_err("%s: gpio_request failed for GPIO_JOYSTICK_EN\n", |
| 6189 | __func__); |
| 6190 | goto fail_gpio_oe; |
| 6191 | } |
| 6192 | |
| 6193 | rc = gpio_direction_output(GPIO_JOYSTICK_EN, 1); |
| 6194 | if (rc) { |
| 6195 | pr_err("%s: gpio_direction_output failed for GPIO_JOYSTICK_EN\n", |
| 6196 | __func__); |
| 6197 | gpio_free(GPIO_JOYSTICK_EN); |
| 6198 | goto fail_gpio_oe; |
| 6199 | } |
| 6200 | |
| 6201 | for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) { |
| 6202 | vregs_tdisc[i] = regulator_get(NULL, vregs_tdisc_name[i]); |
| 6203 | if (IS_ERR(vregs_tdisc[i])) { |
| 6204 | printk(KERN_ERR "%s: regulator get %s failed (%ld)\n", |
| 6205 | __func__, vregs_tdisc_name[i], |
| 6206 | PTR_ERR(vregs_tdisc[i])); |
| 6207 | rc = PTR_ERR(vregs_tdisc[i]); |
| 6208 | goto vreg_get_fail; |
| 6209 | } |
| 6210 | |
| 6211 | rc = regulator_set_voltage(vregs_tdisc[i], |
| 6212 | vregs_tdisc_val[i], vregs_tdisc_val[i]); |
| 6213 | if (rc) { |
| 6214 | printk(KERN_ERR "%s: regulator_set_voltage() = %d\n", |
| 6215 | __func__, rc); |
| 6216 | goto vreg_set_voltage_fail; |
| 6217 | } |
| 6218 | } |
| 6219 | |
| 6220 | return rc; |
| 6221 | vreg_set_voltage_fail: |
| 6222 | i++; |
| 6223 | vreg_get_fail: |
| 6224 | while (i) |
| 6225 | regulator_put(vregs_tdisc[--i]); |
| 6226 | fail_gpio_oe: |
| 6227 | gpio_free(PMIC_GPIO_TDISC); |
| 6228 | return rc; |
| 6229 | } |
| 6230 | |
| 6231 | static void tdisc_shinetsu_release(void) |
| 6232 | { |
| 6233 | int i; |
| 6234 | |
| 6235 | for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) |
| 6236 | regulator_put(vregs_tdisc[i]); |
| 6237 | |
| 6238 | gpio_free(PMIC_GPIO_TDISC); |
| 6239 | gpio_free(GPIO_JOYSTICK_EN); |
| 6240 | } |
| 6241 | |
| 6242 | static int tdisc_shinetsu_enable(void) |
| 6243 | { |
| 6244 | int i, rc = -EINVAL; |
| 6245 | |
| 6246 | for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) { |
| 6247 | rc = regulator_enable(vregs_tdisc[i]); |
| 6248 | if (rc < 0) { |
| 6249 | printk(KERN_ERR "%s: vreg %s enable failed (%d)\n", |
| 6250 | __func__, vregs_tdisc_name[i], rc); |
| 6251 | goto vreg_fail; |
| 6252 | } |
| 6253 | } |
| 6254 | |
| 6255 | /* Enable the OE (output enable) gpio */ |
| 6256 | gpio_set_value_cansleep(GPIO_JOYSTICK_EN, 1); |
| 6257 | /* voltage and gpio stabilization delay */ |
| 6258 | msleep(50); |
| 6259 | |
| 6260 | return 0; |
| 6261 | vreg_fail: |
| 6262 | while (i) |
| 6263 | regulator_disable(vregs_tdisc[--i]); |
| 6264 | return rc; |
| 6265 | } |
| 6266 | |
| 6267 | static int tdisc_shinetsu_disable(void) |
| 6268 | { |
| 6269 | int i, rc; |
| 6270 | |
| 6271 | for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) { |
| 6272 | rc = regulator_disable(vregs_tdisc[i]); |
| 6273 | if (rc < 0) { |
| 6274 | printk(KERN_ERR "%s: vreg %s disable failed (%d)\n", |
| 6275 | __func__, vregs_tdisc_name[i], rc); |
| 6276 | goto tdisc_reg_fail; |
| 6277 | } |
| 6278 | } |
| 6279 | |
| 6280 | /* Disable the OE (output enable) gpio */ |
| 6281 | gpio_set_value_cansleep(GPIO_JOYSTICK_EN, 0); |
| 6282 | |
| 6283 | return 0; |
| 6284 | |
| 6285 | tdisc_reg_fail: |
| 6286 | while (i) |
| 6287 | regulator_enable(vregs_tdisc[--i]); |
| 6288 | return rc; |
| 6289 | } |
| 6290 | |
| 6291 | static struct tdisc_abs_values tdisc_abs = { |
| 6292 | .x_max = 32, |
| 6293 | .y_max = 32, |
| 6294 | .x_min = -32, |
| 6295 | .y_min = -32, |
| 6296 | .pressure_max = 32, |
| 6297 | .pressure_min = 0, |
| 6298 | }; |
| 6299 | |
| 6300 | static struct tdisc_platform_data tdisc_data = { |
| 6301 | .tdisc_setup = tdisc_shinetsu_setup, |
| 6302 | .tdisc_release = tdisc_shinetsu_release, |
| 6303 | .tdisc_enable = tdisc_shinetsu_enable, |
| 6304 | .tdisc_disable = tdisc_shinetsu_disable, |
| 6305 | .tdisc_wakeup = 0, |
| 6306 | .tdisc_gpio = PMIC_GPIO_TDISC, |
| 6307 | .tdisc_report_keys = true, |
| 6308 | .tdisc_report_relative = true, |
| 6309 | .tdisc_report_absolute = false, |
| 6310 | .tdisc_report_wheel = false, |
| 6311 | .tdisc_reverse_x = false, |
| 6312 | .tdisc_reverse_y = true, |
| 6313 | .tdisc_abs = &tdisc_abs, |
| 6314 | }; |
| 6315 | |
| 6316 | static struct i2c_board_info msm_i2c_gsbi3_tdisc_info[] = { |
| 6317 | { |
| 6318 | I2C_BOARD_INFO("vtd518", TDISC_I2C_SLAVE_ADDR), |
| 6319 | .irq = TDISC_INT, |
| 6320 | .platform_data = &tdisc_data, |
| 6321 | }, |
| 6322 | }; |
| 6323 | #endif |
| 6324 | |
| 6325 | #define PM_GPIO_CDC_RST_N 20 |
| 6326 | #define GPIO_CDC_RST_N PM8058_GPIO_PM_TO_SYS(PM_GPIO_CDC_RST_N) |
| 6327 | |
| 6328 | static struct regulator *vreg_timpani_1; |
| 6329 | static struct regulator *vreg_timpani_2; |
| 6330 | |
| 6331 | static unsigned int msm_timpani_setup_power(void) |
| 6332 | { |
| 6333 | int rc; |
| 6334 | |
| 6335 | vreg_timpani_1 = regulator_get(NULL, "8058_l0"); |
| 6336 | if (IS_ERR(vreg_timpani_1)) { |
| 6337 | pr_err("%s: Unable to get 8058_l0\n", __func__); |
| 6338 | return -ENODEV; |
| 6339 | } |
| 6340 | |
| 6341 | vreg_timpani_2 = regulator_get(NULL, "8058_s3"); |
| 6342 | if (IS_ERR(vreg_timpani_2)) { |
| 6343 | pr_err("%s: Unable to get 8058_s3\n", __func__); |
| 6344 | regulator_put(vreg_timpani_1); |
| 6345 | return -ENODEV; |
| 6346 | } |
| 6347 | |
| 6348 | rc = regulator_set_voltage(vreg_timpani_1, 1200000, 1200000); |
| 6349 | if (rc) { |
| 6350 | pr_err("%s: unable to set L0 voltage to 1.2V\n", __func__); |
| 6351 | goto fail; |
| 6352 | } |
| 6353 | |
| 6354 | rc = regulator_set_voltage(vreg_timpani_2, 1800000, 1800000); |
| 6355 | if (rc) { |
| 6356 | pr_err("%s: unable to set S3 voltage to 1.8V\n", __func__); |
| 6357 | goto fail; |
| 6358 | } |
| 6359 | |
| 6360 | rc = regulator_enable(vreg_timpani_1); |
| 6361 | if (rc) { |
| 6362 | pr_err("%s: Enable regulator 8058_l0 failed\n", __func__); |
| 6363 | goto fail; |
| 6364 | } |
| 6365 | |
| 6366 | /* The settings for LDO0 should be set such that |
| 6367 | * it doesn't require to reset the timpani. */ |
| 6368 | rc = regulator_set_optimum_mode(vreg_timpani_1, 5000); |
| 6369 | if (rc < 0) { |
| 6370 | pr_err("Timpani regulator optimum mode setting failed\n"); |
| 6371 | goto fail; |
| 6372 | } |
| 6373 | |
| 6374 | rc = regulator_enable(vreg_timpani_2); |
| 6375 | if (rc) { |
| 6376 | pr_err("%s: Enable regulator 8058_s3 failed\n", __func__); |
| 6377 | regulator_disable(vreg_timpani_1); |
| 6378 | goto fail; |
| 6379 | } |
| 6380 | |
| 6381 | rc = gpio_request(GPIO_CDC_RST_N, "CDC_RST_N"); |
| 6382 | if (rc) { |
| 6383 | pr_err("%s: GPIO Request %d failed\n", __func__, |
| 6384 | GPIO_CDC_RST_N); |
| 6385 | regulator_disable(vreg_timpani_1); |
| 6386 | regulator_disable(vreg_timpani_2); |
| 6387 | goto fail; |
| 6388 | } else { |
| 6389 | gpio_direction_output(GPIO_CDC_RST_N, 1); |
| 6390 | usleep_range(1000, 1050); |
| 6391 | gpio_direction_output(GPIO_CDC_RST_N, 0); |
| 6392 | usleep_range(1000, 1050); |
| 6393 | gpio_direction_output(GPIO_CDC_RST_N, 1); |
| 6394 | gpio_free(GPIO_CDC_RST_N); |
| 6395 | } |
| 6396 | return rc; |
| 6397 | |
| 6398 | fail: |
| 6399 | regulator_put(vreg_timpani_1); |
| 6400 | regulator_put(vreg_timpani_2); |
| 6401 | return rc; |
| 6402 | } |
| 6403 | |
| 6404 | static void msm_timpani_shutdown_power(void) |
| 6405 | { |
| 6406 | int rc; |
| 6407 | |
| 6408 | rc = regulator_disable(vreg_timpani_1); |
| 6409 | if (rc) |
| 6410 | pr_err("%s: Disable regulator 8058_l0 failed\n", __func__); |
| 6411 | |
| 6412 | regulator_put(vreg_timpani_1); |
| 6413 | |
| 6414 | rc = regulator_disable(vreg_timpani_2); |
| 6415 | if (rc) |
| 6416 | pr_err("%s: Disable regulator 8058_s3 failed\n", __func__); |
| 6417 | |
| 6418 | regulator_put(vreg_timpani_2); |
| 6419 | } |
| 6420 | |
| 6421 | /* Power analog function of codec */ |
| 6422 | static struct regulator *vreg_timpani_cdc_apwr; |
| 6423 | static int msm_timpani_codec_power(int vreg_on) |
| 6424 | { |
| 6425 | int rc = 0; |
| 6426 | |
| 6427 | if (!vreg_timpani_cdc_apwr) { |
| 6428 | |
| 6429 | vreg_timpani_cdc_apwr = regulator_get(NULL, "8058_s4"); |
| 6430 | |
| 6431 | if (IS_ERR(vreg_timpani_cdc_apwr)) { |
| 6432 | pr_err("%s: vreg_get failed (%ld)\n", |
| 6433 | __func__, PTR_ERR(vreg_timpani_cdc_apwr)); |
| 6434 | rc = PTR_ERR(vreg_timpani_cdc_apwr); |
| 6435 | return rc; |
| 6436 | } |
| 6437 | } |
| 6438 | |
| 6439 | if (vreg_on) { |
| 6440 | |
| 6441 | rc = regulator_set_voltage(vreg_timpani_cdc_apwr, |
| 6442 | 2200000, 2200000); |
| 6443 | if (rc) { |
| 6444 | pr_err("%s: unable to set 8058_s4 voltage to 2.2 V\n", |
| 6445 | __func__); |
| 6446 | goto vreg_fail; |
| 6447 | } |
| 6448 | |
| 6449 | rc = regulator_enable(vreg_timpani_cdc_apwr); |
| 6450 | if (rc) { |
| 6451 | pr_err("%s: vreg_enable failed %d\n", __func__, rc); |
| 6452 | goto vreg_fail; |
| 6453 | } |
| 6454 | } else { |
| 6455 | rc = regulator_disable(vreg_timpani_cdc_apwr); |
| 6456 | if (rc) { |
| 6457 | pr_err("%s: vreg_disable failed %d\n", |
| 6458 | __func__, rc); |
| 6459 | goto vreg_fail; |
| 6460 | } |
| 6461 | } |
| 6462 | |
| 6463 | return 0; |
| 6464 | |
| 6465 | vreg_fail: |
| 6466 | regulator_put(vreg_timpani_cdc_apwr); |
| 6467 | vreg_timpani_cdc_apwr = NULL; |
| 6468 | return rc; |
| 6469 | } |
| 6470 | |
| 6471 | static struct marimba_codec_platform_data timpani_codec_pdata = { |
| 6472 | .marimba_codec_power = msm_timpani_codec_power, |
| 6473 | }; |
| 6474 | |
| 6475 | #define TIMPANI_SLAVE_ID_CDC_ADDR 0X77 |
| 6476 | #define TIMPANI_SLAVE_ID_QMEMBIST_ADDR 0X66 |
| 6477 | |
| 6478 | static struct marimba_platform_data timpani_pdata = { |
| 6479 | .slave_id[MARIMBA_SLAVE_ID_CDC] = TIMPANI_SLAVE_ID_CDC_ADDR, |
| 6480 | .slave_id[MARIMBA_SLAVE_ID_QMEMBIST] = TIMPANI_SLAVE_ID_QMEMBIST_ADDR, |
| 6481 | .marimba_setup = msm_timpani_setup_power, |
| 6482 | .marimba_shutdown = msm_timpani_shutdown_power, |
| 6483 | .codec = &timpani_codec_pdata, |
| 6484 | .tsadc_ssbi_adap = MARIMBA_SSBI_ADAP, |
| 6485 | }; |
| 6486 | |
| 6487 | #define TIMPANI_I2C_SLAVE_ADDR 0xD |
| 6488 | |
| 6489 | static struct i2c_board_info msm_i2c_gsbi7_timpani_info[] = { |
| 6490 | { |
| 6491 | I2C_BOARD_INFO("timpani", TIMPANI_I2C_SLAVE_ADDR), |
| 6492 | .platform_data = &timpani_pdata, |
| 6493 | }, |
| 6494 | }; |
| 6495 | |
| 6496 | #ifdef CONFIG_PMIC8901 |
| 6497 | |
| 6498 | #define PM8901_GPIO_INT 91 |
| 6499 | |
| 6500 | static struct pm8901_gpio_platform_data pm8901_mpp_data = { |
| 6501 | .gpio_base = PM8901_GPIO_PM_TO_SYS(0), |
| 6502 | .irq_base = PM8901_MPP_IRQ(PM8901_IRQ_BASE, 0), |
| 6503 | }; |
| 6504 | |
| 6505 | static struct resource pm8901_temp_alarm[] = { |
| 6506 | { |
| 6507 | .start = PM8901_TEMP_ALARM_IRQ(PM8901_IRQ_BASE), |
| 6508 | .end = PM8901_TEMP_ALARM_IRQ(PM8901_IRQ_BASE), |
| 6509 | .flags = IORESOURCE_IRQ, |
| 6510 | }, |
| 6511 | { |
| 6512 | .start = PM8901_TEMP_HI_ALARM_IRQ(PM8901_IRQ_BASE), |
| 6513 | .end = PM8901_TEMP_HI_ALARM_IRQ(PM8901_IRQ_BASE), |
| 6514 | .flags = IORESOURCE_IRQ, |
| 6515 | }, |
| 6516 | }; |
| 6517 | |
| 6518 | /* |
| 6519 | * Consumer specific regulator names: |
| 6520 | * regulator name consumer dev_name |
| 6521 | */ |
| 6522 | static struct regulator_consumer_supply vreg_consumers_8901_MPP0[] = { |
| 6523 | REGULATOR_SUPPLY("8901_mpp0", NULL), |
| 6524 | }; |
| 6525 | static struct regulator_consumer_supply vreg_consumers_8901_USB_OTG[] = { |
| 6526 | REGULATOR_SUPPLY("8901_usb_otg", NULL), |
| 6527 | }; |
| 6528 | static struct regulator_consumer_supply vreg_consumers_8901_HDMI_MVS[] = { |
| 6529 | REGULATOR_SUPPLY("8901_hdmi_mvs", NULL), |
| 6530 | }; |
| 6531 | |
| 6532 | #define PM8901_VREG_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, \ |
| 6533 | _always_on, _active_high) \ |
| 6534 | [PM8901_VREG_ID_##_id] = { \ |
| 6535 | .init_data = { \ |
| 6536 | .constraints = { \ |
| 6537 | .valid_modes_mask = _modes, \ |
| 6538 | .valid_ops_mask = _ops, \ |
| 6539 | .min_uV = _min_uV, \ |
| 6540 | .max_uV = _max_uV, \ |
| 6541 | .input_uV = _min_uV, \ |
| 6542 | .apply_uV = _apply_uV, \ |
| 6543 | .always_on = _always_on, \ |
| 6544 | }, \ |
| 6545 | .consumer_supplies = vreg_consumers_8901_##_id, \ |
| 6546 | .num_consumer_supplies = \ |
| 6547 | ARRAY_SIZE(vreg_consumers_8901_##_id), \ |
| 6548 | }, \ |
| 6549 | .active_high = _active_high, \ |
| 6550 | } |
| 6551 | |
| 6552 | #define PM8901_VREG_INIT_MPP(_id, _active_high) \ |
| 6553 | PM8901_VREG_INIT(_id, 0, 0, REGULATOR_MODE_NORMAL, \ |
| 6554 | REGULATOR_CHANGE_STATUS, 0, 0, _active_high) |
| 6555 | |
| 6556 | #define PM8901_VREG_INIT_VS(_id) \ |
| 6557 | PM8901_VREG_INIT(_id, 0, 0, REGULATOR_MODE_NORMAL, \ |
| 6558 | REGULATOR_CHANGE_STATUS, 0, 0, 0) |
| 6559 | |
| 6560 | static struct pm8901_vreg_pdata pm8901_vreg_init_pdata[PM8901_VREG_MAX] = { |
| 6561 | PM8901_VREG_INIT_MPP(MPP0, 1), |
| 6562 | |
| 6563 | PM8901_VREG_INIT_VS(USB_OTG), |
| 6564 | PM8901_VREG_INIT_VS(HDMI_MVS), |
| 6565 | }; |
| 6566 | |
| 6567 | #define PM8901_VREG(_id) { \ |
| 6568 | .name = "pm8901-regulator", \ |
| 6569 | .id = _id, \ |
| 6570 | .platform_data = &pm8901_vreg_init_pdata[_id], \ |
| 6571 | .pdata_size = sizeof(pm8901_vreg_init_pdata[_id]), \ |
| 6572 | } |
| 6573 | |
| 6574 | static struct mfd_cell pm8901_subdevs[] = { |
| 6575 | { .name = "pm8901-mpp", |
| 6576 | .id = -1, |
| 6577 | .platform_data = &pm8901_mpp_data, |
| 6578 | .pdata_size = sizeof(pm8901_mpp_data), |
| 6579 | }, |
| 6580 | { .name = "pm8901-tm", |
| 6581 | .id = -1, |
| 6582 | .num_resources = ARRAY_SIZE(pm8901_temp_alarm), |
| 6583 | .resources = pm8901_temp_alarm, |
| 6584 | }, |
| 6585 | PM8901_VREG(PM8901_VREG_ID_MPP0), |
| 6586 | PM8901_VREG(PM8901_VREG_ID_USB_OTG), |
| 6587 | PM8901_VREG(PM8901_VREG_ID_HDMI_MVS), |
| 6588 | }; |
| 6589 | |
| 6590 | static struct pm8901_platform_data pm8901_platform_data = { |
| 6591 | .irq_base = PM8901_IRQ_BASE, |
| 6592 | .num_subdevs = ARRAY_SIZE(pm8901_subdevs), |
| 6593 | .sub_devices = pm8901_subdevs, |
| 6594 | .irq_trigger_flags = IRQF_TRIGGER_LOW, |
| 6595 | }; |
| 6596 | |
| 6597 | static struct i2c_board_info pm8901_boardinfo[] __initdata = { |
| 6598 | { |
| 6599 | I2C_BOARD_INFO("pm8901-core", 0x55), |
| 6600 | .irq = MSM_GPIO_TO_INT(PM8901_GPIO_INT), |
| 6601 | .platform_data = &pm8901_platform_data, |
| 6602 | }, |
| 6603 | }; |
| 6604 | |
| 6605 | #endif /* CONFIG_PMIC8901 */ |
| 6606 | |
| 6607 | #if defined(CONFIG_MARIMBA_CORE) && (defined(CONFIG_GPIO_SX150X) \ |
| 6608 | || defined(CONFIG_GPIO_SX150X_MODULE)) |
| 6609 | |
| 6610 | static struct regulator *vreg_bahama; |
| 6611 | |
| 6612 | struct bahama_config_register{ |
| 6613 | u8 reg; |
| 6614 | u8 value; |
| 6615 | u8 mask; |
| 6616 | }; |
| 6617 | |
| 6618 | enum version{ |
| 6619 | VER_1_0, |
| 6620 | VER_2_0, |
| 6621 | VER_UNSUPPORTED = 0xFF |
| 6622 | }; |
| 6623 | |
| 6624 | static u8 read_bahama_ver(void) |
| 6625 | { |
| 6626 | int rc; |
| 6627 | struct marimba config = { .mod_id = SLAVE_ID_BAHAMA }; |
| 6628 | u8 bahama_version; |
| 6629 | |
| 6630 | rc = marimba_read_bit_mask(&config, 0x00, &bahama_version, 1, 0x1F); |
| 6631 | if (rc < 0) { |
| 6632 | printk(KERN_ERR |
| 6633 | "%s: version read failed: %d\n", |
| 6634 | __func__, rc); |
| 6635 | return VER_UNSUPPORTED; |
| 6636 | } else { |
| 6637 | printk(KERN_INFO |
| 6638 | "%s: version read got: 0x%x\n", |
| 6639 | __func__, bahama_version); |
| 6640 | } |
| 6641 | |
| 6642 | switch (bahama_version) { |
| 6643 | case 0x08: /* varient of bahama v1 */ |
| 6644 | case 0x10: |
| 6645 | case 0x00: |
| 6646 | return VER_1_0; |
| 6647 | case 0x09: /* variant of bahama v2 */ |
| 6648 | return VER_2_0; |
| 6649 | default: |
| 6650 | return VER_UNSUPPORTED; |
| 6651 | } |
| 6652 | } |
| 6653 | |
| 6654 | static unsigned int msm_bahama_setup_power(void) |
| 6655 | { |
| 6656 | int rc = 0; |
| 6657 | const char *msm_bahama_regulator = "8058_s3"; |
| 6658 | vreg_bahama = regulator_get(NULL, msm_bahama_regulator); |
| 6659 | |
| 6660 | if (IS_ERR(vreg_bahama)) { |
| 6661 | rc = PTR_ERR(vreg_bahama); |
| 6662 | pr_err("%s: regulator_get %s = %d\n", __func__, |
| 6663 | msm_bahama_regulator, rc); |
| 6664 | } |
| 6665 | |
| 6666 | if (!rc) |
| 6667 | rc = regulator_set_voltage(vreg_bahama, 1800000, 1800000); |
| 6668 | else { |
| 6669 | pr_err("%s: regulator_set_voltage %s = %d\n", __func__, |
| 6670 | msm_bahama_regulator, rc); |
| 6671 | goto unget; |
| 6672 | } |
| 6673 | |
| 6674 | if (!rc) |
| 6675 | rc = regulator_enable(vreg_bahama); |
| 6676 | else { |
| 6677 | pr_err("%s: regulator_enable %s = %d\n", __func__, |
| 6678 | msm_bahama_regulator, rc); |
| 6679 | goto unget; |
| 6680 | } |
| 6681 | |
| 6682 | if (!rc) |
| 6683 | rc = gpio_request(GPIO_MS_SYS_RESET_N, "bahama sys_rst_n"); |
| 6684 | else { |
| 6685 | pr_err("%s: gpio_request %d = %d\n", __func__, |
| 6686 | GPIO_MS_SYS_RESET_N, rc); |
| 6687 | goto unenable; |
| 6688 | } |
| 6689 | |
Siddartha Mohanadoss | 72d796e | 2011-07-20 22:08:34 -0700 | [diff] [blame] | 6690 | if (!rc) { |
| 6691 | gpio_direction_output(GPIO_MS_SYS_RESET_N, 0); |
| 6692 | usleep_range(1000, 1050); |
| 6693 | gpio_direction_output(GPIO_MS_SYS_RESET_N, 1); |
| 6694 | usleep_range(1000, 1050); |
| 6695 | } else { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 6696 | pr_err("%s: gpio_direction_output %d = %d\n", __func__, |
| 6697 | GPIO_MS_SYS_RESET_N, rc); |
| 6698 | goto unrequest; |
| 6699 | } |
| 6700 | |
| 6701 | return rc; |
| 6702 | |
| 6703 | unrequest: |
| 6704 | gpio_free(GPIO_MS_SYS_RESET_N); |
| 6705 | unenable: |
| 6706 | regulator_disable(vreg_bahama); |
| 6707 | unget: |
| 6708 | regulator_put(vreg_bahama); |
| 6709 | return rc; |
| 6710 | }; |
| 6711 | static unsigned int msm_bahama_shutdown_power(int value) |
| 6712 | |
| 6713 | |
| 6714 | { |
| 6715 | gpio_set_value_cansleep(GPIO_MS_SYS_RESET_N, 0); |
| 6716 | |
| 6717 | gpio_free(GPIO_MS_SYS_RESET_N); |
| 6718 | |
| 6719 | regulator_disable(vreg_bahama); |
| 6720 | |
| 6721 | regulator_put(vreg_bahama); |
| 6722 | |
| 6723 | return 0; |
| 6724 | }; |
| 6725 | |
| 6726 | static unsigned int msm_bahama_core_config(int type) |
| 6727 | { |
| 6728 | int rc = 0; |
| 6729 | |
| 6730 | if (type == BAHAMA_ID) { |
| 6731 | |
| 6732 | int i; |
| 6733 | struct marimba config = { .mod_id = SLAVE_ID_BAHAMA }; |
| 6734 | |
| 6735 | const struct bahama_config_register v20_init[] = { |
| 6736 | /* reg, value, mask */ |
| 6737 | { 0xF4, 0x84, 0xFF }, /* AREG */ |
| 6738 | { 0xF0, 0x04, 0xFF } /* DREG */ |
| 6739 | }; |
| 6740 | |
| 6741 | if (read_bahama_ver() == VER_2_0) { |
| 6742 | for (i = 0; i < ARRAY_SIZE(v20_init); i++) { |
| 6743 | u8 value = v20_init[i].value; |
| 6744 | rc = marimba_write_bit_mask(&config, |
| 6745 | v20_init[i].reg, |
| 6746 | &value, |
| 6747 | sizeof(v20_init[i].value), |
| 6748 | v20_init[i].mask); |
| 6749 | if (rc < 0) { |
| 6750 | printk(KERN_ERR |
| 6751 | "%s: reg %d write failed: %d\n", |
| 6752 | __func__, v20_init[i].reg, rc); |
| 6753 | return rc; |
| 6754 | } |
| 6755 | printk(KERN_INFO "%s: reg 0x%02x value 0x%02x" |
| 6756 | " mask 0x%02x\n", |
| 6757 | __func__, v20_init[i].reg, |
| 6758 | v20_init[i].value, v20_init[i].mask); |
| 6759 | } |
| 6760 | } |
| 6761 | } |
| 6762 | printk(KERN_INFO "core type: %d\n", type); |
| 6763 | |
| 6764 | return rc; |
| 6765 | } |
| 6766 | |
| 6767 | static struct regulator *fm_regulator_s3; |
| 6768 | static struct msm_xo_voter *fm_clock; |
| 6769 | |
| 6770 | static int fm_radio_setup(struct marimba_fm_platform_data *pdata) |
| 6771 | { |
| 6772 | int rc = 0; |
| 6773 | struct pm8058_gpio cfg = { |
| 6774 | .direction = PM_GPIO_DIR_IN, |
| 6775 | .pull = PM_GPIO_PULL_NO, |
| 6776 | .vin_sel = PM_GPIO_VIN_S3, |
| 6777 | .function = PM_GPIO_FUNC_NORMAL, |
| 6778 | .inv_int_pol = 0, |
| 6779 | }; |
| 6780 | |
| 6781 | if (!fm_regulator_s3) { |
| 6782 | fm_regulator_s3 = regulator_get(NULL, "8058_s3"); |
| 6783 | if (IS_ERR(fm_regulator_s3)) { |
| 6784 | rc = PTR_ERR(fm_regulator_s3); |
| 6785 | printk(KERN_ERR "%s: regulator get s3 (%d)\n", |
| 6786 | __func__, rc); |
| 6787 | goto out; |
| 6788 | } |
| 6789 | } |
| 6790 | |
| 6791 | |
| 6792 | rc = regulator_set_voltage(fm_regulator_s3, 1800000, 1800000); |
| 6793 | if (rc < 0) { |
| 6794 | printk(KERN_ERR "%s: regulator set voltage failed (%d)\n", |
| 6795 | __func__, rc); |
| 6796 | goto fm_fail_put; |
| 6797 | } |
| 6798 | |
| 6799 | rc = regulator_enable(fm_regulator_s3); |
| 6800 | if (rc < 0) { |
| 6801 | printk(KERN_ERR "%s: regulator s3 enable failed (%d)\n", |
| 6802 | __func__, rc); |
| 6803 | goto fm_fail_put; |
| 6804 | } |
| 6805 | |
| 6806 | /*Vote for XO clock*/ |
| 6807 | fm_clock = msm_xo_get(MSM_XO_TCXO_D0, "fm_power"); |
| 6808 | |
| 6809 | if (IS_ERR(fm_clock)) { |
| 6810 | rc = PTR_ERR(fm_clock); |
| 6811 | printk(KERN_ERR "%s: Couldn't get TCXO_D0 vote for FM (%d)\n", |
| 6812 | __func__, rc); |
| 6813 | goto fm_fail_switch; |
| 6814 | } |
| 6815 | |
| 6816 | rc = msm_xo_mode_vote(fm_clock, MSM_XO_MODE_ON); |
| 6817 | if (rc < 0) { |
| 6818 | printk(KERN_ERR "%s: Failed to vote for TCX0_D0 ON (%d)\n", |
| 6819 | __func__, rc); |
| 6820 | goto fm_fail_vote; |
| 6821 | } |
| 6822 | |
| 6823 | /*GPIO 18 on PMIC is FM_IRQ*/ |
| 6824 | rc = pm8058_gpio_config(FM_GPIO, &cfg); |
| 6825 | if (rc) { |
| 6826 | printk(KERN_ERR "%s: return val of pm8058_gpio_config: %d\n", |
| 6827 | __func__, rc); |
| 6828 | goto fm_fail_clock; |
| 6829 | } |
| 6830 | goto out; |
| 6831 | |
| 6832 | fm_fail_clock: |
| 6833 | msm_xo_mode_vote(fm_clock, MSM_XO_MODE_OFF); |
| 6834 | fm_fail_vote: |
| 6835 | msm_xo_put(fm_clock); |
| 6836 | fm_fail_switch: |
| 6837 | regulator_disable(fm_regulator_s3); |
| 6838 | fm_fail_put: |
| 6839 | regulator_put(fm_regulator_s3); |
| 6840 | out: |
| 6841 | return rc; |
| 6842 | }; |
| 6843 | |
| 6844 | static void fm_radio_shutdown(struct marimba_fm_platform_data *pdata) |
| 6845 | { |
| 6846 | int rc = 0; |
| 6847 | if (fm_regulator_s3 != NULL) { |
| 6848 | rc = regulator_disable(fm_regulator_s3); |
| 6849 | if (rc < 0) { |
| 6850 | printk(KERN_ERR "%s: regulator s3 disable (%d)\n", |
| 6851 | __func__, rc); |
| 6852 | } |
| 6853 | regulator_put(fm_regulator_s3); |
| 6854 | fm_regulator_s3 = NULL; |
| 6855 | } |
| 6856 | printk(KERN_ERR "%s: Voting off for XO", __func__); |
| 6857 | |
| 6858 | if (fm_clock != NULL) { |
| 6859 | rc = msm_xo_mode_vote(fm_clock, MSM_XO_MODE_OFF); |
| 6860 | if (rc < 0) { |
| 6861 | printk(KERN_ERR "%s: Voting off XO clock (%d)\n", |
| 6862 | __func__, rc); |
| 6863 | } |
| 6864 | msm_xo_put(fm_clock); |
| 6865 | } |
| 6866 | printk(KERN_ERR "%s: coming out of fm_radio_shutdown", __func__); |
| 6867 | } |
| 6868 | |
| 6869 | /* Slave id address for FM/CDC/QMEMBIST |
| 6870 | * Values can be programmed using Marimba slave id 0 |
| 6871 | * should there be a conflict with other I2C devices |
| 6872 | * */ |
| 6873 | #define BAHAMA_SLAVE_ID_FM_ADDR 0x2A |
| 6874 | #define BAHAMA_SLAVE_ID_QMEMBIST_ADDR 0x7B |
| 6875 | |
| 6876 | static struct marimba_fm_platform_data marimba_fm_pdata = { |
| 6877 | .fm_setup = fm_radio_setup, |
| 6878 | .fm_shutdown = fm_radio_shutdown, |
| 6879 | .irq = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, FM_GPIO), |
| 6880 | .is_fm_soc_i2s_master = false, |
| 6881 | .config_i2s_gpio = NULL, |
| 6882 | }; |
| 6883 | |
| 6884 | /* |
| 6885 | Just initializing the BAHAMA related slave |
| 6886 | */ |
| 6887 | static struct marimba_platform_data marimba_pdata = { |
| 6888 | .slave_id[SLAVE_ID_BAHAMA_FM] = BAHAMA_SLAVE_ID_FM_ADDR, |
| 6889 | .slave_id[SLAVE_ID_BAHAMA_QMEMBIST] = BAHAMA_SLAVE_ID_QMEMBIST_ADDR, |
| 6890 | .bahama_setup = msm_bahama_setup_power, |
| 6891 | .bahama_shutdown = msm_bahama_shutdown_power, |
| 6892 | .bahama_core_config = msm_bahama_core_config, |
| 6893 | .fm = &marimba_fm_pdata, |
| 6894 | .tsadc_ssbi_adap = MARIMBA_SSBI_ADAP, |
| 6895 | }; |
| 6896 | |
| 6897 | |
| 6898 | static struct i2c_board_info msm_marimba_board_info[] = { |
| 6899 | { |
| 6900 | I2C_BOARD_INFO("marimba", 0xc), |
| 6901 | .platform_data = &marimba_pdata, |
| 6902 | } |
| 6903 | }; |
| 6904 | #endif /* CONFIG_MAIMBA_CORE */ |
| 6905 | |
| 6906 | #ifdef CONFIG_I2C |
| 6907 | #define I2C_SURF 1 |
| 6908 | #define I2C_FFA (1 << 1) |
| 6909 | #define I2C_RUMI (1 << 2) |
| 6910 | #define I2C_SIM (1 << 3) |
| 6911 | #define I2C_FLUID (1 << 4) |
Zhang Chang Ken | 6baadf0 | 2011-08-05 09:48:15 -0400 | [diff] [blame] | 6912 | #define I2C_DRAGON (1 << 5) |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 6913 | |
| 6914 | struct i2c_registry { |
| 6915 | u8 machs; |
| 6916 | int bus; |
| 6917 | struct i2c_board_info *info; |
| 6918 | int len; |
| 6919 | }; |
| 6920 | |
| 6921 | static struct i2c_registry msm8x60_i2c_devices[] __initdata = { |
| 6922 | #ifdef CONFIG_PMIC8058 |
| 6923 | { |
Zhang Chang Ken | 6baadf0 | 2011-08-05 09:48:15 -0400 | [diff] [blame] | 6924 | I2C_SURF | I2C_FFA | I2C_FLUID | I2C_DRAGON, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 6925 | MSM_SSBI1_I2C_BUS_ID, |
| 6926 | pm8058_boardinfo, |
| 6927 | ARRAY_SIZE(pm8058_boardinfo), |
| 6928 | }, |
| 6929 | #endif |
| 6930 | #ifdef CONFIG_PMIC8901 |
| 6931 | { |
Zhang Chang Ken | 6baadf0 | 2011-08-05 09:48:15 -0400 | [diff] [blame] | 6932 | I2C_SURF | I2C_FFA | I2C_FLUID | I2C_DRAGON, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 6933 | MSM_SSBI2_I2C_BUS_ID, |
| 6934 | pm8901_boardinfo, |
| 6935 | ARRAY_SIZE(pm8901_boardinfo), |
| 6936 | }, |
| 6937 | #endif |
| 6938 | #if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE) |
| 6939 | { |
Zhang Chang Ken | 6baadf0 | 2011-08-05 09:48:15 -0400 | [diff] [blame] | 6940 | I2C_SURF | I2C_FFA | I2C_DRAGON, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 6941 | MSM_GSBI8_QUP_I2C_BUS_ID, |
| 6942 | core_expander_i2c_info, |
| 6943 | ARRAY_SIZE(core_expander_i2c_info), |
| 6944 | }, |
| 6945 | { |
Zhang Chang Ken | 6baadf0 | 2011-08-05 09:48:15 -0400 | [diff] [blame] | 6946 | I2C_SURF | I2C_FFA | I2C_DRAGON, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 6947 | MSM_GSBI8_QUP_I2C_BUS_ID, |
| 6948 | docking_expander_i2c_info, |
| 6949 | ARRAY_SIZE(docking_expander_i2c_info), |
| 6950 | }, |
| 6951 | { |
| 6952 | I2C_SURF, |
| 6953 | MSM_GSBI8_QUP_I2C_BUS_ID, |
| 6954 | surf_expanders_i2c_info, |
| 6955 | ARRAY_SIZE(surf_expanders_i2c_info), |
| 6956 | }, |
| 6957 | { |
Zhang Chang Ken | 6baadf0 | 2011-08-05 09:48:15 -0400 | [diff] [blame] | 6958 | I2C_SURF | I2C_FFA | I2C_DRAGON, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 6959 | MSM_GSBI3_QUP_I2C_BUS_ID, |
| 6960 | fha_expanders_i2c_info, |
| 6961 | ARRAY_SIZE(fha_expanders_i2c_info), |
| 6962 | }, |
| 6963 | { |
| 6964 | I2C_FLUID, |
| 6965 | MSM_GSBI3_QUP_I2C_BUS_ID, |
| 6966 | fluid_expanders_i2c_info, |
| 6967 | ARRAY_SIZE(fluid_expanders_i2c_info), |
| 6968 | }, |
| 6969 | { |
| 6970 | I2C_FLUID, |
| 6971 | MSM_GSBI8_QUP_I2C_BUS_ID, |
| 6972 | fluid_core_expander_i2c_info, |
| 6973 | ARRAY_SIZE(fluid_core_expander_i2c_info), |
| 6974 | }, |
| 6975 | #endif |
| 6976 | #if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \ |
| 6977 | defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE) |
| 6978 | { |
Zhang Chang Ken | 6baadf0 | 2011-08-05 09:48:15 -0400 | [diff] [blame] | 6979 | I2C_SURF | I2C_FFA | I2C_FLUID | I2C_DRAGON, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 6980 | MSM_GSBI3_QUP_I2C_BUS_ID, |
| 6981 | msm_i2c_gsbi3_tdisc_info, |
| 6982 | ARRAY_SIZE(msm_i2c_gsbi3_tdisc_info), |
| 6983 | }, |
| 6984 | #endif |
| 6985 | { |
Zhang Chang Ken | 6baadf0 | 2011-08-05 09:48:15 -0400 | [diff] [blame] | 6986 | I2C_SURF | I2C_FFA | I2C_FLUID | I2C_DRAGON, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 6987 | MSM_GSBI3_QUP_I2C_BUS_ID, |
| 6988 | cy8ctmg200_board_info, |
| 6989 | ARRAY_SIZE(cy8ctmg200_board_info), |
| 6990 | }, |
| 6991 | #if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \ |
| 6992 | defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE) |
| 6993 | { |
| 6994 | I2C_FLUID, |
| 6995 | MSM_GSBI3_QUP_I2C_BUS_ID, |
| 6996 | cyttsp_fluid_info, |
| 6997 | ARRAY_SIZE(cyttsp_fluid_info), |
| 6998 | }, |
| 6999 | { |
| 7000 | I2C_FFA | I2C_SURF, |
| 7001 | MSM_GSBI3_QUP_I2C_BUS_ID, |
| 7002 | cyttsp_ffa_info, |
| 7003 | ARRAY_SIZE(cyttsp_ffa_info), |
| 7004 | }, |
| 7005 | #endif |
| 7006 | #ifdef CONFIG_MSM_CAMERA |
Jilai Wang | 971f97f | 2011-07-13 14:25:25 -0400 | [diff] [blame^] | 7007 | { |
| 7008 | I2C_SURF | I2C_FFA | I2C_FLUID , |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 7009 | MSM_GSBI4_QUP_I2C_BUS_ID, |
| 7010 | msm_camera_boardinfo, |
| 7011 | ARRAY_SIZE(msm_camera_boardinfo), |
| 7012 | }, |
Jilai Wang | 971f97f | 2011-07-13 14:25:25 -0400 | [diff] [blame^] | 7013 | { |
| 7014 | I2C_DRAGON, |
| 7015 | MSM_GSBI4_QUP_I2C_BUS_ID, |
| 7016 | msm_camera_dragon_boardinfo, |
| 7017 | ARRAY_SIZE(msm_camera_dragon_boardinfo), |
| 7018 | }, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 7019 | #endif |
| 7020 | { |
| 7021 | I2C_SURF | I2C_FFA | I2C_FLUID, |
| 7022 | MSM_GSBI7_QUP_I2C_BUS_ID, |
| 7023 | msm_i2c_gsbi7_timpani_info, |
| 7024 | ARRAY_SIZE(msm_i2c_gsbi7_timpani_info), |
| 7025 | }, |
| 7026 | #if defined(CONFIG_MARIMBA_CORE) |
| 7027 | { |
| 7028 | I2C_SURF | I2C_FFA | I2C_FLUID, |
| 7029 | MSM_GSBI7_QUP_I2C_BUS_ID, |
| 7030 | msm_marimba_board_info, |
| 7031 | ARRAY_SIZE(msm_marimba_board_info), |
| 7032 | }, |
| 7033 | #endif /* CONFIG_MARIMBA_CORE */ |
| 7034 | #ifdef CONFIG_ISL9519_CHARGER |
| 7035 | { |
| 7036 | I2C_SURF | I2C_FFA, |
| 7037 | MSM_GSBI8_QUP_I2C_BUS_ID, |
| 7038 | isl_charger_i2c_info, |
| 7039 | ARRAY_SIZE(isl_charger_i2c_info), |
| 7040 | }, |
| 7041 | #endif |
| 7042 | #if defined(CONFIG_HAPTIC_ISA1200) || \ |
| 7043 | defined(CONFIG_HAPTIC_ISA1200_MODULE) |
| 7044 | { |
| 7045 | I2C_FLUID, |
| 7046 | MSM_GSBI8_QUP_I2C_BUS_ID, |
| 7047 | msm_isa1200_board_info, |
| 7048 | ARRAY_SIZE(msm_isa1200_board_info), |
| 7049 | }, |
| 7050 | #endif |
| 7051 | #if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE) |
| 7052 | { |
| 7053 | I2C_FLUID, |
| 7054 | MSM_GSBI8_QUP_I2C_BUS_ID, |
| 7055 | smb137b_charger_i2c_info, |
| 7056 | ARRAY_SIZE(smb137b_charger_i2c_info), |
| 7057 | }, |
| 7058 | #endif |
| 7059 | #if defined(CONFIG_BATTERY_BQ27520) || \ |
| 7060 | defined(CONFIG_BATTERY_BQ27520_MODULE) |
| 7061 | { |
| 7062 | I2C_FLUID, |
| 7063 | MSM_GSBI8_QUP_I2C_BUS_ID, |
| 7064 | msm_bq27520_board_info, |
| 7065 | ARRAY_SIZE(msm_bq27520_board_info), |
| 7066 | }, |
| 7067 | #endif |
| 7068 | }; |
| 7069 | #endif /* CONFIG_I2C */ |
| 7070 | |
| 7071 | static void fixup_i2c_configs(void) |
| 7072 | { |
| 7073 | #ifdef CONFIG_I2C |
| 7074 | #if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE) |
| 7075 | if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion()) |
| 7076 | sx150x_data[SX150X_CORE].irq_summary = |
| 7077 | PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT2_N); |
Zhang Chang Ken | 6baadf0 | 2011-08-05 09:48:15 -0400 | [diff] [blame] | 7078 | else if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa() || |
| 7079 | machine_is_msm8x60_dragon()) |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 7080 | sx150x_data[SX150X_CORE].irq_summary = |
| 7081 | PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT1_N); |
| 7082 | else if (machine_is_msm8x60_fluid()) |
| 7083 | sx150x_data[SX150X_CORE_FLUID].irq_summary = |
| 7084 | PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT1_N); |
| 7085 | #endif |
| 7086 | /* |
| 7087 | * Set PMIC 8901 MPP0 active_high to 0 for surf and charm_surf. This |
| 7088 | * implies that the regulator connected to MPP0 is enabled when |
| 7089 | * MPP0 is low. |
| 7090 | */ |
| 7091 | if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion()) |
| 7092 | pm8901_vreg_init_pdata[PM8901_VREG_ID_MPP0].active_high = 0; |
| 7093 | else |
| 7094 | pm8901_vreg_init_pdata[PM8901_VREG_ID_MPP0].active_high = 1; |
| 7095 | #endif |
| 7096 | } |
| 7097 | |
| 7098 | static void register_i2c_devices(void) |
| 7099 | { |
| 7100 | #ifdef CONFIG_I2C |
| 7101 | u8 mach_mask = 0; |
| 7102 | int i; |
| 7103 | |
| 7104 | /* Build the matching 'supported_machs' bitmask */ |
| 7105 | if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion()) |
| 7106 | mach_mask = I2C_SURF; |
| 7107 | else if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa()) |
| 7108 | mach_mask = I2C_FFA; |
| 7109 | else if (machine_is_msm8x60_rumi3()) |
| 7110 | mach_mask = I2C_RUMI; |
| 7111 | else if (machine_is_msm8x60_sim()) |
| 7112 | mach_mask = I2C_SIM; |
| 7113 | else if (machine_is_msm8x60_fluid()) |
| 7114 | mach_mask = I2C_FLUID; |
Zhang Chang Ken | 6baadf0 | 2011-08-05 09:48:15 -0400 | [diff] [blame] | 7115 | else if (machine_is_msm8x60_dragon()) |
| 7116 | mach_mask = I2C_DRAGON; |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 7117 | else |
| 7118 | pr_err("unmatched machine ID in register_i2c_devices\n"); |
| 7119 | |
| 7120 | /* Run the array and install devices as appropriate */ |
| 7121 | for (i = 0; i < ARRAY_SIZE(msm8x60_i2c_devices); ++i) { |
| 7122 | if (msm8x60_i2c_devices[i].machs & mach_mask) |
| 7123 | i2c_register_board_info(msm8x60_i2c_devices[i].bus, |
| 7124 | msm8x60_i2c_devices[i].info, |
| 7125 | msm8x60_i2c_devices[i].len); |
| 7126 | } |
| 7127 | #endif |
| 7128 | } |
| 7129 | |
| 7130 | static void __init msm8x60_init_uart12dm(void) |
| 7131 | { |
| 7132 | #if !defined(CONFIG_USB_PEHCI_HCD) && !defined(CONFIG_USB_PEHCI_HCD_MODULE) |
| 7133 | /* 0x1D000000 now belongs to EBI2:CS3 i.e. USB ISP Controller */ |
| 7134 | void *fpga_mem = ioremap_nocache(0x1D000000, SZ_4K); |
| 7135 | |
| 7136 | if (!fpga_mem) |
| 7137 | pr_err("%s(): Error getting memory\n", __func__); |
| 7138 | |
| 7139 | /* Advanced mode */ |
| 7140 | writew(0xFFFF, fpga_mem + 0x15C); |
| 7141 | /* FPGA_UART_SEL */ |
| 7142 | writew(0, fpga_mem + 0x172); |
| 7143 | /* FPGA_GPIO_CONFIG_117 */ |
| 7144 | writew(1, fpga_mem + 0xEA); |
| 7145 | /* FPGA_GPIO_CONFIG_118 */ |
| 7146 | writew(1, fpga_mem + 0xEC); |
| 7147 | mb(); |
| 7148 | iounmap(fpga_mem); |
| 7149 | #endif |
| 7150 | } |
| 7151 | |
| 7152 | #define MSM_GSBI9_PHYS 0x19900000 |
| 7153 | #define GSBI_DUAL_MODE_CODE 0x60 |
| 7154 | |
| 7155 | static void __init msm8x60_init_buses(void) |
| 7156 | { |
| 7157 | #ifdef CONFIG_I2C_QUP |
| 7158 | void *gsbi_mem = ioremap_nocache(0x19C00000, 4); |
| 7159 | /* Setting protocol code to 0x60 for dual UART/I2C in GSBI12 */ |
| 7160 | writel_relaxed(0x6 << 4, gsbi_mem); |
| 7161 | /* Ensure protocol code is written before proceeding further */ |
| 7162 | mb(); |
| 7163 | iounmap(gsbi_mem); |
| 7164 | |
| 7165 | msm_gsbi3_qup_i2c_device.dev.platform_data = &msm_gsbi3_qup_i2c_pdata; |
| 7166 | msm_gsbi4_qup_i2c_device.dev.platform_data = &msm_gsbi4_qup_i2c_pdata; |
| 7167 | msm_gsbi7_qup_i2c_device.dev.platform_data = &msm_gsbi7_qup_i2c_pdata; |
| 7168 | msm_gsbi8_qup_i2c_device.dev.platform_data = &msm_gsbi8_qup_i2c_pdata; |
| 7169 | |
| 7170 | #ifdef CONFIG_MSM_GSBI9_UART |
| 7171 | if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) { |
| 7172 | /* Setting protocol code to 0x60 for dual UART/I2C in GSBI9 */ |
| 7173 | gsbi_mem = ioremap_nocache(MSM_GSBI9_PHYS, 4); |
| 7174 | writel_relaxed(GSBI_DUAL_MODE_CODE, gsbi_mem); |
| 7175 | iounmap(gsbi_mem); |
| 7176 | msm_gsbi9_qup_i2c_pdata.use_gsbi_shared_mode = 1; |
| 7177 | } |
| 7178 | #endif |
| 7179 | msm_gsbi9_qup_i2c_device.dev.platform_data = &msm_gsbi9_qup_i2c_pdata; |
| 7180 | msm_gsbi12_qup_i2c_device.dev.platform_data = &msm_gsbi12_qup_i2c_pdata; |
| 7181 | #endif |
| 7182 | #if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE) |
| 7183 | msm_gsbi1_qup_spi_device.dev.platform_data = &msm_gsbi1_qup_spi_pdata; |
| 7184 | #endif |
| 7185 | #ifdef CONFIG_I2C_SSBI |
| 7186 | msm_device_ssbi1.dev.platform_data = &msm_ssbi1_pdata; |
| 7187 | msm_device_ssbi2.dev.platform_data = &msm_ssbi2_pdata; |
| 7188 | msm_device_ssbi3.dev.platform_data = &msm_ssbi3_pdata; |
| 7189 | #endif |
| 7190 | |
| 7191 | if (machine_is_msm8x60_fluid()) { |
| 7192 | #if (defined(CONFIG_USB_EHCI_MSM_72K) && \ |
| 7193 | (defined(CONFIG_SMB137B_CHARGER) || \ |
| 7194 | defined(CONFIG_SMB137B_CHARGER_MODULE))) |
| 7195 | msm_otg_pdata.vbus_power = msm_hsusb_smb137b_vbus_power; |
| 7196 | #endif |
| 7197 | #if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE) |
| 7198 | msm_gsbi10_qup_spi_device.dev.platform_data = |
| 7199 | &msm_gsbi10_qup_spi_pdata; |
| 7200 | #endif |
| 7201 | } |
| 7202 | |
| 7203 | #if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_HCD) |
| 7204 | /* |
| 7205 | * We can not put USB regulators (8058_l6 and 8058_l7) in LPM |
| 7206 | * when we depend on USB PHY for VBUS/ID notifications. VBUS |
| 7207 | * and ID notifications are available only on V2 surf and FFA |
| 7208 | * with a hardware workaround. |
| 7209 | */ |
| 7210 | if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2 && |
| 7211 | (machine_is_msm8x60_surf() || |
| 7212 | (machine_is_msm8x60_ffa() && |
| 7213 | pmic_id_notif_supported))) |
| 7214 | msm_otg_pdata.phy_can_powercollapse = 1; |
| 7215 | msm_device_otg.dev.platform_data = &msm_otg_pdata; |
| 7216 | #endif |
| 7217 | |
| 7218 | #ifdef CONFIG_USB_GADGET_MSM_72K |
| 7219 | msm_device_gadget_peripheral.dev.platform_data = &msm_gadget_pdata; |
| 7220 | #endif |
| 7221 | |
| 7222 | #ifdef CONFIG_SERIAL_MSM_HS |
| 7223 | msm_uart_dm1_pdata.wakeup_irq = gpio_to_irq(54); /* GSBI6(2) */ |
| 7224 | msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata; |
| 7225 | #endif |
| 7226 | #ifdef CONFIG_MSM_GSBI9_UART |
| 7227 | if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) { |
| 7228 | msm_device_uart_gsbi9 = msm_add_gsbi9_uart(); |
| 7229 | if (IS_ERR(msm_device_uart_gsbi9)) |
| 7230 | pr_err("%s(): Failed to create uart gsbi9 device\n", |
| 7231 | __func__); |
| 7232 | } |
| 7233 | #endif |
| 7234 | |
| 7235 | #ifdef CONFIG_MSM_BUS_SCALING |
| 7236 | |
| 7237 | /* RPM calls are only enabled on V2 */ |
| 7238 | if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2) { |
| 7239 | msm_bus_apps_fabric_pdata.rpm_enabled = 1; |
| 7240 | msm_bus_sys_fabric_pdata.rpm_enabled = 1; |
| 7241 | msm_bus_mm_fabric_pdata.rpm_enabled = 1; |
| 7242 | msm_bus_sys_fpb_pdata.rpm_enabled = 1; |
| 7243 | msm_bus_cpss_fpb_pdata.rpm_enabled = 1; |
| 7244 | } |
| 7245 | |
| 7246 | msm_bus_apps_fabric.dev.platform_data = &msm_bus_apps_fabric_pdata; |
| 7247 | msm_bus_sys_fabric.dev.platform_data = &msm_bus_sys_fabric_pdata; |
| 7248 | msm_bus_mm_fabric.dev.platform_data = &msm_bus_mm_fabric_pdata; |
| 7249 | msm_bus_sys_fpb.dev.platform_data = &msm_bus_sys_fpb_pdata; |
| 7250 | msm_bus_cpss_fpb.dev.platform_data = &msm_bus_cpss_fpb_pdata; |
| 7251 | #endif |
| 7252 | } |
| 7253 | |
| 7254 | static void __init msm8x60_map_io(void) |
| 7255 | { |
| 7256 | msm_shared_ram_phys = MSM_SHARED_RAM_PHYS; |
| 7257 | msm_map_msm8x60_io(); |
| 7258 | } |
| 7259 | |
| 7260 | /* |
| 7261 | * Most segments of the EBI2 bus are disabled by default. |
| 7262 | */ |
| 7263 | static void __init msm8x60_init_ebi2(void) |
| 7264 | { |
| 7265 | uint32_t ebi2_cfg; |
| 7266 | void *ebi2_cfg_ptr; |
| 7267 | |
| 7268 | ebi2_cfg_ptr = ioremap_nocache(0x1a100000, sizeof(uint32_t)); |
| 7269 | if (ebi2_cfg_ptr != 0) { |
| 7270 | ebi2_cfg = readl_relaxed(ebi2_cfg_ptr); |
| 7271 | |
| 7272 | if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() || |
Zhang Chang Ken | 6baadf0 | 2011-08-05 09:48:15 -0400 | [diff] [blame] | 7273 | machine_is_msm8x60_fluid() || |
| 7274 | machine_is_msm8x60_dragon()) |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 7275 | ebi2_cfg |= (1 << 4) | (1 << 5); /* CS2, CS3 */ |
| 7276 | else if (machine_is_msm8x60_sim()) |
| 7277 | ebi2_cfg |= (1 << 4); /* CS2 */ |
| 7278 | else if (machine_is_msm8x60_rumi3()) |
| 7279 | ebi2_cfg |= (1 << 5); /* CS3 */ |
| 7280 | |
| 7281 | writel_relaxed(ebi2_cfg, ebi2_cfg_ptr); |
| 7282 | iounmap(ebi2_cfg_ptr); |
| 7283 | } |
| 7284 | |
| 7285 | if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() || |
Zhang Chang Ken | 6baadf0 | 2011-08-05 09:48:15 -0400 | [diff] [blame] | 7286 | machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon()) { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 7287 | ebi2_cfg_ptr = ioremap_nocache(0x1a110000, SZ_4K); |
| 7288 | if (ebi2_cfg_ptr != 0) { |
| 7289 | /* EBI2_XMEM_CFG:PWRSAVE_MODE off */ |
| 7290 | writel_relaxed(0UL, ebi2_cfg_ptr); |
| 7291 | |
| 7292 | /* CS2: Delay 9 cycles (140ns@64MHz) between SMSC |
| 7293 | * LAN9221 Ethernet controller reads and writes. |
| 7294 | * The lowest 4 bits are the read delay, the next |
| 7295 | * 4 are the write delay. */ |
| 7296 | writel_relaxed(0x031F1C99, ebi2_cfg_ptr + 0x10); |
| 7297 | #if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE) |
| 7298 | /* |
| 7299 | * RECOVERY=5, HOLD_WR=1 |
| 7300 | * INIT_LATENCY_WR=1, INIT_LATENCY_RD=1 |
| 7301 | * WAIT_WR=1, WAIT_RD=2 |
| 7302 | */ |
| 7303 | writel_relaxed(0x51010112, ebi2_cfg_ptr + 0x14); |
| 7304 | /* |
| 7305 | * HOLD_RD=1 |
| 7306 | * ADV_OE_RECOVERY=0, ADDR_HOLD_ENA=1 |
| 7307 | */ |
| 7308 | writel_relaxed(0x01000020, ebi2_cfg_ptr + 0x34); |
| 7309 | #else |
| 7310 | /* EBI2 CS3 muxed address/data, |
| 7311 | * two cyc addr enable */ |
| 7312 | writel_relaxed(0xA3030020, ebi2_cfg_ptr + 0x34); |
| 7313 | |
| 7314 | #endif |
| 7315 | iounmap(ebi2_cfg_ptr); |
| 7316 | } |
| 7317 | } |
| 7318 | } |
| 7319 | |
| 7320 | static void __init msm8x60_configure_smc91x(void) |
| 7321 | { |
| 7322 | if (machine_is_msm8x60_sim()) { |
| 7323 | |
| 7324 | smc91x_resources[0].start = 0x1b800300; |
| 7325 | smc91x_resources[0].end = 0x1b8003ff; |
| 7326 | |
| 7327 | smc91x_resources[1].start = (NR_MSM_IRQS + 40); |
| 7328 | smc91x_resources[1].end = (NR_MSM_IRQS + 40); |
| 7329 | |
| 7330 | } else if (machine_is_msm8x60_rumi3()) { |
| 7331 | |
| 7332 | smc91x_resources[0].start = 0x1d000300; |
| 7333 | smc91x_resources[0].end = 0x1d0003ff; |
| 7334 | |
| 7335 | smc91x_resources[1].start = TLMM_MSM_DIR_CONN_IRQ_0; |
| 7336 | smc91x_resources[1].end = TLMM_MSM_DIR_CONN_IRQ_0; |
| 7337 | } |
| 7338 | } |
| 7339 | |
| 7340 | static void __init msm8x60_init_tlmm(void) |
| 7341 | { |
| 7342 | if (machine_is_msm8x60_rumi3()) |
| 7343 | msm_gpio_install_direct_irq(0, 0, 1); |
| 7344 | } |
| 7345 | |
| 7346 | #if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\ |
| 7347 | || defined(CONFIG_MMC_MSM_SDC2_SUPPORT)\ |
| 7348 | || defined(CONFIG_MMC_MSM_SDC3_SUPPORT)\ |
| 7349 | || defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\ |
| 7350 | || defined(CONFIG_MMC_MSM_SDC5_SUPPORT)) |
| 7351 | |
| 7352 | /* 8x60 is having 5 SDCC controllers */ |
| 7353 | #define MAX_SDCC_CONTROLLER 5 |
| 7354 | |
| 7355 | struct msm_sdcc_gpio { |
| 7356 | /* maximum 10 GPIOs per SDCC controller */ |
| 7357 | s16 no; |
| 7358 | /* name of this GPIO */ |
| 7359 | const char *name; |
| 7360 | bool always_on; |
| 7361 | bool is_enabled; |
| 7362 | }; |
| 7363 | |
| 7364 | #ifdef CONFIG_MMC_MSM_SDC1_SUPPORT |
| 7365 | static struct msm_sdcc_gpio sdc1_gpio_cfg[] = { |
| 7366 | {159, "sdc1_dat_0"}, |
| 7367 | {160, "sdc1_dat_1"}, |
| 7368 | {161, "sdc1_dat_2"}, |
| 7369 | {162, "sdc1_dat_3"}, |
| 7370 | #ifdef CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT |
| 7371 | {163, "sdc1_dat_4"}, |
| 7372 | {164, "sdc1_dat_5"}, |
| 7373 | {165, "sdc1_dat_6"}, |
| 7374 | {166, "sdc1_dat_7"}, |
| 7375 | #endif |
| 7376 | {167, "sdc1_clk"}, |
| 7377 | {168, "sdc1_cmd"} |
| 7378 | }; |
| 7379 | #endif |
| 7380 | |
| 7381 | #ifdef CONFIG_MMC_MSM_SDC2_SUPPORT |
| 7382 | static struct msm_sdcc_gpio sdc2_gpio_cfg[] = { |
| 7383 | {143, "sdc2_dat_0"}, |
| 7384 | {144, "sdc2_dat_1", 1}, |
| 7385 | {145, "sdc2_dat_2"}, |
| 7386 | {146, "sdc2_dat_3"}, |
| 7387 | #ifdef CONFIG_MMC_MSM_SDC2_8_BIT_SUPPORT |
| 7388 | {147, "sdc2_dat_4"}, |
| 7389 | {148, "sdc2_dat_5"}, |
| 7390 | {149, "sdc2_dat_6"}, |
| 7391 | {150, "sdc2_dat_7"}, |
| 7392 | #endif |
| 7393 | {151, "sdc2_cmd"}, |
| 7394 | {152, "sdc2_clk", 1} |
| 7395 | }; |
| 7396 | #endif |
| 7397 | |
| 7398 | #ifdef CONFIG_MMC_MSM_SDC5_SUPPORT |
| 7399 | static struct msm_sdcc_gpio sdc5_gpio_cfg[] = { |
| 7400 | {95, "sdc5_cmd"}, |
| 7401 | {96, "sdc5_dat_3"}, |
| 7402 | {97, "sdc5_clk", 1}, |
| 7403 | {98, "sdc5_dat_2"}, |
| 7404 | {99, "sdc5_dat_1", 1}, |
| 7405 | {100, "sdc5_dat_0"} |
| 7406 | }; |
| 7407 | #endif |
| 7408 | |
| 7409 | struct msm_sdcc_pad_pull_cfg { |
| 7410 | enum msm_tlmm_pull_tgt pull; |
| 7411 | u32 pull_val; |
| 7412 | }; |
| 7413 | |
| 7414 | struct msm_sdcc_pad_drv_cfg { |
| 7415 | enum msm_tlmm_hdrive_tgt drv; |
| 7416 | u32 drv_val; |
| 7417 | }; |
| 7418 | |
| 7419 | #ifdef CONFIG_MMC_MSM_SDC3_SUPPORT |
| 7420 | static struct msm_sdcc_pad_drv_cfg sdc3_pad_on_drv_cfg[] = { |
| 7421 | {TLMM_HDRV_SDC3_CLK, GPIO_CFG_8MA}, |
| 7422 | {TLMM_HDRV_SDC3_CMD, GPIO_CFG_8MA}, |
| 7423 | {TLMM_HDRV_SDC3_DATA, GPIO_CFG_8MA} |
| 7424 | }; |
| 7425 | |
| 7426 | static struct msm_sdcc_pad_pull_cfg sdc3_pad_on_pull_cfg[] = { |
| 7427 | {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_UP}, |
| 7428 | {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_UP} |
| 7429 | }; |
| 7430 | |
| 7431 | static struct msm_sdcc_pad_drv_cfg sdc3_pad_off_drv_cfg[] = { |
| 7432 | {TLMM_HDRV_SDC3_CLK, GPIO_CFG_2MA}, |
| 7433 | {TLMM_HDRV_SDC3_CMD, GPIO_CFG_2MA}, |
| 7434 | {TLMM_HDRV_SDC3_DATA, GPIO_CFG_2MA} |
| 7435 | }; |
| 7436 | |
| 7437 | static struct msm_sdcc_pad_pull_cfg sdc3_pad_off_pull_cfg[] = { |
| 7438 | {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_DOWN}, |
| 7439 | {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_DOWN} |
| 7440 | }; |
| 7441 | #endif |
| 7442 | |
| 7443 | #ifdef CONFIG_MMC_MSM_SDC4_SUPPORT |
| 7444 | static struct msm_sdcc_pad_drv_cfg sdc4_pad_on_drv_cfg[] = { |
| 7445 | {TLMM_HDRV_SDC4_CLK, GPIO_CFG_8MA}, |
| 7446 | {TLMM_HDRV_SDC4_CMD, GPIO_CFG_8MA}, |
| 7447 | {TLMM_HDRV_SDC4_DATA, GPIO_CFG_8MA} |
| 7448 | }; |
| 7449 | |
| 7450 | static struct msm_sdcc_pad_pull_cfg sdc4_pad_on_pull_cfg[] = { |
| 7451 | {TLMM_PULL_SDC4_CMD, GPIO_CFG_PULL_UP}, |
| 7452 | {TLMM_PULL_SDC4_DATA, GPIO_CFG_PULL_UP} |
| 7453 | }; |
| 7454 | |
| 7455 | static struct msm_sdcc_pad_drv_cfg sdc4_pad_off_drv_cfg[] = { |
| 7456 | {TLMM_HDRV_SDC4_CLK, GPIO_CFG_2MA}, |
| 7457 | {TLMM_HDRV_SDC4_CMD, GPIO_CFG_2MA}, |
| 7458 | {TLMM_HDRV_SDC4_DATA, GPIO_CFG_2MA} |
| 7459 | }; |
| 7460 | |
| 7461 | static struct msm_sdcc_pad_pull_cfg sdc4_pad_off_pull_cfg[] = { |
| 7462 | {TLMM_PULL_SDC4_CMD, GPIO_CFG_PULL_DOWN}, |
| 7463 | {TLMM_PULL_SDC4_DATA, GPIO_CFG_PULL_DOWN} |
| 7464 | }; |
| 7465 | #endif |
| 7466 | |
| 7467 | struct msm_sdcc_pin_cfg { |
| 7468 | /* |
| 7469 | * = 1 if controller pins are using gpios |
| 7470 | * = 0 if controller has dedicated MSM pins |
| 7471 | */ |
| 7472 | u8 is_gpio; |
| 7473 | u8 cfg_sts; |
| 7474 | u8 gpio_data_size; |
| 7475 | struct msm_sdcc_gpio *gpio_data; |
| 7476 | struct msm_sdcc_pad_drv_cfg *pad_drv_on_data; |
| 7477 | struct msm_sdcc_pad_drv_cfg *pad_drv_off_data; |
| 7478 | struct msm_sdcc_pad_pull_cfg *pad_pull_on_data; |
| 7479 | struct msm_sdcc_pad_pull_cfg *pad_pull_off_data; |
| 7480 | u8 pad_drv_data_size; |
| 7481 | u8 pad_pull_data_size; |
| 7482 | u8 sdio_lpm_gpio_cfg; |
| 7483 | }; |
| 7484 | |
| 7485 | |
| 7486 | static struct msm_sdcc_pin_cfg sdcc_pin_cfg_data[MAX_SDCC_CONTROLLER] = { |
| 7487 | #ifdef CONFIG_MMC_MSM_SDC1_SUPPORT |
| 7488 | [0] = { |
| 7489 | .is_gpio = 1, |
| 7490 | .gpio_data_size = ARRAY_SIZE(sdc1_gpio_cfg), |
| 7491 | .gpio_data = sdc1_gpio_cfg |
| 7492 | }, |
| 7493 | #endif |
| 7494 | #ifdef CONFIG_MMC_MSM_SDC2_SUPPORT |
| 7495 | [1] = { |
| 7496 | .is_gpio = 1, |
| 7497 | .gpio_data_size = ARRAY_SIZE(sdc2_gpio_cfg), |
| 7498 | .gpio_data = sdc2_gpio_cfg |
| 7499 | }, |
| 7500 | #endif |
| 7501 | #ifdef CONFIG_MMC_MSM_SDC3_SUPPORT |
| 7502 | [2] = { |
| 7503 | .is_gpio = 0, |
| 7504 | .pad_drv_on_data = sdc3_pad_on_drv_cfg, |
| 7505 | .pad_drv_off_data = sdc3_pad_off_drv_cfg, |
| 7506 | .pad_pull_on_data = sdc3_pad_on_pull_cfg, |
| 7507 | .pad_pull_off_data = sdc3_pad_off_pull_cfg, |
| 7508 | .pad_drv_data_size = ARRAY_SIZE(sdc3_pad_on_drv_cfg), |
| 7509 | .pad_pull_data_size = ARRAY_SIZE(sdc3_pad_on_pull_cfg) |
| 7510 | }, |
| 7511 | #endif |
| 7512 | #ifdef CONFIG_MMC_MSM_SDC4_SUPPORT |
| 7513 | [3] = { |
| 7514 | .is_gpio = 0, |
| 7515 | .pad_drv_on_data = sdc4_pad_on_drv_cfg, |
| 7516 | .pad_drv_off_data = sdc4_pad_off_drv_cfg, |
| 7517 | .pad_pull_on_data = sdc4_pad_on_pull_cfg, |
| 7518 | .pad_pull_off_data = sdc4_pad_off_pull_cfg, |
| 7519 | .pad_drv_data_size = ARRAY_SIZE(sdc4_pad_on_drv_cfg), |
| 7520 | .pad_pull_data_size = ARRAY_SIZE(sdc4_pad_on_pull_cfg) |
| 7521 | }, |
| 7522 | #endif |
| 7523 | #ifdef CONFIG_MMC_MSM_SDC5_SUPPORT |
| 7524 | [4] = { |
| 7525 | .is_gpio = 1, |
| 7526 | .gpio_data_size = ARRAY_SIZE(sdc5_gpio_cfg), |
| 7527 | .gpio_data = sdc5_gpio_cfg |
| 7528 | } |
| 7529 | #endif |
| 7530 | }; |
| 7531 | |
| 7532 | static int msm_sdcc_setup_gpio(int dev_id, unsigned int enable) |
| 7533 | { |
| 7534 | int rc = 0; |
| 7535 | struct msm_sdcc_pin_cfg *curr; |
| 7536 | int n; |
| 7537 | |
| 7538 | curr = &sdcc_pin_cfg_data[dev_id - 1]; |
| 7539 | if (!curr->gpio_data) |
| 7540 | goto out; |
| 7541 | |
| 7542 | for (n = 0; n < curr->gpio_data_size; n++) { |
| 7543 | if (enable) { |
| 7544 | |
| 7545 | if (curr->gpio_data[n].always_on && |
| 7546 | curr->gpio_data[n].is_enabled) |
| 7547 | continue; |
| 7548 | pr_debug("%s: enable: %s\n", __func__, |
| 7549 | curr->gpio_data[n].name); |
| 7550 | rc = gpio_request(curr->gpio_data[n].no, |
| 7551 | curr->gpio_data[n].name); |
| 7552 | if (rc) { |
| 7553 | pr_err("%s: gpio_request(%d, %s)" |
| 7554 | "failed", __func__, |
| 7555 | curr->gpio_data[n].no, |
| 7556 | curr->gpio_data[n].name); |
| 7557 | goto free_gpios; |
| 7558 | } |
| 7559 | /* set direction as output for all GPIOs */ |
| 7560 | rc = gpio_direction_output( |
| 7561 | curr->gpio_data[n].no, 1); |
| 7562 | if (rc) { |
| 7563 | pr_err("%s: gpio_direction_output" |
| 7564 | "(%d, 1) failed\n", __func__, |
| 7565 | curr->gpio_data[n].no); |
| 7566 | goto free_gpios; |
| 7567 | } |
| 7568 | curr->gpio_data[n].is_enabled = 1; |
| 7569 | } else { |
| 7570 | /* |
| 7571 | * now free this GPIO which will put GPIO |
| 7572 | * in low power mode and will also put GPIO |
| 7573 | * in input mode |
| 7574 | */ |
| 7575 | if (curr->gpio_data[n].always_on) |
| 7576 | continue; |
| 7577 | pr_debug("%s: disable: %s\n", __func__, |
| 7578 | curr->gpio_data[n].name); |
| 7579 | gpio_free(curr->gpio_data[n].no); |
| 7580 | curr->gpio_data[n].is_enabled = 0; |
| 7581 | } |
| 7582 | } |
| 7583 | curr->cfg_sts = enable; |
| 7584 | goto out; |
| 7585 | |
| 7586 | free_gpios: |
| 7587 | for (; n >= 0; n--) |
| 7588 | gpio_free(curr->gpio_data[n].no); |
| 7589 | out: |
| 7590 | return rc; |
| 7591 | } |
| 7592 | |
| 7593 | static int msm_sdcc_setup_pad(int dev_id, unsigned int enable) |
| 7594 | { |
| 7595 | int rc = 0; |
| 7596 | struct msm_sdcc_pin_cfg *curr; |
| 7597 | int n; |
| 7598 | |
| 7599 | curr = &sdcc_pin_cfg_data[dev_id - 1]; |
| 7600 | if (!curr->pad_drv_on_data || !curr->pad_pull_on_data) |
| 7601 | goto out; |
| 7602 | |
| 7603 | if (enable) { |
| 7604 | /* |
| 7605 | * set up the normal driver strength and |
| 7606 | * pull config for pads |
| 7607 | */ |
| 7608 | for (n = 0; n < curr->pad_drv_data_size; n++) { |
| 7609 | if (curr->sdio_lpm_gpio_cfg) { |
| 7610 | if (curr->pad_drv_on_data[n].drv == |
| 7611 | TLMM_HDRV_SDC4_DATA) |
| 7612 | continue; |
| 7613 | } |
| 7614 | msm_tlmm_set_hdrive(curr->pad_drv_on_data[n].drv, |
| 7615 | curr->pad_drv_on_data[n].drv_val); |
| 7616 | } |
| 7617 | for (n = 0; n < curr->pad_pull_data_size; n++) { |
| 7618 | if (curr->sdio_lpm_gpio_cfg) { |
| 7619 | if (curr->pad_pull_on_data[n].pull == |
| 7620 | TLMM_PULL_SDC4_DATA) |
| 7621 | continue; |
| 7622 | } |
| 7623 | msm_tlmm_set_pull(curr->pad_pull_on_data[n].pull, |
| 7624 | curr->pad_pull_on_data[n].pull_val); |
| 7625 | } |
| 7626 | } else { |
| 7627 | /* set the low power config for pads */ |
| 7628 | for (n = 0; n < curr->pad_drv_data_size; n++) { |
| 7629 | if (curr->sdio_lpm_gpio_cfg) { |
| 7630 | if (curr->pad_drv_off_data[n].drv == |
| 7631 | TLMM_HDRV_SDC4_DATA) |
| 7632 | continue; |
| 7633 | } |
| 7634 | msm_tlmm_set_hdrive( |
| 7635 | curr->pad_drv_off_data[n].drv, |
| 7636 | curr->pad_drv_off_data[n].drv_val); |
| 7637 | } |
| 7638 | for (n = 0; n < curr->pad_pull_data_size; n++) { |
| 7639 | if (curr->sdio_lpm_gpio_cfg) { |
| 7640 | if (curr->pad_pull_off_data[n].pull == |
| 7641 | TLMM_PULL_SDC4_DATA) |
| 7642 | continue; |
| 7643 | } |
| 7644 | msm_tlmm_set_pull( |
| 7645 | curr->pad_pull_off_data[n].pull, |
| 7646 | curr->pad_pull_off_data[n].pull_val); |
| 7647 | } |
| 7648 | } |
| 7649 | curr->cfg_sts = enable; |
| 7650 | out: |
| 7651 | return rc; |
| 7652 | } |
| 7653 | |
| 7654 | struct sdcc_reg { |
| 7655 | /* VDD/VCC/VCCQ regulator name on PMIC8058/PMIC8089*/ |
| 7656 | const char *reg_name; |
| 7657 | /* |
| 7658 | * is set voltage supported for this regulator? |
| 7659 | * 0 = not supported, 1 = supported |
| 7660 | */ |
| 7661 | unsigned char set_voltage_sup; |
| 7662 | /* voltage level to be set */ |
| 7663 | unsigned int level; |
| 7664 | /* VDD/VCC/VCCQ voltage regulator handle */ |
| 7665 | struct regulator *reg; |
| 7666 | /* is this regulator enabled? */ |
| 7667 | bool enabled; |
| 7668 | /* is this regulator needs to be always on? */ |
| 7669 | bool always_on; |
| 7670 | /* is operating power mode setting required for this regulator? */ |
| 7671 | bool op_pwr_mode_sup; |
| 7672 | /* Load values for low power and high power mode */ |
| 7673 | unsigned int lpm_uA; |
| 7674 | unsigned int hpm_uA; |
| 7675 | }; |
| 7676 | /* all SDCC controllers requires VDD/VCC voltage */ |
| 7677 | static struct sdcc_reg sdcc_vdd_reg_data[MAX_SDCC_CONTROLLER]; |
| 7678 | /* only SDCC1 requires VCCQ voltage */ |
| 7679 | static struct sdcc_reg sdcc_vccq_reg_data[1]; |
| 7680 | /* all SDCC controllers may require voting for VDD PAD voltage */ |
| 7681 | static struct sdcc_reg sdcc_vddp_reg_data[MAX_SDCC_CONTROLLER]; |
| 7682 | |
| 7683 | struct sdcc_reg_data { |
| 7684 | struct sdcc_reg *vdd_data; /* keeps VDD/VCC regulator info */ |
| 7685 | struct sdcc_reg *vccq_data; /* keeps VCCQ regulator info */ |
| 7686 | struct sdcc_reg *vddp_data; /* keeps VDD Pad regulator info */ |
| 7687 | unsigned char sts; /* regulator enable/disable status */ |
| 7688 | }; |
| 7689 | /* msm8x60 have 5 SDCC controllers */ |
| 7690 | static struct sdcc_reg_data sdcc_vreg_data[MAX_SDCC_CONTROLLER]; |
| 7691 | |
| 7692 | static int msm_sdcc_vreg_init_reg(struct sdcc_reg *vreg) |
| 7693 | { |
| 7694 | int rc = 0; |
| 7695 | |
| 7696 | /* Get the regulator handle */ |
| 7697 | vreg->reg = regulator_get(NULL, vreg->reg_name); |
| 7698 | if (IS_ERR(vreg->reg)) { |
| 7699 | rc = PTR_ERR(vreg->reg); |
| 7700 | pr_err("%s: regulator_get(%s) failed. rc=%d\n", |
| 7701 | __func__, vreg->reg_name, rc); |
| 7702 | goto out; |
| 7703 | } |
| 7704 | |
| 7705 | /* Set the voltage level if required */ |
| 7706 | if (vreg->set_voltage_sup) { |
| 7707 | rc = regulator_set_voltage(vreg->reg, vreg->level, |
| 7708 | vreg->level); |
| 7709 | if (rc) { |
| 7710 | pr_err("%s: regulator_set_voltage(%s) failed rc=%d\n", |
| 7711 | __func__, vreg->reg_name, rc); |
| 7712 | goto vreg_put; |
| 7713 | } |
| 7714 | } |
| 7715 | goto out; |
| 7716 | |
| 7717 | vreg_put: |
| 7718 | regulator_put(vreg->reg); |
| 7719 | out: |
| 7720 | return rc; |
| 7721 | } |
| 7722 | |
| 7723 | static inline void msm_sdcc_vreg_deinit_reg(struct sdcc_reg *vreg) |
| 7724 | { |
| 7725 | regulator_put(vreg->reg); |
| 7726 | } |
| 7727 | |
| 7728 | /* this init function should be called only once for each SDCC */ |
| 7729 | static int msm_sdcc_vreg_init(int dev_id, unsigned char init) |
| 7730 | { |
| 7731 | int rc = 0; |
| 7732 | struct sdcc_reg *curr_vdd_reg, *curr_vccq_reg, *curr_vddp_reg; |
| 7733 | struct sdcc_reg_data *curr; |
| 7734 | |
| 7735 | curr = &sdcc_vreg_data[dev_id - 1]; |
| 7736 | curr_vdd_reg = curr->vdd_data; |
| 7737 | curr_vccq_reg = curr->vccq_data; |
| 7738 | curr_vddp_reg = curr->vddp_data; |
| 7739 | |
| 7740 | if (init) { |
| 7741 | /* |
| 7742 | * get the regulator handle from voltage regulator framework |
| 7743 | * and then try to set the voltage level for the regulator |
| 7744 | */ |
| 7745 | if (curr_vdd_reg) { |
| 7746 | rc = msm_sdcc_vreg_init_reg(curr_vdd_reg); |
| 7747 | if (rc) |
| 7748 | goto out; |
| 7749 | } |
| 7750 | if (curr_vccq_reg) { |
| 7751 | rc = msm_sdcc_vreg_init_reg(curr_vccq_reg); |
| 7752 | if (rc) |
| 7753 | goto vdd_reg_deinit; |
| 7754 | } |
| 7755 | if (curr_vddp_reg) { |
| 7756 | rc = msm_sdcc_vreg_init_reg(curr_vddp_reg); |
| 7757 | if (rc) |
| 7758 | goto vccq_reg_deinit; |
| 7759 | } |
| 7760 | goto out; |
| 7761 | } else |
| 7762 | /* deregister with all regulators from regulator framework */ |
| 7763 | goto vddp_reg_deinit; |
| 7764 | |
| 7765 | vddp_reg_deinit: |
| 7766 | if (curr_vddp_reg) |
| 7767 | msm_sdcc_vreg_deinit_reg(curr_vddp_reg); |
| 7768 | vccq_reg_deinit: |
| 7769 | if (curr_vccq_reg) |
| 7770 | msm_sdcc_vreg_deinit_reg(curr_vccq_reg); |
| 7771 | vdd_reg_deinit: |
| 7772 | if (curr_vdd_reg) |
| 7773 | msm_sdcc_vreg_deinit_reg(curr_vdd_reg); |
| 7774 | out: |
| 7775 | return rc; |
| 7776 | } |
| 7777 | |
| 7778 | static int msm_sdcc_vreg_enable(struct sdcc_reg *vreg) |
| 7779 | { |
| 7780 | int rc; |
| 7781 | |
| 7782 | if (!vreg->enabled) { |
| 7783 | rc = regulator_enable(vreg->reg); |
| 7784 | if (rc) { |
| 7785 | pr_err("%s: regulator_enable(%s) failed. rc=%d\n", |
| 7786 | __func__, vreg->reg_name, rc); |
| 7787 | goto out; |
| 7788 | } |
| 7789 | vreg->enabled = 1; |
| 7790 | } |
| 7791 | |
| 7792 | /* Put always_on regulator in HPM (high power mode) */ |
| 7793 | if (vreg->always_on && vreg->op_pwr_mode_sup) { |
| 7794 | rc = regulator_set_optimum_mode(vreg->reg, vreg->hpm_uA); |
| 7795 | if (rc < 0) { |
| 7796 | pr_err("%s: reg=%s: HPM setting failed" |
| 7797 | " hpm_uA=%d, rc=%d\n", |
| 7798 | __func__, vreg->reg_name, |
| 7799 | vreg->hpm_uA, rc); |
| 7800 | goto vreg_disable; |
| 7801 | } |
| 7802 | rc = 0; |
| 7803 | } |
| 7804 | goto out; |
| 7805 | |
| 7806 | vreg_disable: |
| 7807 | regulator_disable(vreg->reg); |
| 7808 | vreg->enabled = 0; |
| 7809 | out: |
| 7810 | return rc; |
| 7811 | } |
| 7812 | |
| 7813 | static int msm_sdcc_vreg_disable(struct sdcc_reg *vreg) |
| 7814 | { |
| 7815 | int rc; |
| 7816 | |
| 7817 | /* Never disable always_on regulator */ |
| 7818 | if (!vreg->always_on) { |
| 7819 | rc = regulator_disable(vreg->reg); |
| 7820 | if (rc) { |
| 7821 | pr_err("%s: regulator_disable(%s) failed. rc=%d\n", |
| 7822 | __func__, vreg->reg_name, rc); |
| 7823 | goto out; |
| 7824 | } |
| 7825 | vreg->enabled = 0; |
| 7826 | } |
| 7827 | |
| 7828 | /* Put always_on regulator in LPM (low power mode) */ |
| 7829 | if (vreg->always_on && vreg->op_pwr_mode_sup) { |
| 7830 | rc = regulator_set_optimum_mode(vreg->reg, vreg->lpm_uA); |
| 7831 | if (rc < 0) { |
| 7832 | pr_err("%s: reg=%s: LPM setting failed" |
| 7833 | " lpm_uA=%d, rc=%d\n", |
| 7834 | __func__, |
| 7835 | vreg->reg_name, |
| 7836 | vreg->lpm_uA, rc); |
| 7837 | goto out; |
| 7838 | } |
| 7839 | rc = 0; |
| 7840 | } |
| 7841 | |
| 7842 | out: |
| 7843 | return rc; |
| 7844 | } |
| 7845 | |
| 7846 | static int msm_sdcc_setup_vreg(int dev_id, unsigned char enable) |
| 7847 | { |
| 7848 | int rc = 0; |
| 7849 | struct sdcc_reg *curr_vdd_reg, *curr_vccq_reg, *curr_vddp_reg; |
| 7850 | struct sdcc_reg_data *curr; |
| 7851 | |
| 7852 | curr = &sdcc_vreg_data[dev_id - 1]; |
| 7853 | curr_vdd_reg = curr->vdd_data; |
| 7854 | curr_vccq_reg = curr->vccq_data; |
| 7855 | curr_vddp_reg = curr->vddp_data; |
| 7856 | |
| 7857 | /* check if regulators are initialized or not? */ |
| 7858 | if ((curr_vdd_reg && !curr_vdd_reg->reg) || |
| 7859 | (curr_vccq_reg && !curr_vccq_reg->reg) || |
| 7860 | (curr_vddp_reg && !curr_vddp_reg->reg)) { |
| 7861 | /* initialize voltage regulators required for this SDCC */ |
| 7862 | rc = msm_sdcc_vreg_init(dev_id, 1); |
| 7863 | if (rc) { |
| 7864 | pr_err("%s: regulator init failed = %d\n", |
| 7865 | __func__, rc); |
| 7866 | goto out; |
| 7867 | } |
| 7868 | } |
| 7869 | |
| 7870 | if (curr->sts == enable) |
| 7871 | goto out; |
| 7872 | |
| 7873 | if (curr_vdd_reg) { |
| 7874 | if (enable) |
| 7875 | rc = msm_sdcc_vreg_enable(curr_vdd_reg); |
| 7876 | else |
| 7877 | rc = msm_sdcc_vreg_disable(curr_vdd_reg); |
| 7878 | if (rc) |
| 7879 | goto out; |
| 7880 | } |
| 7881 | |
| 7882 | if (curr_vccq_reg) { |
| 7883 | if (enable) |
| 7884 | rc = msm_sdcc_vreg_enable(curr_vccq_reg); |
| 7885 | else |
| 7886 | rc = msm_sdcc_vreg_disable(curr_vccq_reg); |
| 7887 | if (rc) |
| 7888 | goto out; |
| 7889 | } |
| 7890 | |
| 7891 | if (curr_vddp_reg) { |
| 7892 | if (enable) |
| 7893 | rc = msm_sdcc_vreg_enable(curr_vddp_reg); |
| 7894 | else |
| 7895 | rc = msm_sdcc_vreg_disable(curr_vddp_reg); |
| 7896 | if (rc) |
| 7897 | goto out; |
| 7898 | } |
| 7899 | curr->sts = enable; |
| 7900 | |
| 7901 | out: |
| 7902 | return rc; |
| 7903 | } |
| 7904 | |
| 7905 | static u32 msm_sdcc_setup_power(struct device *dv, unsigned int vdd) |
| 7906 | { |
| 7907 | u32 rc_pin_cfg = 0; |
| 7908 | u32 rc_vreg_cfg = 0; |
| 7909 | u32 rc = 0; |
| 7910 | struct platform_device *pdev; |
| 7911 | struct msm_sdcc_pin_cfg *curr_pin_cfg; |
| 7912 | |
| 7913 | pdev = container_of(dv, struct platform_device, dev); |
| 7914 | |
| 7915 | /* setup gpio/pad */ |
| 7916 | curr_pin_cfg = &sdcc_pin_cfg_data[pdev->id - 1]; |
| 7917 | if (curr_pin_cfg->cfg_sts == !!vdd) |
| 7918 | goto setup_vreg; |
| 7919 | |
| 7920 | if (curr_pin_cfg->is_gpio) |
| 7921 | rc_pin_cfg = msm_sdcc_setup_gpio(pdev->id, !!vdd); |
| 7922 | else |
| 7923 | rc_pin_cfg = msm_sdcc_setup_pad(pdev->id, !!vdd); |
| 7924 | |
| 7925 | setup_vreg: |
| 7926 | /* setup voltage regulators */ |
| 7927 | rc_vreg_cfg = msm_sdcc_setup_vreg(pdev->id, !!vdd); |
| 7928 | |
| 7929 | if (rc_pin_cfg || rc_vreg_cfg) |
| 7930 | rc = rc_pin_cfg ? rc_pin_cfg : rc_vreg_cfg; |
| 7931 | |
| 7932 | return rc; |
| 7933 | } |
| 7934 | |
| 7935 | static void msm_sdcc_sdio_lpm_gpio(struct device *dv, unsigned int active) |
| 7936 | { |
| 7937 | struct msm_sdcc_pin_cfg *curr_pin_cfg; |
| 7938 | struct platform_device *pdev; |
| 7939 | |
| 7940 | pdev = container_of(dv, struct platform_device, dev); |
| 7941 | /* setup gpio/pad */ |
| 7942 | curr_pin_cfg = &sdcc_pin_cfg_data[pdev->id - 1]; |
| 7943 | |
| 7944 | if (curr_pin_cfg->cfg_sts == active) |
| 7945 | return; |
| 7946 | |
| 7947 | curr_pin_cfg->sdio_lpm_gpio_cfg = 1; |
| 7948 | if (curr_pin_cfg->is_gpio) |
| 7949 | msm_sdcc_setup_gpio(pdev->id, active); |
| 7950 | else |
| 7951 | msm_sdcc_setup_pad(pdev->id, active); |
| 7952 | curr_pin_cfg->sdio_lpm_gpio_cfg = 0; |
| 7953 | } |
| 7954 | |
| 7955 | static int msm_sdc3_get_wpswitch(struct device *dev) |
| 7956 | { |
| 7957 | struct platform_device *pdev; |
| 7958 | int status; |
| 7959 | pdev = container_of(dev, struct platform_device, dev); |
| 7960 | |
| 7961 | status = gpio_request(GPIO_SDC_WP, "SD_WP_Switch"); |
| 7962 | if (status) { |
| 7963 | pr_err("%s:Failed to request GPIO %d\n", |
| 7964 | __func__, GPIO_SDC_WP); |
| 7965 | } else { |
| 7966 | status = gpio_direction_input(GPIO_SDC_WP); |
| 7967 | if (!status) { |
| 7968 | status = gpio_get_value_cansleep(GPIO_SDC_WP); |
| 7969 | pr_info("%s: WP Status for Slot %d = %d\n", |
| 7970 | __func__, pdev->id, status); |
| 7971 | } |
| 7972 | gpio_free(GPIO_SDC_WP); |
| 7973 | } |
| 7974 | return status; |
| 7975 | } |
| 7976 | |
| 7977 | #ifdef CONFIG_MMC_MSM_SDC5_SUPPORT |
| 7978 | int sdc5_register_status_notify(void (*callback)(int, void *), |
| 7979 | void *dev_id) |
| 7980 | { |
| 7981 | sdc5_status_notify_cb = callback; |
| 7982 | sdc5_status_notify_cb_devid = dev_id; |
| 7983 | return 0; |
| 7984 | } |
| 7985 | #endif |
| 7986 | |
| 7987 | #ifdef CONFIG_MMC_MSM_SDC2_SUPPORT |
| 7988 | int sdc2_register_status_notify(void (*callback)(int, void *), |
| 7989 | void *dev_id) |
| 7990 | { |
| 7991 | sdc2_status_notify_cb = callback; |
| 7992 | sdc2_status_notify_cb_devid = dev_id; |
| 7993 | return 0; |
| 7994 | } |
| 7995 | #endif |
| 7996 | |
| 7997 | /* Interrupt handler for SDC2 and SDC5 detection |
| 7998 | * This function uses dual-edge interrputs settings in order |
| 7999 | * to get SDIO detection when the GPIO is rising and SDIO removal |
| 8000 | * when the GPIO is falling */ |
| 8001 | static irqreturn_t msm8x60_multi_sdio_slot_status_irq(int irq, void *dev_id) |
| 8002 | { |
| 8003 | int status; |
| 8004 | |
| 8005 | if (!machine_is_msm8x60_fusion() && |
| 8006 | !machine_is_msm8x60_fusn_ffa()) |
| 8007 | return IRQ_NONE; |
| 8008 | |
| 8009 | status = gpio_get_value(MDM2AP_SYNC); |
| 8010 | pr_info("%s: MDM2AP_SYNC Status = %d\n", |
| 8011 | __func__, status); |
| 8012 | |
| 8013 | #ifdef CONFIG_MMC_MSM_SDC2_SUPPORT |
| 8014 | if (sdc2_status_notify_cb) { |
| 8015 | pr_info("%s: calling sdc2_status_notify_cb\n", __func__); |
| 8016 | sdc2_status_notify_cb(status, |
| 8017 | sdc2_status_notify_cb_devid); |
| 8018 | } |
| 8019 | #endif |
| 8020 | |
| 8021 | #ifdef CONFIG_MMC_MSM_SDC5_SUPPORT |
| 8022 | if (sdc5_status_notify_cb) { |
| 8023 | pr_info("%s: calling sdc5_status_notify_cb\n", __func__); |
| 8024 | sdc5_status_notify_cb(status, |
| 8025 | sdc5_status_notify_cb_devid); |
| 8026 | } |
| 8027 | #endif |
| 8028 | return IRQ_HANDLED; |
| 8029 | } |
| 8030 | |
| 8031 | static int msm8x60_multi_sdio_init(void) |
| 8032 | { |
| 8033 | int ret, irq_num; |
| 8034 | |
| 8035 | if (!machine_is_msm8x60_fusion() && |
| 8036 | !machine_is_msm8x60_fusn_ffa()) |
| 8037 | return 0; |
| 8038 | |
| 8039 | ret = msm_gpiomux_get(MDM2AP_SYNC); |
| 8040 | if (ret) { |
| 8041 | pr_err("%s:Failed to request GPIO %d, ret=%d\n", |
| 8042 | __func__, MDM2AP_SYNC, ret); |
| 8043 | return ret; |
| 8044 | } |
| 8045 | |
| 8046 | irq_num = gpio_to_irq(MDM2AP_SYNC); |
| 8047 | |
| 8048 | ret = request_irq(irq_num, |
| 8049 | msm8x60_multi_sdio_slot_status_irq, |
| 8050 | IRQ_TYPE_EDGE_BOTH, |
| 8051 | "sdio_multidetection", NULL); |
| 8052 | |
| 8053 | if (ret) { |
| 8054 | pr_err("%s:Failed to request irq, ret=%d\n", |
| 8055 | __func__, ret); |
| 8056 | return ret; |
| 8057 | } |
| 8058 | |
| 8059 | return ret; |
| 8060 | } |
| 8061 | |
| 8062 | #ifdef CONFIG_MMC_MSM_SDC3_SUPPORT |
| 8063 | #ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION |
| 8064 | static unsigned int msm8x60_sdcc_slot_status(struct device *dev) |
| 8065 | { |
| 8066 | int status; |
| 8067 | |
| 8068 | status = gpio_request(PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1) |
| 8069 | , "SD_HW_Detect"); |
| 8070 | if (status) { |
| 8071 | pr_err("%s:Failed to request GPIO %d\n", __func__, |
| 8072 | PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1)); |
| 8073 | } else { |
| 8074 | status = gpio_direction_input( |
| 8075 | PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1)); |
| 8076 | if (!status) |
| 8077 | status = !(gpio_get_value_cansleep( |
| 8078 | PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1))); |
| 8079 | gpio_free(PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1)); |
| 8080 | } |
| 8081 | return (unsigned int) status; |
| 8082 | } |
| 8083 | #endif |
| 8084 | #endif |
| 8085 | |
| 8086 | #ifdef CONFIG_MMC_MSM_SDC4_SUPPORT |
| 8087 | static int msm_sdcc_cfg_mpm_sdiowakeup(struct device *dev, unsigned mode) |
| 8088 | { |
| 8089 | struct platform_device *pdev; |
| 8090 | enum msm_mpm_pin pin; |
| 8091 | int ret = 0; |
| 8092 | |
| 8093 | pdev = container_of(dev, struct platform_device, dev); |
| 8094 | |
| 8095 | /* Only SDCC4 slot connected to WLAN chip has wakeup capability */ |
| 8096 | if (pdev->id == 4) |
| 8097 | pin = MSM_MPM_PIN_SDC4_DAT1; |
| 8098 | else |
| 8099 | return -EINVAL; |
| 8100 | |
| 8101 | switch (mode) { |
| 8102 | case SDC_DAT1_DISABLE: |
| 8103 | ret = msm_mpm_enable_pin(pin, 0); |
| 8104 | break; |
| 8105 | case SDC_DAT1_ENABLE: |
| 8106 | ret = msm_mpm_set_pin_type(pin, IRQ_TYPE_LEVEL_LOW); |
| 8107 | ret = msm_mpm_enable_pin(pin, 1); |
| 8108 | break; |
| 8109 | case SDC_DAT1_ENWAKE: |
| 8110 | ret = msm_mpm_set_pin_wake(pin, 1); |
| 8111 | break; |
| 8112 | case SDC_DAT1_DISWAKE: |
| 8113 | ret = msm_mpm_set_pin_wake(pin, 0); |
| 8114 | break; |
| 8115 | default: |
| 8116 | ret = -EINVAL; |
| 8117 | break; |
| 8118 | } |
| 8119 | return ret; |
| 8120 | } |
| 8121 | #endif |
| 8122 | #endif |
| 8123 | |
| 8124 | #ifdef CONFIG_MMC_MSM_SDC1_SUPPORT |
| 8125 | static struct mmc_platform_data msm8x60_sdc1_data = { |
| 8126 | .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29, |
| 8127 | .translate_vdd = msm_sdcc_setup_power, |
| 8128 | #ifdef CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT |
| 8129 | .mmc_bus_width = MMC_CAP_8_BIT_DATA, |
| 8130 | #else |
| 8131 | .mmc_bus_width = MMC_CAP_4_BIT_DATA, |
| 8132 | #endif |
| 8133 | .msmsdcc_fmin = 400000, |
| 8134 | .msmsdcc_fmid = 24000000, |
| 8135 | .msmsdcc_fmax = 48000000, |
| 8136 | .nonremovable = 1, |
| 8137 | .pclk_src_dfab = 1, |
| 8138 | #ifdef CONFIG_MMC_MSM_SDC1_DUMMY52_REQUIRED |
| 8139 | .dummy52_required = 1, |
| 8140 | #endif |
| 8141 | }; |
| 8142 | #endif |
| 8143 | |
| 8144 | #ifdef CONFIG_MMC_MSM_SDC2_SUPPORT |
| 8145 | static struct mmc_platform_data msm8x60_sdc2_data = { |
| 8146 | .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_165_195, |
| 8147 | .translate_vdd = msm_sdcc_setup_power, |
| 8148 | .sdio_lpm_gpio_setup = msm_sdcc_sdio_lpm_gpio, |
| 8149 | .mmc_bus_width = MMC_CAP_8_BIT_DATA, |
| 8150 | .msmsdcc_fmin = 400000, |
| 8151 | .msmsdcc_fmid = 24000000, |
| 8152 | .msmsdcc_fmax = 48000000, |
| 8153 | .nonremovable = 0, |
| 8154 | .pclk_src_dfab = 1, |
| 8155 | .register_status_notify = sdc2_register_status_notify, |
| 8156 | #ifdef CONFIG_MMC_MSM_SDC2_DUMMY52_REQUIRED |
| 8157 | .dummy52_required = 1, |
| 8158 | #endif |
| 8159 | #ifdef CONFIG_MSM_SDIO_AL |
| 8160 | .is_sdio_al_client = 1, |
| 8161 | #endif |
| 8162 | }; |
| 8163 | #endif |
| 8164 | |
| 8165 | #ifdef CONFIG_MMC_MSM_SDC3_SUPPORT |
| 8166 | static struct mmc_platform_data msm8x60_sdc3_data = { |
| 8167 | .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29, |
| 8168 | .translate_vdd = msm_sdcc_setup_power, |
| 8169 | .mmc_bus_width = MMC_CAP_4_BIT_DATA, |
| 8170 | .wpswitch = msm_sdc3_get_wpswitch, |
| 8171 | #ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION |
| 8172 | .status = msm8x60_sdcc_slot_status, |
| 8173 | .status_irq = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, |
| 8174 | PMIC_GPIO_SDC3_DET - 1), |
| 8175 | .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, |
| 8176 | #endif |
| 8177 | .msmsdcc_fmin = 400000, |
| 8178 | .msmsdcc_fmid = 24000000, |
| 8179 | .msmsdcc_fmax = 48000000, |
| 8180 | .nonremovable = 0, |
| 8181 | .pclk_src_dfab = 1, |
| 8182 | #ifdef CONFIG_MMC_MSM_SDC3_DUMMY52_REQUIRED |
| 8183 | .dummy52_required = 1, |
| 8184 | #endif |
| 8185 | }; |
| 8186 | #endif |
| 8187 | |
| 8188 | #ifdef CONFIG_MMC_MSM_SDC4_SUPPORT |
| 8189 | static struct mmc_platform_data msm8x60_sdc4_data = { |
| 8190 | .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29, |
| 8191 | .translate_vdd = msm_sdcc_setup_power, |
| 8192 | .mmc_bus_width = MMC_CAP_4_BIT_DATA, |
| 8193 | .msmsdcc_fmin = 400000, |
| 8194 | .msmsdcc_fmid = 24000000, |
| 8195 | .msmsdcc_fmax = 48000000, |
| 8196 | .nonremovable = 0, |
| 8197 | .pclk_src_dfab = 1, |
| 8198 | .cfg_mpm_sdiowakeup = msm_sdcc_cfg_mpm_sdiowakeup, |
| 8199 | #ifdef CONFIG_MMC_MSM_SDC4_DUMMY52_REQUIRED |
| 8200 | .dummy52_required = 1, |
| 8201 | #endif |
| 8202 | }; |
| 8203 | #endif |
| 8204 | |
| 8205 | #ifdef CONFIG_MMC_MSM_SDC5_SUPPORT |
| 8206 | static struct mmc_platform_data msm8x60_sdc5_data = { |
| 8207 | .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_165_195, |
| 8208 | .translate_vdd = msm_sdcc_setup_power, |
| 8209 | .sdio_lpm_gpio_setup = msm_sdcc_sdio_lpm_gpio, |
| 8210 | .mmc_bus_width = MMC_CAP_4_BIT_DATA, |
| 8211 | .msmsdcc_fmin = 400000, |
| 8212 | .msmsdcc_fmid = 24000000, |
| 8213 | .msmsdcc_fmax = 48000000, |
| 8214 | .nonremovable = 0, |
| 8215 | .pclk_src_dfab = 1, |
| 8216 | .register_status_notify = sdc5_register_status_notify, |
| 8217 | #ifdef CONFIG_MMC_MSM_SDC5_DUMMY52_REQUIRED |
| 8218 | .dummy52_required = 1, |
| 8219 | #endif |
| 8220 | #ifdef CONFIG_MSM_SDIO_AL |
| 8221 | .is_sdio_al_client = 1, |
| 8222 | #endif |
| 8223 | }; |
| 8224 | #endif |
| 8225 | |
| 8226 | static void __init msm8x60_init_mmc(void) |
| 8227 | { |
| 8228 | #ifdef CONFIG_MMC_MSM_SDC1_SUPPORT |
| 8229 | /* SDCC1 : eMMC card connected */ |
| 8230 | sdcc_vreg_data[0].vdd_data = &sdcc_vdd_reg_data[0]; |
| 8231 | sdcc_vreg_data[0].vdd_data->reg_name = "8901_l5"; |
| 8232 | sdcc_vreg_data[0].vdd_data->set_voltage_sup = 1; |
| 8233 | sdcc_vreg_data[0].vdd_data->level = 2850000; |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 8234 | |
| 8235 | sdcc_vreg_data[0].vccq_data = &sdcc_vccq_reg_data[0]; |
| 8236 | sdcc_vreg_data[0].vccq_data->reg_name = "8901_lvs0"; |
| 8237 | sdcc_vreg_data[0].vccq_data->set_voltage_sup = 0; |
| 8238 | sdcc_vreg_data[0].vccq_data->always_on = 1; |
| 8239 | |
| 8240 | msm_add_sdcc(1, &msm8x60_sdc1_data); |
| 8241 | #endif |
| 8242 | #ifdef CONFIG_MMC_MSM_SDC2_SUPPORT |
| 8243 | /* |
| 8244 | * MDM SDIO client is connected to SDC2 on charm SURF/FFA |
| 8245 | * and no card is connected on 8660 SURF/FFA/FLUID. |
| 8246 | */ |
| 8247 | sdcc_vreg_data[1].vdd_data = &sdcc_vdd_reg_data[1]; |
| 8248 | sdcc_vreg_data[1].vdd_data->reg_name = "8058_s3"; |
| 8249 | sdcc_vreg_data[1].vdd_data->set_voltage_sup = 1; |
| 8250 | sdcc_vreg_data[1].vdd_data->level = 1800000; |
| 8251 | |
| 8252 | sdcc_vreg_data[1].vccq_data = NULL; |
| 8253 | |
| 8254 | if (machine_is_msm8x60_fusion()) |
| 8255 | msm8x60_sdc2_data.msmsdcc_fmax = 24000000; |
| 8256 | if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) { |
| 8257 | #ifdef CONFIG_MMC_MSM_SDIO_SUPPORT |
| 8258 | msm8x60_sdc2_data.sdiowakeup_irq = gpio_to_irq(144); |
| 8259 | msm_sdcc_setup_gpio(2, 1); |
| 8260 | #endif |
| 8261 | msm_add_sdcc(2, &msm8x60_sdc2_data); |
| 8262 | } |
| 8263 | #endif |
| 8264 | #ifdef CONFIG_MMC_MSM_SDC3_SUPPORT |
| 8265 | /* SDCC3 : External card slot connected */ |
| 8266 | sdcc_vreg_data[2].vdd_data = &sdcc_vdd_reg_data[2]; |
| 8267 | sdcc_vreg_data[2].vdd_data->reg_name = "8058_l14"; |
| 8268 | sdcc_vreg_data[2].vdd_data->set_voltage_sup = 1; |
| 8269 | sdcc_vreg_data[2].vdd_data->level = 2850000; |
| 8270 | sdcc_vreg_data[2].vdd_data->always_on = 1; |
| 8271 | sdcc_vreg_data[2].vdd_data->op_pwr_mode_sup = 1; |
| 8272 | sdcc_vreg_data[2].vdd_data->lpm_uA = 9000; |
| 8273 | sdcc_vreg_data[2].vdd_data->hpm_uA = 200000; |
| 8274 | |
| 8275 | sdcc_vreg_data[2].vccq_data = NULL; |
| 8276 | |
| 8277 | sdcc_vreg_data[2].vddp_data = &sdcc_vddp_reg_data[2]; |
| 8278 | sdcc_vreg_data[2].vddp_data->reg_name = "8058_l5"; |
| 8279 | sdcc_vreg_data[2].vddp_data->set_voltage_sup = 1; |
| 8280 | sdcc_vreg_data[2].vddp_data->level = 2850000; |
| 8281 | sdcc_vreg_data[2].vddp_data->always_on = 1; |
| 8282 | sdcc_vreg_data[2].vddp_data->op_pwr_mode_sup = 1; |
| 8283 | /* Sleep current required is ~300 uA. But min. RPM |
| 8284 | * vote can be in terms of mA (min. 1 mA). |
| 8285 | * So let's vote for 2 mA during sleep. |
| 8286 | */ |
| 8287 | sdcc_vreg_data[2].vddp_data->lpm_uA = 2000; |
| 8288 | /* Max. Active current required is 16 mA */ |
| 8289 | sdcc_vreg_data[2].vddp_data->hpm_uA = 16000; |
| 8290 | |
| 8291 | if (machine_is_msm8x60_fluid()) |
| 8292 | msm8x60_sdc3_data.wpswitch = NULL; |
| 8293 | msm_add_sdcc(3, &msm8x60_sdc3_data); |
| 8294 | #endif |
| 8295 | #ifdef CONFIG_MMC_MSM_SDC4_SUPPORT |
| 8296 | /* SDCC4 : WLAN WCN1314 chip is connected */ |
| 8297 | sdcc_vreg_data[3].vdd_data = &sdcc_vdd_reg_data[3]; |
| 8298 | sdcc_vreg_data[3].vdd_data->reg_name = "8058_s3"; |
| 8299 | sdcc_vreg_data[3].vdd_data->set_voltage_sup = 1; |
| 8300 | sdcc_vreg_data[3].vdd_data->level = 1800000; |
| 8301 | |
| 8302 | sdcc_vreg_data[3].vccq_data = NULL; |
| 8303 | |
| 8304 | msm_add_sdcc(4, &msm8x60_sdc4_data); |
| 8305 | #endif |
| 8306 | #ifdef CONFIG_MMC_MSM_SDC5_SUPPORT |
| 8307 | /* |
| 8308 | * MDM SDIO client is connected to SDC5 on charm SURF/FFA |
| 8309 | * and no card is connected on 8660 SURF/FFA/FLUID. |
| 8310 | */ |
| 8311 | sdcc_vreg_data[4].vdd_data = &sdcc_vdd_reg_data[4]; |
| 8312 | sdcc_vreg_data[4].vdd_data->reg_name = "8058_s3"; |
| 8313 | sdcc_vreg_data[4].vdd_data->set_voltage_sup = 1; |
| 8314 | sdcc_vreg_data[4].vdd_data->level = 1800000; |
| 8315 | |
| 8316 | sdcc_vreg_data[4].vccq_data = NULL; |
| 8317 | |
| 8318 | if (machine_is_msm8x60_fusion()) |
| 8319 | msm8x60_sdc5_data.msmsdcc_fmax = 24000000; |
| 8320 | if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) { |
| 8321 | #ifdef CONFIG_MMC_MSM_SDIO_SUPPORT |
| 8322 | msm8x60_sdc5_data.sdiowakeup_irq = gpio_to_irq(99); |
| 8323 | msm_sdcc_setup_gpio(5, 1); |
| 8324 | #endif |
| 8325 | msm_add_sdcc(5, &msm8x60_sdc5_data); |
| 8326 | } |
| 8327 | #endif |
| 8328 | } |
| 8329 | |
| 8330 | #if !defined(CONFIG_GPIO_SX150X) && !defined(CONFIG_GPIO_SX150X_MODULE) |
| 8331 | static inline void display_common_power(int on) {} |
| 8332 | #else |
| 8333 | |
| 8334 | #define _GET_REGULATOR(var, name) do { \ |
| 8335 | if (var == NULL) { \ |
| 8336 | var = regulator_get(NULL, name); \ |
| 8337 | if (IS_ERR(var)) { \ |
| 8338 | pr_err("'%s' regulator not found, rc=%ld\n", \ |
| 8339 | name, PTR_ERR(var)); \ |
| 8340 | var = NULL; \ |
| 8341 | } \ |
| 8342 | } \ |
| 8343 | } while (0) |
| 8344 | |
| 8345 | static int dsub_regulator(int on) |
| 8346 | { |
| 8347 | static struct regulator *dsub_reg; |
| 8348 | static struct regulator *mpp0_reg; |
| 8349 | static int dsub_reg_enabled; |
| 8350 | int rc = 0; |
| 8351 | |
| 8352 | _GET_REGULATOR(dsub_reg, "8901_l3"); |
| 8353 | if (IS_ERR(dsub_reg)) { |
| 8354 | printk(KERN_ERR "%s: failed to get reg 8901_l3 err=%ld", |
| 8355 | __func__, PTR_ERR(dsub_reg)); |
| 8356 | return PTR_ERR(dsub_reg); |
| 8357 | } |
| 8358 | |
| 8359 | _GET_REGULATOR(mpp0_reg, "8901_mpp0"); |
| 8360 | if (IS_ERR(mpp0_reg)) { |
| 8361 | printk(KERN_ERR "%s: failed to get reg 8901_mpp0 err=%ld", |
| 8362 | __func__, PTR_ERR(mpp0_reg)); |
| 8363 | return PTR_ERR(mpp0_reg); |
| 8364 | } |
| 8365 | |
| 8366 | if (on && !dsub_reg_enabled) { |
| 8367 | rc = regulator_set_voltage(dsub_reg, 3300000, 3300000); |
| 8368 | if (rc) { |
| 8369 | printk(KERN_ERR "%s: failed to set reg 8901_l3 voltage" |
| 8370 | " err=%d", __func__, rc); |
| 8371 | goto dsub_regulator_err; |
| 8372 | } |
| 8373 | rc = regulator_enable(dsub_reg); |
| 8374 | if (rc) { |
| 8375 | printk(KERN_ERR "%s: failed to enable reg 8901_l3" |
| 8376 | " err=%d", __func__, rc); |
| 8377 | goto dsub_regulator_err; |
| 8378 | } |
| 8379 | rc = regulator_enable(mpp0_reg); |
| 8380 | if (rc) { |
| 8381 | printk(KERN_ERR "%s: failed to enable reg 8901_mpp0" |
| 8382 | " err=%d", __func__, rc); |
| 8383 | goto dsub_regulator_err; |
| 8384 | } |
| 8385 | dsub_reg_enabled = 1; |
| 8386 | } else if (!on && dsub_reg_enabled) { |
| 8387 | rc = regulator_disable(dsub_reg); |
| 8388 | if (rc) |
| 8389 | printk(KERN_WARNING "%s: failed to disable reg 8901_l3" |
| 8390 | " err=%d", __func__, rc); |
| 8391 | rc = regulator_disable(mpp0_reg); |
| 8392 | if (rc) |
| 8393 | printk(KERN_WARNING "%s: failed to disable reg " |
| 8394 | "8901_mpp0 err=%d", __func__, rc); |
| 8395 | dsub_reg_enabled = 0; |
| 8396 | } |
| 8397 | |
| 8398 | return rc; |
| 8399 | |
| 8400 | dsub_regulator_err: |
| 8401 | regulator_put(mpp0_reg); |
| 8402 | regulator_put(dsub_reg); |
| 8403 | return rc; |
| 8404 | } |
| 8405 | |
| 8406 | static int display_power_on; |
| 8407 | static void setup_display_power(void) |
| 8408 | { |
| 8409 | if (display_power_on) |
| 8410 | if (lcdc_vga_enabled) { |
| 8411 | dsub_regulator(1); |
| 8412 | gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 0); |
| 8413 | gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 0); |
| 8414 | if (machine_is_msm8x60_ffa() || |
| 8415 | machine_is_msm8x60_fusn_ffa()) |
| 8416 | gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 1); |
| 8417 | } else { |
| 8418 | dsub_regulator(0); |
| 8419 | gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 1); |
| 8420 | gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 1); |
| 8421 | if (machine_is_msm8x60_ffa() || |
| 8422 | machine_is_msm8x60_fusn_ffa()) |
| 8423 | gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 0); |
| 8424 | } |
| 8425 | else { |
| 8426 | dsub_regulator(0); |
| 8427 | if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa()) |
| 8428 | gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 0); |
| 8429 | /* BACKLIGHT */ |
| 8430 | gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 0); |
| 8431 | /* LVDS */ |
| 8432 | gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 0); |
| 8433 | } |
| 8434 | } |
| 8435 | |
| 8436 | #define _GET_REGULATOR(var, name) do { \ |
| 8437 | if (var == NULL) { \ |
| 8438 | var = regulator_get(NULL, name); \ |
| 8439 | if (IS_ERR(var)) { \ |
| 8440 | pr_err("'%s' regulator not found, rc=%ld\n", \ |
| 8441 | name, PTR_ERR(var)); \ |
| 8442 | var = NULL; \ |
| 8443 | } \ |
| 8444 | } \ |
| 8445 | } while (0) |
| 8446 | |
| 8447 | #define GPIO_RESX_N (GPIO_EXPANDER_GPIO_BASE + 2) |
| 8448 | |
| 8449 | static void display_common_power(int on) |
| 8450 | { |
| 8451 | int rc; |
| 8452 | static struct regulator *display_reg; |
| 8453 | |
| 8454 | if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() || |
| 8455 | machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) { |
| 8456 | if (on) { |
| 8457 | /* LVDS */ |
| 8458 | _GET_REGULATOR(display_reg, "8901_l2"); |
| 8459 | if (!display_reg) |
| 8460 | return; |
| 8461 | rc = regulator_set_voltage(display_reg, |
| 8462 | 3300000, 3300000); |
| 8463 | if (rc) |
| 8464 | goto out; |
| 8465 | rc = regulator_enable(display_reg); |
| 8466 | if (rc) |
| 8467 | goto out; |
| 8468 | rc = gpio_request(GPIO_LVDS_SHUTDOWN_N, |
| 8469 | "LVDS_STDN_OUT_N"); |
| 8470 | if (rc) { |
| 8471 | printk(KERN_ERR "%s: LVDS gpio %d request" |
| 8472 | "failed\n", __func__, |
| 8473 | GPIO_LVDS_SHUTDOWN_N); |
| 8474 | goto out2; |
| 8475 | } |
| 8476 | |
| 8477 | /* BACKLIGHT */ |
| 8478 | rc = gpio_request(GPIO_BACKLIGHT_EN, "BACKLIGHT_EN"); |
| 8479 | if (rc) { |
| 8480 | printk(KERN_ERR "%s: BACKLIGHT gpio %d request" |
| 8481 | "failed\n", __func__, |
| 8482 | GPIO_BACKLIGHT_EN); |
| 8483 | goto out3; |
| 8484 | } |
| 8485 | |
| 8486 | if (machine_is_msm8x60_ffa() || |
| 8487 | machine_is_msm8x60_fusn_ffa()) { |
| 8488 | rc = gpio_request(GPIO_DONGLE_PWR_EN, |
| 8489 | "DONGLE_PWR_EN"); |
| 8490 | if (rc) { |
| 8491 | printk(KERN_ERR "%s: DONGLE_PWR_EN gpio" |
| 8492 | " %d request failed\n", __func__, |
| 8493 | GPIO_DONGLE_PWR_EN); |
| 8494 | goto out4; |
| 8495 | } |
| 8496 | } |
| 8497 | |
| 8498 | gpio_direction_output(GPIO_LVDS_SHUTDOWN_N, 0); |
| 8499 | gpio_direction_output(GPIO_BACKLIGHT_EN, 0); |
| 8500 | if (machine_is_msm8x60_ffa() || |
| 8501 | machine_is_msm8x60_fusn_ffa()) |
| 8502 | gpio_direction_output(GPIO_DONGLE_PWR_EN, 0); |
| 8503 | mdelay(20); |
| 8504 | display_power_on = 1; |
| 8505 | setup_display_power(); |
| 8506 | } else { |
| 8507 | if (display_power_on) { |
| 8508 | display_power_on = 0; |
| 8509 | setup_display_power(); |
| 8510 | mdelay(20); |
| 8511 | if (machine_is_msm8x60_ffa() || |
| 8512 | machine_is_msm8x60_fusn_ffa()) |
| 8513 | gpio_free(GPIO_DONGLE_PWR_EN); |
| 8514 | goto out4; |
| 8515 | } |
| 8516 | } |
| 8517 | } |
| 8518 | #if defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \ |
| 8519 | defined(CONFIG_FB_MSM_LCDC_AUO_WVGA) |
| 8520 | else if (machine_is_msm8x60_fluid()) { |
| 8521 | static struct regulator *fluid_reg; |
| 8522 | static struct regulator *fluid_reg2; |
| 8523 | |
| 8524 | if (on) { |
| 8525 | _GET_REGULATOR(fluid_reg, "8901_l2"); |
| 8526 | if (!fluid_reg) |
| 8527 | return; |
| 8528 | _GET_REGULATOR(fluid_reg2, "8058_s3"); |
| 8529 | if (!fluid_reg2) { |
| 8530 | regulator_put(fluid_reg); |
| 8531 | return; |
| 8532 | } |
| 8533 | rc = gpio_request(GPIO_RESX_N, "RESX_N"); |
| 8534 | if (rc) { |
| 8535 | regulator_put(fluid_reg2); |
| 8536 | regulator_put(fluid_reg); |
| 8537 | return; |
| 8538 | } |
| 8539 | regulator_set_voltage(fluid_reg, 2850000, 2850000); |
| 8540 | regulator_set_voltage(fluid_reg2, 1800000, 1800000); |
| 8541 | regulator_enable(fluid_reg); |
| 8542 | regulator_enable(fluid_reg2); |
| 8543 | msleep(20); |
| 8544 | gpio_direction_output(GPIO_RESX_N, 0); |
| 8545 | udelay(10); |
| 8546 | gpio_set_value_cansleep(GPIO_RESX_N, 1); |
| 8547 | display_power_on = 1; |
| 8548 | setup_display_power(); |
| 8549 | } else { |
| 8550 | gpio_set_value_cansleep(GPIO_RESX_N, 0); |
| 8551 | gpio_free(GPIO_RESX_N); |
| 8552 | msleep(20); |
| 8553 | regulator_disable(fluid_reg2); |
| 8554 | regulator_disable(fluid_reg); |
| 8555 | regulator_put(fluid_reg2); |
| 8556 | regulator_put(fluid_reg); |
| 8557 | display_power_on = 0; |
| 8558 | setup_display_power(); |
| 8559 | fluid_reg = NULL; |
| 8560 | fluid_reg2 = NULL; |
| 8561 | } |
| 8562 | } |
| 8563 | #endif |
| 8564 | return; |
| 8565 | |
| 8566 | out4: |
| 8567 | gpio_free(GPIO_BACKLIGHT_EN); |
| 8568 | out3: |
| 8569 | gpio_free(GPIO_LVDS_SHUTDOWN_N); |
| 8570 | out2: |
| 8571 | regulator_disable(display_reg); |
| 8572 | out: |
| 8573 | regulator_put(display_reg); |
| 8574 | display_reg = NULL; |
| 8575 | } |
| 8576 | #undef _GET_REGULATOR |
| 8577 | #endif |
| 8578 | |
| 8579 | static int mipi_dsi_panel_power(int on); |
| 8580 | |
| 8581 | #define LCDC_NUM_GPIO 28 |
| 8582 | #define LCDC_GPIO_START 0 |
| 8583 | |
| 8584 | static void lcdc_samsung_panel_power(int on) |
| 8585 | { |
| 8586 | int n, ret = 0; |
| 8587 | |
| 8588 | display_common_power(on); |
| 8589 | |
| 8590 | for (n = 0; n < LCDC_NUM_GPIO; n++) { |
| 8591 | if (on) { |
| 8592 | ret = gpio_request(LCDC_GPIO_START + n, "LCDC_GPIO"); |
| 8593 | if (unlikely(ret)) { |
| 8594 | pr_err("%s not able to get gpio\n", __func__); |
| 8595 | break; |
| 8596 | } |
| 8597 | } else |
| 8598 | gpio_free(LCDC_GPIO_START + n); |
| 8599 | } |
| 8600 | |
| 8601 | if (ret) { |
| 8602 | for (n--; n >= 0; n--) |
| 8603 | gpio_free(LCDC_GPIO_START + n); |
| 8604 | } |
| 8605 | |
| 8606 | mipi_dsi_panel_power(0); /* set 8058_ldo0 to LPM */ |
| 8607 | } |
| 8608 | |
| 8609 | #ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL |
| 8610 | #define _GET_REGULATOR(var, name) do { \ |
| 8611 | var = regulator_get(NULL, name); \ |
| 8612 | if (IS_ERR(var)) { \ |
| 8613 | pr_err("'%s' regulator not found, rc=%ld\n", \ |
| 8614 | name, IS_ERR(var)); \ |
| 8615 | var = NULL; \ |
| 8616 | return -ENODEV; \ |
| 8617 | } \ |
| 8618 | } while (0) |
| 8619 | |
| 8620 | static int hdmi_enable_5v(int on) |
| 8621 | { |
| 8622 | static struct regulator *reg_8901_hdmi_mvs; /* HDMI_5V */ |
| 8623 | static struct regulator *reg_8901_mpp0; /* External 5V */ |
| 8624 | static int prev_on; |
| 8625 | int rc; |
| 8626 | |
| 8627 | if (on == prev_on) |
| 8628 | return 0; |
| 8629 | |
| 8630 | if (!reg_8901_hdmi_mvs) |
| 8631 | _GET_REGULATOR(reg_8901_hdmi_mvs, "8901_hdmi_mvs"); |
| 8632 | if (!reg_8901_mpp0) |
| 8633 | _GET_REGULATOR(reg_8901_mpp0, "8901_mpp0"); |
| 8634 | |
| 8635 | if (on) { |
| 8636 | rc = regulator_enable(reg_8901_mpp0); |
| 8637 | if (rc) { |
| 8638 | pr_err("'%s' regulator enable failed, rc=%d\n", |
| 8639 | "reg_8901_mpp0", rc); |
| 8640 | return rc; |
| 8641 | } |
| 8642 | rc = regulator_enable(reg_8901_hdmi_mvs); |
| 8643 | if (rc) { |
| 8644 | pr_err("'%s' regulator enable failed, rc=%d\n", |
| 8645 | "8901_hdmi_mvs", rc); |
| 8646 | return rc; |
| 8647 | } |
| 8648 | pr_info("%s(on): success\n", __func__); |
| 8649 | } else { |
| 8650 | rc = regulator_disable(reg_8901_hdmi_mvs); |
| 8651 | if (rc) |
| 8652 | pr_warning("'%s' regulator disable failed, rc=%d\n", |
| 8653 | "8901_hdmi_mvs", rc); |
| 8654 | rc = regulator_disable(reg_8901_mpp0); |
| 8655 | if (rc) |
| 8656 | pr_warning("'%s' regulator disable failed, rc=%d\n", |
| 8657 | "reg_8901_mpp0", rc); |
| 8658 | pr_info("%s(off): success\n", __func__); |
| 8659 | } |
| 8660 | |
| 8661 | prev_on = on; |
| 8662 | |
| 8663 | return 0; |
| 8664 | } |
| 8665 | |
| 8666 | static int hdmi_core_power(int on, int show) |
| 8667 | { |
| 8668 | static struct regulator *reg_8058_l16; /* VDD_HDMI */ |
| 8669 | static int prev_on; |
| 8670 | int rc; |
| 8671 | |
| 8672 | if (on == prev_on) |
| 8673 | return 0; |
| 8674 | |
| 8675 | if (!reg_8058_l16) |
| 8676 | _GET_REGULATOR(reg_8058_l16, "8058_l16"); |
| 8677 | |
| 8678 | if (on) { |
| 8679 | rc = regulator_set_voltage(reg_8058_l16, 1800000, 1800000); |
| 8680 | if (!rc) |
| 8681 | rc = regulator_enable(reg_8058_l16); |
| 8682 | if (rc) { |
| 8683 | pr_err("'%s' regulator enable failed, rc=%d\n", |
| 8684 | "8058_l16", rc); |
| 8685 | return rc; |
| 8686 | } |
| 8687 | rc = gpio_request(170, "HDMI_DDC_CLK"); |
| 8688 | if (rc) { |
| 8689 | pr_err("'%s'(%d) gpio_request failed, rc=%d\n", |
| 8690 | "HDMI_DDC_CLK", 170, rc); |
| 8691 | goto error1; |
| 8692 | } |
| 8693 | rc = gpio_request(171, "HDMI_DDC_DATA"); |
| 8694 | if (rc) { |
| 8695 | pr_err("'%s'(%d) gpio_request failed, rc=%d\n", |
| 8696 | "HDMI_DDC_DATA", 171, rc); |
| 8697 | goto error2; |
| 8698 | } |
| 8699 | rc = gpio_request(172, "HDMI_HPD"); |
| 8700 | if (rc) { |
| 8701 | pr_err("'%s'(%d) gpio_request failed, rc=%d\n", |
| 8702 | "HDMI_HPD", 172, rc); |
| 8703 | goto error3; |
| 8704 | } |
| 8705 | pr_info("%s(on): success\n", __func__); |
| 8706 | } else { |
| 8707 | gpio_free(170); |
| 8708 | gpio_free(171); |
| 8709 | gpio_free(172); |
| 8710 | rc = regulator_disable(reg_8058_l16); |
| 8711 | if (rc) |
| 8712 | pr_warning("'%s' regulator disable failed, rc=%d\n", |
| 8713 | "8058_l16", rc); |
| 8714 | pr_info("%s(off): success\n", __func__); |
| 8715 | } |
| 8716 | |
| 8717 | prev_on = on; |
| 8718 | |
| 8719 | return 0; |
| 8720 | |
| 8721 | error3: |
| 8722 | gpio_free(171); |
| 8723 | error2: |
| 8724 | gpio_free(170); |
| 8725 | error1: |
| 8726 | regulator_disable(reg_8058_l16); |
| 8727 | return rc; |
| 8728 | } |
| 8729 | |
| 8730 | static int hdmi_cec_power(int on) |
| 8731 | { |
| 8732 | static struct regulator *reg_8901_l3; /* HDMI_CEC */ |
| 8733 | static int prev_on; |
| 8734 | int rc; |
| 8735 | |
| 8736 | if (on == prev_on) |
| 8737 | return 0; |
| 8738 | |
| 8739 | if (!reg_8901_l3) |
| 8740 | _GET_REGULATOR(reg_8901_l3, "8901_l3"); |
| 8741 | |
| 8742 | if (on) { |
| 8743 | rc = regulator_set_voltage(reg_8901_l3, 3300000, 3300000); |
| 8744 | if (!rc) |
| 8745 | rc = regulator_enable(reg_8901_l3); |
| 8746 | if (rc) { |
| 8747 | pr_err("'%s' regulator enable failed, rc=%d\n", |
| 8748 | "8901_l3", rc); |
| 8749 | return rc; |
| 8750 | } |
| 8751 | rc = gpio_request(169, "HDMI_CEC_VAR"); |
| 8752 | if (rc) { |
| 8753 | pr_err("'%s'(%d) gpio_request failed, rc=%d\n", |
| 8754 | "HDMI_CEC_VAR", 169, rc); |
| 8755 | goto error; |
| 8756 | } |
| 8757 | pr_info("%s(on): success\n", __func__); |
| 8758 | } else { |
| 8759 | gpio_free(169); |
| 8760 | rc = regulator_disable(reg_8901_l3); |
| 8761 | if (rc) |
| 8762 | pr_warning("'%s' regulator disable failed, rc=%d\n", |
| 8763 | "8901_l3", rc); |
| 8764 | pr_info("%s(off): success\n", __func__); |
| 8765 | } |
| 8766 | |
| 8767 | prev_on = on; |
| 8768 | |
| 8769 | return 0; |
| 8770 | error: |
| 8771 | regulator_disable(reg_8901_l3); |
| 8772 | return rc; |
| 8773 | } |
| 8774 | |
| 8775 | #undef _GET_REGULATOR |
| 8776 | |
| 8777 | #endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */ |
| 8778 | |
| 8779 | static int lcdc_panel_power(int on) |
| 8780 | { |
| 8781 | int flag_on = !!on; |
| 8782 | static int lcdc_power_save_on; |
| 8783 | |
| 8784 | if (lcdc_power_save_on == flag_on) |
| 8785 | return 0; |
| 8786 | |
| 8787 | lcdc_power_save_on = flag_on; |
| 8788 | |
| 8789 | lcdc_samsung_panel_power(on); |
| 8790 | |
| 8791 | return 0; |
| 8792 | } |
| 8793 | |
| 8794 | #ifdef CONFIG_MSM_BUS_SCALING |
| 8795 | #ifdef CONFIG_FB_MSM_LCDC_DSUB |
| 8796 | static struct msm_bus_vectors mdp_init_vectors[] = { |
| 8797 | /* For now, 0th array entry is reserved. |
| 8798 | * Please leave 0 as is and don't use it |
| 8799 | */ |
| 8800 | { |
| 8801 | .src = MSM_BUS_MASTER_MDP_PORT0, |
| 8802 | .dst = MSM_BUS_SLAVE_SMI, |
| 8803 | .ab = 0, |
| 8804 | .ib = 0, |
| 8805 | }, |
| 8806 | /* Master and slaves can be from different fabrics */ |
| 8807 | { |
| 8808 | .src = MSM_BUS_MASTER_MDP_PORT0, |
| 8809 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 8810 | .ab = 0, |
| 8811 | .ib = 0, |
| 8812 | }, |
| 8813 | }; |
| 8814 | |
| 8815 | static struct msm_bus_vectors mdp_sd_smi_vectors[] = { |
| 8816 | /* Default case static display/UI/2d/3d if FB SMI */ |
| 8817 | { |
| 8818 | .src = MSM_BUS_MASTER_MDP_PORT0, |
| 8819 | .dst = MSM_BUS_SLAVE_SMI, |
| 8820 | .ab = 388800000, |
| 8821 | .ib = 486000000, |
| 8822 | }, |
| 8823 | /* Master and slaves can be from different fabrics */ |
| 8824 | { |
| 8825 | .src = MSM_BUS_MASTER_MDP_PORT0, |
| 8826 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 8827 | .ab = 0, |
| 8828 | .ib = 0, |
| 8829 | }, |
| 8830 | }; |
| 8831 | |
| 8832 | static struct msm_bus_vectors mdp_sd_ebi_vectors[] = { |
| 8833 | /* Default case static display/UI/2d/3d if FB SMI */ |
| 8834 | { |
| 8835 | .src = MSM_BUS_MASTER_MDP_PORT0, |
| 8836 | .dst = MSM_BUS_SLAVE_SMI, |
| 8837 | .ab = 0, |
| 8838 | .ib = 0, |
| 8839 | }, |
| 8840 | /* Master and slaves can be from different fabrics */ |
| 8841 | { |
| 8842 | .src = MSM_BUS_MASTER_MDP_PORT0, |
| 8843 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 8844 | .ab = 388800000, |
| 8845 | .ib = 486000000 * 2, |
| 8846 | }, |
| 8847 | }; |
| 8848 | static struct msm_bus_vectors mdp_vga_vectors[] = { |
| 8849 | /* VGA and less video */ |
| 8850 | { |
| 8851 | .src = MSM_BUS_MASTER_MDP_PORT0, |
| 8852 | .dst = MSM_BUS_SLAVE_SMI, |
| 8853 | .ab = 458092800, |
| 8854 | .ib = 572616000, |
| 8855 | }, |
| 8856 | { |
| 8857 | .src = MSM_BUS_MASTER_MDP_PORT0, |
| 8858 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 8859 | .ab = 458092800, |
| 8860 | .ib = 572616000 * 2, |
| 8861 | }, |
| 8862 | }; |
| 8863 | static struct msm_bus_vectors mdp_720p_vectors[] = { |
| 8864 | /* 720p and less video */ |
| 8865 | { |
| 8866 | .src = MSM_BUS_MASTER_MDP_PORT0, |
| 8867 | .dst = MSM_BUS_SLAVE_SMI, |
| 8868 | .ab = 471744000, |
| 8869 | .ib = 589680000, |
| 8870 | }, |
| 8871 | /* Master and slaves can be from different fabrics */ |
| 8872 | { |
| 8873 | .src = MSM_BUS_MASTER_MDP_PORT0, |
| 8874 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 8875 | .ab = 471744000, |
| 8876 | .ib = 589680000 * 2, |
| 8877 | }, |
| 8878 | }; |
| 8879 | |
| 8880 | static struct msm_bus_vectors mdp_1080p_vectors[] = { |
| 8881 | /* 1080p and less video */ |
| 8882 | { |
| 8883 | .src = MSM_BUS_MASTER_MDP_PORT0, |
| 8884 | .dst = MSM_BUS_SLAVE_SMI, |
| 8885 | .ab = 575424000, |
| 8886 | .ib = 719280000, |
| 8887 | }, |
| 8888 | /* Master and slaves can be from different fabrics */ |
| 8889 | { |
| 8890 | .src = MSM_BUS_MASTER_MDP_PORT0, |
| 8891 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 8892 | .ab = 575424000, |
| 8893 | .ib = 719280000 * 2, |
| 8894 | }, |
| 8895 | }; |
| 8896 | |
| 8897 | #else |
| 8898 | static struct msm_bus_vectors mdp_init_vectors[] = { |
| 8899 | /* For now, 0th array entry is reserved. |
| 8900 | * Please leave 0 as is and don't use it |
| 8901 | */ |
| 8902 | { |
| 8903 | .src = MSM_BUS_MASTER_MDP_PORT0, |
| 8904 | .dst = MSM_BUS_SLAVE_SMI, |
| 8905 | .ab = 0, |
| 8906 | .ib = 0, |
| 8907 | }, |
| 8908 | /* Master and slaves can be from different fabrics */ |
| 8909 | { |
| 8910 | .src = MSM_BUS_MASTER_MDP_PORT0, |
| 8911 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 8912 | .ab = 0, |
| 8913 | .ib = 0, |
| 8914 | }, |
| 8915 | }; |
| 8916 | |
| 8917 | static struct msm_bus_vectors mdp_sd_smi_vectors[] = { |
| 8918 | /* Default case static display/UI/2d/3d if FB SMI */ |
| 8919 | { |
| 8920 | .src = MSM_BUS_MASTER_MDP_PORT0, |
| 8921 | .dst = MSM_BUS_SLAVE_SMI, |
| 8922 | .ab = 175110000, |
| 8923 | .ib = 218887500, |
| 8924 | }, |
| 8925 | /* Master and slaves can be from different fabrics */ |
| 8926 | { |
| 8927 | .src = MSM_BUS_MASTER_MDP_PORT0, |
| 8928 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 8929 | .ab = 0, |
| 8930 | .ib = 0, |
| 8931 | }, |
| 8932 | }; |
| 8933 | |
| 8934 | static struct msm_bus_vectors mdp_sd_ebi_vectors[] = { |
| 8935 | /* Default case static display/UI/2d/3d if FB SMI */ |
| 8936 | { |
| 8937 | .src = MSM_BUS_MASTER_MDP_PORT0, |
| 8938 | .dst = MSM_BUS_SLAVE_SMI, |
| 8939 | .ab = 0, |
| 8940 | .ib = 0, |
| 8941 | }, |
| 8942 | /* Master and slaves can be from different fabrics */ |
| 8943 | { |
| 8944 | .src = MSM_BUS_MASTER_MDP_PORT0, |
| 8945 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 8946 | .ab = 216000000, |
| 8947 | .ib = 270000000 * 2, |
| 8948 | }, |
| 8949 | }; |
| 8950 | static struct msm_bus_vectors mdp_vga_vectors[] = { |
| 8951 | /* VGA and less video */ |
| 8952 | { |
| 8953 | .src = MSM_BUS_MASTER_MDP_PORT0, |
| 8954 | .dst = MSM_BUS_SLAVE_SMI, |
| 8955 | .ab = 216000000, |
| 8956 | .ib = 270000000, |
| 8957 | }, |
| 8958 | { |
| 8959 | .src = MSM_BUS_MASTER_MDP_PORT0, |
| 8960 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 8961 | .ab = 216000000, |
| 8962 | .ib = 270000000 * 2, |
| 8963 | }, |
| 8964 | }; |
| 8965 | |
| 8966 | static struct msm_bus_vectors mdp_720p_vectors[] = { |
| 8967 | /* 720p and less video */ |
| 8968 | { |
| 8969 | .src = MSM_BUS_MASTER_MDP_PORT0, |
| 8970 | .dst = MSM_BUS_SLAVE_SMI, |
| 8971 | .ab = 230400000, |
| 8972 | .ib = 288000000, |
| 8973 | }, |
| 8974 | /* Master and slaves can be from different fabrics */ |
| 8975 | { |
| 8976 | .src = MSM_BUS_MASTER_MDP_PORT0, |
| 8977 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 8978 | .ab = 230400000, |
| 8979 | .ib = 288000000 * 2, |
| 8980 | }, |
| 8981 | }; |
| 8982 | |
| 8983 | static struct msm_bus_vectors mdp_1080p_vectors[] = { |
| 8984 | /* 1080p and less video */ |
| 8985 | { |
| 8986 | .src = MSM_BUS_MASTER_MDP_PORT0, |
| 8987 | .dst = MSM_BUS_SLAVE_SMI, |
| 8988 | .ab = 334080000, |
| 8989 | .ib = 417600000, |
| 8990 | }, |
| 8991 | /* Master and slaves can be from different fabrics */ |
| 8992 | { |
| 8993 | .src = MSM_BUS_MASTER_MDP_PORT0, |
| 8994 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 8995 | .ab = 334080000, |
Ravishangar Kalyanam | 731beb9 | 2011-07-07 18:27:32 -0700 | [diff] [blame] | 8996 | .ib = 550000000 * 2, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 8997 | }, |
| 8998 | }; |
| 8999 | |
| 9000 | #endif |
| 9001 | static struct msm_bus_paths mdp_bus_scale_usecases[] = { |
| 9002 | { |
| 9003 | ARRAY_SIZE(mdp_init_vectors), |
| 9004 | mdp_init_vectors, |
| 9005 | }, |
| 9006 | { |
| 9007 | ARRAY_SIZE(mdp_sd_smi_vectors), |
| 9008 | mdp_sd_smi_vectors, |
| 9009 | }, |
| 9010 | { |
| 9011 | ARRAY_SIZE(mdp_sd_ebi_vectors), |
| 9012 | mdp_sd_ebi_vectors, |
| 9013 | }, |
| 9014 | { |
| 9015 | ARRAY_SIZE(mdp_vga_vectors), |
| 9016 | mdp_vga_vectors, |
| 9017 | }, |
| 9018 | { |
| 9019 | ARRAY_SIZE(mdp_720p_vectors), |
| 9020 | mdp_720p_vectors, |
| 9021 | }, |
| 9022 | { |
| 9023 | ARRAY_SIZE(mdp_1080p_vectors), |
| 9024 | mdp_1080p_vectors, |
| 9025 | }, |
| 9026 | }; |
| 9027 | static struct msm_bus_scale_pdata mdp_bus_scale_pdata = { |
| 9028 | mdp_bus_scale_usecases, |
| 9029 | ARRAY_SIZE(mdp_bus_scale_usecases), |
| 9030 | .name = "mdp", |
| 9031 | }; |
| 9032 | |
| 9033 | #endif |
| 9034 | #ifdef CONFIG_MSM_BUS_SCALING |
| 9035 | static struct msm_bus_vectors dtv_bus_init_vectors[] = { |
| 9036 | /* For now, 0th array entry is reserved. |
| 9037 | * Please leave 0 as is and don't use it |
| 9038 | */ |
| 9039 | { |
| 9040 | .src = MSM_BUS_MASTER_MDP_PORT0, |
| 9041 | .dst = MSM_BUS_SLAVE_SMI, |
| 9042 | .ab = 0, |
| 9043 | .ib = 0, |
| 9044 | }, |
| 9045 | /* Master and slaves can be from different fabrics */ |
| 9046 | { |
| 9047 | .src = MSM_BUS_MASTER_MDP_PORT0, |
| 9048 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 9049 | .ab = 0, |
| 9050 | .ib = 0, |
| 9051 | }, |
| 9052 | }; |
| 9053 | static struct msm_bus_vectors dtv_bus_def_vectors[] = { |
| 9054 | /* For now, 0th array entry is reserved. |
| 9055 | * Please leave 0 as is and don't use it |
| 9056 | */ |
| 9057 | { |
| 9058 | .src = MSM_BUS_MASTER_MDP_PORT0, |
| 9059 | .dst = MSM_BUS_SLAVE_SMI, |
| 9060 | .ab = 566092800, |
| 9061 | .ib = 707616000, |
| 9062 | }, |
| 9063 | /* Master and slaves can be from different fabrics */ |
| 9064 | { |
| 9065 | .src = MSM_BUS_MASTER_MDP_PORT0, |
| 9066 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 9067 | .ab = 566092800, |
| 9068 | .ib = 707616000, |
| 9069 | }, |
| 9070 | }; |
| 9071 | static struct msm_bus_paths dtv_bus_scale_usecases[] = { |
| 9072 | { |
| 9073 | ARRAY_SIZE(dtv_bus_init_vectors), |
| 9074 | dtv_bus_init_vectors, |
| 9075 | }, |
| 9076 | { |
| 9077 | ARRAY_SIZE(dtv_bus_def_vectors), |
| 9078 | dtv_bus_def_vectors, |
| 9079 | }, |
| 9080 | }; |
| 9081 | static struct msm_bus_scale_pdata dtv_bus_scale_pdata = { |
| 9082 | dtv_bus_scale_usecases, |
| 9083 | ARRAY_SIZE(dtv_bus_scale_usecases), |
| 9084 | .name = "dtv", |
| 9085 | }; |
| 9086 | |
| 9087 | static struct lcdc_platform_data dtv_pdata = { |
| 9088 | .bus_scale_table = &dtv_bus_scale_pdata, |
| 9089 | }; |
| 9090 | #endif |
| 9091 | |
| 9092 | |
| 9093 | static struct lcdc_platform_data lcdc_pdata = { |
| 9094 | .lcdc_power_save = lcdc_panel_power, |
| 9095 | }; |
| 9096 | |
| 9097 | |
| 9098 | #define MDP_VSYNC_GPIO 28 |
| 9099 | |
| 9100 | /* |
| 9101 | * MIPI_DSI only use 8058_LDO0 which need always on |
| 9102 | * therefore it need to be put at low power mode if |
| 9103 | * it was not used instead of turn it off. |
| 9104 | */ |
| 9105 | static int mipi_dsi_panel_power(int on) |
| 9106 | { |
| 9107 | int flag_on = !!on; |
| 9108 | static int mipi_dsi_power_save_on; |
| 9109 | static struct regulator *ldo0; |
| 9110 | int rc = 0; |
| 9111 | |
| 9112 | if (mipi_dsi_power_save_on == flag_on) |
| 9113 | return 0; |
| 9114 | |
| 9115 | mipi_dsi_power_save_on = flag_on; |
| 9116 | |
| 9117 | if (ldo0 == NULL) { /* init */ |
| 9118 | ldo0 = regulator_get(NULL, "8058_l0"); |
| 9119 | if (IS_ERR(ldo0)) { |
| 9120 | pr_debug("%s: LDO0 failed\n", __func__); |
| 9121 | rc = PTR_ERR(ldo0); |
| 9122 | return rc; |
| 9123 | } |
| 9124 | |
| 9125 | rc = regulator_set_voltage(ldo0, 1200000, 1200000); |
| 9126 | if (rc) |
| 9127 | goto out; |
| 9128 | |
| 9129 | rc = regulator_enable(ldo0); |
| 9130 | if (rc) |
| 9131 | goto out; |
| 9132 | } |
| 9133 | |
| 9134 | if (on) { |
| 9135 | /* set ldo0 to HPM */ |
| 9136 | rc = regulator_set_optimum_mode(ldo0, 100000); |
| 9137 | if (rc < 0) |
| 9138 | goto out; |
| 9139 | } else { |
| 9140 | /* set ldo0 to LPM */ |
| 9141 | rc = regulator_set_optimum_mode(ldo0, 9000); |
| 9142 | if (rc < 0) |
| 9143 | goto out; |
| 9144 | } |
| 9145 | |
| 9146 | return 0; |
| 9147 | out: |
| 9148 | regulator_disable(ldo0); |
| 9149 | regulator_put(ldo0); |
| 9150 | ldo0 = NULL; |
| 9151 | return rc; |
| 9152 | } |
| 9153 | |
| 9154 | static struct mipi_dsi_platform_data mipi_dsi_pdata = { |
| 9155 | .vsync_gpio = MDP_VSYNC_GPIO, |
| 9156 | .dsi_power_save = mipi_dsi_panel_power, |
| 9157 | }; |
| 9158 | |
| 9159 | #ifdef CONFIG_FB_MSM_TVOUT |
| 9160 | static struct regulator *reg_8058_l13; |
| 9161 | |
| 9162 | static int atv_dac_power(int on) |
| 9163 | { |
| 9164 | int rc = 0; |
| 9165 | #define _GET_REGULATOR(var, name) do { \ |
| 9166 | var = regulator_get(NULL, name); \ |
| 9167 | if (IS_ERR(var)) { \ |
| 9168 | pr_info("'%s' regulator not found, rc=%ld\n", \ |
| 9169 | name, IS_ERR(var)); \ |
| 9170 | var = NULL; \ |
| 9171 | return -ENODEV; \ |
| 9172 | } \ |
| 9173 | } while (0) |
| 9174 | |
| 9175 | if (!reg_8058_l13) |
| 9176 | _GET_REGULATOR(reg_8058_l13, "8058_l13"); |
| 9177 | #undef _GET_REGULATOR |
| 9178 | |
| 9179 | if (on) { |
| 9180 | rc = regulator_set_voltage(reg_8058_l13, 2050000, 2050000); |
| 9181 | if (rc) { |
| 9182 | pr_info("%s: '%s' regulator set voltage failed,\ |
| 9183 | rc=%d\n", __func__, "8058_l13", rc); |
| 9184 | return rc; |
| 9185 | } |
| 9186 | |
| 9187 | rc = regulator_enable(reg_8058_l13); |
| 9188 | if (rc) { |
| 9189 | pr_err("%s: '%s' regulator enable failed,\ |
| 9190 | rc=%d\n", __func__, "8058_l13", rc); |
| 9191 | return rc; |
| 9192 | } |
| 9193 | } else { |
| 9194 | rc = regulator_force_disable(reg_8058_l13); |
| 9195 | if (rc) |
| 9196 | pr_warning("%s: '%s' regulator disable failed, rc=%d\n", |
| 9197 | __func__, "8058_l13", rc); |
| 9198 | } |
| 9199 | return rc; |
| 9200 | |
| 9201 | } |
| 9202 | #endif |
| 9203 | |
| 9204 | #ifdef CONFIG_FB_MSM_MIPI_DSI |
| 9205 | int mdp_core_clk_rate_table[] = { |
| 9206 | 85330000, |
| 9207 | 85330000, |
| 9208 | 160000000, |
| 9209 | 200000000, |
| 9210 | }; |
| 9211 | #else |
| 9212 | int mdp_core_clk_rate_table[] = { |
| 9213 | 59080000, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 9214 | 85330000, |
kuogee hsieh | 26791a9 | 2011-08-01 18:35:58 -0700 | [diff] [blame] | 9215 | 128000000, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 9216 | 200000000, |
| 9217 | }; |
| 9218 | #endif |
| 9219 | |
| 9220 | static struct msm_panel_common_pdata mdp_pdata = { |
| 9221 | .gpio = MDP_VSYNC_GPIO, |
| 9222 | .mdp_core_clk_rate = 59080000, |
| 9223 | .mdp_core_clk_table = mdp_core_clk_rate_table, |
| 9224 | .num_mdp_clk = ARRAY_SIZE(mdp_core_clk_rate_table), |
| 9225 | #ifdef CONFIG_MSM_BUS_SCALING |
| 9226 | .mdp_bus_scale_table = &mdp_bus_scale_pdata, |
| 9227 | #endif |
| 9228 | .mdp_rev = MDP_REV_41, |
| 9229 | }; |
| 9230 | |
| 9231 | #ifdef CONFIG_FB_MSM_TVOUT |
| 9232 | |
| 9233 | #ifdef CONFIG_MSM_BUS_SCALING |
| 9234 | static struct msm_bus_vectors atv_bus_init_vectors[] = { |
| 9235 | /* For now, 0th array entry is reserved. |
| 9236 | * Please leave 0 as is and don't use it |
| 9237 | */ |
| 9238 | { |
| 9239 | .src = MSM_BUS_MASTER_MDP_PORT0, |
| 9240 | .dst = MSM_BUS_SLAVE_SMI, |
| 9241 | .ab = 0, |
| 9242 | .ib = 0, |
| 9243 | }, |
| 9244 | /* Master and slaves can be from different fabrics */ |
| 9245 | { |
| 9246 | .src = MSM_BUS_MASTER_MDP_PORT0, |
| 9247 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 9248 | .ab = 0, |
| 9249 | .ib = 0, |
| 9250 | }, |
| 9251 | }; |
| 9252 | static struct msm_bus_vectors atv_bus_def_vectors[] = { |
| 9253 | /* For now, 0th array entry is reserved. |
| 9254 | * Please leave 0 as is and don't use it |
| 9255 | */ |
| 9256 | { |
| 9257 | .src = MSM_BUS_MASTER_MDP_PORT0, |
| 9258 | .dst = MSM_BUS_SLAVE_SMI, |
| 9259 | .ab = 236390400, |
| 9260 | .ib = 265939200, |
| 9261 | }, |
| 9262 | /* Master and slaves can be from different fabrics */ |
| 9263 | { |
| 9264 | .src = MSM_BUS_MASTER_MDP_PORT0, |
| 9265 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 9266 | .ab = 236390400, |
| 9267 | .ib = 265939200, |
| 9268 | }, |
| 9269 | }; |
| 9270 | static struct msm_bus_paths atv_bus_scale_usecases[] = { |
| 9271 | { |
| 9272 | ARRAY_SIZE(atv_bus_init_vectors), |
| 9273 | atv_bus_init_vectors, |
| 9274 | }, |
| 9275 | { |
| 9276 | ARRAY_SIZE(atv_bus_def_vectors), |
| 9277 | atv_bus_def_vectors, |
| 9278 | }, |
| 9279 | }; |
| 9280 | static struct msm_bus_scale_pdata atv_bus_scale_pdata = { |
| 9281 | atv_bus_scale_usecases, |
| 9282 | ARRAY_SIZE(atv_bus_scale_usecases), |
| 9283 | .name = "atv", |
| 9284 | }; |
| 9285 | #endif |
| 9286 | |
| 9287 | static struct tvenc_platform_data atv_pdata = { |
| 9288 | .poll = 0, |
| 9289 | .pm_vid_en = atv_dac_power, |
| 9290 | #ifdef CONFIG_MSM_BUS_SCALING |
| 9291 | .bus_scale_table = &atv_bus_scale_pdata, |
| 9292 | #endif |
| 9293 | }; |
| 9294 | #endif |
| 9295 | |
| 9296 | static void __init msm_fb_add_devices(void) |
| 9297 | { |
| 9298 | #ifdef CONFIG_FB_MSM_LCDC_DSUB |
| 9299 | mdp_pdata.mdp_core_clk_table = NULL; |
| 9300 | mdp_pdata.num_mdp_clk = 0; |
| 9301 | mdp_pdata.mdp_core_clk_rate = 200000000; |
| 9302 | #endif |
| 9303 | if (machine_is_msm8x60_rumi3()) |
| 9304 | msm_fb_register_device("mdp", NULL); |
| 9305 | else |
| 9306 | msm_fb_register_device("mdp", &mdp_pdata); |
| 9307 | |
| 9308 | msm_fb_register_device("lcdc", &lcdc_pdata); |
| 9309 | msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata); |
| 9310 | #ifdef CONFIG_MSM_BUS_SCALING |
| 9311 | msm_fb_register_device("dtv", &dtv_pdata); |
| 9312 | #endif |
| 9313 | #ifdef CONFIG_FB_MSM_TVOUT |
| 9314 | msm_fb_register_device("tvenc", &atv_pdata); |
| 9315 | msm_fb_register_device("tvout_device", NULL); |
| 9316 | #endif |
| 9317 | } |
| 9318 | |
| 9319 | #if (defined(CONFIG_MARIMBA_CORE)) && \ |
| 9320 | (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE)) |
| 9321 | |
| 9322 | static const struct { |
| 9323 | char *name; |
| 9324 | int vmin; |
| 9325 | int vmax; |
| 9326 | } bt_regs_info[] = { |
| 9327 | { "8058_s3", 1800000, 1800000 }, |
| 9328 | { "8058_s2", 1300000, 1300000 }, |
| 9329 | { "8058_l8", 2900000, 3050000 }, |
| 9330 | }; |
| 9331 | |
| 9332 | static struct { |
| 9333 | bool enabled; |
| 9334 | } bt_regs_status[] = { |
| 9335 | { false }, |
| 9336 | { false }, |
| 9337 | { false }, |
| 9338 | }; |
| 9339 | static struct regulator *bt_regs[ARRAY_SIZE(bt_regs_info)]; |
| 9340 | |
| 9341 | static int bahama_bt(int on) |
| 9342 | { |
| 9343 | int rc; |
| 9344 | int i; |
| 9345 | struct marimba config = { .mod_id = SLAVE_ID_BAHAMA}; |
| 9346 | |
| 9347 | struct bahama_variant_register { |
| 9348 | const size_t size; |
| 9349 | const struct bahama_config_register *set; |
| 9350 | }; |
| 9351 | |
| 9352 | const struct bahama_config_register *p; |
| 9353 | |
| 9354 | u8 version; |
| 9355 | |
| 9356 | const struct bahama_config_register v10_bt_on[] = { |
| 9357 | { 0xE9, 0x00, 0xFF }, |
| 9358 | { 0xF4, 0x80, 0xFF }, |
| 9359 | { 0xE4, 0x00, 0xFF }, |
| 9360 | { 0xE5, 0x00, 0x0F }, |
| 9361 | #ifdef CONFIG_WLAN |
| 9362 | { 0xE6, 0x38, 0x7F }, |
| 9363 | { 0xE7, 0x06, 0xFF }, |
| 9364 | #endif |
| 9365 | { 0xE9, 0x21, 0xFF }, |
| 9366 | { 0x01, 0x0C, 0x1F }, |
| 9367 | { 0x01, 0x08, 0x1F }, |
| 9368 | }; |
| 9369 | |
| 9370 | const struct bahama_config_register v20_bt_on_fm_off[] = { |
| 9371 | { 0x11, 0x0C, 0xFF }, |
| 9372 | { 0x13, 0x01, 0xFF }, |
| 9373 | { 0xF4, 0x80, 0xFF }, |
| 9374 | { 0xF0, 0x00, 0xFF }, |
| 9375 | { 0xE9, 0x00, 0xFF }, |
| 9376 | #ifdef CONFIG_WLAN |
| 9377 | { 0x81, 0x00, 0x7F }, |
| 9378 | { 0x82, 0x00, 0xFF }, |
| 9379 | { 0xE6, 0x38, 0x7F }, |
| 9380 | { 0xE7, 0x06, 0xFF }, |
| 9381 | #endif |
| 9382 | { 0xE9, 0x21, 0xFF }, |
| 9383 | }; |
| 9384 | |
| 9385 | const struct bahama_config_register v20_bt_on_fm_on[] = { |
| 9386 | { 0x11, 0x0C, 0xFF }, |
| 9387 | { 0x13, 0x01, 0xFF }, |
| 9388 | { 0xF4, 0x86, 0xFF }, |
| 9389 | { 0xF0, 0x06, 0xFF }, |
| 9390 | { 0xE9, 0x00, 0xFF }, |
| 9391 | #ifdef CONFIG_WLAN |
| 9392 | { 0x81, 0x00, 0x7F }, |
| 9393 | { 0x82, 0x00, 0xFF }, |
| 9394 | { 0xE6, 0x38, 0x7F }, |
| 9395 | { 0xE7, 0x06, 0xFF }, |
| 9396 | #endif |
| 9397 | { 0xE9, 0x21, 0xFF }, |
| 9398 | }; |
| 9399 | |
| 9400 | const struct bahama_config_register v10_bt_off[] = { |
| 9401 | { 0xE9, 0x00, 0xFF }, |
| 9402 | }; |
| 9403 | |
| 9404 | const struct bahama_config_register v20_bt_off_fm_off[] = { |
| 9405 | { 0xF4, 0x84, 0xFF }, |
| 9406 | { 0xF0, 0x04, 0xFF }, |
| 9407 | { 0xE9, 0x00, 0xFF } |
| 9408 | }; |
| 9409 | |
| 9410 | const struct bahama_config_register v20_bt_off_fm_on[] = { |
| 9411 | { 0xF4, 0x86, 0xFF }, |
| 9412 | { 0xF0, 0x06, 0xFF }, |
| 9413 | { 0xE9, 0x00, 0xFF } |
| 9414 | }; |
| 9415 | const struct bahama_variant_register bt_bahama[2][3] = { |
| 9416 | { |
| 9417 | { ARRAY_SIZE(v10_bt_off), v10_bt_off }, |
| 9418 | { ARRAY_SIZE(v20_bt_off_fm_off), v20_bt_off_fm_off }, |
| 9419 | { ARRAY_SIZE(v20_bt_off_fm_on), v20_bt_off_fm_on } |
| 9420 | }, |
| 9421 | { |
| 9422 | { ARRAY_SIZE(v10_bt_on), v10_bt_on }, |
| 9423 | { ARRAY_SIZE(v20_bt_on_fm_off), v20_bt_on_fm_off }, |
| 9424 | { ARRAY_SIZE(v20_bt_on_fm_on), v20_bt_on_fm_on } |
| 9425 | } |
| 9426 | }; |
| 9427 | |
| 9428 | u8 offset = 0; /* index into bahama configs */ |
| 9429 | |
| 9430 | on = on ? 1 : 0; |
| 9431 | version = read_bahama_ver(); |
| 9432 | |
| 9433 | if (version == VER_UNSUPPORTED) { |
| 9434 | dev_err(&msm_bt_power_device.dev, |
| 9435 | "%s: unsupported version\n", |
| 9436 | __func__); |
| 9437 | return -EIO; |
| 9438 | } |
| 9439 | |
| 9440 | if (version == VER_2_0) { |
| 9441 | if (marimba_get_fm_status(&config)) |
| 9442 | offset = 0x01; |
| 9443 | } |
| 9444 | |
| 9445 | /* Voting off 1.3V S2 Regulator,BahamaV2 used in Normal mode */ |
| 9446 | if (on && (version == VER_2_0)) { |
| 9447 | for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) { |
| 9448 | if ((!strcmp(bt_regs_info[i].name, "8058_s2")) |
| 9449 | && (bt_regs_status[i].enabled == true)) { |
| 9450 | if (regulator_disable(bt_regs[i])) { |
| 9451 | dev_err(&msm_bt_power_device.dev, |
| 9452 | "%s: regulator disable failed", |
| 9453 | __func__); |
| 9454 | } |
| 9455 | bt_regs_status[i].enabled = false; |
| 9456 | break; |
| 9457 | } |
| 9458 | } |
| 9459 | } |
| 9460 | |
| 9461 | p = bt_bahama[on][version + offset].set; |
| 9462 | |
| 9463 | dev_info(&msm_bt_power_device.dev, |
| 9464 | "%s: found version %d\n", __func__, version); |
| 9465 | |
| 9466 | for (i = 0; i < bt_bahama[on][version + offset].size; i++) { |
| 9467 | u8 value = (p+i)->value; |
| 9468 | rc = marimba_write_bit_mask(&config, |
| 9469 | (p+i)->reg, |
| 9470 | &value, |
| 9471 | sizeof((p+i)->value), |
| 9472 | (p+i)->mask); |
| 9473 | if (rc < 0) { |
| 9474 | dev_err(&msm_bt_power_device.dev, |
| 9475 | "%s: reg %d write failed: %d\n", |
| 9476 | __func__, (p+i)->reg, rc); |
| 9477 | return rc; |
| 9478 | } |
| 9479 | dev_dbg(&msm_bt_power_device.dev, |
| 9480 | "%s: reg 0x%02x write value 0x%02x mask 0x%02x\n", |
| 9481 | __func__, (p+i)->reg, |
| 9482 | value, (p+i)->mask); |
| 9483 | } |
| 9484 | /* Update BT Status */ |
| 9485 | if (on) |
| 9486 | marimba_set_bt_status(&config, true); |
| 9487 | else |
| 9488 | marimba_set_bt_status(&config, false); |
| 9489 | |
| 9490 | return 0; |
| 9491 | } |
| 9492 | |
| 9493 | static int bluetooth_use_regulators(int on) |
| 9494 | { |
| 9495 | int i, recover = -1, rc = 0; |
| 9496 | |
| 9497 | for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) { |
| 9498 | bt_regs[i] = on ? regulator_get(&msm_bt_power_device.dev, |
| 9499 | bt_regs_info[i].name) : |
| 9500 | (regulator_put(bt_regs[i]), NULL); |
| 9501 | if (IS_ERR(bt_regs[i])) { |
| 9502 | rc = PTR_ERR(bt_regs[i]); |
| 9503 | dev_err(&msm_bt_power_device.dev, |
| 9504 | "regulator %s get failed (%d)\n", |
| 9505 | bt_regs_info[i].name, rc); |
| 9506 | recover = i - 1; |
| 9507 | bt_regs[i] = NULL; |
| 9508 | break; |
| 9509 | } |
| 9510 | |
| 9511 | if (!on) |
| 9512 | continue; |
| 9513 | |
| 9514 | rc = regulator_set_voltage(bt_regs[i], |
| 9515 | bt_regs_info[i].vmin, |
| 9516 | bt_regs_info[i].vmax); |
| 9517 | if (rc < 0) { |
| 9518 | dev_err(&msm_bt_power_device.dev, |
| 9519 | "regulator %s voltage set (%d)\n", |
| 9520 | bt_regs_info[i].name, rc); |
| 9521 | recover = i; |
| 9522 | break; |
| 9523 | } |
| 9524 | } |
| 9525 | |
| 9526 | if (on && (recover > -1)) |
| 9527 | for (i = recover; i >= 0; i--) { |
| 9528 | regulator_put(bt_regs[i]); |
| 9529 | bt_regs[i] = NULL; |
| 9530 | } |
| 9531 | |
| 9532 | return rc; |
| 9533 | } |
| 9534 | |
| 9535 | static int bluetooth_switch_regulators(int on) |
| 9536 | { |
| 9537 | int i, rc = 0; |
| 9538 | |
| 9539 | for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) { |
| 9540 | if (on && (bt_regs_status[i].enabled == false)) { |
| 9541 | rc = regulator_enable(bt_regs[i]); |
| 9542 | if (rc < 0) { |
| 9543 | dev_err(&msm_bt_power_device.dev, |
| 9544 | "regulator %s %s failed (%d)\n", |
| 9545 | bt_regs_info[i].name, |
| 9546 | "enable", rc); |
| 9547 | if (i > 0) { |
| 9548 | while (--i) { |
| 9549 | regulator_disable(bt_regs[i]); |
| 9550 | bt_regs_status[i].enabled |
| 9551 | = false; |
| 9552 | } |
| 9553 | break; |
| 9554 | } |
| 9555 | } |
| 9556 | bt_regs_status[i].enabled = true; |
| 9557 | } else if (!on && (bt_regs_status[i].enabled == true)) { |
| 9558 | rc = regulator_disable(bt_regs[i]); |
| 9559 | if (rc < 0) { |
| 9560 | dev_err(&msm_bt_power_device.dev, |
| 9561 | "regulator %s %s failed (%d)\n", |
| 9562 | bt_regs_info[i].name, |
| 9563 | "disable", rc); |
| 9564 | break; |
| 9565 | } |
| 9566 | bt_regs_status[i].enabled = false; |
| 9567 | } |
| 9568 | } |
| 9569 | return rc; |
| 9570 | } |
| 9571 | |
| 9572 | static struct msm_xo_voter *bt_clock; |
| 9573 | |
| 9574 | static int bluetooth_power(int on) |
| 9575 | { |
| 9576 | int rc = 0; |
| 9577 | int id; |
| 9578 | |
| 9579 | /* In case probe function fails, cur_connv_type would be -1 */ |
| 9580 | id = adie_get_detected_connectivity_type(); |
| 9581 | if (id != BAHAMA_ID) { |
| 9582 | pr_err("%s: unexpected adie connectivity type: %d\n", |
| 9583 | __func__, id); |
| 9584 | return -ENODEV; |
| 9585 | } |
| 9586 | |
| 9587 | if (on) { |
| 9588 | |
| 9589 | rc = bluetooth_use_regulators(1); |
| 9590 | if (rc < 0) |
| 9591 | goto out; |
| 9592 | |
| 9593 | rc = bluetooth_switch_regulators(1); |
| 9594 | |
| 9595 | if (rc < 0) |
| 9596 | goto fail_put; |
| 9597 | |
| 9598 | bt_clock = msm_xo_get(MSM_XO_TCXO_D0, "bt_power"); |
| 9599 | |
| 9600 | if (IS_ERR(bt_clock)) { |
| 9601 | pr_err("Couldn't get TCXO_D0 voter\n"); |
| 9602 | goto fail_switch; |
| 9603 | } |
| 9604 | |
| 9605 | rc = msm_xo_mode_vote(bt_clock, MSM_XO_MODE_ON); |
| 9606 | |
| 9607 | if (rc < 0) { |
| 9608 | pr_err("Failed to vote for TCXO_DO ON\n"); |
| 9609 | goto fail_vote; |
| 9610 | } |
| 9611 | |
| 9612 | rc = bahama_bt(1); |
| 9613 | |
| 9614 | if (rc < 0) |
| 9615 | goto fail_clock; |
| 9616 | |
| 9617 | msleep(10); |
| 9618 | |
| 9619 | rc = msm_xo_mode_vote(bt_clock, MSM_XO_MODE_PIN_CTRL); |
| 9620 | |
| 9621 | if (rc < 0) { |
| 9622 | pr_err("Failed to vote for TCXO_DO pin control\n"); |
| 9623 | goto fail_vote; |
| 9624 | } |
| 9625 | } else { |
| 9626 | /* check for initial RFKILL block (power off) */ |
| 9627 | /* some RFKILL versions/configurations rfkill_register */ |
| 9628 | /* calls here for an initial set_block */ |
| 9629 | /* avoid calling i2c and regulator before unblock (on) */ |
| 9630 | if (platform_get_drvdata(&msm_bt_power_device) == NULL) { |
| 9631 | dev_info(&msm_bt_power_device.dev, |
| 9632 | "%s: initialized OFF/blocked\n", __func__); |
| 9633 | goto out; |
| 9634 | } |
| 9635 | |
| 9636 | bahama_bt(0); |
| 9637 | |
| 9638 | fail_clock: |
| 9639 | msm_xo_mode_vote(bt_clock, MSM_XO_MODE_OFF); |
| 9640 | fail_vote: |
| 9641 | msm_xo_put(bt_clock); |
| 9642 | fail_switch: |
| 9643 | bluetooth_switch_regulators(0); |
| 9644 | fail_put: |
| 9645 | bluetooth_use_regulators(0); |
| 9646 | } |
| 9647 | |
| 9648 | out: |
| 9649 | if (rc < 0) |
| 9650 | on = 0; |
| 9651 | dev_info(&msm_bt_power_device.dev, |
| 9652 | "Bluetooth power switch: state %d result %d\n", on, rc); |
| 9653 | |
| 9654 | return rc; |
| 9655 | } |
| 9656 | |
| 9657 | #endif /*CONFIG_MARIMBA_CORE, CONFIG_MSM_BT_POWER, CONFIG_MSM_BT_POWER_MODULE*/ |
| 9658 | |
| 9659 | static void __init msm8x60_cfg_smsc911x(void) |
| 9660 | { |
| 9661 | smsc911x_resources[1].start = |
| 9662 | PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 6); |
| 9663 | smsc911x_resources[1].end = |
| 9664 | PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 6); |
| 9665 | } |
| 9666 | |
| 9667 | #ifdef CONFIG_MSM_RPM |
| 9668 | static struct msm_rpm_platform_data msm_rpm_data = { |
| 9669 | .reg_base_addrs = { |
| 9670 | [MSM_RPM_PAGE_STATUS] = MSM_RPM_BASE, |
| 9671 | [MSM_RPM_PAGE_CTRL] = MSM_RPM_BASE + 0x400, |
| 9672 | [MSM_RPM_PAGE_REQ] = MSM_RPM_BASE + 0x600, |
| 9673 | [MSM_RPM_PAGE_ACK] = MSM_RPM_BASE + 0xa00, |
| 9674 | }, |
| 9675 | |
| 9676 | .irq_ack = RPM_SCSS_CPU0_GP_HIGH_IRQ, |
| 9677 | .irq_err = RPM_SCSS_CPU0_GP_LOW_IRQ, |
| 9678 | .irq_vmpm = RPM_SCSS_CPU0_GP_MEDIUM_IRQ, |
| 9679 | .msm_apps_ipc_rpm_reg = MSM_GCC_BASE + 0x008, |
| 9680 | .msm_apps_ipc_rpm_val = 4, |
| 9681 | }; |
| 9682 | #endif |
| 9683 | |
| 9684 | struct msm_board_data { |
| 9685 | struct msm_gpiomux_configs *gpiomux_cfgs; |
| 9686 | }; |
| 9687 | |
| 9688 | static struct msm_board_data msm8x60_rumi3_board_data __initdata = { |
| 9689 | .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs, |
| 9690 | }; |
| 9691 | |
| 9692 | static struct msm_board_data msm8x60_sim_board_data __initdata = { |
| 9693 | .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs, |
| 9694 | }; |
| 9695 | |
| 9696 | static struct msm_board_data msm8x60_surf_board_data __initdata = { |
| 9697 | .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs, |
| 9698 | }; |
| 9699 | |
| 9700 | static struct msm_board_data msm8x60_ffa_board_data __initdata = { |
| 9701 | .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs, |
| 9702 | }; |
| 9703 | |
| 9704 | static struct msm_board_data msm8x60_fluid_board_data __initdata = { |
| 9705 | .gpiomux_cfgs = msm8x60_fluid_gpiomux_cfgs, |
| 9706 | }; |
| 9707 | |
| 9708 | static struct msm_board_data msm8x60_charm_surf_board_data __initdata = { |
| 9709 | .gpiomux_cfgs = msm8x60_charm_gpiomux_cfgs, |
| 9710 | }; |
| 9711 | |
| 9712 | static struct msm_board_data msm8x60_charm_ffa_board_data __initdata = { |
| 9713 | .gpiomux_cfgs = msm8x60_charm_gpiomux_cfgs, |
| 9714 | }; |
| 9715 | |
Zhang Chang Ken | ef05b17 | 2011-07-27 15:28:13 -0400 | [diff] [blame] | 9716 | static struct msm_board_data msm8x60_dragon_board_data __initdata = { |
| 9717 | .gpiomux_cfgs = msm8x60_dragon_gpiomux_cfgs, |
| 9718 | }; |
| 9719 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 9720 | static void __init msm8x60_init(struct msm_board_data *board_data) |
| 9721 | { |
| 9722 | uint32_t soc_platform_version; |
| 9723 | |
| 9724 | /* |
| 9725 | * Initialize RPM first as other drivers and devices may need |
| 9726 | * it for their initialization. |
| 9727 | */ |
| 9728 | #ifdef CONFIG_MSM_RPM |
| 9729 | BUG_ON(msm_rpm_init(&msm_rpm_data)); |
| 9730 | #endif |
| 9731 | BUG_ON(msm_rpmrs_levels_init(msm_rpmrs_levels, |
| 9732 | ARRAY_SIZE(msm_rpmrs_levels))); |
| 9733 | if (msm_xo_init()) |
| 9734 | pr_err("Failed to initialize XO votes\n"); |
| 9735 | |
| 9736 | if (socinfo_init() < 0) |
| 9737 | printk(KERN_ERR "%s: socinfo_init() failed!\n", |
| 9738 | __func__); |
| 9739 | msm8x60_check_2d_hardware(); |
| 9740 | |
| 9741 | /* Change SPM handling of core 1 if PMM 8160 is present. */ |
| 9742 | soc_platform_version = socinfo_get_platform_version(); |
| 9743 | if (SOCINFO_VERSION_MAJOR(soc_platform_version) == 1 && |
| 9744 | SOCINFO_VERSION_MINOR(soc_platform_version) >= 2) { |
| 9745 | struct msm_spm_platform_data *spm_data; |
| 9746 | |
| 9747 | spm_data = &msm_spm_data_v1[1]; |
| 9748 | spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] &= ~0x0F00UL; |
| 9749 | spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] |= 0x0100UL; |
| 9750 | |
| 9751 | spm_data = &msm_spm_data[1]; |
| 9752 | spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] &= ~0x0F00UL; |
| 9753 | spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] |= 0x0100UL; |
| 9754 | } |
| 9755 | |
| 9756 | /* |
| 9757 | * Initialize SPM before acpuclock as the latter calls into SPM |
| 9758 | * driver to set ACPU voltages. |
| 9759 | */ |
| 9760 | if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 1) |
| 9761 | msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data)); |
| 9762 | else |
| 9763 | msm_spm_init(msm_spm_data_v1, ARRAY_SIZE(msm_spm_data_v1)); |
| 9764 | |
| 9765 | /* |
| 9766 | * Set regulators 8901_l4 and 8901_l6 to be always on in HPM for SURF |
| 9767 | * devices so that the RPM doesn't drop into a low power mode that an |
| 9768 | * un-reworked SURF cannot resume from. |
| 9769 | */ |
| 9770 | if (machine_is_msm8x60_surf()) { |
| 9771 | rpm_vreg_init_pdata[RPM_VREG_ID_PM8901_L4] |
| 9772 | .init_data.constraints.always_on = 1; |
| 9773 | rpm_vreg_init_pdata[RPM_VREG_ID_PM8901_L6] |
| 9774 | .init_data.constraints.always_on = 1; |
| 9775 | } |
| 9776 | |
| 9777 | /* |
| 9778 | * Disable regulator info printing so that regulator registration |
| 9779 | * messages do not enter the kmsg log. |
| 9780 | */ |
| 9781 | regulator_suppress_info_printing(); |
| 9782 | |
| 9783 | /* Initialize regulators needed for clock_init. */ |
| 9784 | platform_add_devices(early_regulators, ARRAY_SIZE(early_regulators)); |
| 9785 | |
| 9786 | msm8660_clock_init(); |
| 9787 | |
| 9788 | /* Buses need to be initialized before early-device registration |
| 9789 | * to get the platform data for fabrics. |
| 9790 | */ |
| 9791 | msm8x60_init_buses(); |
| 9792 | platform_add_devices(early_devices, ARRAY_SIZE(early_devices)); |
| 9793 | /* CPU frequency control is not supported on simulated targets. */ |
| 9794 | if (!machine_is_msm8x60_rumi3() && !machine_is_msm8x60_sim()) |
| 9795 | msm_acpu_clock_init(&msm8x60_acpu_clock_data); |
| 9796 | |
| 9797 | /* No EBI2 on 8660 charm targets */ |
| 9798 | if (!machine_is_msm8x60_fusion() && !machine_is_msm8x60_fusn_ffa()) |
| 9799 | msm8x60_init_ebi2(); |
| 9800 | msm8x60_init_tlmm(); |
| 9801 | msm8x60_init_gpiomux(board_data->gpiomux_cfgs); |
| 9802 | msm8x60_init_uart12dm(); |
| 9803 | msm8x60_init_mmc(); |
| 9804 | |
| 9805 | #if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE) |
| 9806 | msm8x60_init_pm8058_othc(); |
| 9807 | #endif |
| 9808 | |
| 9809 | if (machine_is_msm8x60_fluid()) { |
| 9810 | pm8058_platform_data.sub_devices[PM8058_SUBDEV_KPD]. |
| 9811 | platform_data = &fluid_keypad_data; |
| 9812 | pm8058_platform_data.sub_devices[PM8058_SUBDEV_KPD].pdata_size |
| 9813 | = sizeof(fluid_keypad_data); |
Zhang Chang Ken | 683be17 | 2011-08-10 17:45:34 -0400 | [diff] [blame] | 9814 | } else if (machine_is_msm8x60_dragon()) { |
| 9815 | pm8058_platform_data.sub_devices[PM8058_SUBDEV_KPD]. |
| 9816 | platform_data = &dragon_keypad_data; |
| 9817 | pm8058_platform_data.sub_devices[PM8058_SUBDEV_KPD].pdata_size |
| 9818 | = sizeof(dragon_keypad_data); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 9819 | } else { |
| 9820 | pm8058_platform_data.sub_devices[PM8058_SUBDEV_KPD]. |
| 9821 | platform_data = &ffa_keypad_data; |
| 9822 | pm8058_platform_data.sub_devices[PM8058_SUBDEV_KPD].pdata_size |
| 9823 | = sizeof(ffa_keypad_data); |
| 9824 | |
| 9825 | } |
| 9826 | |
| 9827 | /* Disable END_CALL simulation function of powerkey on fluid */ |
| 9828 | if (machine_is_msm8x60_fluid()) { |
| 9829 | pwrkey_pdata.pwrkey_time_ms = 0; |
| 9830 | } |
| 9831 | |
| 9832 | if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() || |
| 9833 | machine_is_msm8x60_fluid() || machine_is_msm8x60_fusion() || |
Zhang Chang Ken | 6baadf0 | 2011-08-05 09:48:15 -0400 | [diff] [blame] | 9834 | machine_is_msm8x60_fusn_ffa() || machine_is_msm8x60_dragon()) { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 9835 | msm8x60_cfg_smsc911x(); |
| 9836 | if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 1) |
| 9837 | platform_add_devices(msm_footswitch_devices, |
| 9838 | msm_num_footswitch_devices); |
| 9839 | platform_add_devices(surf_devices, |
| 9840 | ARRAY_SIZE(surf_devices)); |
| 9841 | |
| 9842 | #ifdef CONFIG_MSM_DSPS |
| 9843 | if (machine_is_msm8x60_fluid()) { |
| 9844 | platform_device_unregister(&msm_gsbi12_qup_i2c_device); |
| 9845 | msm8x60_init_dsps(); |
| 9846 | } |
| 9847 | #endif |
| 9848 | |
| 9849 | #ifdef CONFIG_USB_EHCI_MSM_72K |
| 9850 | /* |
| 9851 | * Drive MPP2 pin HIGH for PHY to generate ID interrupts on 8660 |
| 9852 | * fluid |
| 9853 | */ |
| 9854 | if (machine_is_msm8x60_fluid()) { |
| 9855 | pm8901_mpp_config_digital_out(1, |
| 9856 | PM8901_MPP_DIG_LEVEL_L5, 1); |
| 9857 | } |
| 9858 | msm_add_host(0, &msm_usb_host_pdata); |
| 9859 | #endif |
| 9860 | } else { |
| 9861 | msm8x60_configure_smc91x(); |
| 9862 | platform_add_devices(rumi_sim_devices, |
| 9863 | ARRAY_SIZE(rumi_sim_devices)); |
| 9864 | } |
| 9865 | #if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE) |
Zhang Chang Ken | 6baadf0 | 2011-08-05 09:48:15 -0400 | [diff] [blame] | 9866 | if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() || |
| 9867 | machine_is_msm8x60_dragon()) |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 9868 | msm8x60_cfg_isp1763(); |
| 9869 | #endif |
| 9870 | #ifdef CONFIG_BATTERY_MSM8X60 |
| 9871 | if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() || |
Zhang Chang Ken | 6baadf0 | 2011-08-05 09:48:15 -0400 | [diff] [blame] | 9872 | machine_is_msm8x60_fusion() || machine_is_msm8x60_dragon() || |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 9873 | machine_is_msm8x60_fusn_ffa() || machine_is_msm8x60_fluid()) |
| 9874 | platform_device_register(&msm_charger_device); |
| 9875 | #endif |
| 9876 | |
| 9877 | if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) |
| 9878 | platform_add_devices(charm_devices, ARRAY_SIZE(charm_devices)); |
| 9879 | |
| 9880 | if (!machine_is_msm8x60_fluid()) |
| 9881 | pm8058_platform_data.charger_sub_device |
| 9882 | = &pm8058_charger_sub_dev; |
| 9883 | |
| 9884 | #if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE) |
| 9885 | if (machine_is_msm8x60_fluid()) |
| 9886 | platform_device_register(&msm_gsbi10_qup_spi_device); |
| 9887 | else |
| 9888 | platform_device_register(&msm_gsbi1_qup_spi_device); |
| 9889 | #endif |
| 9890 | |
| 9891 | #if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \ |
| 9892 | defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE) |
| 9893 | if (machine_is_msm8x60_fluid()) |
| 9894 | cyttsp_set_params(); |
| 9895 | #endif |
| 9896 | if (!machine_is_msm8x60_sim()) |
| 9897 | msm_fb_add_devices(); |
| 9898 | fixup_i2c_configs(); |
| 9899 | register_i2c_devices(); |
| 9900 | |
| 9901 | platform_device_register(&smsc911x_device); |
| 9902 | |
| 9903 | #if (defined(CONFIG_SPI_QUP)) && \ |
| 9904 | (defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \ |
| 9905 | defined(CONFIG_FB_MSM_LCDC_AUO_WVGA)) |
| 9906 | |
| 9907 | if (machine_is_msm8x60_fluid()) { |
| 9908 | #ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT |
| 9909 | if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3) { |
| 9910 | spi_register_board_info(lcdc_samsung_spi_board_info, |
| 9911 | ARRAY_SIZE(lcdc_samsung_spi_board_info)); |
| 9912 | } else |
| 9913 | #endif |
| 9914 | { |
| 9915 | #ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA |
| 9916 | spi_register_board_info(lcdc_auo_spi_board_info, |
| 9917 | ARRAY_SIZE(lcdc_auo_spi_board_info)); |
| 9918 | #endif |
| 9919 | } |
| 9920 | } |
| 9921 | #endif |
| 9922 | |
| 9923 | msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data)); |
| 9924 | msm_pm_set_rpm_wakeup_irq(RPM_SCSS_CPU0_WAKE_UP_IRQ); |
| 9925 | msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates), |
| 9926 | msm_pm_data); |
| 9927 | |
| 9928 | #ifdef CONFIG_SENSORS_MSM_ADC |
| 9929 | if (machine_is_msm8x60_fluid()) { |
| 9930 | msm_adc_pdata.dev_names = msm_adc_fluid_device_names; |
| 9931 | msm_adc_pdata.num_adc = ARRAY_SIZE(msm_adc_fluid_device_names); |
| 9932 | if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3) |
| 9933 | msm_adc_pdata.gpio_config = APROC_CONFIG; |
| 9934 | else |
| 9935 | msm_adc_pdata.gpio_config = MPROC_CONFIG; |
| 9936 | } |
| 9937 | msm_adc_pdata.target_hw = MSM_8x60; |
| 9938 | #endif |
| 9939 | #ifdef CONFIG_MSM8X60_AUDIO |
| 9940 | msm_snddev_init(); |
| 9941 | #endif |
| 9942 | #if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE) |
| 9943 | if (machine_is_msm8x60_fluid()) |
| 9944 | platform_device_register(&fluid_leds_gpio); |
| 9945 | else |
| 9946 | platform_device_register(&gpio_leds); |
| 9947 | #endif |
| 9948 | |
| 9949 | /* configure pmic leds */ |
| 9950 | if (machine_is_msm8x60_fluid()) { |
| 9951 | pm8058_platform_data.sub_devices[PM8058_SUBDEV_LED]. |
| 9952 | platform_data = &pm8058_fluid_flash_leds_data; |
| 9953 | pm8058_platform_data.sub_devices[PM8058_SUBDEV_LED].pdata_size |
| 9954 | = sizeof(pm8058_fluid_flash_leds_data); |
Terence Hampson | c0b6dfb | 2011-07-15 11:07:17 -0400 | [diff] [blame] | 9955 | } else if (machine_is_msm8x60_dragon()) { |
| 9956 | pm8058_platform_data.sub_devices[PM8058_SUBDEV_LED]. |
| 9957 | platform_data = &pm8058_dragon_leds_data; |
| 9958 | pm8058_platform_data.sub_devices[PM8058_SUBDEV_LED].pdata_size |
| 9959 | = sizeof(pm8058_dragon_leds_data); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 9960 | } else { |
| 9961 | pm8058_platform_data.sub_devices[PM8058_SUBDEV_LED]. |
| 9962 | platform_data = &pm8058_flash_leds_data; |
| 9963 | pm8058_platform_data.sub_devices[PM8058_SUBDEV_LED].pdata_size |
| 9964 | = sizeof(pm8058_flash_leds_data); |
| 9965 | } |
| 9966 | |
Zhang Chang Ken | 6baadf0 | 2011-08-05 09:48:15 -0400 | [diff] [blame] | 9967 | if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa() || |
| 9968 | machine_is_msm8x60_dragon()) { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 9969 | pm8058_platform_data.sub_devices[PM8058_SUBDEV_VIB]. |
| 9970 | platform_data = &pmic_vib_pdata; |
| 9971 | pm8058_platform_data.sub_devices[PM8058_SUBDEV_VIB]. |
| 9972 | pdata_size = sizeof(pmic_vib_pdata); |
| 9973 | } |
| 9974 | |
| 9975 | msm8x60_multi_sdio_init(); |
| 9976 | } |
| 9977 | |
| 9978 | static void __init msm8x60_rumi3_init(void) |
| 9979 | { |
| 9980 | msm8x60_init(&msm8x60_rumi3_board_data); |
| 9981 | } |
| 9982 | |
| 9983 | static void __init msm8x60_sim_init(void) |
| 9984 | { |
| 9985 | msm8x60_init(&msm8x60_sim_board_data); |
| 9986 | } |
| 9987 | |
| 9988 | static void __init msm8x60_surf_init(void) |
| 9989 | { |
| 9990 | msm8x60_init(&msm8x60_surf_board_data); |
| 9991 | } |
| 9992 | |
| 9993 | static void __init msm8x60_ffa_init(void) |
| 9994 | { |
| 9995 | msm8x60_init(&msm8x60_ffa_board_data); |
| 9996 | } |
| 9997 | |
| 9998 | static void __init msm8x60_fluid_init(void) |
| 9999 | { |
| 10000 | msm8x60_init(&msm8x60_fluid_board_data); |
| 10001 | } |
| 10002 | |
| 10003 | static void __init msm8x60_charm_surf_init(void) |
| 10004 | { |
| 10005 | msm8x60_init(&msm8x60_charm_surf_board_data); |
| 10006 | } |
| 10007 | |
| 10008 | static void __init msm8x60_charm_ffa_init(void) |
| 10009 | { |
| 10010 | msm8x60_init(&msm8x60_charm_ffa_board_data); |
| 10011 | } |
| 10012 | |
| 10013 | static void __init msm8x60_charm_init_early(void) |
| 10014 | { |
| 10015 | msm8x60_allocate_memory_regions(); |
Steve Muckle | a55df6e | 2010-01-07 12:43:24 -0800 | [diff] [blame] | 10016 | } |
| 10017 | |
Zhang Chang Ken | ef05b17 | 2011-07-27 15:28:13 -0400 | [diff] [blame] | 10018 | static void __init msm8x60_dragon_init(void) |
| 10019 | { |
| 10020 | msm8x60_init(&msm8x60_dragon_board_data); |
| 10021 | } |
| 10022 | |
Steve Muckle | a55df6e | 2010-01-07 12:43:24 -0800 | [diff] [blame] | 10023 | MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3") |
| 10024 | .map_io = msm8x60_map_io, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 10025 | .reserve = msm8x60_reserve, |
Steve Muckle | a55df6e | 2010-01-07 12:43:24 -0800 | [diff] [blame] | 10026 | .init_irq = msm8x60_init_irq, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 10027 | .init_machine = msm8x60_rumi3_init, |
Steve Muckle | a55df6e | 2010-01-07 12:43:24 -0800 | [diff] [blame] | 10028 | .timer = &msm_timer, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 10029 | .init_early = msm8x60_charm_init_early, |
Steve Muckle | 49b76f7 | 2010-03-19 17:00:08 -0700 | [diff] [blame] | 10030 | MACHINE_END |
Steve Muckle | 57bbf1c | 2010-01-07 12:51:10 -0800 | [diff] [blame] | 10031 | |
| 10032 | MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR") |
| 10033 | .map_io = msm8x60_map_io, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 10034 | .reserve = msm8x60_reserve, |
Steve Muckle | 57bbf1c | 2010-01-07 12:51:10 -0800 | [diff] [blame] | 10035 | .init_irq = msm8x60_init_irq, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 10036 | .init_machine = msm8x60_sim_init, |
Steve Muckle | 57bbf1c | 2010-01-07 12:51:10 -0800 | [diff] [blame] | 10037 | .timer = &msm_timer, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 10038 | .init_early = msm8x60_charm_init_early, |
| 10039 | MACHINE_END |
| 10040 | |
| 10041 | MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF") |
| 10042 | .map_io = msm8x60_map_io, |
| 10043 | .reserve = msm8x60_reserve, |
| 10044 | .init_irq = msm8x60_init_irq, |
| 10045 | .init_machine = msm8x60_surf_init, |
| 10046 | .timer = &msm_timer, |
| 10047 | .init_early = msm8x60_charm_init_early, |
Steve Muckle | 57bbf1c | 2010-01-07 12:51:10 -0800 | [diff] [blame] | 10048 | MACHINE_END |
Gregory Bean | 69b7f6f | 2010-04-04 22:29:02 -0700 | [diff] [blame] | 10049 | |
| 10050 | MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA") |
| 10051 | .map_io = msm8x60_map_io, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 10052 | .reserve = msm8x60_reserve, |
Gregory Bean | 69b7f6f | 2010-04-04 22:29:02 -0700 | [diff] [blame] | 10053 | .init_irq = msm8x60_init_irq, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 10054 | .init_machine = msm8x60_ffa_init, |
Gregory Bean | 69b7f6f | 2010-04-04 22:29:02 -0700 | [diff] [blame] | 10055 | .timer = &msm_timer, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 10056 | .init_early = msm8x60_charm_init_early, |
| 10057 | MACHINE_END |
| 10058 | |
| 10059 | MACHINE_START(MSM8X60_FLUID, "QCT MSM8X60 FLUID") |
| 10060 | .map_io = msm8x60_map_io, |
| 10061 | .reserve = msm8x60_reserve, |
| 10062 | .init_irq = msm8x60_init_irq, |
| 10063 | .init_machine = msm8x60_fluid_init, |
| 10064 | .timer = &msm_timer, |
| 10065 | .init_early = msm8x60_charm_init_early, |
| 10066 | MACHINE_END |
| 10067 | |
| 10068 | MACHINE_START(MSM8X60_FUSION, "QCT MSM8X60 FUSION SURF") |
| 10069 | .map_io = msm8x60_map_io, |
| 10070 | .reserve = msm8x60_reserve, |
| 10071 | .init_irq = msm8x60_init_irq, |
| 10072 | .init_machine = msm8x60_charm_surf_init, |
| 10073 | .timer = &msm_timer, |
| 10074 | .init_early = msm8x60_charm_init_early, |
| 10075 | MACHINE_END |
| 10076 | |
| 10077 | MACHINE_START(MSM8X60_FUSN_FFA, "QCT MSM8X60 FUSION FFA") |
| 10078 | .map_io = msm8x60_map_io, |
| 10079 | .reserve = msm8x60_reserve, |
| 10080 | .init_irq = msm8x60_init_irq, |
| 10081 | .init_machine = msm8x60_charm_ffa_init, |
| 10082 | .timer = &msm_timer, |
| 10083 | .init_early = msm8x60_charm_init_early, |
Gregory Bean | 69b7f6f | 2010-04-04 22:29:02 -0700 | [diff] [blame] | 10084 | MACHINE_END |
Zhang Chang Ken | ef05b17 | 2011-07-27 15:28:13 -0400 | [diff] [blame] | 10085 | |
| 10086 | MACHINE_START(MSM8X60_DRAGON, "QCT MSM8X60 DRAGON") |
| 10087 | .map_io = msm8x60_map_io, |
| 10088 | .reserve = msm8x60_reserve, |
| 10089 | .init_irq = msm8x60_init_irq, |
| 10090 | .init_machine = msm8x60_dragon_init, |
| 10091 | .timer = &msm_timer, |
| 10092 | .init_early = msm8x60_charm_init_early, |
| 10093 | MACHINE_END |