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Michael Bueschef1a6282008-08-27 18:53:02 +02001#ifndef LINUX_B43_PHY_COMMON_H_
2#define LINUX_B43_PHY_COMMON_H_
3
Johannes Bergf41f3f32009-06-07 12:30:34 -05004#include <linux/types.h>
Michael Bueschef1a6282008-08-27 18:53:02 +02005
6struct b43_wldev;
7
Rafał Miłecki98650452010-01-25 18:59:59 +01008/* Complex number using 2 32-bit signed integers */
9struct b43_c32 { s32 i, q; };
Michael Bueschef1a6282008-08-27 18:53:02 +020010
11/* PHY register routing bits */
12#define B43_PHYROUTE 0x0C00 /* PHY register routing bits mask */
13#define B43_PHYROUTE_BASE 0x0000 /* Base registers */
14#define B43_PHYROUTE_OFDM_GPHY 0x0400 /* OFDM register routing for G-PHYs */
15#define B43_PHYROUTE_EXT_GPHY 0x0800 /* Extended G-PHY registers */
16#define B43_PHYROUTE_N_BMODE 0x0C00 /* N-PHY BMODE registers */
17
18/* CCK (B-PHY) registers. */
19#define B43_PHY_CCK(reg) ((reg) | B43_PHYROUTE_BASE)
20/* N-PHY registers. */
21#define B43_PHY_N(reg) ((reg) | B43_PHYROUTE_BASE)
22/* N-PHY BMODE registers. */
23#define B43_PHY_N_BMODE(reg) ((reg) | B43_PHYROUTE_N_BMODE)
24/* OFDM (A-PHY) registers. */
25#define B43_PHY_OFDM(reg) ((reg) | B43_PHYROUTE_OFDM_GPHY)
26/* Extended G-PHY registers. */
27#define B43_PHY_EXTG(reg) ((reg) | B43_PHYROUTE_EXT_GPHY)
28
29
30/* Masks for the PHY versioning registers. */
31#define B43_PHYVER_ANALOG 0xF000
32#define B43_PHYVER_ANALOG_SHIFT 12
33#define B43_PHYVER_TYPE 0x0F00
34#define B43_PHYVER_TYPE_SHIFT 8
35#define B43_PHYVER_VERSION 0x00FF
36
37/**
38 * enum b43_interference_mitigation - Interference Mitigation mode
39 *
40 * @B43_INTERFMODE_NONE: Disabled
41 * @B43_INTERFMODE_NONWLAN: Non-WLAN Interference Mitigation
42 * @B43_INTERFMODE_MANUALWLAN: WLAN Interference Mitigation
43 * @B43_INTERFMODE_AUTOWLAN: Automatic WLAN Interference Mitigation
44 */
45enum b43_interference_mitigation {
46 B43_INTERFMODE_NONE,
47 B43_INTERFMODE_NONWLAN,
48 B43_INTERFMODE_MANUALWLAN,
49 B43_INTERFMODE_AUTOWLAN,
50};
51
52/* Antenna identifiers */
53enum {
Gábor Stefanik64e368b2009-08-27 22:49:49 +020054 B43_ANTENNA0 = 0, /* Antenna 0 */
55 B43_ANTENNA1 = 1, /* Antenna 1 */
56 B43_ANTENNA_AUTO0 = 2, /* Automatic, starting with antenna 0 */
57 B43_ANTENNA_AUTO1 = 3, /* Automatic, starting with antenna 1 */
58 B43_ANTENNA2 = 4,
Michael Bueschef1a6282008-08-27 18:53:02 +020059 B43_ANTENNA3 = 8,
60
61 B43_ANTENNA_AUTO = B43_ANTENNA_AUTO0,
62 B43_ANTENNA_DEFAULT = B43_ANTENNA_AUTO,
63};
64
65/**
Michael Buesch18c8ade2008-08-28 19:33:40 +020066 * enum b43_txpwr_result - Return value for the recalc_txpower PHY op.
67 *
68 * @B43_TXPWR_RES_NEED_ADJUST: Values changed. Hardware adjustment is needed.
69 * @B43_TXPWR_RES_DONE: No more work to do. Everything is done.
70 */
71enum b43_txpwr_result {
72 B43_TXPWR_RES_NEED_ADJUST,
73 B43_TXPWR_RES_DONE,
74};
75
76/**
Michael Bueschef1a6282008-08-27 18:53:02 +020077 * struct b43_phy_operations - Function pointers for PHY ops.
78 *
Michael Bueschfb111372008-09-02 13:00:34 +020079 * @allocate: Allocate and initialise the PHY data structures.
80 * Must not be NULL.
81 * @free: Destroy and free the PHY data structures.
82 * Must not be NULL.
83 *
84 * @prepare_structs: Prepare the PHY data structures.
85 * The data structures allocated in @allocate are
86 * initialized here.
87 * Must not be NULL.
88 * @prepare_hardware: Prepare the PHY. This is called before b43_chip_init to
89 * do some early early PHY hardware init.
Michael Bueschef1a6282008-08-27 18:53:02 +020090 * Can be NULL, if not required.
91 * @init: Initialize the PHY.
92 * Must not be NULL.
Michael Bueschfb111372008-09-02 13:00:34 +020093 * @exit: Shutdown the PHY.
Michael Bueschef1a6282008-08-27 18:53:02 +020094 * Can be NULL, if not required.
95 *
96 * @phy_read: Read from a PHY register.
97 * Must not be NULL.
98 * @phy_write: Write to a PHY register.
99 * Must not be NULL.
Gábor Stefanik68ec5322009-08-26 20:51:25 +0200100 * @phy_maskset: Maskset a PHY register, taking shortcuts.
101 * If it is NULL, a generic algorithm is used.
Michael Bueschef1a6282008-08-27 18:53:02 +0200102 * @radio_read: Read from a Radio register.
103 * Must not be NULL.
104 * @radio_write: Write to a Radio register.
105 * Must not be NULL.
106 *
107 * @supports_hwpctl: Returns a boolean whether Hardware Power Control
108 * is supported or not.
109 * If NULL, hwpctl is assumed to be never supported.
110 * @software_rfkill: Turn the radio ON or OFF.
111 * Possible state values are
112 * RFKILL_STATE_SOFT_BLOCKED or
113 * RFKILL_STATE_UNBLOCKED
114 * Must not be NULL.
Michael Bueschcb24f572008-09-03 12:12:20 +0200115 * @switch_analog: Turn the Analog on/off.
116 * Must not be NULL.
Michael Bueschef1a6282008-08-27 18:53:02 +0200117 * @switch_channel: Switch the radio to another channel.
118 * Must not be NULL.
119 * @get_default_chan: Just returns the default channel number.
120 * Must not be NULL.
121 * @set_rx_antenna: Set the antenna used for RX.
122 * Can be NULL, if not supported.
123 * @interf_mitigation: Switch the Interference Mitigation mode.
124 * Can be NULL, if not supported.
125 *
Michael Buesch18c8ade2008-08-28 19:33:40 +0200126 * @recalc_txpower: Recalculate the transmission power parameters.
127 * This callback has to recalculate the TX power settings,
128 * but does not need to write them to the hardware, yet.
129 * Returns enum b43_txpwr_result to indicate whether the hardware
130 * needs to be adjusted.
131 * If B43_TXPWR_NEED_ADJUST is returned, @adjust_txpower
132 * will be called later.
133 * If the parameter "ignore_tssi" is true, the TSSI values should
134 * be ignored and a recalculation of the power settings should be
135 * done even if the TSSI values did not change.
Michael Buesch36dbd952009-09-04 22:51:29 +0200136 * This function may sleep, but should not.
Michael Bueschef1a6282008-08-27 18:53:02 +0200137 * Must not be NULL.
Michael Buesch18c8ade2008-08-28 19:33:40 +0200138 * @adjust_txpower: Write the previously calculated TX power settings
139 * (from @recalc_txpower) to the hardware.
140 * This function may sleep.
141 * Can be NULL, if (and ONLY if) @recalc_txpower _always_
142 * returns B43_TXPWR_RES_DONE.
Michael Bueschef1a6282008-08-27 18:53:02 +0200143 *
144 * @pwork_15sec: Periodic work. Called every 15 seconds.
145 * Can be NULL, if not required.
146 * @pwork_60sec: Periodic work. Called every 60 seconds.
147 * Can be NULL, if not required.
148 */
149struct b43_phy_operations {
150 /* Initialisation */
151 int (*allocate)(struct b43_wldev *dev);
Michael Bueschfb111372008-09-02 13:00:34 +0200152 void (*free)(struct b43_wldev *dev);
153 void (*prepare_structs)(struct b43_wldev *dev);
154 int (*prepare_hardware)(struct b43_wldev *dev);
Michael Bueschef1a6282008-08-27 18:53:02 +0200155 int (*init)(struct b43_wldev *dev);
156 void (*exit)(struct b43_wldev *dev);
157
158 /* Register access */
159 u16 (*phy_read)(struct b43_wldev *dev, u16 reg);
160 void (*phy_write)(struct b43_wldev *dev, u16 reg, u16 value);
Gábor Stefanik68ec5322009-08-26 20:51:25 +0200161 void (*phy_maskset)(struct b43_wldev *dev, u16 reg, u16 mask, u16 set);
Michael Bueschef1a6282008-08-27 18:53:02 +0200162 u16 (*radio_read)(struct b43_wldev *dev, u16 reg);
163 void (*radio_write)(struct b43_wldev *dev, u16 reg, u16 value);
164
165 /* Radio */
166 bool (*supports_hwpctl)(struct b43_wldev *dev);
Johannes Berg19d337d2009-06-02 13:01:37 +0200167 void (*software_rfkill)(struct b43_wldev *dev, bool blocked);
Michael Bueschcb24f572008-09-03 12:12:20 +0200168 void (*switch_analog)(struct b43_wldev *dev, bool on);
Michael Bueschef1a6282008-08-27 18:53:02 +0200169 int (*switch_channel)(struct b43_wldev *dev, unsigned int new_channel);
170 unsigned int (*get_default_chan)(struct b43_wldev *dev);
171 void (*set_rx_antenna)(struct b43_wldev *dev, int antenna);
172 int (*interf_mitigation)(struct b43_wldev *dev,
173 enum b43_interference_mitigation new_mode);
174
175 /* Transmission power adjustment */
Michael Buesch18c8ade2008-08-28 19:33:40 +0200176 enum b43_txpwr_result (*recalc_txpower)(struct b43_wldev *dev,
177 bool ignore_tssi);
178 void (*adjust_txpower)(struct b43_wldev *dev);
Michael Bueschef1a6282008-08-27 18:53:02 +0200179
180 /* Misc */
181 void (*pwork_15sec)(struct b43_wldev *dev);
182 void (*pwork_60sec)(struct b43_wldev *dev);
183};
184
185struct b43_phy_a;
186struct b43_phy_g;
187struct b43_phy_n;
Michael Buesche63e4362008-08-30 10:55:48 +0200188struct b43_phy_lp;
Michael Bueschef1a6282008-08-27 18:53:02 +0200189
190struct b43_phy {
191 /* Hardware operation callbacks. */
192 const struct b43_phy_operations *ops;
193
194 /* Most hardware context information is stored in the standard-
195 * specific data structures pointed to by the pointers below.
196 * Only one of them is valid (the currently enabled PHY). */
197#ifdef CONFIG_B43_DEBUG
198 /* No union for debug build to force NULL derefs in buggy code. */
199 struct {
200#else
201 union {
202#endif
203 /* A-PHY specific information */
204 struct b43_phy_a *a;
205 /* G-PHY specific information */
206 struct b43_phy_g *g;
207 /* N-PHY specific information */
208 struct b43_phy_n *n;
Michael Buesche63e4362008-08-30 10:55:48 +0200209 /* LP-PHY specific information */
210 struct b43_phy_lp *lp;
Michael Bueschef1a6282008-08-27 18:53:02 +0200211 };
212
213 /* Band support flags. */
214 bool supports_2ghz;
215 bool supports_5ghz;
216
Rafał Miłeckiaa4c7b22010-01-22 01:53:12 +0100217 /* HT info */
218 bool is_40mhz;
219
Michael Bueschef1a6282008-08-27 18:53:02 +0200220 /* GMODE bit enabled? */
221 bool gmode;
222
223 /* Analog Type */
224 u8 analog;
225 /* B43_PHYTYPE_ */
226 u8 type;
227 /* PHY revision number. */
228 u8 rev;
229
230 /* Radio versioning */
231 u16 radio_manuf; /* Radio manufacturer */
232 u16 radio_ver; /* Radio version */
233 u8 radio_rev; /* Radio revision */
234
235 /* Software state of the radio */
236 bool radio_on;
237
238 /* Desired TX power level (in dBm).
239 * This is set by the user and adjusted in b43_phy_xmitpower(). */
Michael Buesch18c8ade2008-08-28 19:33:40 +0200240 int desired_txpower;
Michael Bueschef1a6282008-08-27 18:53:02 +0200241
242 /* Hardware Power Control enabled? */
243 bool hardware_power_control;
244
Michael Buesch18c8ade2008-08-28 19:33:40 +0200245 /* The time (in absolute jiffies) when the next TX power output
246 * check is needed. */
247 unsigned long next_txpwr_check_time;
248
Michael Bueschef1a6282008-08-27 18:53:02 +0200249 /* current channel */
250 unsigned int channel;
251
252 /* PHY TX errors counter. */
253 atomic_t txerr_cnt;
254
255#ifdef CONFIG_B43_DEBUG
Michael Buesch591f3dc2009-03-31 12:27:32 +0200256 /* PHY registers locked (w.r.t. firmware) */
Michael Bueschef1a6282008-08-27 18:53:02 +0200257 bool phy_locked;
Michael Buesch591f3dc2009-03-31 12:27:32 +0200258 /* Radio registers locked (w.r.t. firmware) */
259 bool radio_locked;
Michael Bueschef1a6282008-08-27 18:53:02 +0200260#endif /* B43_DEBUG */
261};
262
263
264/**
Michael Bueschfb111372008-09-02 13:00:34 +0200265 * b43_phy_allocate - Allocate PHY structs
266 * Allocate the PHY data structures, based on the current dev->phy.type
Michael Bueschef1a6282008-08-27 18:53:02 +0200267 */
Michael Bueschfb111372008-09-02 13:00:34 +0200268int b43_phy_allocate(struct b43_wldev *dev);
269
270/**
271 * b43_phy_free - Free PHY structs
272 */
273void b43_phy_free(struct b43_wldev *dev);
Michael Bueschef1a6282008-08-27 18:53:02 +0200274
275/**
276 * b43_phy_init - Initialise the PHY
277 */
278int b43_phy_init(struct b43_wldev *dev);
279
280/**
281 * b43_phy_exit - Cleanup PHY
282 */
283void b43_phy_exit(struct b43_wldev *dev);
284
285/**
286 * b43_has_hardware_pctl - Hardware Power Control supported?
287 * Returns a boolean, whether hardware power control is supported.
288 */
289bool b43_has_hardware_pctl(struct b43_wldev *dev);
290
291/**
292 * b43_phy_read - 16bit PHY register read access
293 */
294u16 b43_phy_read(struct b43_wldev *dev, u16 reg);
295
296/**
297 * b43_phy_write - 16bit PHY register write access
298 */
299void b43_phy_write(struct b43_wldev *dev, u16 reg, u16 value);
300
301/**
Gábor Stefanik738f0f42009-08-03 01:28:12 +0200302 * b43_phy_copy - copy contents of 16bit PHY register to another
303 */
304void b43_phy_copy(struct b43_wldev *dev, u16 destreg, u16 srcreg);
305
306/**
Michael Bueschef1a6282008-08-27 18:53:02 +0200307 * b43_phy_mask - Mask a PHY register with a mask
308 */
309void b43_phy_mask(struct b43_wldev *dev, u16 offset, u16 mask);
310
311/**
312 * b43_phy_set - OR a PHY register with a bitmap
313 */
314void b43_phy_set(struct b43_wldev *dev, u16 offset, u16 set);
315
316/**
317 * b43_phy_maskset - Mask and OR a PHY register with a mask and bitmap
318 */
319void b43_phy_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set);
320
321/**
322 * b43_radio_read - 16bit Radio register read access
323 */
324u16 b43_radio_read(struct b43_wldev *dev, u16 reg);
325#define b43_radio_read16 b43_radio_read /* DEPRECATED */
326
327/**
328 * b43_radio_write - 16bit Radio register write access
329 */
330void b43_radio_write(struct b43_wldev *dev, u16 reg, u16 value);
331#define b43_radio_write16 b43_radio_write /* DEPRECATED */
332
333/**
334 * b43_radio_mask - Mask a 16bit radio register with a mask
335 */
336void b43_radio_mask(struct b43_wldev *dev, u16 offset, u16 mask);
337
338/**
339 * b43_radio_set - OR a 16bit radio register with a bitmap
340 */
341void b43_radio_set(struct b43_wldev *dev, u16 offset, u16 set);
342
343/**
344 * b43_radio_maskset - Mask and OR a radio register with a mask and bitmap
345 */
346void b43_radio_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set);
347
348/**
349 * b43_radio_lock - Lock firmware radio register access
350 */
351void b43_radio_lock(struct b43_wldev *dev);
352
353/**
354 * b43_radio_unlock - Unlock firmware radio register access
355 */
356void b43_radio_unlock(struct b43_wldev *dev);
357
358/**
359 * b43_phy_lock - Lock firmware PHY register access
360 */
361void b43_phy_lock(struct b43_wldev *dev);
362
363/**
364 * b43_phy_unlock - Unlock firmware PHY register access
365 */
366void b43_phy_unlock(struct b43_wldev *dev);
367
368/**
369 * b43_switch_channel - Switch to another channel
370 */
371int b43_switch_channel(struct b43_wldev *dev, unsigned int new_channel);
372/**
373 * B43_DEFAULT_CHANNEL - Switch to the default channel.
374 */
375#define B43_DEFAULT_CHANNEL UINT_MAX
376
377/**
378 * b43_software_rfkill - Turn the radio ON or OFF in software.
379 */
Johannes Berg19d337d2009-06-02 13:01:37 +0200380void b43_software_rfkill(struct b43_wldev *dev, bool blocked);
Michael Bueschef1a6282008-08-27 18:53:02 +0200381
Michael Buesch18c8ade2008-08-28 19:33:40 +0200382/**
383 * b43_phy_txpower_check - Check TX power output.
384 *
385 * Compare the current TX power output to the desired power emission
386 * and schedule an adjustment in case it mismatches.
Michael Buesch18c8ade2008-08-28 19:33:40 +0200387 *
388 * @flags: OR'ed enum b43_phy_txpower_check_flags flags.
389 * See the docs below.
390 */
391void b43_phy_txpower_check(struct b43_wldev *dev, unsigned int flags);
392/**
393 * enum b43_phy_txpower_check_flags - Flags for b43_phy_txpower_check()
394 *
395 * @B43_TXPWR_IGNORE_TIME: Ignore the schedule time and force-redo
396 * the check now.
397 * @B43_TXPWR_IGNORE_TSSI: Redo the recalculation, even if the average
398 * TSSI did not change.
399 */
400enum b43_phy_txpower_check_flags {
401 B43_TXPWR_IGNORE_TIME = (1 << 0),
402 B43_TXPWR_IGNORE_TSSI = (1 << 1),
403};
404
405struct work_struct;
406void b43_phy_txpower_adjust_work(struct work_struct *work);
407
408/**
409 * b43_phy_shm_tssi_read - Read the average of the last 4 TSSI from SHM.
410 *
411 * @shm_offset: The SHM address to read the values from.
412 *
413 * Returns the average of the 4 TSSI values, or a negative error code.
414 */
415int b43_phy_shm_tssi_read(struct b43_wldev *dev, u16 shm_offset);
416
Michael Bueschcb24f572008-09-03 12:12:20 +0200417/**
418 * b43_phy_switch_analog_generic - Generic PHY operation for switching the Analog.
419 *
420 * It does the switching based on the PHY0 core register.
421 * Do _not_ call this directly. Only use it as a switch_analog callback
422 * for struct b43_phy_operations.
423 */
424void b43_phyop_switch_analog_generic(struct b43_wldev *dev, bool on);
425
Rafał Miłecki98650452010-01-25 18:59:59 +0100426struct b43_c32 b43_cordic(int theta);
Michael Buesch18c8ade2008-08-28 19:33:40 +0200427
Michael Bueschef1a6282008-08-27 18:53:02 +0200428#endif /* LINUX_B43_PHY_COMMON_H_ */