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gerrit-public.fairphone.software / kernel / msm / 990e01ebfa12d7b4fcdad619a006fd25de461293 / . / arch / arm / boot / dts / msm8974-gpu.dtsi
blob: a7544abb63da3913e2fb9bbc7161f570d38d7028 [file] [log] [blame]
Vladimir Razgulin20df89c2012-12-19 15:16:47 -0700[diff] [blame]1/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Pu Chen1335e872012-08-01 08:45:25 -0600[diff] [blame]2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12/ {
Jordan Crousec13e9e92013-01-29 10:13:36 -0700[diff] [blame]13 msm_gpu: qcom,kgsl-3d0@fdb00000 {
Pu Chen1335e872012-08-01 08:45:25 -0600[diff] [blame]14 label = "kgsl-3d0";
15 compatible = "qcom,kgsl-3d0", "qcom,kgsl-3d";
Harsh Vardhan Dwivedi623b9a22012-10-28 20:54:17 -0600[diff] [blame]16 reg = <0xfdb00000 0x10000
17 0xfdb20000 0x10000>;
18 reg-names = "kgsl_3d0_reg_memory" , "kgsl_3d0_shader_memory";
Pu Chen1335e872012-08-01 08:45:25 -0600[diff] [blame]19 interrupts = <0 33 0>;
20 interrupt-names = "kgsl_3d0_irq";
21 qcom,id = <0>;
22
23 qcom,chipid = <0x03030000>;
24
Lucille Sylvester395e6ce2013-01-18 17:09:02 -0700[diff] [blame]25 qcom,initial-pwrlevel = <2>;
26 qcom,step-pwrlevel = <2>;
Pu Chen1335e872012-08-01 08:45:25 -0600[diff] [blame]27
Vladimir Razgulin20df89c2012-12-19 15:16:47 -0700[diff] [blame]28 qcom,idle-timeout = <8>; //<HZ/12>
Pu Chen1335e872012-08-01 08:45:25 -0600[diff] [blame]29 qcom,nap-allowed = <1>;
Harsh Vardhan Dwivedi41588242012-08-29 18:49:57 -0600[diff] [blame]30 qcom,strtstp-sleepwake;
Harsh Vardhan Dwivedicb067ec2012-10-08 16:41:10 -0600[diff] [blame]31 qcom,clk-map = <0x0000006>; //KGSL_CLK_CORE | KGSL_CLK_IFACE
Pu Chen1335e872012-08-01 08:45:25 -0600[diff] [blame]32
33 /* Bus Scale Settings */
Gagan Macb2372ae2012-08-20 19:24:32 -0600[diff] [blame]34 qcom,msm-bus,name = "grp3d";
Lucille Sylvester395e6ce2013-01-18 17:09:02 -0700[diff] [blame]35 qcom,msm-bus,num-cases = <6>;
Gagan Macb2372ae2012-08-20 19:24:32 -0600[diff] [blame]36 qcom,msm-bus,active-only = <0>;
37 qcom,msm-bus,num-paths = <2>;
38 qcom,msm-bus,vectors-KBps =
39 <26 512 0 0>, <89 604 0 0>,
Lucille Sylvesterd3938cd2013-01-23 17:08:11 -0700[diff] [blame]40 <26 512 0 2200000>, <89 604 0 3000000>,
Lucille Sylvester395e6ce2013-01-18 17:09:02 -0700[diff] [blame]41 <26 512 0 4000000>, <89 604 0 3000000>,
Lucille Sylvesterfa9bbae2012-12-05 16:04:59 -0700[diff] [blame]42 <26 512 0 4000000>, <89 604 0 4500000>,
Lucille Sylvester395e6ce2013-01-18 17:09:02 -0700[diff] [blame]43 <26 512 0 6400000>, <89 604 0 4500000>,
Gagan Macb2372ae2012-08-20 19:24:32 -0600[diff] [blame]44 <26 512 0 6400000>, <89 604 0 7600000>;
Pu Chen1335e872012-08-01 08:45:25 -0600[diff] [blame]45
46 /* GDSC oxili regulators */
47 vddcx-supply = <&gdsc_oxili_cx>;
48 vdd-supply = <&gdsc_oxili_gx>;
49
50 /* Power levels */
51
52 /* IOMMU Data */
53 iommu = <&kgsl_iommu>;
54
55 qcom,gpu-pwrlevels {
56 #address-cells = <1>;
57 #size-cells = <0>;
58
59 compatible = "qcom,gpu-pwrlevels";
60
61 qcom,gpu-pwrlevel@0 {
62 reg = <0>;
Alex Wongcadb9e42012-09-07 21:50:07 -0700[diff] [blame]63 qcom,gpu-freq = <450000000>;
Lucille Sylvester395e6ce2013-01-18 17:09:02 -0700[diff] [blame]64 qcom,bus-freq = <5>;
Lucille Sylvester0186d352013-03-11 11:31:17 -0600[diff] [blame]65 qcom,io-fraction = <33>;
Pu Chen1335e872012-08-01 08:45:25 -0600[diff] [blame]66 };
67
68 qcom,gpu-pwrlevel@1 {
69 reg = <1>;
Alex Wongcadb9e42012-09-07 21:50:07 -0700[diff] [blame]70 qcom,gpu-freq = <300000000>;
Lucille Sylvester395e6ce2013-01-18 17:09:02 -0700[diff] [blame]71 qcom,bus-freq = <4>;
Lucille Sylvester0186d352013-03-11 11:31:17 -0600[diff] [blame]72 qcom,io-fraction = <66>;
Pu Chen1335e872012-08-01 08:45:25 -0600[diff] [blame]73 };
74
75 qcom,gpu-pwrlevel@2 {
76 reg = <2>;
Lucille Sylvester395e6ce2013-01-18 17:09:02 -0700[diff] [blame]77 qcom,gpu-freq = <300000000>;
78 qcom,bus-freq = <3>;
Lucille Sylvester0186d352013-03-11 11:31:17 -0600[diff] [blame]79 qcom,io-fraction = <66>;
Lucille Sylvester395e6ce2013-01-18 17:09:02 -0700[diff] [blame]80 };
81
82 qcom,gpu-pwrlevel@3 {
83 reg = <3>;
84 qcom,gpu-freq = <200000000>;
85 qcom,bus-freq = <2>;
86 qcom,io-fraction = <100>;
87 };
88
89 qcom,gpu-pwrlevel@4 {
90 reg = <4>;
Pu Chen1335e872012-08-01 08:45:25 -0600[diff] [blame]91 qcom,gpu-freq = <200000000>;
92 qcom,bus-freq = <1>;
93 qcom,io-fraction = <100>;
94 };
95
Lucille Sylvester395e6ce2013-01-18 17:09:02 -0700[diff] [blame]96 qcom,gpu-pwrlevel@5 {
97 reg = <5>;
Pu Chen1335e872012-08-01 08:45:25 -0600[diff] [blame]98 qcom,gpu-freq = <27000000>;
99 qcom,bus-freq = <0>;
100 qcom,io-fraction = <0>;
101 };
102 };
103
104 qcom,dcvs-core-info {
105 #address-cells = <1>;
106 #size-cells = <0>;
107
108 compatible = "qcom,dcvs-core-info";
109
Abhijeet Dharmapurikarfc7dca42012-08-26 18:27:53 -0700[diff] [blame]110 qcom,num-cores = <1>;
111 qcom,sensors = <0>;
112
Abhijeet Dharmapurikar44451662012-08-23 18:58:44 -0700[diff] [blame]113 qcom,core-core-type = <1>;
114
115 qcom,algo-disable-pc-threshold = <0>;
116 qcom,algo-em-win-size-min-us = <100000>;
117 qcom,algo-em-win-size-max-us = <300000>;
Pu Chen1335e872012-08-01 08:45:25 -0600[diff] [blame]118 qcom,algo-em-max-util-pct = <97>;
Abhijeet Dharmapurikar44451662012-08-23 18:58:44 -0700[diff] [blame]119 qcom,algo-group-id = <95>;
120 qcom,algo-max-freq-chg-time-us = <100000>;
121 qcom,algo-slack-mode-dynamic = <100000>;
122 qcom,algo-slack-weight-thresh-pct = <0>;
123 qcom,algo-slack-time-min-us = <39000>;
124 qcom,algo-slack-time-max-us = <39000>;
125 qcom,algo-ss-win-size-min-us = <1000000>;
126 qcom,algo-ss-win-size-max-us = <1000000>;
127 qcom,algo-ss-util-pct = <95>;
Steve Mucklee8c6d612012-12-06 14:31:00 -0800[diff] [blame]128 qcom,algo-ss-no-corr-below-freq = <0>;
Pu Chen1335e872012-08-01 08:45:25 -0600[diff] [blame]129
Abhijeet Dharmapurikar44451662012-08-23 18:58:44 -0700[diff] [blame]130 qcom,energy-active-coeff-a = <2492>;
131 qcom,energy-active-coeff-b = <0>;
132 qcom,energy-active-coeff-c = <0>;
133 qcom,energy-leakage-coeff-a = <11>;
134 qcom,energy-leakage-coeff-b = <157150>;
135 qcom,energy-leakage-coeff-c = <0>;
136 qcom,energy-leakage-coeff-d = <0>;
137
138 qcom,power-current-temp = <25>;
139 qcom,power-num-freq = <4>;
140
Pu Chen1335e872012-08-01 08:45:25 -0600[diff] [blame]141 qcom,dcvs-freq@0 {
142 reg = <0>;
143 qcom,freq = <0>;
Abhijeet Dharmapurikar44451662012-08-23 18:58:44 -0700[diff] [blame]144 qcom,voltage = <0>;
145 qcom,is_trans_level = <0>;
146 qcom,active-energy-offset = <100>;
147 qcom,leakage-energy-offset = <0>;
Pu Chen1335e872012-08-01 08:45:25 -0600[diff] [blame]148 };
149
150 qcom,dcvs-freq@1 {
151 reg = <1>;
152 qcom,freq = <0>;
Abhijeet Dharmapurikar44451662012-08-23 18:58:44 -0700[diff] [blame]153 qcom,voltage = <0>;
154 qcom,is_trans_level = <0>;
155 qcom,active-energy-offset = <100>;
156 qcom,leakage-energy-offset = <0>;
Pu Chen1335e872012-08-01 08:45:25 -0600[diff] [blame]157 };
158
159 qcom,dcvs-freq@2 {
160 reg = <2>;
161 qcom,freq = <0>;
Abhijeet Dharmapurikar44451662012-08-23 18:58:44 -0700[diff] [blame]162 qcom,voltage = <0>;
163 qcom,is_trans_level = <0>;
164 qcom,active-energy-offset = <100>;
165 qcom,leakage-energy-offset = <0>;
Pu Chen1335e872012-08-01 08:45:25 -0600[diff] [blame]166 };
167
168 qcom,dcvs-freq@3 {
169 reg = <3>;
170 qcom,freq = <0>;
Abhijeet Dharmapurikar44451662012-08-23 18:58:44 -0700[diff] [blame]171 qcom,voltage = <0>;
172 qcom,is_trans_level = <0>;
173 qcom,active-energy-offset = <844545>;
174 qcom,leakage-energy-offset = <0>;
Pu Chen1335e872012-08-01 08:45:25 -0600[diff] [blame]175 };
176 };
177
178 };
179};