Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 1 | /* |
Kumar Gala | 4c8d3d9 | 2005-11-13 16:06:30 -0800 | [diff] [blame] | 2 | * Modifications by Kumar Gala (galak@kernel.crashing.org) to support |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 3 | * E500 Book E processors. |
| 4 | * |
| 5 | * Copyright 2004 Freescale Semiconductor, Inc |
| 6 | * |
| 7 | * This file contains the routines for initializing the MMU |
| 8 | * on the 4xx series of chips. |
| 9 | * -- paulus |
| 10 | * |
| 11 | * Derived from arch/ppc/mm/init.c: |
| 12 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) |
| 13 | * |
| 14 | * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au) |
| 15 | * and Cort Dougan (PReP) (cort@cs.nmt.edu) |
| 16 | * Copyright (C) 1996 Paul Mackerras |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 17 | * |
| 18 | * Derived from "arch/i386/mm/init.c" |
| 19 | * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds |
| 20 | * |
| 21 | * This program is free software; you can redistribute it and/or |
| 22 | * modify it under the terms of the GNU General Public License |
| 23 | * as published by the Free Software Foundation; either version |
| 24 | * 2 of the License, or (at your option) any later version. |
| 25 | * |
| 26 | */ |
| 27 | |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 28 | #include <linux/signal.h> |
| 29 | #include <linux/sched.h> |
| 30 | #include <linux/kernel.h> |
| 31 | #include <linux/errno.h> |
| 32 | #include <linux/string.h> |
| 33 | #include <linux/types.h> |
| 34 | #include <linux/ptrace.h> |
| 35 | #include <linux/mman.h> |
| 36 | #include <linux/mm.h> |
| 37 | #include <linux/swap.h> |
| 38 | #include <linux/stddef.h> |
| 39 | #include <linux/vmalloc.h> |
| 40 | #include <linux/init.h> |
| 41 | #include <linux/delay.h> |
| 42 | #include <linux/highmem.h> |
| 43 | |
| 44 | #include <asm/pgalloc.h> |
| 45 | #include <asm/prom.h> |
| 46 | #include <asm/io.h> |
| 47 | #include <asm/mmu_context.h> |
| 48 | #include <asm/pgtable.h> |
| 49 | #include <asm/mmu.h> |
| 50 | #include <asm/uaccess.h> |
| 51 | #include <asm/smp.h> |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 52 | #include <asm/machdep.h> |
| 53 | #include <asm/setup.h> |
| 54 | |
Kumar Gala | 99c62dd | 2008-04-16 05:52:21 +1000 | [diff] [blame] | 55 | #include "mmu_decl.h" |
| 56 | |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 57 | unsigned int tlbcam_index; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 58 | |
Kumar Gala | 8b27f0b | 2009-10-15 12:49:01 -0500 | [diff] [blame] | 59 | #define NUM_TLBCAMS (64) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 60 | |
Trent Piepho | 9605146 | 2008-12-08 19:34:58 -0800 | [diff] [blame] | 61 | #if defined(CONFIG_LOWMEM_CAM_NUM_BOOL) && (CONFIG_LOWMEM_CAM_NUM >= NUM_TLBCAMS) |
| 62 | #error "LOWMEM_CAM_NUM must be less than NUM_TLBCAMS" |
| 63 | #endif |
| 64 | |
Kumar Gala | 8b27f0b | 2009-10-15 12:49:01 -0500 | [diff] [blame] | 65 | struct tlbcam { |
| 66 | u32 MAS0; |
| 67 | u32 MAS1; |
| 68 | unsigned long MAS2; |
| 69 | u32 MAS3; |
| 70 | u32 MAS7; |
| 71 | } TLBCAM[NUM_TLBCAMS]; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 72 | |
| 73 | struct tlbcamrange { |
Kumar Gala | 8b27f0b | 2009-10-15 12:49:01 -0500 | [diff] [blame] | 74 | unsigned long start; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 75 | unsigned long limit; |
| 76 | phys_addr_t phys; |
| 77 | } tlbcam_addrs[NUM_TLBCAMS]; |
| 78 | |
| 79 | extern unsigned int tlbcam_index; |
| 80 | |
Kumar Gala | 8b27f0b | 2009-10-15 12:49:01 -0500 | [diff] [blame] | 81 | unsigned long tlbcam_sz(int idx) |
| 82 | { |
| 83 | return tlbcam_addrs[idx].limit - tlbcam_addrs[idx].start + 1; |
| 84 | } |
| 85 | |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 86 | /* |
| 87 | * Return PA for this VA if it is mapped by a CAM, or 0 |
| 88 | */ |
Kumar Gala | 6c24b17 | 2009-02-09 21:08:07 -0600 | [diff] [blame] | 89 | phys_addr_t v_mapped_by_tlbcam(unsigned long va) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 90 | { |
| 91 | int b; |
| 92 | for (b = 0; b < tlbcam_index; ++b) |
| 93 | if (va >= tlbcam_addrs[b].start && va < tlbcam_addrs[b].limit) |
| 94 | return tlbcam_addrs[b].phys + (va - tlbcam_addrs[b].start); |
| 95 | return 0; |
| 96 | } |
| 97 | |
| 98 | /* |
| 99 | * Return VA for a given PA or 0 if not mapped |
| 100 | */ |
Kumar Gala | 6c24b17 | 2009-02-09 21:08:07 -0600 | [diff] [blame] | 101 | unsigned long p_mapped_by_tlbcam(phys_addr_t pa) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 102 | { |
| 103 | int b; |
| 104 | for (b = 0; b < tlbcam_index; ++b) |
| 105 | if (pa >= tlbcam_addrs[b].phys |
Kumar Gala | 8b27f0b | 2009-10-15 12:49:01 -0500 | [diff] [blame] | 106 | && pa < (tlbcam_addrs[b].limit-tlbcam_addrs[b].start) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 107 | +tlbcam_addrs[b].phys) |
| 108 | return tlbcam_addrs[b].start+(pa-tlbcam_addrs[b].phys); |
| 109 | return 0; |
| 110 | } |
| 111 | |
Kumar Gala | 8b27f0b | 2009-10-15 12:49:01 -0500 | [diff] [blame] | 112 | void loadcam_entry(int idx) |
| 113 | { |
| 114 | mtspr(SPRN_MAS0, TLBCAM[idx].MAS0); |
| 115 | mtspr(SPRN_MAS1, TLBCAM[idx].MAS1); |
| 116 | mtspr(SPRN_MAS2, TLBCAM[idx].MAS2); |
| 117 | mtspr(SPRN_MAS3, TLBCAM[idx].MAS3); |
| 118 | |
| 119 | if (cur_cpu_spec->cpu_features & MMU_FTR_BIG_PHYS) |
| 120 | mtspr(SPRN_MAS7, TLBCAM[idx].MAS7); |
| 121 | |
| 122 | asm volatile("isync;tlbwe;isync" : : : "memory"); |
| 123 | } |
| 124 | |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 125 | /* |
| 126 | * Set up one of the I/D BAT (block address translation) register pairs. |
| 127 | * The parameters are not checked; in particular size must be a power |
| 128 | * of 4 between 4k and 256M. |
| 129 | */ |
Kumar Gala | 8b27f0b | 2009-10-15 12:49:01 -0500 | [diff] [blame] | 130 | static void settlbcam(int index, unsigned long virt, phys_addr_t phys, |
| 131 | unsigned long size, unsigned long flags, unsigned int pid) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 132 | { |
| 133 | unsigned int tsize, lz; |
| 134 | |
Kumar Gala | 8b27f0b | 2009-10-15 12:49:01 -0500 | [diff] [blame] | 135 | asm (PPC_CNTLZL "%0,%1" : "=r" (lz) : "r" (size)); |
Kumar Gala | d66c82e | 2009-02-10 18:10:50 -0600 | [diff] [blame] | 136 | tsize = 21 - lz; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 137 | |
| 138 | #ifdef CONFIG_SMP |
| 139 | if ((flags & _PAGE_NO_CACHE) == 0) |
| 140 | flags |= _PAGE_COHERENT; |
| 141 | #endif |
| 142 | |
| 143 | TLBCAM[index].MAS0 = MAS0_TLBSEL(1) | MAS0_ESEL(index) | MAS0_NV(index+1); |
| 144 | TLBCAM[index].MAS1 = MAS1_VALID | MAS1_IPROT | MAS1_TSIZE(tsize) | MAS1_TID(pid); |
| 145 | TLBCAM[index].MAS2 = virt & PAGE_MASK; |
| 146 | |
| 147 | TLBCAM[index].MAS2 |= (flags & _PAGE_WRITETHRU) ? MAS2_W : 0; |
| 148 | TLBCAM[index].MAS2 |= (flags & _PAGE_NO_CACHE) ? MAS2_I : 0; |
| 149 | TLBCAM[index].MAS2 |= (flags & _PAGE_COHERENT) ? MAS2_M : 0; |
| 150 | TLBCAM[index].MAS2 |= (flags & _PAGE_GUARDED) ? MAS2_G : 0; |
| 151 | TLBCAM[index].MAS2 |= (flags & _PAGE_ENDIAN) ? MAS2_E : 0; |
| 152 | |
Kumar Gala | 8b27f0b | 2009-10-15 12:49:01 -0500 | [diff] [blame] | 153 | TLBCAM[index].MAS3 = (phys & MAS3_RPN) | MAS3_SX | MAS3_SR; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 154 | TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_SW : 0); |
Kumar Gala | 8b27f0b | 2009-10-15 12:49:01 -0500 | [diff] [blame] | 155 | if (cur_cpu_spec->cpu_features & MMU_FTR_BIG_PHYS) |
| 156 | TLBCAM[index].MAS7 = (u64)phys >> 32; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 157 | |
| 158 | #ifndef CONFIG_KGDB /* want user access for breakpoints */ |
| 159 | if (flags & _PAGE_USER) { |
| 160 | TLBCAM[index].MAS3 |= MAS3_UX | MAS3_UR; |
| 161 | TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_UW : 0); |
| 162 | } |
| 163 | #else |
| 164 | TLBCAM[index].MAS3 |= MAS3_UX | MAS3_UR; |
| 165 | TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_UW : 0); |
| 166 | #endif |
| 167 | |
| 168 | tlbcam_addrs[index].start = virt; |
| 169 | tlbcam_addrs[index].limit = virt + size - 1; |
| 170 | tlbcam_addrs[index].phys = phys; |
| 171 | |
| 172 | loadcam_entry(index); |
| 173 | } |
| 174 | |
Kumar Gala | 8b27f0b | 2009-10-15 12:49:01 -0500 | [diff] [blame] | 175 | unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 176 | { |
Kumar Gala | 8b27f0b | 2009-10-15 12:49:01 -0500 | [diff] [blame] | 177 | int i; |
| 178 | unsigned long virt = PAGE_OFFSET; |
| 179 | phys_addr_t phys = memstart_addr; |
| 180 | unsigned long amount_mapped = 0; |
| 181 | unsigned long max_cam = (mfspr(SPRN_TLB1CFG) >> 16) & 0xf; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 182 | |
Kumar Gala | 8b27f0b | 2009-10-15 12:49:01 -0500 | [diff] [blame] | 183 | /* Convert (4^max) kB to (2^max) bytes */ |
| 184 | max_cam = max_cam * 2 + 10; |
| 185 | |
| 186 | /* Calculate CAM values */ |
| 187 | for (i = 0; ram && i < max_cam_idx; i++) { |
| 188 | unsigned int camsize = __ilog2(ram) & ~1U; |
| 189 | unsigned int align = __ffs(virt | phys) & ~1U; |
| 190 | unsigned long cam_sz; |
| 191 | |
| 192 | if (camsize > align) |
| 193 | camsize = align; |
| 194 | if (camsize > max_cam) |
| 195 | camsize = max_cam; |
| 196 | |
| 197 | cam_sz = 1UL << camsize; |
| 198 | settlbcam(i, virt, phys, cam_sz, PAGE_KERNEL_X, 0); |
| 199 | |
| 200 | ram -= cam_sz; |
| 201 | amount_mapped += cam_sz; |
| 202 | virt += cam_sz; |
| 203 | phys += cam_sz; |
| 204 | } |
| 205 | tlbcam_index = i; |
| 206 | |
| 207 | return amount_mapped; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 208 | } |
| 209 | |
Stephen Rothwell | ae4cec4 | 2009-12-14 09:04:24 -0700 | [diff] [blame] | 210 | unsigned long __init mmu_mapin_ram(unsigned long top) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 211 | { |
Kumar Gala | 8b27f0b | 2009-10-15 12:49:01 -0500 | [diff] [blame] | 212 | return tlbcam_addrs[tlbcam_index - 1].limit - PAGE_OFFSET + 1; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 213 | } |
| 214 | |
| 215 | /* |
| 216 | * MMU_init_hw does the chip-specific initialization of the MMU hardware. |
| 217 | */ |
| 218 | void __init MMU_init_hw(void) |
| 219 | { |
| 220 | flush_instruction_cache(); |
| 221 | } |
| 222 | |
Kumar Gala | 8b27f0b | 2009-10-15 12:49:01 -0500 | [diff] [blame] | 223 | void __init adjust_total_lowmem(void) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 224 | { |
Kumar Gala | 8b27f0b | 2009-10-15 12:49:01 -0500 | [diff] [blame] | 225 | unsigned long ram; |
Trent Piepho | f88747e | 2008-12-08 19:34:57 -0800 | [diff] [blame] | 226 | int i; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 227 | |
Trent Piepho | f88747e | 2008-12-08 19:34:57 -0800 | [diff] [blame] | 228 | /* adjust lowmem size to __max_low_memory */ |
| 229 | ram = min((phys_addr_t)__max_low_memory, (phys_addr_t)total_lowmem); |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 230 | |
Kumar Gala | 8b27f0b | 2009-10-15 12:49:01 -0500 | [diff] [blame] | 231 | __max_low_memory = map_mem_in_cams(ram, CONFIG_LOWMEM_CAM_NUM); |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 232 | |
Kumar Gala | 8b27f0b | 2009-10-15 12:49:01 -0500 | [diff] [blame] | 233 | pr_info("Memory CAM mapping: "); |
| 234 | for (i = 0; i < tlbcam_index - 1; i++) |
| 235 | pr_cont("%lu/", tlbcam_sz(i) >> 20); |
| 236 | pr_cont("%lu Mb, residual: %dMb\n", tlbcam_sz(tlbcam_index - 1) >> 20, |
Kumar Gala | 96a8bac | 2009-02-12 09:39:23 -0600 | [diff] [blame] | 237 | (unsigned int)((total_lowmem - __max_low_memory) >> 20)); |
Kumar Gala | 8b27f0b | 2009-10-15 12:49:01 -0500 | [diff] [blame] | 238 | |
Kumar Gala | 09b5e63 | 2008-04-16 05:52:25 +1000 | [diff] [blame] | 239 | __initial_memory_limit_addr = memstart_addr + __max_low_memory; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 240 | } |