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Siddartha Mohanadoss7b116e12012-06-05 23:27:46 -07001/*
Xiaozhe Shi767fdb62013-01-10 15:09:08 -08002 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Siddartha Mohanadoss7b116e12012-06-05 23:27:46 -07003 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13/*
14 * Qualcomm PMIC QPNP ADC driver header file
15 *
16 */
17
18#ifndef __QPNP_ADC_H
19#define __QPNP_ADC_H
20
21#include <linux/kernel.h>
22#include <linux/list.h>
23/**
24 * enum qpnp_vadc_channels - QPNP AMUX arbiter channels
25 */
26enum qpnp_vadc_channels {
27 USBIN = 0,
28 DCIN,
29 VCHG_SNS,
30 SPARE1_03,
Siddartha Mohanadoss2cadeba2012-11-13 18:40:27 -080031 USB_ID_MV,
Siddartha Mohanadoss7b116e12012-06-05 23:27:46 -070032 VCOIN,
33 VBAT_SNS,
34 VSYS,
35 DIE_TEMP,
36 REF_625MV,
37 REF_125V,
38 CHG_TEMP,
39 SPARE1,
40 SPARE2,
41 GND_REF,
42 VDD_VADC,
43 P_MUX1_1_1,
44 P_MUX2_1_1,
45 P_MUX3_1_1,
46 P_MUX4_1_1,
47 P_MUX5_1_1,
48 P_MUX6_1_1,
49 P_MUX7_1_1,
50 P_MUX8_1_1,
51 P_MUX9_1_1,
52 P_MUX10_1_1,
53 P_MUX11_1_1,
54 P_MUX12_1_1,
55 P_MUX13_1_1,
56 P_MUX14_1_1,
57 P_MUX15_1_1,
58 P_MUX16_1_1,
59 P_MUX1_1_3,
60 P_MUX2_1_3,
61 P_MUX3_1_3,
62 P_MUX4_1_3,
63 P_MUX5_1_3,
64 P_MUX6_1_3,
65 P_MUX7_1_3,
66 P_MUX8_1_3,
67 P_MUX9_1_3,
68 P_MUX10_1_3,
69 P_MUX11_1_3,
70 P_MUX12_1_3,
71 P_MUX13_1_3,
72 P_MUX14_1_3,
73 P_MUX15_1_3,
74 P_MUX16_1_3,
75 LR_MUX1_BATT_THERM,
76 LR_MUX2_BAT_ID,
77 LR_MUX3_XO_THERM,
78 LR_MUX4_AMUX_THM1,
79 LR_MUX5_AMUX_THM2,
80 LR_MUX6_AMUX_THM3,
81 LR_MUX7_HW_ID,
82 LR_MUX8_AMUX_THM4,
83 LR_MUX9_AMUX_THM5,
Siddartha Mohanadoss2cadeba2012-11-13 18:40:27 -080084 LR_MUX10_USB_ID_LV,
Siddartha Mohanadoss7b116e12012-06-05 23:27:46 -070085 AMUX_PU1,
86 AMUX_PU2,
87 LR_MUX3_BUF_XO_THERM_BUF,
Siddartha Mohanadoss2cadeba2012-11-13 18:40:27 -080088 LR_MUX1_PU1_BAT_THERM = 112,
89 LR_MUX2_PU1_BAT_ID = 113,
90 LR_MUX3_PU1_XO_THERM = 114,
91 LR_MUX4_PU1_AMUX_THM1 = 115,
92 LR_MUX5_PU1_AMUX_THM2 = 116,
93 LR_MUX6_PU1_AMUX_THM3 = 117,
94 LR_MUX7_PU1_AMUX_HW_ID = 118,
95 LR_MUX8_PU1_AMUX_THM4 = 119,
96 LR_MUX9_PU1_AMUX_THM5 = 120,
97 LR_MUX10_PU1_AMUX_USB_ID_LV = 121,
98 LR_MUX3_BUF_PU1_XO_THERM_BUF = 124,
99 LR_MUX1_PU2_BAT_THERM = 176,
100 LR_MUX2_PU2_BAT_ID = 177,
101 LR_MUX3_PU2_XO_THERM = 178,
102 LR_MUX4_PU2_AMUX_THM1 = 179,
103 LR_MUX5_PU2_AMUX_THM2 = 180,
104 LR_MUX6_PU2_AMUX_THM3 = 181,
105 LR_MUX7_PU2_AMUX_HW_ID = 182,
106 LR_MUX8_PU2_AMUX_THM4 = 183,
107 LR_MUX9_PU2_AMUX_THM5 = 184,
108 LR_MUX10_PU2_AMUX_USB_ID_LV = 185,
109 LR_MUX3_BUF_PU2_XO_THERM_BUF = 188,
110 LR_MUX1_PU1_PU2_BAT_THERM = 240,
111 LR_MUX2_PU1_PU2_BAT_ID = 241,
112 LR_MUX3_PU1_PU2_XO_THERM = 242,
113 LR_MUX4_PU1_PU2_AMUX_THM1 = 243,
114 LR_MUX5_PU1_PU2_AMUX_THM2 = 244,
115 LR_MUX6_PU1_PU2_AMUX_THM3 = 245,
116 LR_MUX7_PU1_PU2_AMUX_HW_ID = 246,
117 LR_MUX8_PU1_PU2_AMUX_THM4 = 247,
118 LR_MUX9_PU1_PU2_AMUX_THM5 = 248,
119 LR_MUX10_PU1_PU2_AMUX_USB_ID_LV = 249,
120 LR_MUX3_BUF_PU1_PU2_XO_THERM_BUF = 252,
121 ALL_OFF = 255,
Siddartha Mohanadoss7b116e12012-06-05 23:27:46 -0700122 ADC_MAX_NUM,
123};
124
Siddartha Mohanadossc4a6af12012-07-13 18:50:12 -0700125/**
126 * enum qpnp_iadc_channels - QPNP IADC channel list
127 */
128enum qpnp_iadc_channels {
129 INTERNAL_RSENSE = 0,
130 EXTERNAL_RSENSE,
131 ALT_LEAD_PAIR,
Siddartha Mohanadoss5e2988d2012-09-24 17:03:56 -0700132 GAIN_CALIBRATION_17P857MV,
Siddartha Mohanadossc4a6af12012-07-13 18:50:12 -0700133 OFFSET_CALIBRATION_SHORT_CADC_LEADS,
134 OFFSET_CALIBRATION_CSP_CSN,
135 OFFSET_CALIBRATION_CSP2_CSN2,
136 IADC_MUX_NUM,
137};
138
Siddartha Mohanadoss7b116e12012-06-05 23:27:46 -0700139#define QPNP_ADC_625_UV 625000
Siddartha Mohanadoss1c218312012-11-08 11:30:43 -0800140#define QPNP_ADC_HWMON_NAME_LENGTH 64
Siddartha Mohanadoss7b116e12012-06-05 23:27:46 -0700141
142/**
143 * enum qpnp_adc_decimation_type - Sampling rate supported.
144 * %DECIMATION_TYPE1: 512
145 * %DECIMATION_TYPE2: 1K
146 * %DECIMATION_TYPE3: 2K
147 * %DECIMATION_TYPE4: 4k
148 * %DECIMATION_NONE: Do not use this Sampling type.
149 *
150 * The Sampling rate is specific to each channel of the QPNP ADC arbiter.
151 */
152enum qpnp_adc_decimation_type {
153 DECIMATION_TYPE1 = 0,
154 DECIMATION_TYPE2,
155 DECIMATION_TYPE3,
156 DECIMATION_TYPE4,
157 DECIMATION_NONE,
158};
159
160/**
161 * enum qpnp_adc_calib_type - QPNP ADC Calibration type.
162 * %ADC_CALIB_ABSOLUTE: Use 625mV and 1.25V reference channels.
163 * %ADC_CALIB_RATIOMETRIC: Use reference Voltage/GND.
164 * %ADC_CALIB_CONFIG_NONE: Do not use this calibration type.
165 *
166 * Use the input reference voltage depending on the calibration type
167 * to calcluate the offset and gain parameters. The calibration is
168 * specific to each channel of the QPNP ADC.
169 */
170enum qpnp_adc_calib_type {
171 CALIB_ABSOLUTE = 0,
172 CALIB_RATIOMETRIC,
173 CALIB_NONE,
174};
175
176/**
177 * enum qpnp_adc_channel_scaling_param - pre-scaling AMUX ratio.
Siddartha Mohanadoss5ace1102012-08-20 23:18:10 -0700178 * %CHAN_PATH_SCALING0: ratio of {1, 1}
179 * %CHAN_PATH_SCALING1: ratio of {1, 3}
180 * %CHAN_PATH_SCALING2: ratio of {1, 4}
181 * %CHAN_PATH_SCALING3: ratio of {1, 6}
182 * %CHAN_PATH_SCALING4: ratio of {1, 20}
Siddartha Mohanadoss7b116e12012-06-05 23:27:46 -0700183 * %CHAN_PATH_NONE: Do not use this pre-scaling ratio type.
184 *
185 * The pre-scaling is applied for signals to be within the voltage range
186 * of the ADC.
187 */
188enum qpnp_adc_channel_scaling_param {
Siddartha Mohanadoss5ace1102012-08-20 23:18:10 -0700189 PATH_SCALING0 = 0,
190 PATH_SCALING1,
Siddartha Mohanadoss7b116e12012-06-05 23:27:46 -0700191 PATH_SCALING2,
192 PATH_SCALING3,
193 PATH_SCALING4,
194 PATH_SCALING_NONE,
195};
196
197/**
198 * enum qpnp_adc_scale_fn_type - Scaling function for pm8921 pre calibrated
199 * digital data relative to ADC reference.
200 * %ADC_SCALE_DEFAULT: Default scaling to convert raw adc code to voltage.
201 * %ADC_SCALE_BATT_THERM: Conversion to temperature based on btm parameters.
Siddartha Mohanadosse77edf12012-09-13 14:26:32 -0700202 * %ADC_SCALE_THERM_100K_PULLUP: Returns temperature in degC.
203 * Uses a mapping table with 100K pullup.
Siddartha Mohanadoss7b116e12012-06-05 23:27:46 -0700204 * %ADC_SCALE_PMIC_THERM: Returns result in milli degree's Centigrade.
Siddartha Mohanadoss7b116e12012-06-05 23:27:46 -0700205 * %ADC_SCALE_XOTHERM: Returns XO thermistor voltage in degree's Centigrade.
Siddartha Mohanadosse77edf12012-09-13 14:26:32 -0700206 * %ADC_SCALE_THERM_150K_PULLUP: Returns temperature in degC.
207 * Uses a mapping table with 150K pullup.
Siddartha Mohanadoss7b116e12012-06-05 23:27:46 -0700208 * %ADC_SCALE_NONE: Do not use this scaling type.
209 */
210enum qpnp_adc_scale_fn_type {
211 SCALE_DEFAULT = 0,
212 SCALE_BATT_THERM,
Siddartha Mohanadosse77edf12012-09-13 14:26:32 -0700213 SCALE_THERM_100K_PULLUP,
Siddartha Mohanadoss7b116e12012-06-05 23:27:46 -0700214 SCALE_PMIC_THERM,
215 SCALE_XOTHERM,
Siddartha Mohanadosse77edf12012-09-13 14:26:32 -0700216 SCALE_THERM_150K_PULLUP,
Siddartha Mohanadoss7b116e12012-06-05 23:27:46 -0700217 SCALE_NONE,
218};
219
220/**
221 * enum qpnp_adc_fast_avg_ctl - Provides ability to obtain single result
222 * from the ADC that is an average of multiple measurement
223 * samples. Select number of samples for use in fast
224 * average mode (i.e. 2 ^ value).
225 * %ADC_FAST_AVG_SAMPLE_1: 0x0 = 1
226 * %ADC_FAST_AVG_SAMPLE_2: 0x1 = 2
227 * %ADC_FAST_AVG_SAMPLE_4: 0x2 = 4
228 * %ADC_FAST_AVG_SAMPLE_8: 0x3 = 8
229 * %ADC_FAST_AVG_SAMPLE_16: 0x4 = 16
230 * %ADC_FAST_AVG_SAMPLE_32: 0x5 = 32
231 * %ADC_FAST_AVG_SAMPLE_64: 0x6 = 64
232 * %ADC_FAST_AVG_SAMPLE_128: 0x7 = 128
233 * %ADC_FAST_AVG_SAMPLE_256: 0x8 = 256
234 * %ADC_FAST_AVG_SAMPLE_512: 0x9 = 512
235 */
236enum qpnp_adc_fast_avg_ctl {
237 ADC_FAST_AVG_SAMPLE_1 = 0,
238 ADC_FAST_AVG_SAMPLE_2,
239 ADC_FAST_AVG_SAMPLE_4,
240 ADC_FAST_AVG_SAMPLE_8,
241 ADC_FAST_AVG_SAMPLE_16,
242 ADC_FAST_AVG_SAMPLE_32,
243 ADC_FAST_AVG_SAMPLE_64,
244 ADC_FAST_AVG_SAMPLE_128,
245 ADC_FAST_AVG_SAMPLE_256,
246 ADC_FAST_AVG_SAMPLE_512,
247 ADC_FAST_AVG_SAMPLE_NONE,
248};
249
250/**
251 * enum qpnp_adc_hw_settle_time - Time between AMUX getting configured and
252 * the ADC starting conversion. Delay = 100us * value for
253 * value < 11 and 2ms * (value - 10) otherwise.
254 * %ADC_CHANNEL_HW_SETTLE_DELAY_0US: 0us
255 * %ADC_CHANNEL_HW_SETTLE_DELAY_100US: 100us
256 * %ADC_CHANNEL_HW_SETTLE_DELAY_200US: 200us
257 * %ADC_CHANNEL_HW_SETTLE_DELAY_300US: 300us
258 * %ADC_CHANNEL_HW_SETTLE_DELAY_400US: 400us
259 * %ADC_CHANNEL_HW_SETTLE_DELAY_500US: 500us
260 * %ADC_CHANNEL_HW_SETTLE_DELAY_600US: 600us
261 * %ADC_CHANNEL_HW_SETTLE_DELAY_700US: 700us
262 * %ADC_CHANNEL_HW_SETTLE_DELAY_800US: 800us
263 * %ADC_CHANNEL_HW_SETTLE_DELAY_900US: 900us
264 * %ADC_CHANNEL_HW_SETTLE_DELAY_1MS: 1ms
265 * %ADC_CHANNEL_HW_SETTLE_DELAY_2MS: 2ms
266 * %ADC_CHANNEL_HW_SETTLE_DELAY_4MS: 4ms
267 * %ADC_CHANNEL_HW_SETTLE_DELAY_6MS: 6ms
268 * %ADC_CHANNEL_HW_SETTLE_DELAY_8MS: 8ms
269 * %ADC_CHANNEL_HW_SETTLE_DELAY_10MS: 10ms
270 * %ADC_CHANNEL_HW_SETTLE_NONE
271 */
272enum qpnp_adc_hw_settle_time {
273 ADC_CHANNEL_HW_SETTLE_DELAY_0US = 0,
274 ADC_CHANNEL_HW_SETTLE_DELAY_100US,
275 ADC_CHANNEL_HW_SETTLE_DELAY_2000US,
276 ADC_CHANNEL_HW_SETTLE_DELAY_300US,
277 ADC_CHANNEL_HW_SETTLE_DELAY_400US,
278 ADC_CHANNEL_HW_SETTLE_DELAY_500US,
279 ADC_CHANNEL_HW_SETTLE_DELAY_600US,
280 ADC_CHANNEL_HW_SETTLE_DELAY_700US,
281 ADC_CHANNEL_HW_SETTLE_DELAY_800US,
282 ADC_CHANNEL_HW_SETTLE_DELAY_900US,
283 ADC_CHANNEL_HW_SETTLE_DELAY_1MS,
284 ADC_CHANNEL_HW_SETTLE_DELAY_2MS,
285 ADC_CHANNEL_HW_SETTLE_DELAY_4MS,
286 ADC_CHANNEL_HW_SETTLE_DELAY_6MS,
287 ADC_CHANNEL_HW_SETTLE_DELAY_8MS,
288 ADC_CHANNEL_HW_SETTLE_DELAY_10MS,
289 ADC_CHANNEL_HW_SETTLE_NONE,
290};
291
292/**
293 * enum qpnp_vadc_mode_sel - Selects the basic mode of operation.
294 * - The normal mode is used for single measurement.
295 * - The Conversion sequencer is used to trigger an
296 * ADC read when a HW trigger is selected.
297 * - The measurement interval performs a single or
298 * continous measurement at a specified interval/delay.
299 * %ADC_OP_NORMAL_MODE : Normal mode used for single measurement.
300 * %ADC_OP_CONVERSION_SEQUENCER : Conversion sequencer used to trigger
301 * an ADC read on a HW supported trigger.
302 * Refer to enum qpnp_vadc_trigger for
303 * supported HW triggers.
304 * %ADC_OP_MEASUREMENT_INTERVAL : The measurement interval performs a
305 * single or continous measurement after a specified delay.
306 * For delay look at qpnp_adc_meas_timer.
307 */
308enum qpnp_vadc_mode_sel {
309 ADC_OP_NORMAL_MODE = 0,
310 ADC_OP_CONVERSION_SEQUENCER,
311 ADC_OP_MEASUREMENT_INTERVAL,
312 ADC_OP_MODE_NONE,
313};
314
315/**
316 * enum qpnp_vadc_trigger - Select the HW trigger to be used while
317 * measuring the ADC reading.
318 * %ADC_GSM_PA_ON : GSM power amplifier on.
319 * %ADC_TX_GTR_THRES : Transmit power greater than threshold.
320 * %ADC_CAMERA_FLASH_RAMP : Flash ramp up done.
321 * %ADC_DTEST : DTEST.
322 */
323enum qpnp_vadc_trigger {
324 ADC_GSM_PA_ON = 0,
325 ADC_TX_GTR_THRES,
326 ADC_CAMERA_FLASH_RAMP,
327 ADC_DTEST,
328 ADC_SEQ_NONE,
329};
330
331/**
332 * enum qpnp_vadc_conv_seq_timeout - Select delay (0 to 15ms) from
333 * conversion request to triggering conversion sequencer
334 * hold off time.
335 */
336enum qpnp_vadc_conv_seq_timeout {
337 ADC_CONV_SEQ_TIMEOUT_0MS = 0,
338 ADC_CONV_SEQ_TIMEOUT_1MS,
339 ADC_CONV_SEQ_TIMEOUT_2MS,
340 ADC_CONV_SEQ_TIMEOUT_3MS,
341 ADC_CONV_SEQ_TIMEOUT_4MS,
342 ADC_CONV_SEQ_TIMEOUT_5MS,
343 ADC_CONV_SEQ_TIMEOUT_6MS,
344 ADC_CONV_SEQ_TIMEOUT_7MS,
345 ADC_CONV_SEQ_TIMEOUT_8MS,
346 ADC_CONV_SEQ_TIMEOUT_9MS,
347 ADC_CONV_SEQ_TIMEOUT_10MS,
348 ADC_CONV_SEQ_TIMEOUT_11MS,
349 ADC_CONV_SEQ_TIMEOUT_12MS,
350 ADC_CONV_SEQ_TIMEOUT_13MS,
351 ADC_CONV_SEQ_TIMEOUT_14MS,
352 ADC_CONV_SEQ_TIMEOUT_15MS,
353 ADC_CONV_SEQ_TIMEOUT_NONE,
354};
355
356/**
357 * enum qpnp_adc_conv_seq_holdoff - Select delay from conversion
358 * trigger signal (i.e. adc_conv_seq_trig) transition
359 * to ADC enable. Delay = 25us * (value + 1).
360 */
361enum qpnp_adc_conv_seq_holdoff {
362 ADC_SEQ_HOLD_25US = 0,
363 ADC_SEQ_HOLD_50US,
364 ADC_SEQ_HOLD_75US,
365 ADC_SEQ_HOLD_100US,
366 ADC_SEQ_HOLD_125US,
367 ADC_SEQ_HOLD_150US,
368 ADC_SEQ_HOLD_175US,
369 ADC_SEQ_HOLD_200US,
370 ADC_SEQ_HOLD_225US,
371 ADC_SEQ_HOLD_250US,
372 ADC_SEQ_HOLD_275US,
373 ADC_SEQ_HOLD_300US,
374 ADC_SEQ_HOLD_325US,
375 ADC_SEQ_HOLD_350US,
376 ADC_SEQ_HOLD_375US,
377 ADC_SEQ_HOLD_400US,
378 ADC_SEQ_HOLD_NONE,
379};
380
381/**
382 * enum qpnp_adc_conv_seq_state - Conversion sequencer operating state
383 * %ADC_CONV_SEQ_IDLE : Sequencer is in idle.
384 * %ADC_CONV_TRIG_RISE : Waiting for rising edge trigger.
385 * %ADC_CONV_TRIG_HOLDOFF : Waiting for rising trigger hold off time.
386 * %ADC_CONV_MEAS_RISE : Measuring selected ADC signal.
387 * %ADC_CONV_TRIG_FALL : Waiting for falling trigger edge.
388 * %ADC_CONV_FALL_HOLDOFF : Waiting for falling trigger hold off time.
389 * %ADC_CONV_MEAS_FALL : Measuring selected ADC signal.
390 * %ADC_CONV_ERROR : Aberrant Hardware problem.
391 */
392enum qpnp_adc_conv_seq_state {
393 ADC_CONV_SEQ_IDLE = 0,
394 ADC_CONV_TRIG_RISE,
395 ADC_CONV_TRIG_HOLDOFF,
396 ADC_CONV_MEAS_RISE,
397 ADC_CONV_TRIG_FALL,
398 ADC_CONV_FALL_HOLDOFF,
399 ADC_CONV_MEAS_FALL,
400 ADC_CONV_ERROR,
401 ADC_CONV_NONE,
402};
403
404/**
Siddartha Mohanadossd0f4fd12012-11-20 16:28:40 -0800405 * enum qpnp_adc_meas_timer_1 - Selects the measurement interval time.
Siddartha Mohanadoss7b116e12012-06-05 23:27:46 -0700406 * If value = 0, use 0ms else use 2^(value + 4)/ 32768).
Siddartha Mohanadossd0f4fd12012-11-20 16:28:40 -0800407 * The timer period is used by the USB_ID. Do not set a polling rate
408 * greater than 1 second on PMIC 2.0. The max polling rate on the PMIC 2.0
409 * appears to be limited to 1 second.
Siddartha Mohanadoss7b116e12012-06-05 23:27:46 -0700410 * %ADC_MEAS_INTERVAL_0MS : 0ms
411 * %ADC_MEAS_INTERVAL_1P0MS : 1ms
412 * %ADC_MEAS_INTERVAL_2P0MS : 2ms
413 * %ADC_MEAS_INTERVAL_3P9MS : 3.9ms
414 * %ADC_MEAS_INTERVAL_7P8MS : 7.8ms
415 * %ADC_MEAS_INTERVAL_15P6MS : 15.6ms
416 * %ADC_MEAS_INTERVAL_31P3MS : 31.3ms
417 * %ADC_MEAS_INTERVAL_62P5MS : 62.5ms
418 * %ADC_MEAS_INTERVAL_125MS : 125ms
419 * %ADC_MEAS_INTERVAL_250MS : 250ms
420 * %ADC_MEAS_INTERVAL_500MS : 500ms
421 * %ADC_MEAS_INTERVAL_1S : 1seconds
422 * %ADC_MEAS_INTERVAL_2S : 2seconds
423 * %ADC_MEAS_INTERVAL_4S : 4seconds
424 * %ADC_MEAS_INTERVAL_8S : 8seconds
425 * %ADC_MEAS_INTERVAL_16S: 16seconds
426 */
Siddartha Mohanadossd0f4fd12012-11-20 16:28:40 -0800427enum qpnp_adc_meas_timer_1 {
428 ADC_MEAS1_INTERVAL_0MS = 0,
429 ADC_MEAS1_INTERVAL_1P0MS,
430 ADC_MEAS1_INTERVAL_2P0MS,
431 ADC_MEAS1_INTERVAL_3P9MS,
432 ADC_MEAS1_INTERVAL_7P8MS,
433 ADC_MEAS1_INTERVAL_15P6MS,
434 ADC_MEAS1_INTERVAL_31P3MS,
435 ADC_MEAS1_INTERVAL_62P5MS,
436 ADC_MEAS1_INTERVAL_125MS,
437 ADC_MEAS1_INTERVAL_250MS,
438 ADC_MEAS1_INTERVAL_500MS,
439 ADC_MEAS1_INTERVAL_1S,
440 ADC_MEAS1_INTERVAL_2S,
441 ADC_MEAS1_INTERVAL_4S,
442 ADC_MEAS1_INTERVAL_8S,
443 ADC_MEAS1_INTERVAL_16S,
444 ADC_MEAS1_INTERVAL_NONE,
445};
446
447/**
448 * enum qpnp_adc_meas_timer_2 - Selects the measurement interval time.
449 * If value = 0, use 0ms else use 2^(value + 4)/ 32768).
450 * The timer period is used by the batt_therm. Do not set a polling rate
451 * greater than 1 second on PMIC 2.0. The max polling rate on the PMIC 2.0
452 * appears to be limited to 1 second.
453 * %ADC_MEAS_INTERVAL_0MS : 0ms
454 * %ADC_MEAS_INTERVAL_100MS : 100ms
455 * %ADC_MEAS_INTERVAL_200MS : 200ms
456 * %ADC_MEAS_INTERVAL_300MS : 300ms
457 * %ADC_MEAS_INTERVAL_400MS : 400ms
458 * %ADC_MEAS_INTERVAL_500MS : 500ms
459 * %ADC_MEAS_INTERVAL_600MS : 600ms
460 * %ADC_MEAS_INTERVAL_700MS : 700ms
461 * %ADC_MEAS_INTERVAL_800MS : 800ms
462 * %ADC_MEAS_INTERVAL_900MS : 900ms
463 * %ADC_MEAS_INTERVAL_1S: 1seconds
464 * %ADC_MEAS_INTERVAL_1P1S: 1.1seconds
465 * %ADC_MEAS_INTERVAL_1P2S: 1.2seconds
466 * %ADC_MEAS_INTERVAL_1P3S: 1.3seconds
467 * %ADC_MEAS_INTERVAL_1P4S: 1.4seconds
468 * %ADC_MEAS_INTERVAL_1P5S: 1.5seconds
469 */
470enum qpnp_adc_meas_timer_2 {
471 ADC_MEAS2_INTERVAL_0MS = 0,
472 ADC_MEAS2_INTERVAL_100MS,
473 ADC_MEAS2_INTERVAL_200MS,
474 ADC_MEAS2_INTERVAL_300MS,
475 ADC_MEAS2_INTERVAL_400MS,
476 ADC_MEAS2_INTERVAL_500MS,
477 ADC_MEAS2_INTERVAL_600MS,
478 ADC_MEAS2_INTERVAL_700MS,
479 ADC_MEAS2_INTERVAL_800MS,
480 ADC_MEAS2_INTERVAL_900MS,
481 ADC_MEAS2_INTERVAL_1S,
482 ADC_MEAS2_INTERVAL_1P1S,
483 ADC_MEAS2_INTERVAL_1P2S,
484 ADC_MEAS2_INTERVAL_1P3S,
485 ADC_MEAS2_INTERVAL_1P4S,
486 ADC_MEAS2_INTERVAL_1P5S,
487 ADC_MEAS2_INTERVAL_NONE,
488};
489
490/**
491 * enum qpnp_adc_meas_timer_3 - Selects the measurement interval time.
492 * If value = 0, use 0ms else use 2^(value + 4)/ 32768).
493 * Do not set a polling rate greater than 1 second on PMIC 2.0.
494 * The max polling rate on the PMIC 2.0 appears to be limited to 1 second.
495 * %ADC_MEAS_INTERVAL_0MS : 0ms
496 * %ADC_MEAS_INTERVAL_1S : 1seconds
497 * %ADC_MEAS_INTERVAL_2S : 2seconds
498 * %ADC_MEAS_INTERVAL_3S : 3seconds
499 * %ADC_MEAS_INTERVAL_4S : 4seconds
500 * %ADC_MEAS_INTERVAL_5S : 5seconds
501 * %ADC_MEAS_INTERVAL_6S: 6seconds
502 * %ADC_MEAS_INTERVAL_7S : 7seconds
503 * %ADC_MEAS_INTERVAL_8S : 8seconds
504 * %ADC_MEAS_INTERVAL_9S : 9seconds
505 * %ADC_MEAS_INTERVAL_10S : 10seconds
506 * %ADC_MEAS_INTERVAL_11S : 11seconds
507 * %ADC_MEAS_INTERVAL_12S : 12seconds
508 * %ADC_MEAS_INTERVAL_13S : 13seconds
509 * %ADC_MEAS_INTERVAL_14S : 14seconds
510 * %ADC_MEAS_INTERVAL_15S : 15seconds
511 */
512enum qpnp_adc_meas_timer_3 {
513 ADC_MEAS3_INTERVAL_0S = 0,
514 ADC_MEAS3_INTERVAL_1S,
515 ADC_MEAS3_INTERVAL_2S,
516 ADC_MEAS3_INTERVAL_3S,
517 ADC_MEAS3_INTERVAL_4S,
518 ADC_MEAS3_INTERVAL_5S,
519 ADC_MEAS3_INTERVAL_6S,
520 ADC_MEAS3_INTERVAL_7S,
521 ADC_MEAS3_INTERVAL_8S,
522 ADC_MEAS3_INTERVAL_9S,
523 ADC_MEAS3_INTERVAL_10S,
524 ADC_MEAS3_INTERVAL_11S,
525 ADC_MEAS3_INTERVAL_12S,
526 ADC_MEAS3_INTERVAL_13S,
527 ADC_MEAS3_INTERVAL_14S,
528 ADC_MEAS3_INTERVAL_15S,
529 ADC_MEAS3_INTERVAL_NONE,
530};
531
532/**
533 * enum qpnp_adc_meas_timer_select - Selects the timer for which
534 * the appropriate polling frequency is set.
535 * %ADC_MEAS_TIMER_SELECT1 - Select this timer if the client is USB_ID.
536 * %ADC_MEAS_TIMER_SELECT2 - Select this timer if the client is batt_therm.
537 * %ADC_MEAS_TIMER_SELECT3 - The timer is added only for completion. It is
538 * not used by kernel space clients and user space clients cannot set
539 * the polling frequency. The driver will set a appropriate polling
540 * frequency to measure the user space clients from qpnp_adc_meas_timer_3.
541 */
542enum qpnp_adc_meas_timer_select {
543 ADC_MEAS_TIMER_SELECT1 = 0,
544 ADC_MEAS_TIMER_SELECT2,
545 ADC_MEAS_TIMER_SELECT3,
546 ADC_MEAS_TIMER_NUM,
Siddartha Mohanadoss7b116e12012-06-05 23:27:46 -0700547};
548
549/**
550 * enum qpnp_adc_meas_interval_op_ctl - Select operating mode.
551 * %ADC_MEAS_INTERVAL_OP_SINGLE : Conduct single measurement at specified time
552 * delay.
553 * %ADC_MEAS_INTERVAL_OP_CONTINUOUS : Make measurements at measurement interval
554 * times.
555 */
556enum qpnp_adc_meas_interval_op_ctl {
557 ADC_MEAS_INTERVAL_OP_SINGLE = 0,
558 ADC_MEAS_INTERVAL_OP_CONTINUOUS,
559 ADC_MEAS_INTERVAL_OP_NONE,
560};
561
562/**
Siddartha Mohanadossd0f4fd12012-11-20 16:28:40 -0800563 * Channel selection registers for each of the 5 configurable measurements
564 * Channels allotment is fixed for the given channels below.
565 * The USB_ID and BATT_THERM channels are used only by the kernel space
566 * USB and Battery drivers.
567 * The other 3 channels are configurable for use by userspace clients.
568 * USB_ID uses QPNP_ADC_TM_M0_ADC_CH_SEL_CTL
569 * BATT_TEMP uses QPNP_ADC_TM_M1_ADC_CH_SEL_CTL
570 * PA_THERM1 uses QPNP_ADC_TM_M2_ADC_CH_SEL_CTL
571 * PA_THERM2 uses QPNP_ADC_TM_M3_ADC_CH_SEL_CTL
572 * EMMC_THERM uses QPNP_ADC_TM_M4_ADC_CH_SEL_CTL
573 */
574enum qpnp_adc_tm_channel_select {
575 QPNP_ADC_TM_M0_ADC_CH_SEL_CTL = 0x48,
576 QPNP_ADC_TM_M1_ADC_CH_SEL_CTL = 0x68,
577 QPNP_ADC_TM_M2_ADC_CH_SEL_CTL = 0x70,
578 QPNP_ADC_TM_M3_ADC_CH_SEL_CTL = 0x78,
579 QPNP_ADC_TM_M4_ADC_CH_SEL_CTL = 0x80,
580 QPNP_ADC_TM_CH_SELECT_NONE
581};
582
583/**
584 * struct qpnp_adc_tm_config - Represent ADC Thermal Monitor configuration.
585 * @channel: ADC channel for which thermal monitoring is requested.
586 * @adc_code: The pre-calibrated digital output of a given ADC releative to the
587 * ADC reference.
588 * @high_thr_temp: Temperature at which high threshold notification is required.
589 * @low_thr_temp: Temperature at which low threshold notification is required.
590 * @low_thr_voltage : Low threshold voltage ADC code used for reverse
591 * calibration.
592 * @high_thr_voltage: High threshold voltage ADC code used for reverse
593 * calibration.
594 */
595struct qpnp_adc_tm_config {
596 int channel;
597 int adc_code;
598 int high_thr_temp;
599 int low_thr_temp;
600 int64_t high_thr_voltage;
601 int64_t low_thr_voltage;
602};
603
604/**
605 * enum qpnp_adc_tm_trip_type - Type for setting high/low temperature/voltage.
606 * %ADC_TM_TRIP_HIGH_WARM: Setting high temperature. Note that high temperature
607 * corresponds to low voltage. Driver handles this case
608 * appropriately to set high/low thresholds for voltage.
609 * threshold.
610 * %ADC_TM_TRIP_LOW_COOL: Setting low temperature.
611 */
612enum qpnp_adc_tm_trip_type {
613 ADC_TM_TRIP_HIGH_WARM = 0,
614 ADC_TM_TRIP_LOW_COOL,
615 ADC_TM_TRIP_NUM,
616};
617
618/**
619 * enum qpnp_tm_state - This lets the client know whether the threshold
620 * that was crossed was high/low.
621 * %ADC_TM_HIGH_STATE: Client is notified of crossing the requested high
622 * threshold.
623 * %ADC_TM_LOW_STATE: Client is notified of crossing the requested low
624 * threshold.
625 */
626enum qpnp_tm_state {
627 ADC_TM_HIGH_STATE = 0,
628 ADC_TM_LOW_STATE,
629 ADC_TM_STATE_NUM,
630};
631
632/**
633 * enum qpnp_state_request - Request to enable/disable the corresponding
634 * high/low voltage/temperature thresholds.
635 * %ADC_TM_HIGH_THR_ENABLE: Enable high voltage/temperature threshold.
636 * %ADC_TM_LOW_THR_ENABLE: Enable low voltage/temperature threshold.
637 * %ADC_TM_HIGH_LOW_THR_ENABLE: Enable high and low voltage/temperature
638 * threshold.
639 * %ADC_TM_HIGH_THR_DISABLE: Disable high voltage/temperature threshold.
640 * %ADC_TM_LOW_THR_DISABLE: Disable low voltage/temperature threshold.
641 * %ADC_TM_HIGH_THR_DISABLE: Disable high and low voltage/temperature
642 * threshold.
643 */
644enum qpnp_state_request {
645 ADC_TM_HIGH_THR_ENABLE = 0,
646 ADC_TM_LOW_THR_ENABLE,
647 ADC_TM_HIGH_LOW_THR_ENABLE,
648 ADC_TM_HIGH_THR_DISABLE,
649 ADC_TM_LOW_THR_DISABLE,
650 ADC_TM_HIGH_LOW_THR_DISABLE,
651 ADC_TM_THR_NUM,
652};
653
654/**
655 * struct qpnp_adc_tm_usbid_param - Represent USB_ID threshold
656 * monitoring configuration.
657 * @high_thr: High voltage threshold for which notification is requested.
658 * @low_thr: Low voltage threshold for which notification is requested.
659 * @state_request: Enable/disable the corresponding high and low voltage
660 * thresholds.
661 * @timer_interval: Select polling rate from qpnp_adc_meas_timer_1 type.
662 * @threshold_notification: Notification callback once threshold are crossed.
Siddartha Mohanadoss31f60962012-11-27 14:11:02 -0800663 * @usbid_ctx: A context of void type.
Siddartha Mohanadossd0f4fd12012-11-20 16:28:40 -0800664 */
665struct qpnp_adc_tm_usbid_param {
666 int32_t high_thr;
667 int32_t low_thr;
668 enum qpnp_state_request state_request;
669 enum qpnp_adc_meas_timer_1 timer_interval;
Siddartha Mohanadoss31f60962012-11-27 14:11:02 -0800670 void *usbid_ctx;
671 void (*threshold_notification) (enum qpnp_tm_state state,
672 void *ctx);
Siddartha Mohanadossd0f4fd12012-11-20 16:28:40 -0800673};
674
675/**
676 * struct qpnp_adc_tm_btm_param - Represent Battery temperature threshold
677 * monitoring configuration.
678 * @high_temp: High temperature threshold for which notification is requested.
679 * @low_temp: Low temperature threshold for which notification is requested.
680 * @state_request: Enable/disable the corresponding high and low temperature
681 * thresholds.
682 * @timer_interval: Select polling rate from qpnp_adc_meas_timer_2 type.
Siddartha Mohanadossd71e2402013-02-01 17:36:23 -0800683 * @btmid_ctx: A context of void type.
Siddartha Mohanadossd0f4fd12012-11-20 16:28:40 -0800684 * @threshold_notification: Notification callback once threshold are crossed.
685 */
686struct qpnp_adc_tm_btm_param {
687 int32_t high_temp;
688 int32_t low_temp;
689 enum qpnp_state_request state_request;
690 enum qpnp_adc_meas_timer_2 timer_interval;
Siddartha Mohanadossd71e2402013-02-01 17:36:23 -0800691 void *btm_ctx;
692 void (*threshold_notification) (enum qpnp_tm_state state,
693 void *ctx);
Siddartha Mohanadossd0f4fd12012-11-20 16:28:40 -0800694};
695
696/**
Siddartha Mohanadoss7b116e12012-06-05 23:27:46 -0700697 * struct qpnp_vadc_linear_graph - Represent ADC characteristics.
698 * @dy: Numerator slope to calculate the gain.
699 * @dx: Denominator slope to calculate the gain.
700 * @adc_vref: A/D word of the voltage reference used for the channel.
701 * @adc_gnd: A/D word of the ground reference used for the channel.
702 *
703 * Each ADC device has different offset and gain parameters which are computed
704 * to calibrate the device.
705 */
706struct qpnp_vadc_linear_graph {
707 int64_t dy;
708 int64_t dx;
709 int64_t adc_vref;
710 int64_t adc_gnd;
711};
712
713/**
714 * struct qpnp_vadc_map_pt - Map the graph representation for ADC channel
715 * @x: Represent the ADC digitized code.
716 * @y: Represent the physical data which can be temperature, voltage,
717 * resistance.
718 */
719struct qpnp_vadc_map_pt {
720 int32_t x;
721 int32_t y;
722};
723
724/**
725 * struct qpnp_vadc_scaling_ratio - Represent scaling ratio for adc input.
726 * @num: Numerator scaling parameter.
727 * @den: Denominator scaling parameter.
728 */
729struct qpnp_vadc_scaling_ratio {
730 int32_t num;
731 int32_t den;
732};
733
734/**
735 * struct qpnp_adc_properties - Represent the ADC properties.
736 * @adc_reference: Reference voltage for QPNP ADC.
737 * @bitresolution: ADC bit resolution for QPNP ADC.
738 * @biploar: Polarity for QPNP ADC.
739 */
740struct qpnp_adc_properties {
741 uint32_t adc_vdd_reference;
742 uint32_t bitresolution;
743 bool bipolar;
744};
745
746/**
747 * struct qpnp_vadc_chan_properties - Represent channel properties of the ADC.
748 * @offset_gain_numerator: The inverse numerator of the gain applied to the
749 * input channel.
750 * @offset_gain_denominator: The inverse denominator of the gain applied to the
751 * input channel.
Siddartha Mohanadoss31f60962012-11-27 14:11:02 -0800752 * @high_thr: High threshold voltage that is requested to be set.
753 * @low_thr: Low threshold voltage that is requested to be set.
754 * @timer_select: Choosen from one of the 3 timers to set the polling rate for
755 * the VADC_BTM channel.
756 * @meas_interval1: Polling rate to set for timer 1.
757 * @meas_interval2: Polling rate to set for timer 2.
758 * @tm_channel_select: BTM channel number for the 5 VADC_BTM channels.
759 * @state_request: User can select either enable or disable high/low or both
760 * activation levels based on the qpnp_state_request type.
Siddartha Mohanadoss7b116e12012-06-05 23:27:46 -0700761 * @adc_graph: ADC graph for the channel of struct type qpnp_adc_linear_graph.
762 */
763struct qpnp_vadc_chan_properties {
764 uint32_t offset_gain_numerator;
765 uint32_t offset_gain_denominator;
Siddartha Mohanadoss31f60962012-11-27 14:11:02 -0800766 uint32_t high_thr;
767 uint32_t low_thr;
768 enum qpnp_adc_meas_timer_select timer_select;
769 enum qpnp_adc_meas_timer_1 meas_interval1;
770 enum qpnp_adc_meas_timer_2 meas_interval2;
771 enum qpnp_adc_tm_channel_select tm_channel_select;
772 enum qpnp_state_request state_request;
Siddartha Mohanadoss7b116e12012-06-05 23:27:46 -0700773 struct qpnp_vadc_linear_graph adc_graph[2];
774};
775
776/**
Siddartha Mohanadoss31f60962012-11-27 14:11:02 -0800777 * struct qpnp_vadc_result - Represent the result of the QPNP ADC.
Siddartha Mohanadoss7b116e12012-06-05 23:27:46 -0700778 * @chan: The channel number of the requested conversion.
779 * @adc_code: The pre-calibrated digital output of a given ADC relative to the
780 * the ADC reference.
781 * @measurement: In units specific for a given ADC; most ADC uses reference
782 * voltage but some ADC uses reference current. This measurement
783 * here is a number relative to a reference of a given ADC.
784 * @physical: The data meaningful for each individual channel whether it is
785 * voltage, current, temperature, etc.
786 * All voltage units are represented in micro - volts.
787 * -Battery temperature units are represented as 0.1 DegC.
788 * -PA Therm temperature units are represented as DegC.
789 * -PMIC Die temperature units are represented as 0.001 DegC.
790 */
791struct qpnp_vadc_result {
792 uint32_t chan;
793 int32_t adc_code;
794 int64_t measurement;
795 int64_t physical;
796};
797
798/**
Siddartha Mohanadoss31f60962012-11-27 14:11:02 -0800799 * struct qpnp_adc_amux - AMUX properties for individual channel
Siddartha Mohanadoss7b116e12012-06-05 23:27:46 -0700800 * @name: Channel string name.
801 * @channel_num: Channel in integer used from qpnp_adc_channels.
802 * @chan_path_prescaling: Channel scaling performed on the input signal.
803 * @adc_decimation: Sampling rate desired for the channel.
804 * adc_scale_fn: Scaling function to convert to the data meaningful for
805 * each individual channel whether it is voltage, current,
806 * temperature, etc and compensates the channel properties.
807 */
Siddartha Mohanadoss31f60962012-11-27 14:11:02 -0800808struct qpnp_adc_amux {
Siddartha Mohanadoss7b116e12012-06-05 23:27:46 -0700809 char *name;
810 enum qpnp_vadc_channels channel_num;
811 enum qpnp_adc_channel_scaling_param chan_path_prescaling;
812 enum qpnp_adc_decimation_type adc_decimation;
813 enum qpnp_adc_scale_fn_type adc_scale_fn;
814 enum qpnp_adc_fast_avg_ctl fast_avg_setup;
815 enum qpnp_adc_hw_settle_time hw_settle_time;
816};
817
818/**
819 * struct qpnp_vadc_scaling_ratio
820 *
821 */
822static const struct qpnp_vadc_scaling_ratio qpnp_vadc_amux_scaling_ratio[] = {
823 {1, 1},
824 {1, 3},
825 {1, 4},
826 {1, 6},
827 {1, 20}
828};
829
830/**
831 * struct qpnp_vadc_scale_fn - Scaling function prototype
832 * @chan: Function pointer to one of the scaling functions
833 * which takes the adc properties, channel properties,
834 * and returns the physical result
835 */
836struct qpnp_vadc_scale_fn {
837 int32_t (*chan) (int32_t,
838 const struct qpnp_adc_properties *,
839 const struct qpnp_vadc_chan_properties *,
840 struct qpnp_vadc_result *);
841};
842
843/**
Siddartha Mohanadossc4a6af12012-07-13 18:50:12 -0700844 * struct qpnp_iadc_calib - IADC channel calibration structure.
845 * @channel - Channel for which the historical offset and gain is
846 * calculated. Available channels are internal rsense,
847 * external rsense and alternate lead pairs.
Siddartha Mohanadoss5e2988d2012-09-24 17:03:56 -0700848 * @offset_raw - raw Offset value for the channel.
849 * @gain_raw - raw Gain of the channel.
850 * @ideal_offset_uv - ideal offset value for the channel.
851 * @ideal_gain_nv - ideal gain for the channel.
852 * @offset_uv - converted value of offset in uV.
853 * @gain_uv - converted value of gain in uV.
Siddartha Mohanadossc4a6af12012-07-13 18:50:12 -0700854 */
855struct qpnp_iadc_calib {
856 enum qpnp_iadc_channels channel;
Siddartha Mohanadoss5e2988d2012-09-24 17:03:56 -0700857 uint16_t offset_raw;
858 uint16_t gain_raw;
859 uint32_t ideal_offset_uv;
860 uint32_t ideal_gain_nv;
861 uint32_t offset_uv;
862 uint32_t gain_uv;
863};
864
865/**
866 * struct qpnp_iadc_result - IADC read result structure.
867 * @oresult_uv - Result of ADC in uV.
868 * @result_ua - Result of ADC in uA.
869 */
870struct qpnp_iadc_result {
871 int32_t result_uv;
872 int32_t result_ua;
Siddartha Mohanadossc4a6af12012-07-13 18:50:12 -0700873};
874
875/**
Siddartha Mohanadoss7b116e12012-06-05 23:27:46 -0700876 * struct qpnp_adc_drv - QPNP ADC device structure.
877 * @spmi - spmi device for ADC peripheral.
878 * @offset - base offset for the ADC peripheral.
879 * @adc_prop - ADC properties specific to the ADC peripheral.
880 * @amux_prop - AMUX properties representing the ADC peripheral.
881 * @adc_channels - ADC channel properties for the ADC peripheral.
Siddartha Mohanadoss12109952012-11-20 14:57:51 -0800882 * @adc_irq_eoc - End of Conversion IRQ.
Siddartha Mohanadoss31f60962012-11-27 14:11:02 -0800883 * @adc_irq_fifo_not_empty - Conversion sequencer request written
884 * to FIFO when not empty.
885 * @adc_irq_conv_seq_timeout - Conversion sequencer trigger timeout.
886 * @adc_high_thr_irq - Output higher than high threshold set for measurement.
887 * @adc_low_thr_irq - Output lower than low threshold set for measurement.
Siddartha Mohanadoss7b116e12012-06-05 23:27:46 -0700888 * @adc_lock - ADC lock for access to the peripheral.
889 * @adc_rslt_completion - ADC result notification after interrupt
890 * is received.
Siddartha Mohanadossc4a6af12012-07-13 18:50:12 -0700891 * @calib - Internal rsens calibration values for gain and offset.
Siddartha Mohanadoss7b116e12012-06-05 23:27:46 -0700892 */
893struct qpnp_adc_drv {
894 struct spmi_device *spmi;
895 uint8_t slave;
896 uint16_t offset;
897 struct qpnp_adc_properties *adc_prop;
Siddartha Mohanadossc4a6af12012-07-13 18:50:12 -0700898 struct qpnp_adc_amux_properties *amux_prop;
Siddartha Mohanadoss31f60962012-11-27 14:11:02 -0800899 struct qpnp_adc_amux *adc_channels;
Siddartha Mohanadoss12109952012-11-20 14:57:51 -0800900 int adc_irq_eoc;
Siddartha Mohanadoss31f60962012-11-27 14:11:02 -0800901 int adc_irq_fifo_not_empty;
902 int adc_irq_conv_seq_timeout;
903 int adc_high_thr_irq;
904 int adc_low_thr_irq;
Siddartha Mohanadoss7b116e12012-06-05 23:27:46 -0700905 struct mutex adc_lock;
906 struct completion adc_rslt_completion;
Siddartha Mohanadossc4a6af12012-07-13 18:50:12 -0700907 struct qpnp_iadc_calib calib;
Siddartha Mohanadoss7b116e12012-06-05 23:27:46 -0700908};
909
910/**
Siddartha Mohanadossc4a6af12012-07-13 18:50:12 -0700911 * struct qpnp_adc_amux_properties - QPNP VADC amux channel property.
Siddartha Mohanadoss7b116e12012-06-05 23:27:46 -0700912 * @amux_channel - Refer to the qpnp_vadc_channel list.
913 * @decimation - Sampling rate supported for the channel.
914 * @mode_sel - The basic mode of operation.
915 * @hw_settle_time - The time between AMUX being configured and the
916 * start of conversion.
917 * @fast_avg_setup - Ability to provide single result from the ADC
918 * that is an average of multiple measurements.
919 * @trigger_channel - HW trigger channel for conversion sequencer.
920 * @chan_prop - Represent the channel properties of the ADC.
921 */
Siddartha Mohanadossc4a6af12012-07-13 18:50:12 -0700922struct qpnp_adc_amux_properties {
Siddartha Mohanadoss7b116e12012-06-05 23:27:46 -0700923 uint32_t amux_channel;
924 uint32_t decimation;
925 uint32_t mode_sel;
926 uint32_t hw_settle_time;
927 uint32_t fast_avg_setup;
928 enum qpnp_vadc_trigger trigger_channel;
929 struct qpnp_vadc_chan_properties chan_prop[0];
930};
931
932/* Public API */
933#if defined(CONFIG_SENSORS_QPNP_ADC_VOLTAGE) \
934 || defined(CONFIG_SENSORS_QPNP_ADC_VOLTAGE_MODULE)
935/**
936 * qpnp_vadc_read() - Performs ADC read on the channel.
937 * @channel: Input channel to perform the ADC read.
938 * @result: Structure pointer of type adc_chan_result
939 * in which the ADC read results are stored.
940 */
941int32_t qpnp_vadc_read(enum qpnp_vadc_channels channel,
942 struct qpnp_vadc_result *result);
943
944/**
945 * qpnp_vadc_conv_seq_request() - Performs ADC read on the conversion
946 * sequencer channel.
947 * @channel: Input channel to perform the ADC read.
948 * @result: Structure pointer of type adc_chan_result
949 * in which the ADC read results are stored.
950 */
951int32_t qpnp_vadc_conv_seq_request(
952 enum qpnp_vadc_trigger trigger_channel,
953 enum qpnp_vadc_channels channel,
954 struct qpnp_vadc_result *result);
955
956/**
957 * qpnp_vadc_check_result() - Performs check on the ADC raw code.
958 * @data: Data used for verifying the range of the ADC code.
959 */
960int32_t qpnp_vadc_check_result(int32_t *data);
961
962/**
963 * qpnp_adc_get_devicetree_data() - Abstracts the ADC devicetree data.
964 * @spmi: spmi ADC device.
965 * @adc_qpnp: spmi device tree node structure
966 */
967int32_t qpnp_adc_get_devicetree_data(struct spmi_device *spmi,
968 struct qpnp_adc_drv *adc_qpnp);
969
970/**
Siddartha Mohanadoss7b116e12012-06-05 23:27:46 -0700971 * qpnp_adc_scale_default() - Scales the pre-calibrated digital output
972 * of an ADC to the ADC reference and compensates for the
973 * gain and offset.
974 * @adc_code: pre-calibrated digital ouput of the ADC.
975 * @adc_prop: adc properties of the qpnp adc such as bit resolution,
976 * reference voltage.
977 * @chan_prop: Individual channel properties to compensate the i/p scaling,
978 * slope and offset.
979 * @chan_rslt: Physical result to be stored.
980 */
981int32_t qpnp_adc_scale_default(int32_t adc_code,
982 const struct qpnp_adc_properties *adc_prop,
983 const struct qpnp_vadc_chan_properties *chan_prop,
984 struct qpnp_vadc_result *chan_rslt);
Siddartha Mohanadoss5ace1102012-08-20 23:18:10 -0700985/**
986 * qpnp_adc_scale_pmic_therm() - Scales the pre-calibrated digital output
987 * of an ADC to the ADC reference and compensates for the
988 * gain and offset. Performs the AMUX out as 2mV/K and returns
989 * the temperature in milli degC.
990 * @adc_code: pre-calibrated digital ouput of the ADC.
991 * @adc_prop: adc properties of the qpnp adc such as bit resolution,
992 * reference voltage.
993 * @chan_prop: Individual channel properties to compensate the i/p scaling,
994 * slope and offset.
995 * @chan_rslt: Physical result to be stored.
996 */
997int32_t qpnp_adc_scale_pmic_therm(int32_t adc_code,
998 const struct qpnp_adc_properties *adc_prop,
999 const struct qpnp_vadc_chan_properties *chan_prop,
1000 struct qpnp_vadc_result *chan_rslt);
1001/**
1002 * qpnp_adc_scale_batt_therm() - Scales the pre-calibrated digital output
1003 * of an ADC to the ADC reference and compensates for the
1004 * gain and offset. Returns the temperature in degC.
1005 * @adc_code: pre-calibrated digital ouput of the ADC.
1006 * @adc_prop: adc properties of the pm8xxx adc such as bit resolution,
1007 * reference voltage.
1008 * @chan_prop: individual channel properties to compensate the i/p scaling,
1009 * slope and offset.
1010 * @chan_rslt: physical result to be stored.
1011 */
1012int32_t qpnp_adc_scale_batt_therm(int32_t adc_code,
1013 const struct qpnp_adc_properties *adc_prop,
1014 const struct qpnp_vadc_chan_properties *chan_prop,
1015 struct qpnp_vadc_result *chan_rslt);
1016/**
1017 * qpnp_adc_scale_batt_id() - Scales the pre-calibrated digital output
1018 * of an ADC to the ADC reference and compensates for the
1019 * gain and offset.
1020 * @adc_code: pre-calibrated digital ouput of the ADC.
1021 * @adc_prop: adc properties of the pm8xxx adc such as bit resolution,
1022 * reference voltage.
1023 * @chan_prop: individual channel properties to compensate the i/p scaling,
1024 * slope and offset.
1025 * @chan_rslt: physical result to be stored.
1026 */
1027int32_t qpnp_adc_scale_batt_id(int32_t adc_code,
1028 const struct qpnp_adc_properties *adc_prop,
1029 const struct qpnp_vadc_chan_properties *chan_prop,
1030 struct qpnp_vadc_result *chan_rslt);
1031/**
1032 * qpnp_adc_scale_tdkntcg_therm() - Scales the pre-calibrated digital output
1033 * of an ADC to the ADC reference and compensates for the
1034 * gain and offset. Returns the temperature of the xo therm in mili
1035 degC.
1036 * @adc_code: pre-calibrated digital ouput of the ADC.
1037 * @adc_prop: adc properties of the pm8xxx adc such as bit resolution,
1038 * reference voltage.
1039 * @chan_prop: individual channel properties to compensate the i/p scaling,
1040 * slope and offset.
1041 * @chan_rslt: physical result to be stored.
1042 */
1043int32_t qpnp_adc_tdkntcg_therm(int32_t adc_code,
1044 const struct qpnp_adc_properties *adc_prop,
1045 const struct qpnp_vadc_chan_properties *chan_prop,
1046 struct qpnp_vadc_result *chan_rslt);
1047/**
Siddartha Mohanadosse77edf12012-09-13 14:26:32 -07001048 * qpnp_adc_scale_therm_pu1() - Scales the pre-calibrated digital output
1049 * of an ADC to the ADC reference and compensates for the
1050 * gain and offset. Returns the temperature of the therm in degC.
1051 * It uses a mapping table computed for a 150K pull-up.
1052 * Pull-up1 is an internal pull-up on the AMUX of 150K.
1053 * @adc_code: pre-calibrated digital ouput of the ADC.
1054 * @adc_prop: adc properties of the pm8xxx adc such as bit resolution,
1055 * reference voltage.
1056 * @chan_prop: individual channel properties to compensate the i/p scaling,
1057 * slope and offset.
1058 * @chan_rslt: physical result to be stored.
1059 */
1060int32_t qpnp_adc_scale_therm_pu1(int32_t adc_code,
1061 const struct qpnp_adc_properties *adc_prop,
1062 const struct qpnp_vadc_chan_properties *chan_prop,
1063 struct qpnp_vadc_result *chan_rslt);
1064/**
1065 * qpnp_adc_scale_therm_pu2() - Scales the pre-calibrated digital output
1066 * of an ADC to the ADC reference and compensates for the
1067 * gain and offset. Returns the temperature of the therm in degC.
1068 * It uses a mapping table computed for a 100K pull-up.
1069 * Pull-up2 is an internal pull-up on the AMUX of 100K.
1070 * @adc_code: pre-calibrated digital ouput of the ADC.
1071 * @adc_prop: adc properties of the pm8xxx adc such as bit resolution,
1072 * reference voltage.
1073 * @chan_prop: individual channel properties to compensate the i/p scaling,
1074 * slope and offset.
1075 * @chan_rslt: physical result to be stored.
1076 */
1077int32_t qpnp_adc_scale_therm_pu2(int32_t adc_code,
1078 const struct qpnp_adc_properties *adc_prop,
1079 const struct qpnp_vadc_chan_properties *chan_prop,
1080 struct qpnp_vadc_result *chan_rslt);
1081/**
Siddartha Mohanadoss5ace1102012-08-20 23:18:10 -07001082 * qpnp_vadc_is_ready() - Clients can use this API to check if the
1083 * device is ready to use.
1084 * @result: 0 on success and -EPROBE_DEFER when probe for the device
1085 * has not occured.
1086 */
1087int32_t qpnp_vadc_is_ready(void);
Siddartha Mohanadossd0f4fd12012-11-20 16:28:40 -08001088/**
1089 * qpnp_adc_tm_scaler() - Performs reverse calibration.
1090 * @config: Thermal monitoring configuration.
1091 * @adc_prop: adc properties of the qpnp adc such as bit resolution and
1092 * reference voltage.
1093 * @chan_prop: Individual channel properties to compensate the i/p scaling,
1094 * slope and offset.
1095 */
1096static inline int32_t qpnp_adc_tm_scaler(struct qpnp_adc_tm_config *tm_config,
1097 const struct qpnp_adc_properties *adc_prop,
1098 const struct qpnp_vadc_chan_properties *chan_prop)
1099{ return -ENXIO; }
1100/**
1101 * qpnp_get_vadc_gain_and_offset() - Obtains the VADC gain and offset
1102 * for absolute and ratiometric calibration.
1103 * @param: The result in which the ADC offset and gain values are stored.
1104 * @type: The calibration type whether client needs the absolute or
1105 * ratiometric gain and offset values.
1106 */
1107int32_t qpnp_get_vadc_gain_and_offset(struct qpnp_vadc_linear_graph *param,
1108 enum qpnp_adc_calib_type calib_type);
1109/**
1110 * qpnp_adc_btm_scaler() - Performs reverse calibration on the low/high
1111 * temperature threshold values passed by the client.
1112 * The function maps the temperature to voltage and applies
1113 * ratiometric calibration on the voltage values.
1114 * @param: The input parameters that contain the low/high temperature
1115 * values.
1116 * @low_threshold: The low threshold value that needs to be updated with
1117 * the above calibrated voltage value.
1118 * @high_threshold: The low threshold value that needs to be updated with
1119 * the above calibrated voltage value.
1120 */
1121int32_t qpnp_adc_btm_scaler(struct qpnp_adc_tm_btm_param *param,
1122 uint32_t *low_threshold, uint32_t *high_threshold);
1123/**
1124 * qpnp_adc_tm_scale_therm_voltage_pu2() - Performs reverse calibration
1125 * and convert given temperature to voltage on supported
1126 * thermistor channels using 100k pull-up.
1127 * @param: The input temperature values.
1128 */
1129int32_t qpnp_adc_tm_scale_therm_voltage_pu2(struct qpnp_adc_tm_config *param);
1130/**
1131 * qpnp_adc_tm_scale_therm_voltage_pu2() - Performs reverse calibration
1132 * and converts the given ADC code to temperature for
1133 * thermistor channels using 100k pull-up.
1134 * @reg: The input ADC code.
1135 * @result: The physical measurement temperature on the thermistor.
1136 */
1137int32_t qpnp_adc_tm_scale_voltage_therm_pu2(uint32_t reg, int64_t *result);
1138/**
1139 * qpnp_adc_usb_scaler() - Performs reverse calibration on the low/high
1140 * voltage threshold values passed by the client.
1141 * The function applies ratiometric calibration on the
1142 * voltage values.
1143 * @param: The input parameters that contain the low/high voltage
1144 * threshold values.
1145 * @low_threshold: The low threshold value that needs to be updated with
1146 * the above calibrated voltage value.
1147 * @high_threshold: The low threshold value that needs to be updated with
1148 * the above calibrated voltage value.
1149 */
1150int32_t qpnp_adc_usb_scaler(struct qpnp_adc_tm_usbid_param *param,
1151 uint32_t *low_threshold, uint32_t *high_threshold);
Siddartha Mohanadossa32ea2a2013-02-12 09:58:31 -08001152/**
1153 * qpnp_vadc_iadc_sync_request() - Performs Voltage ADC read and
1154 * locks the peripheral. When performing simultaneous
1155 * voltage and current request the VADC peripheral is
1156 * prepared for conversion and the IADC sync conversion
1157 * is done from the IADC peripheral.
1158 * @channel: Input channel to perform the voltage ADC read.
1159 */
1160int32_t qpnp_vadc_iadc_sync_request(enum qpnp_vadc_channels channel);
1161/**
1162 * qpnp_vadc_iadc_sync_complete_request() - Reads the ADC result and
1163 * unlocks the peripheral.
1164 * @result: Structure pointer of type adc_chan_result
1165 * in which the ADC read results are stored.
1166 */
1167int32_t qpnp_vadc_iadc_sync_complete_request(
1168 enum qpnp_vadc_channels channel, struct qpnp_vadc_result *result);
Siddartha Mohanadoss7b116e12012-06-05 23:27:46 -07001169#else
1170static inline int32_t qpnp_vadc_read(uint32_t channel,
1171 struct qpnp_vadc_result *result)
1172{ return -ENXIO; }
1173static inline int32_t qpnp_vadc_conv_seq_request(
1174 enum qpnp_vadc_trigger trigger_channel,
1175 enum qpnp_vadc_channels channel,
1176 struct qpnp_vadc_result *result)
1177{ return -ENXIO; }
1178static inline int32_t qpnp_adc_scale_default(int32_t adc_code,
1179 const struct qpnp_adc_properties *adc_prop,
Siddartha Mohanadoss5ace1102012-08-20 23:18:10 -07001180 const struct qpnp_vadc_chan_properties *chan_prop,
1181 struct qpnp_vadc_result *chan_rslt)
1182{ return -ENXIO; }
1183static inline int32_t qpnp_adc_scale_pmic_therm(int32_t adc_code,
1184 const struct qpnp_adc_properties *adc_prop,
1185 const struct qpnp_vadc_chan_properties *chan_prop,
1186 struct qpnp_vadc_result *chan_rslt)
1187{ return -ENXIO; }
1188static inline int32_t qpnp_adc_scale_batt_therm(int32_t adc_code,
1189 const struct qpnp_adc_properties *adc_prop,
1190 const struct qpnp_vadc_chan_properties *chan_prop,
1191 struct qpnp_vadc_result *chan_rslt)
1192{ return -ENXIO; }
1193static inline int32_t qpnp_adc_scale_batt_id(int32_t adc_code,
1194 const struct qpnp_adc_properties *adc_prop,
1195 const struct qpnp_vadc_chan_properties *chan_prop,
1196 struct qpnp_vadc_result *chan_rslt)
1197{ return -ENXIO; }
1198static inline int32_t qpnp_adc_tdkntcg_therm(int32_t adc_code,
1199 const struct qpnp_adc_properties *adc_prop,
1200 const struct qpnp_vadc_chan_properties *chan_prop,
1201 struct qpnp_vadc_result *chan_rslt)
1202{ return -ENXIO; }
Siddartha Mohanadosse77edf12012-09-13 14:26:32 -07001203static inline int32_t qpnp_adc_scale_therm_pu1(int32_t adc_code,
1204 const struct qpnp_adc_properties *adc_prop,
1205 const struct qpnp_vadc_chan_properties *chan_prop,
1206 struct qpnp_vadc_result *chan_rslt);
1207{ return -ENXIO; }
1208static inline int32_t qpnp_adc_scale_therm_pu2(int32_t adc_code,
1209 const struct qpnp_adc_properties *adc_prop,
1210 const struct qpnp_vadc_chan_properties *chan_prop,
1211 struct qpnp_vadc_result *chan_rslt);
1212{ return -ENXIO; }
Siddartha Mohanadoss5e2988d2012-09-24 17:03:56 -07001213static inline int32_t qpnp_vadc_is_ready(void)
Siddartha Mohanadoss7b116e12012-06-05 23:27:46 -07001214{ return -ENXIO; }
Siddartha Mohanadossd0f4fd12012-11-20 16:28:40 -08001215static inline int32_t qpnp_adc_scale_default(int32_t adc_code,
1216 const struct qpnp_adc_properties *adc_prop,
1217 const struct qpnp_adc_chan_properties *chan_prop,
1218 struct qpnp_adc_chan_result *chan_rslt)
1219{ return -ENXIO; }
1220static inline int32_t qpnp_get_vadc_gain_and_offset(
1221 struct qpnp_vadc_linear_graph *param,
1222 enum qpnp_adc_calib_type calib_type)
1223{ return -ENXIO; }
1224static inline int32_t qpnp_adc_usb_scaler(
1225 struct qpnp_adc_tm_usbid_param *param,
1226 uint32_t *low_threshold, uint32_t *high_threshold)
1227{ return -ENXIO; }
1228static inline int32_t qpnp_adc_btm_scaler(
1229 struct qpnp_adc_tm_btm_param *param,
1230 uint32_t *low_threshold, uint32_t *high_threshold)
1231{ return -ENXIO; }
1232static inline int32_t qpnp_adc_tm_scale_therm_voltage_pu2(
1233 struct qpnp_adc_tm_config *param)
1234{ return -ENXIO; }
1235static inline int32_t qpnp_adc_tm_scale_voltage_therm_pu2(
1236 uint32_t reg, int64_t *result)
1237{ return -ENXIO; }
Siddartha Mohanadossa32ea2a2013-02-12 09:58:31 -08001238static inline int32_t qpnp_vadc_iadc_sync_request(
1239 enum qpnp_vadc_channels channel)
1240{ return -ENXIO; }
1241static inline int32_t qpnp_vadc_iadc_sync_complete_request(
1242 enum qpnp_vadc_channels channel,
1243 struct qpnp_vadc_result *result)
1244{ return -ENXIO; }
Siddartha Mohanadoss7b116e12012-06-05 23:27:46 -07001245#endif
1246
Siddartha Mohanadossc4a6af12012-07-13 18:50:12 -07001247/* Public API */
1248#if defined(CONFIG_SENSORS_QPNP_ADC_CURRENT) \
1249 || defined(CONFIG_SENSORS_QPNP_ADC_CURRENT_MODULE)
1250/**
1251 * qpnp_iadc_read() - Performs ADC read on the current channel.
1252 * @channel: Input channel to perform the ADC read.
Siddartha Mohanadossa32ea2a2013-02-12 09:58:31 -08001253 * @result: Current across rsense in mA.
Siddartha Mohanadossc4a6af12012-07-13 18:50:12 -07001254 */
1255int32_t qpnp_iadc_read(enum qpnp_iadc_channels channel,
Siddartha Mohanadoss5e2988d2012-09-24 17:03:56 -07001256 struct qpnp_iadc_result *result);
Siddartha Mohanadossc4a6af12012-07-13 18:50:12 -07001257/**
Xiaozhe Shi767fdb62013-01-10 15:09:08 -08001258 * qpnp_iadc_get_rsense() - Reads the RDS resistance value from the
1259 trim registers.
1260 * @rsense: RDS resistance in nOhms.
1261 */
1262int32_t qpnp_iadc_get_rsense(int32_t *rsense);
1263/**
Siddartha Mohanadoss5e2988d2012-09-24 17:03:56 -07001264 * qpnp_iadc_get_gain_and_offset() - Performs gain calibration
1265 * over 17.8571mV and offset over selected
1266 * channel. Channel can be internal rsense,
1267 * external rsense and alternate lead pair.
1268 * @result: result structure where the gain and offset is stored of
1269 * type qpnp_iadc_calib.
Siddartha Mohanadossc4a6af12012-07-13 18:50:12 -07001270 */
Siddartha Mohanadoss5e2988d2012-09-24 17:03:56 -07001271int32_t qpnp_iadc_get_gain_and_offset(struct qpnp_iadc_calib *result);
Siddartha Mohanadossc4a6af12012-07-13 18:50:12 -07001272/**
Siddartha Mohanadoss5ace1102012-08-20 23:18:10 -07001273 * qpnp_iadc_is_ready() - Clients can use this API to check if the
1274 * device is ready to use.
1275 * @result: 0 on success and -EPROBE_DEFER when probe for the device
1276 * has not occured.
1277 */
1278int32_t qpnp_iadc_is_ready(void);
Siddartha Mohanadossa32ea2a2013-02-12 09:58:31 -08001279/**
1280 * qpnp_iadc_vadc_sync_read() - Performs synchronous VADC and IADC read.
1281 * The api is to be used only by the BMS to perform
1282 * simultaneous VADC and IADC measurement for battery voltage
1283 * and current.
1284 * @i_channel: Input battery current channel to perform the IADC read.
1285 * @i_result: Current across the rsense in mA.
1286 * @v_channel: Input battery voltage channel to perform VADC read.
1287 * @v_result: Voltage on the vbatt channel with units in mV.
1288 */
1289int32_t qpnp_iadc_vadc_sync_read(
1290 enum qpnp_iadc_channels i_channel, struct qpnp_iadc_result *i_result,
1291 enum qpnp_vadc_channels v_channel, struct qpnp_vadc_result *v_result);
Siddartha Mohanadossc4a6af12012-07-13 18:50:12 -07001292#else
1293static inline int32_t qpnp_iadc_read(enum qpnp_iadc_channels channel,
Siddartha Mohanadoss5e2988d2012-09-24 17:03:56 -07001294 struct qpnp_iadc_result *result)
Siddartha Mohanadossc4a6af12012-07-13 18:50:12 -07001295{ return -ENXIO; }
Siddartha Mohanadoss563166b2013-02-20 12:47:24 -08001296static inline int32_t qpnp_iadc_get_rsense(int32_t *rsense)
1297{ return -ENXIO; }
Siddartha Mohanadoss5e2988d2012-09-24 17:03:56 -07001298static inline int32_t qpnp_iadc_get_gain_and_offset(struct qpnp_iadc_calib
1299 *result)
Siddartha Mohanadossc4a6af12012-07-13 18:50:12 -07001300{ return -ENXIO; }
Siddartha Mohanadoss5e2988d2012-09-24 17:03:56 -07001301static inline int32_t qpnp_iadc_is_ready(void)
Siddartha Mohanadoss5ace1102012-08-20 23:18:10 -07001302{ return -ENXIO; }
Siddartha Mohanadossa32ea2a2013-02-12 09:58:31 -08001303static inline int32_t qpnp_iadc_vadc_sync_read(
1304 enum qpnp_iadc_channels i_channel, struct qpnp_iadc_result *i_result,
1305 enum qpnp_vadc_channels v_channel, struct qpnp_vadc_result *v_result)
1306{ return -ENXIO; }
Siddartha Mohanadossc4a6af12012-07-13 18:50:12 -07001307#endif
1308
Siddartha Mohanadoss31f60962012-11-27 14:11:02 -08001309/* Public API */
1310#if defined(CONFIG_THERMAL_QPNP_ADC_TM) \
1311 || defined(CONFIG_THERMAL_QPNP_ADC_TM_MODULE)
1312/**
1313 * qpnp_adc_tm_usbid_configure() - Configures Channel 0 of VADC_BTM to
1314 * monitor USB_ID channel using 100k internal pull-up.
1315 * USB driver passes the high/low voltage threshold along
1316 * with the notification callback once the set thresholds
1317 * are crossed.
1318 * @param: Structure pointer of qpnp_adc_tm_usbid_param type.
1319 * Clients pass the low/high voltage along with the threshold
1320 * notification callback.
1321 */
1322int32_t qpnp_adc_tm_usbid_configure(struct qpnp_adc_tm_usbid_param *param);
1323/**
1324 * qpnp_adc_tm_usbid_end() - Disables the monitoring of channel 0 thats
1325 * assigned for monitoring USB_ID. Disables the low/high
1326 * threshold activation for channel 0 as well.
1327 * @param: none.
1328 */
1329int32_t qpnp_adc_tm_usbid_end(void);
1330/**
1331 * qpnp_adc_tm_usbid_configure() - Configures Channel 1 of VADC_BTM to
1332 * monitor batt_therm channel using 100k internal pull-up.
1333 * Battery driver passes the high/low voltage threshold along
1334 * with the notification callback once the set thresholds
1335 * are crossed.
1336 * @param: Structure pointer of qpnp_adc_tm_btm_param type.
1337 * Clients pass the low/high temperature along with the threshold
1338 * notification callback.
1339 */
1340int32_t qpnp_adc_tm_btm_configure(struct qpnp_adc_tm_btm_param *param);
1341/**
1342 * qpnp_adc_tm_btm_end() - Disables the monitoring of channel 1 thats
1343 * assigned for monitoring batt_therm. Disables the low/high
1344 * threshold activation for channel 1 as well.
1345 * @param: none.
1346 */
1347int32_t qpnp_adc_tm_btm_end(void);
1348/**
1349 * qpnp_adc_tm_is_ready() - Clients can use this API to check if the
1350 * device is ready to use.
1351 * @result: 0 on success and -EPROBE_DEFER when probe for the device
1352 * has not occured.
1353 */
1354int32_t qpnp_adc_tm_is_ready(void);
1355#else
1356static inline int32_t qpnp_adc_tm_usbid_configure(
1357 struct qpnp_adc_tm_usbid_param *param)
1358{ return -ENXIO; }
1359static inline int32_t qpnp_adc_tm_usbid_end(void)
1360{ return -ENXIO; }
1361static inline int32_t qpnp_adc_tm_btm_configure(
1362 struct qpnp_adc_tm_btm_param *param)
1363{ return -ENXIO; }
1364static inline int32_t qpnp_adc_tm_btm_end(void)
1365{ return -ENXIO; }
1366static inline int32_t qpnp_adc_tm_is_ready(void)
1367{ return -ENXIO; }
1368#endif
1369
Siddartha Mohanadoss7b116e12012-06-05 23:27:46 -07001370#endif