Andrew Isaacson | f137e46 | 2005-10-19 23:56:38 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2000,2001,2004 Broadcom Corporation |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or |
| 5 | * modify it under the terms of the GNU General Public License |
| 6 | * as published by the Free Software Foundation; either version 2 |
| 7 | * of the License, or (at your option) any later version. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License |
| 15 | * along with this program; if not, write to the Free Software |
| 16 | * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
| 17 | */ |
| 18 | |
| 19 | /* |
| 20 | * These are routines to set up and handle interrupts from the |
| 21 | * bcm1480 general purpose timer 0. We're using the timer as a |
| 22 | * system clock, so we set it up to run at 100 Hz. On every |
| 23 | * interrupt, we update our idea of what the time of day is, |
| 24 | * then call do_timer() in the architecture-independent kernel |
| 25 | * code to do general bookkeeping (e.g. update jiffies, run |
| 26 | * bottom halves, etc.) |
| 27 | */ |
Ralf Baechle | e9f874b | 2007-10-11 23:46:10 +0100 | [diff] [blame] | 28 | #include <linux/clockchips.h> |
Andrew Isaacson | f137e46 | 2005-10-19 23:56:38 -0700 | [diff] [blame] | 29 | #include <linux/interrupt.h> |
| 30 | #include <linux/sched.h> |
| 31 | #include <linux/spinlock.h> |
| 32 | #include <linux/kernel_stat.h> |
| 33 | |
| 34 | #include <asm/irq.h> |
Andrew Isaacson | f137e46 | 2005-10-19 23:56:38 -0700 | [diff] [blame] | 35 | #include <asm/addrspace.h> |
| 36 | #include <asm/time.h> |
| 37 | #include <asm/io.h> |
| 38 | |
| 39 | #include <asm/sibyte/bcm1480_regs.h> |
| 40 | #include <asm/sibyte/sb1250_regs.h> |
| 41 | #include <asm/sibyte/bcm1480_int.h> |
| 42 | #include <asm/sibyte/bcm1480_scd.h> |
| 43 | |
| 44 | #include <asm/sibyte/sb1250.h> |
| 45 | |
| 46 | |
| 47 | #define IMR_IP2_VAL K_BCM1480_INT_MAP_I0 |
| 48 | #define IMR_IP3_VAL K_BCM1480_INT_MAP_I1 |
| 49 | #define IMR_IP4_VAL K_BCM1480_INT_MAP_I2 |
| 50 | |
Atsushi Nemoto | 16b7b2a | 2006-10-24 00:21:27 +0900 | [diff] [blame] | 51 | #ifdef CONFIG_SIMULATION |
| 52 | #define BCM1480_HPT_VALUE 50000 |
| 53 | #else |
| 54 | #define BCM1480_HPT_VALUE 1000000 |
| 55 | #endif |
| 56 | |
Andrew Isaacson | f137e46 | 2005-10-19 23:56:38 -0700 | [diff] [blame] | 57 | extern int bcm1480_steal_irq(int irq); |
| 58 | |
Ralf Baechle | e9f874b | 2007-10-11 23:46:10 +0100 | [diff] [blame] | 59 | void __init plat_time_init(void) |
Andrew Isaacson | f137e46 | 2005-10-19 23:56:38 -0700 | [diff] [blame] | 60 | { |
Ralf Baechle | e9f874b | 2007-10-11 23:46:10 +0100 | [diff] [blame] | 61 | unsigned int cpu = smp_processor_id(); |
| 62 | unsigned int irq = K_BCM1480_INT_TIMER_0 + cpu; |
Andrew Isaacson | f137e46 | 2005-10-19 23:56:38 -0700 | [diff] [blame] | 63 | |
Ralf Baechle | e9f874b | 2007-10-11 23:46:10 +0100 | [diff] [blame] | 64 | BUG_ON(cpu > 3); /* Only have 4 general purpose timers */ |
Andrew Isaacson | f137e46 | 2005-10-19 23:56:38 -0700 | [diff] [blame] | 65 | |
Andrew Isaacson | f137e46 | 2005-10-19 23:56:38 -0700 | [diff] [blame] | 66 | bcm1480_mask_irq(cpu, irq); |
| 67 | |
| 68 | /* Map the timer interrupt to ip[4] of this cpu */ |
| 69 | __raw_writeq(IMR_IP4_VAL, IOADDR(A_BCM1480_IMR_REGISTER(cpu, R_BCM1480_IMR_INTERRUPT_MAP_BASE_H) |
| 70 | + (irq<<3))); |
| 71 | |
Andrew Isaacson | f137e46 | 2005-10-19 23:56:38 -0700 | [diff] [blame] | 72 | bcm1480_unmask_irq(cpu, irq); |
| 73 | bcm1480_steal_irq(irq); |
Ralf Baechle | e9f874b | 2007-10-11 23:46:10 +0100 | [diff] [blame] | 74 | } |
| 75 | |
| 76 | /* |
| 77 | * The general purpose timer ticks at 1 Mhz independent if |
| 78 | * the rest of the system |
| 79 | */ |
| 80 | static void sibyte_set_mode(enum clock_event_mode mode, |
| 81 | struct clock_event_device *evt) |
| 82 | { |
| 83 | unsigned int cpu = smp_processor_id(); |
| 84 | void __iomem *timer_cfg, *timer_init; |
| 85 | |
| 86 | timer_cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); |
Atsushi Nemoto | 9ee5389c | 2007-10-18 00:57:07 +0900 | [diff] [blame^] | 87 | timer_init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)); |
Ralf Baechle | e9f874b | 2007-10-11 23:46:10 +0100 | [diff] [blame] | 88 | |
| 89 | switch (mode) { |
| 90 | case CLOCK_EVT_MODE_PERIODIC: |
| 91 | __raw_writeq(0, timer_cfg); |
| 92 | __raw_writeq(BCM1480_HPT_VALUE / HZ - 1, timer_init); |
| 93 | __raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS, |
| 94 | timer_cfg); |
| 95 | break; |
| 96 | |
| 97 | case CLOCK_EVT_MODE_ONESHOT: |
| 98 | /* Stop the timer until we actually program a shot */ |
| 99 | case CLOCK_EVT_MODE_SHUTDOWN: |
| 100 | __raw_writeq(0, timer_cfg); |
| 101 | break; |
| 102 | |
| 103 | case CLOCK_EVT_MODE_UNUSED: /* shuddup gcc */ |
| 104 | ; |
| 105 | } |
| 106 | } |
| 107 | |
| 108 | struct clock_event_device sibyte_hpt_clockevent = { |
| 109 | .name = "bcm1480-counter", |
| 110 | .features = CLOCK_EVT_FEAT_PERIODIC, |
| 111 | .set_mode = sibyte_set_mode, |
| 112 | .shift = 32, |
| 113 | .irq = 0, |
| 114 | }; |
| 115 | |
| 116 | static irqreturn_t sibyte_counter_handler(int irq, void *dev_id) |
| 117 | { |
| 118 | struct clock_event_device *cd = &sibyte_hpt_clockevent; |
| 119 | unsigned int cpu = smp_processor_id(); |
| 120 | |
| 121 | /* Reset the timer */ |
| 122 | __raw_writeq(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS, |
| 123 | IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG))); |
| 124 | cd->event_handler(cd); |
| 125 | |
| 126 | return IRQ_HANDLED; |
| 127 | } |
| 128 | |
| 129 | static struct irqaction sibyte_counter_irqaction = { |
| 130 | .handler = sibyte_counter_handler, |
| 131 | .flags = IRQF_DISABLED | IRQF_PERCPU, |
| 132 | .name = "timer", |
| 133 | }; |
| 134 | |
| 135 | /* |
| 136 | * This interrupt is "special" in that it doesn't use the request_irq |
| 137 | * way to hook the irq line. The timer interrupt is initialized early |
| 138 | * enough to make this a major pain, and it's also firing enough to |
| 139 | * warrant a bit of special case code. bcm1480_timer_interrupt is |
| 140 | * called directly from irq_handler.S when IP[4] is set during an |
| 141 | * interrupt |
| 142 | */ |
| 143 | static void __init sb1480_clockevent_init(void) |
| 144 | { |
| 145 | unsigned int cpu = smp_processor_id(); |
| 146 | unsigned int irq = K_BCM1480_INT_TIMER_0 + cpu; |
| 147 | |
| 148 | setup_irq(irq, &sibyte_counter_irqaction); |
Andrew Isaacson | f137e46 | 2005-10-19 23:56:38 -0700 | [diff] [blame] | 149 | } |
| 150 | |
Ralf Baechle | 937a801 | 2006-10-07 19:44:33 +0100 | [diff] [blame] | 151 | void bcm1480_timer_interrupt(void) |
Andrew Isaacson | f137e46 | 2005-10-19 23:56:38 -0700 | [diff] [blame] | 152 | { |
| 153 | int cpu = smp_processor_id(); |
Ralf Baechle | 937a801 | 2006-10-07 19:44:33 +0100 | [diff] [blame] | 154 | int irq = K_BCM1480_INT_TIMER_0 + cpu; |
Andrew Isaacson | f137e46 | 2005-10-19 23:56:38 -0700 | [diff] [blame] | 155 | |
| 156 | /* Reset the timer */ |
| 157 | __raw_writeq(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS, |
| 158 | IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG))); |
| 159 | |
Ralf Baechle | 91a2fcc | 2007-10-11 23:46:09 +0100 | [diff] [blame] | 160 | ll_timer_interrupt(irq); |
Andrew Isaacson | f137e46 | 2005-10-19 23:56:38 -0700 | [diff] [blame] | 161 | } |
| 162 | |
Atsushi Nemoto | 0059856 | 2006-11-12 00:10:28 +0900 | [diff] [blame] | 163 | static cycle_t bcm1480_hpt_read(void) |
Andrew Isaacson | f137e46 | 2005-10-19 23:56:38 -0700 | [diff] [blame] | 164 | { |
Atsushi Nemoto | 16b7b2a | 2006-10-24 00:21:27 +0900 | [diff] [blame] | 165 | /* We assume this function is called xtime_lock held. */ |
Andrew Isaacson | f137e46 | 2005-10-19 23:56:38 -0700 | [diff] [blame] | 166 | unsigned long count = |
| 167 | __raw_readq(IOADDR(A_SCD_TIMER_REGISTER(0, R_SCD_TIMER_CNT))); |
Atsushi Nemoto | 16b7b2a | 2006-10-24 00:21:27 +0900 | [diff] [blame] | 168 | return (jiffies + 1) * (BCM1480_HPT_VALUE / HZ) - count; |
| 169 | } |
Andrew Isaacson | f137e46 | 2005-10-19 23:56:38 -0700 | [diff] [blame] | 170 | |
Atsushi Nemoto | 16b7b2a | 2006-10-24 00:21:27 +0900 | [diff] [blame] | 171 | void __init bcm1480_hpt_setup(void) |
| 172 | { |
Atsushi Nemoto | 0059856 | 2006-11-12 00:10:28 +0900 | [diff] [blame] | 173 | clocksource_mips.read = bcm1480_hpt_read; |
Atsushi Nemoto | 16b7b2a | 2006-10-24 00:21:27 +0900 | [diff] [blame] | 174 | mips_hpt_frequency = BCM1480_HPT_VALUE; |
Ralf Baechle | e9f874b | 2007-10-11 23:46:10 +0100 | [diff] [blame] | 175 | sb1480_clockevent_init(); |
Andrew Isaacson | f137e46 | 2005-10-19 23:56:38 -0700 | [diff] [blame] | 176 | } |