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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Lennert Buytenhekc852ac82006-09-18 23:26:25 +01002 * arch/arm/mach-iop32x/irq.c
Linus Torvalds1da177e2005-04-16 15:20:36 -07003 *
Lennert Buytenhek3f7e5812006-09-18 23:10:26 +01004 * Generic IOP32X IRQ handling functionality
Linus Torvalds1da177e2005-04-16 15:20:36 -07005 *
6 * Author: Rory Bolt <rorybolt@pacbell.net>
7 * Copyright (C) 2002 Rory Bolt
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
Linus Torvalds1da177e2005-04-16 15:20:36 -070012 */
Lennert Buytenhekc852ac82006-09-18 23:26:25 +010013
Linus Torvalds1da177e2005-04-16 15:20:36 -070014#include <linux/init.h>
15#include <linux/interrupt.h>
16#include <linux/list.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070017#include <asm/mach/irq.h>
18#include <asm/irq.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010019#include <mach/hardware.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070020#include <asm/mach-types.h>
21
Lennert Buytenhekc852ac82006-09-18 23:26:25 +010022static u32 iop32x_mask;
Linus Torvalds1da177e2005-04-16 15:20:36 -070023
Dan Williamsd73d8012007-05-15 01:03:36 +010024static void intctl_write(u32 val)
Linus Torvalds1da177e2005-04-16 15:20:36 -070025{
Lennert Buytenhekc852ac82006-09-18 23:26:25 +010026 asm volatile("mcr p6, 0, %0, c0, c0, 0" : : "r" (val));
Linus Torvalds1da177e2005-04-16 15:20:36 -070027}
28
Dan Williamsd73d8012007-05-15 01:03:36 +010029static void intstr_write(u32 val)
Linus Torvalds1da177e2005-04-16 15:20:36 -070030{
Lennert Buytenhekc852ac82006-09-18 23:26:25 +010031 asm volatile("mcr p6, 0, %0, c4, c0, 0" : : "r" (val));
Linus Torvalds1da177e2005-04-16 15:20:36 -070032}
33
34static void
Lennert Buytenhekc852ac82006-09-18 23:26:25 +010035iop32x_irq_mask(unsigned int irq)
Linus Torvalds1da177e2005-04-16 15:20:36 -070036{
Lennert Buytenhekc852ac82006-09-18 23:26:25 +010037 iop32x_mask &= ~(1 << irq);
38 intctl_write(iop32x_mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -070039}
40
41static void
Lennert Buytenhekc852ac82006-09-18 23:26:25 +010042iop32x_irq_unmask(unsigned int irq)
Linus Torvalds1da177e2005-04-16 15:20:36 -070043{
Lennert Buytenhekc852ac82006-09-18 23:26:25 +010044 iop32x_mask |= 1 << irq;
45 intctl_write(iop32x_mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -070046}
47
David Brownell38c677c2006-08-01 22:26:25 +010048struct irq_chip ext_chip = {
Lennert Buytenhekc852ac82006-09-18 23:26:25 +010049 .name = "IOP32x",
50 .ack = iop32x_irq_mask,
51 .mask = iop32x_irq_mask,
52 .unmask = iop32x_irq_unmask,
Linus Torvalds1da177e2005-04-16 15:20:36 -070053};
54
Lennert Buytenhekc852ac82006-09-18 23:26:25 +010055void __init iop32x_init_irq(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -070056{
Lennert Buytenhekc852ac82006-09-18 23:26:25 +010057 int i;
Linus Torvalds1da177e2005-04-16 15:20:36 -070058
Dan Williams588ef762007-02-13 17:12:04 +010059 iop_init_cp6_handler();
60
Lennert Buytenhekc852ac82006-09-18 23:26:25 +010061 intctl_write(0);
62 intstr_write(0);
Lennert Buytenhek0c92e832006-09-21 02:46:03 +010063 if (machine_is_glantank() ||
64 machine_is_iq80321() ||
Lennert Buytenheke60d07b2006-09-21 02:42:12 +010065 machine_is_iq31244() ||
Arnaud Patarda8135fc2007-07-15 20:12:23 +010066 machine_is_n2100() ||
67 machine_is_em7210())
Lennert Buytenhek7e9740b2006-09-18 23:17:36 +010068 *IOP3XX_PCIIRSR = 0x0f;
Linus Torvalds1da177e2005-04-16 15:20:36 -070069
Lennert Buytenhekc852ac82006-09-18 23:26:25 +010070 for (i = 0; i < NR_IRQS; i++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -070071 set_irq_chip(i, &ext_chip);
Russell King10dd5ce2006-11-23 11:41:32 +000072 set_irq_handler(i, handle_level_irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -070073 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
Linus Torvalds1da177e2005-04-16 15:20:36 -070074 }
75}