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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * linux/arch/arm/mm/mm-lusl7200.c
3 *
4 * Copyright (C) 2000 Steve Hill (sjhill@cotw.com)
5 *
6 * Extra MM routines for L7200 architecture
7 */
8#include <linux/kernel.h>
9#include <linux/init.h>
Thomas Gleixner427923d2006-07-01 22:32:19 +010010#include <linux/irq.h>
Deepak Saxenacb90d682005-10-14 12:49:15 +010011#include <linux/device.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070012
Deepak Saxenacb90d682005-10-14 12:49:15 +010013#include <asm/types.h>
14#include <asm/irq.h>
15#include <asm/mach-types.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010016#include <mach/hardware.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070017#include <asm/page.h>
18
Deepak Saxenacb90d682005-10-14 12:49:15 +010019#include <asm/mach/arch.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070020#include <asm/mach/map.h>
Deepak Saxenacb90d682005-10-14 12:49:15 +010021#include <asm/mach/irq.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070022
23/*
24 * IRQ base register
25 */
26#define IRQ_BASE (IO_BASE_2 + 0x1000)
27
28/*
29 * Normal IRQ registers
30 */
31#define IRQ_STATUS (*(volatile unsigned long *) (IRQ_BASE + 0x000))
32#define IRQ_RAWSTATUS (*(volatile unsigned long *) (IRQ_BASE + 0x004))
33#define IRQ_ENABLE (*(volatile unsigned long *) (IRQ_BASE + 0x008))
34#define IRQ_ENABLECLEAR (*(volatile unsigned long *) (IRQ_BASE + 0x00c))
35#define IRQ_SOFT (*(volatile unsigned long *) (IRQ_BASE + 0x010))
36#define IRQ_SOURCESEL (*(volatile unsigned long *) (IRQ_BASE + 0x018))
37
38/*
39 * Fast IRQ registers
40 */
41#define FIQ_STATUS (*(volatile unsigned long *) (IRQ_BASE + 0x100))
42#define FIQ_RAWSTATUS (*(volatile unsigned long *) (IRQ_BASE + 0x104))
43#define FIQ_ENABLE (*(volatile unsigned long *) (IRQ_BASE + 0x108))
44#define FIQ_ENABLECLEAR (*(volatile unsigned long *) (IRQ_BASE + 0x10c))
45#define FIQ_SOFT (*(volatile unsigned long *) (IRQ_BASE + 0x110))
46#define FIQ_SOURCESEL (*(volatile unsigned long *) (IRQ_BASE + 0x118))
47
48static void l7200_mask_irq(unsigned int irq)
49{
50 IRQ_ENABLECLEAR = 1 << irq;
51}
52
53static void l7200_unmask_irq(unsigned int irq)
54{
55 IRQ_ENABLE = 1 << irq;
56}
Deepak Saxenacb90d682005-10-14 12:49:15 +010057
Russell King10dd5ce2006-11-23 11:41:32 +000058static struct irq_chip l7200_irq_chip = {
Deepak Saxenacb90d682005-10-14 12:49:15 +010059 .ack = l7200_mask_irq,
60 .mask = l7200_mask_irq,
61 .unmask = l7200_unmask_irq
62};
Linus Torvalds1da177e2005-04-16 15:20:36 -070063
64static void __init l7200_init_irq(void)
65{
66 int irq;
67
68 IRQ_ENABLECLEAR = 0xffffffff; /* clear all interrupt enables */
69 FIQ_ENABLECLEAR = 0xffffffff; /* clear all fast interrupt enables */
70
71 for (irq = 0; irq < NR_IRQS; irq++) {
Deepak Saxenacb90d682005-10-14 12:49:15 +010072 set_irq_chip(irq, &l7200_irq_chip);
73 set_irq_flags(irq, IRQF_VALID);
Russell King10dd5ce2006-11-23 11:41:32 +000074 set_irq_handler(irq, handle_level_irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -070075 }
76
77 init_FIQ();
78}
79
80static struct map_desc l7200_io_desc[] __initdata = {
81 { IO_BASE, IO_START, IO_SIZE, MT_DEVICE },
82 { IO_BASE_2, IO_START_2, IO_SIZE_2, MT_DEVICE },
83 { AUX_BASE, AUX_START, AUX_SIZE, MT_DEVICE },
84 { FLASH1_BASE, FLASH1_START, FLASH1_SIZE, MT_DEVICE },
85 { FLASH2_BASE, FLASH2_START, FLASH2_SIZE, MT_DEVICE }
86};
87
88static void __init l7200_map_io(void)
89{
90 iotable_init(l7200_io_desc, ARRAY_SIZE(l7200_io_desc));
91}
92
93MACHINE_START(L7200, "LinkUp Systems L7200")
Russell Kinge9dea0c2005-07-03 17:38:58 +010094 /* Maintainer: Steve Hill / Scott McConnell */
Russell Kinge9dea0c2005-07-03 17:38:58 +010095 .phys_io = 0x80040000,
96 .io_pg_offst = ((0xd0000000) >> 18) & 0xfffc,
97 .map_io = l7200_map_io,
98 .init_irq = l7200_init_irq,
Linus Torvalds1da177e2005-04-16 15:20:36 -070099MACHINE_END
100