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Nicolas Pitre6b5cdf02008-06-27 18:56:22 -04001/*
2 * arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
3 *
4 * Marvell Orion-VoIP FXO Reference Design Setup
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/pci.h>
15#include <linux/irq.h>
16#include <linux/mtd/physmap.h>
17#include <linux/mv643xx_eth.h>
Lennert Buytenhek81600eea92008-07-14 14:29:40 +020018#include <linux/ethtool.h>
Nicolas Pitre6b5cdf02008-06-27 18:56:22 -040019#include <asm/mach-types.h>
20#include <asm/gpio.h>
21#include <asm/leds.h>
22#include <asm/mach/arch.h>
23#include <asm/mach/pci.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010024#include <mach/orion5x.h>
Nicolas Pitre6b5cdf02008-06-27 18:56:22 -040025#include "common.h"
26#include "mpp.h"
27
28/*****************************************************************************
29 * RD-88F5181L FXO Info
30 ****************************************************************************/
31/*
32 * 8M NOR flash Device bus boot chip select
33 */
34#define RD88F5181L_FXO_NOR_BOOT_BASE 0xff800000
35#define RD88F5181L_FXO_NOR_BOOT_SIZE SZ_8M
36
37
38/*****************************************************************************
39 * 8M NOR Flash on Device bus Boot chip select
40 ****************************************************************************/
41static struct physmap_flash_data rd88f5181l_fxo_nor_boot_flash_data = {
42 .width = 1,
43};
44
45static struct resource rd88f5181l_fxo_nor_boot_flash_resource = {
46 .flags = IORESOURCE_MEM,
47 .start = RD88F5181L_FXO_NOR_BOOT_BASE,
48 .end = RD88F5181L_FXO_NOR_BOOT_BASE +
49 RD88F5181L_FXO_NOR_BOOT_SIZE - 1,
50};
51
52static struct platform_device rd88f5181l_fxo_nor_boot_flash = {
53 .name = "physmap-flash",
54 .id = 0,
55 .dev = {
56 .platform_data = &rd88f5181l_fxo_nor_boot_flash_data,
57 },
58 .num_resources = 1,
59 .resource = &rd88f5181l_fxo_nor_boot_flash_resource,
60};
61
62
63/*****************************************************************************
64 * General Setup
65 ****************************************************************************/
66static struct orion5x_mpp_mode rd88f5181l_fxo_mpp_modes[] __initdata = {
67 { 0, MPP_GPIO }, /* LED1 CardBus LED (front panel) */
68 { 1, MPP_GPIO }, /* PCI_intA */
69 { 2, MPP_GPIO }, /* Hard Reset / Factory Init*/
70 { 3, MPP_GPIO }, /* FXS or DAA select */
71 { 4, MPP_GPIO }, /* LED6 - phone LED (front panel) */
72 { 5, MPP_GPIO }, /* LED5 - phone LED (front panel) */
73 { 6, MPP_PCI_CLK }, /* CPU PCI refclk */
74 { 7, MPP_PCI_CLK }, /* PCI/PCIe refclk */
75 { 8, MPP_GPIO }, /* CardBus reset */
76 { 9, MPP_GPIO }, /* GE_RXERR */
77 { 10, MPP_GPIO }, /* LED2 MiniPCI LED (front panel) */
78 { 11, MPP_GPIO }, /* Lifeline control */
79 { 12, MPP_GIGE }, /* GE_TXD[4] */
80 { 13, MPP_GIGE }, /* GE_TXD[5] */
81 { 14, MPP_GIGE }, /* GE_TXD[6] */
82 { 15, MPP_GIGE }, /* GE_TXD[7] */
83 { 16, MPP_GIGE }, /* GE_RXD[4] */
84 { 17, MPP_GIGE }, /* GE_RXD[5] */
85 { 18, MPP_GIGE }, /* GE_RXD[6] */
86 { 19, MPP_GIGE }, /* GE_RXD[7] */
87 { -1 },
88};
89
90static struct mv643xx_eth_platform_data rd88f5181l_fxo_eth_data = {
91 .phy_addr = -1,
Lennert Buytenhek81600eea92008-07-14 14:29:40 +020092 .speed = SPEED_1000,
93 .duplex = DUPLEX_FULL,
Nicolas Pitre6b5cdf02008-06-27 18:56:22 -040094};
95
96static void __init rd88f5181l_fxo_init(void)
97{
98 /*
99 * Setup basic Orion functions. Need to be called early.
100 */
101 orion5x_init();
102
103 orion5x_mpp_conf(rd88f5181l_fxo_mpp_modes);
104
105 /*
106 * Configure peripherals.
107 */
108 orion5x_ehci0_init();
109 orion5x_eth_init(&rd88f5181l_fxo_eth_data);
110 orion5x_uart0_init();
111
112 orion5x_setup_dev_boot_win(RD88F5181L_FXO_NOR_BOOT_BASE,
113 RD88F5181L_FXO_NOR_BOOT_SIZE);
114 platform_device_register(&rd88f5181l_fxo_nor_boot_flash);
115}
116
117static int __init
118rd88f5181l_fxo_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
119{
120 int irq;
121
122 /*
123 * Check for devices with hard-wired IRQs.
124 */
125 irq = orion5x_pci_map_irq(dev, slot, pin);
126 if (irq != -1)
127 return irq;
128
129 /*
130 * Mini-PCI / Cardbus slot.
131 */
132 return gpio_to_irq(1);
133}
134
135static struct hw_pci rd88f5181l_fxo_pci __initdata = {
136 .nr_controllers = 2,
137 .swizzle = pci_std_swizzle,
138 .setup = orion5x_pci_sys_setup,
139 .scan = orion5x_pci_sys_scan_bus,
140 .map_irq = rd88f5181l_fxo_pci_map_irq,
141};
142
143static int __init rd88f5181l_fxo_pci_init(void)
144{
145 if (machine_is_rd88f5181l_fxo()) {
146 orion5x_pci_set_cardbus_mode();
147 pci_common_init(&rd88f5181l_fxo_pci);
148 }
149
150 return 0;
151}
152subsys_initcall(rd88f5181l_fxo_pci_init);
153
154MACHINE_START(RD88F5181L_FXO, "Marvell Orion-VoIP FXO Reference Design")
155 /* Maintainer: Nicolas Pitre <nico@marvell.com> */
156 .phys_io = ORION5X_REGS_PHYS_BASE,
157 .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC,
158 .boot_params = 0x00000100,
159 .init_machine = rd88f5181l_fxo_init,
160 .map_io = orion5x_map_io,
161 .init_irq = orion5x_init_irq,
162 .timer = &orion5x_timer,
163 .fixup = tag_fixup_mem32,
164MACHINE_END