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Jürgen Schindele326764a2006-06-29 16:01:43 +01001/*
2 * linux/arch/arm/mach-pxa/trizeps4.c
3 *
4 * Support for the Keith und Koep Trizeps4 Module Platform.
5 *
6 * Author: Jürgen Schindele
7 * Created: 20 02, 2006
8 * Copyright: Jürgen Schindele
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/init.h>
16#include <linux/kernel.h>
17#include <linux/platform_device.h>
18#include <linux/sysdev.h>
19#include <linux/interrupt.h>
20#include <linux/sched.h>
21#include <linux/bitops.h>
22#include <linux/fb.h>
23#include <linux/ioport.h>
24#include <linux/delay.h>
25#include <linux/serial_8250.h>
26#include <linux/mtd/mtd.h>
Jürgen Schindelec9184f52007-05-07 19:48:44 +010027#include <linux/mtd/physmap.h>
Jürgen Schindele326764a2006-06-29 16:01:43 +010028#include <linux/mtd/partitions.h>
29
30#include <asm/types.h>
31#include <asm/setup.h>
32#include <asm/memory.h>
33#include <asm/mach-types.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010034#include <mach/hardware.h>
Jürgen Schindele326764a2006-06-29 16:01:43 +010035#include <asm/irq.h>
36#include <asm/sizes.h>
37
38#include <asm/mach/arch.h>
39#include <asm/mach/map.h>
40#include <asm/mach/irq.h>
41#include <asm/mach/flash.h>
42
Russell Kinga09e64f2008-08-05 16:14:15 +010043#include <mach/pxa-regs.h>
44#include <mach/pxa2xx-regs.h>
45#include <mach/pxa2xx-gpio.h>
46#include <mach/trizeps4.h>
47#include <mach/audio.h>
48#include <mach/pxafb.h>
49#include <mach/mmc.h>
50#include <mach/irda.h>
51#include <mach/ohci.h>
Jürgen Schindele326764a2006-06-29 16:01:43 +010052
53#include "generic.h"
Russell King46c41e62007-05-15 15:39:36 +010054#include "devices.h"
Jürgen Schindele326764a2006-06-29 16:01:43 +010055
56/********************************************************************************************
57 * ONBOARD FLASH
58 ********************************************************************************************/
59static struct mtd_partition trizeps4_partitions[] = {
60 {
61 .name = "Bootloader",
Jürgen Schindelec9184f52007-05-07 19:48:44 +010062 .offset = 0x00000000,
Jürgen Schindele326764a2006-06-29 16:01:43 +010063 .size = 0x00040000,
Jürgen Schindele326764a2006-06-29 16:01:43 +010064 .mask_flags = MTD_WRITEABLE /* force read-only */
65 },{
Jürgen Schindelec9184f52007-05-07 19:48:44 +010066 .name = "Backup",
67 .offset = 0x00040000,
68 .size = 0x00040000,
Jürgen Schindele326764a2006-06-29 16:01:43 +010069 },{
Jürgen Schindelec9184f52007-05-07 19:48:44 +010070 .name = "Image",
71 .offset = 0x00080000,
72 .size = 0x01080000,
73 },{
74 .name = "IPSM",
75 .offset = 0x01100000,
76 .size = 0x00e00000,
77 },{
78 .name = "Registry",
79 .offset = 0x01f00000,
Jürgen Schindele326764a2006-06-29 16:01:43 +010080 .size = MTDPART_SIZ_FULL,
Jürgen Schindele326764a2006-06-29 16:01:43 +010081 }
82};
83
Jürgen Schindelec9184f52007-05-07 19:48:44 +010084static struct physmap_flash_data trizeps4_flash_data[] = {
Jürgen Schindele326764a2006-06-29 16:01:43 +010085 {
Jürgen Schindelec9184f52007-05-07 19:48:44 +010086 .width = 4, /* bankwidth in bytes */
Jürgen Schindele326764a2006-06-29 16:01:43 +010087 .parts = trizeps4_partitions,
88 .nr_parts = ARRAY_SIZE(trizeps4_partitions)
89 }
90};
91
92static struct resource flash_resource = {
93 .start = PXA_CS0_PHYS,
Jürgen Schindelec9184f52007-05-07 19:48:44 +010094 .end = PXA_CS0_PHYS + SZ_32M - 1,
Jürgen Schindele326764a2006-06-29 16:01:43 +010095 .flags = IORESOURCE_MEM,
96};
97
98static struct platform_device flash_device = {
Jürgen Schindelec9184f52007-05-07 19:48:44 +010099 .name = "physmap-flash",
Jürgen Schindele326764a2006-06-29 16:01:43 +0100100 .id = 0,
101 .dev = {
Jürgen Schindelec9184f52007-05-07 19:48:44 +0100102 .platform_data = trizeps4_flash_data,
Jürgen Schindele326764a2006-06-29 16:01:43 +0100103 },
104 .resource = &flash_resource,
105 .num_resources = 1,
106};
107
108/********************************************************************************************
109 * DAVICOM DM9000 Ethernet
110 ********************************************************************************************/
111static struct resource dm9000_resources[] = {
112 [0] = {
113 .start = TRIZEPS4_ETH_PHYS+0x300,
114 .end = TRIZEPS4_ETH_PHYS+0x400-1,
115 .flags = IORESOURCE_MEM,
116 },
117 [1] = {
118 .start = TRIZEPS4_ETH_PHYS+0x8300,
119 .end = TRIZEPS4_ETH_PHYS+0x8400-1,
120 .flags = IORESOURCE_MEM,
121 },
122 [2] = {
123 .start = TRIZEPS4_ETH_IRQ,
124 .end = TRIZEPS4_ETH_IRQ,
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100125 .flags = (IORESOURCE_IRQ | IRQ_TYPE_EDGE_RISING),
Jürgen Schindele326764a2006-06-29 16:01:43 +0100126 },
127};
128
129static struct platform_device dm9000_device = {
130 .name = "dm9000",
131 .id = -1,
132 .num_resources = ARRAY_SIZE(dm9000_resources),
133 .resource = dm9000_resources,
134};
135
136/********************************************************************************************
137 * PXA270 serial ports
138 ********************************************************************************************/
139static struct plat_serial8250_port tri_serial_ports[] = {
140#ifdef CONFIG_SERIAL_PXA
141 /* this uses the own PXA driver */
142 {
143 0,
144 },
145#else
146 /* this uses the generic 8520 driver */
147 [0] = {
148 .membase = (void *)&FFUART,
149 .irq = IRQ_FFUART,
150 .flags = UPF_BOOT_AUTOCONF,
151 .iotype = UPIO_MEM32,
152 .regshift = 2,
153 .uartclk = (921600*16),
154 },
155 [1] = {
156 .membase = (void *)&BTUART,
157 .irq = IRQ_BTUART,
158 .flags = UPF_BOOT_AUTOCONF,
159 .iotype = UPIO_MEM32,
160 .regshift = 2,
161 .uartclk = (921600*16),
162 },
163 {
164 0,
165 },
166#endif
167};
168
169static struct platform_device uart_devices = {
170 .name = "serial8250",
171 .id = 0,
172 .dev = {
173 .platform_data = tri_serial_ports,
174 },
175 .num_resources = 0,
176 .resource = NULL,
177};
178
Jürgen Schindele326764a2006-06-29 16:01:43 +0100179static struct platform_device * trizeps4_devices[] __initdata = {
180 &flash_device,
181 &uart_devices,
182 &dm9000_device,
Jürgen Schindele326764a2006-06-29 16:01:43 +0100183};
184
185#ifdef CONFIG_MACH_TRIZEPS4_CONXS
186static short trizeps_conxs_bcr;
187
188/* PCCARD power switching supports only 3,3V */
189void board_pcmcia_power(int power)
190{
191 if (power) {
192 /* switch power on, put in reset and enable buffers */
193 trizeps_conxs_bcr |= power;
194 trizeps_conxs_bcr |= ConXS_BCR_CF_RESET;
195 trizeps_conxs_bcr &= ~(ConXS_BCR_CF_BUF_EN);
196 ConXS_BCR = trizeps_conxs_bcr;
197 /* wait a little */
198 udelay(2000);
199 /* take reset away */
200 trizeps_conxs_bcr &= ~(ConXS_BCR_CF_RESET);
201 ConXS_BCR = trizeps_conxs_bcr;
202 udelay(2000);
203 } else {
204 /* put in reset */
205 trizeps_conxs_bcr |= ConXS_BCR_CF_RESET;
206 ConXS_BCR = trizeps_conxs_bcr;
207 udelay(1000);
208 /* switch power off */
209 trizeps_conxs_bcr &= ~(0xf);
210 ConXS_BCR = trizeps_conxs_bcr;
211
212 }
Harvey Harrison8e86f422008-03-04 15:08:02 -0800213 pr_debug("%s: o%s 0x%x\n", __func__, power ? "n": "ff", trizeps_conxs_bcr);
Jürgen Schindele326764a2006-06-29 16:01:43 +0100214}
215
216/* backlight power switching for LCD panel */
217static void board_backlight_power(int on)
218{
219 if (on) {
220 trizeps_conxs_bcr |= ConXS_BCR_L_DISP;
221 } else {
222 trizeps_conxs_bcr &= ~ConXS_BCR_L_DISP;
223 }
Harvey Harrison8e86f422008-03-04 15:08:02 -0800224 pr_debug("%s: o%s 0x%x\n", __func__, on ? "n" : "ff", trizeps_conxs_bcr);
Jürgen Schindele326764a2006-06-29 16:01:43 +0100225 ConXS_BCR = trizeps_conxs_bcr;
226}
227
228/* Powersupply for MMC/SD cardslot */
229static void board_mci_power(struct device *dev, unsigned int vdd)
230{
231 struct pxamci_platform_data* p_d = dev->platform_data;
232
233 if (( 1 << vdd) & p_d->ocr_mask) {
Harvey Harrison8e86f422008-03-04 15:08:02 -0800234 pr_debug("%s: on\n", __func__);
Jürgen Schindele326764a2006-06-29 16:01:43 +0100235 /* FIXME fill in values here */
236 } else {
Harvey Harrison8e86f422008-03-04 15:08:02 -0800237 pr_debug("%s: off\n", __func__);
Jürgen Schindele326764a2006-06-29 16:01:43 +0100238 /* FIXME fill in values here */
239 }
240}
241
242static short trizeps_conxs_ircr;
243
244/* Switch modes and Power for IRDA receiver */
245static void board_irda_mode(struct device *dev, int mode)
246{
247 unsigned long flags;
248
249 local_irq_save(flags);
250 if (mode & IR_SIRMODE) {
251 /* Slow mode */
252 trizeps_conxs_ircr &= ~ConXS_IRCR_MODE;
253 } else if (mode & IR_FIRMODE) {
254 /* Fast mode */
255 trizeps_conxs_ircr |= ConXS_IRCR_MODE;
256 }
Dmitry Baryshkov0fc3ff32008-07-02 13:54:46 +0100257 pxa2xx_transceiver_mode(dev, mode);
Jürgen Schindele326764a2006-06-29 16:01:43 +0100258 if (mode & IR_OFF) {
259 trizeps_conxs_ircr |= ConXS_IRCR_SD;
260 } else {
261 trizeps_conxs_ircr &= ~ConXS_IRCR_SD;
262 }
263 /* FIXME write values to register */
264 local_irq_restore(flags);
265}
266
267#else
268/* for other baseboards define dummies */
269void board_pcmcia_power(int power) {;}
270#define board_backlight_power NULL
271#define board_mci_power NULL
272#define board_irda_mode NULL
273
274#endif /* CONFIG_MACH_TRIZEPS4_CONXS */
275EXPORT_SYMBOL(board_pcmcia_power);
276
David Howells40220c12006-10-09 12:19:47 +0100277static int trizeps4_mci_init(struct device *dev, irq_handler_t mci_detect_int, void *data)
Jürgen Schindele326764a2006-06-29 16:01:43 +0100278{
279 int err;
280 /* setup GPIO for PXA27x MMC controller */
281 pxa_gpio_mode(GPIO32_MMCCLK_MD);
282 pxa_gpio_mode(GPIO112_MMCCMD_MD);
283 pxa_gpio_mode(GPIO92_MMCDAT0_MD);
284 pxa_gpio_mode(GPIO109_MMCDAT1_MD);
285 pxa_gpio_mode(GPIO110_MMCDAT2_MD);
286 pxa_gpio_mode(GPIO111_MMCDAT3_MD);
287
288 pxa_gpio_mode(GPIO_MMC_DET | GPIO_IN);
289
Thomas Gleixner52e405e2006-07-03 02:20:05 +0200290 err = request_irq(TRIZEPS4_MMC_IRQ, mci_detect_int,
291 IRQF_DISABLED | IRQF_TRIGGER_RISING,
292 "MMC card detect", data);
Russell King2687bd32008-01-23 14:05:58 +0000293 if (err)
Jürgen Schindele326764a2006-06-29 16:01:43 +0100294 printk(KERN_ERR "trizeps4_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
Russell King2687bd32008-01-23 14:05:58 +0000295
296 return err;
Jürgen Schindele326764a2006-06-29 16:01:43 +0100297}
298
299static void trizeps4_mci_exit(struct device *dev, void *data)
300{
301 free_irq(TRIZEPS4_MMC_IRQ, data);
302}
303
304static struct pxamci_platform_data trizeps4_mci_platform_data = {
305 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
306 .init = trizeps4_mci_init,
307 .exit = trizeps4_mci_exit,
308 .setpower = board_mci_power,
309};
310
311static struct pxaficp_platform_data trizeps4_ficp_platform_data = {
312 .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
313 .transceiver_mode = board_irda_mode,
314};
315
316static int trizeps4_ohci_init(struct device *dev)
317{
318 /* setup Port1 GPIO pin. */
319 pxa_gpio_mode( 88 | GPIO_ALT_FN_1_IN); /* USBHPWR1 */
320 pxa_gpio_mode( 89 | GPIO_ALT_FN_2_OUT); /* USBHPEN1 */
321
322 /* Set the Power Control Polarity Low and Power Sense
323 Polarity Low to active low. */
324 UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
325 ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE);
326
327 return 0;
328}
329
330static void trizeps4_ohci_exit(struct device *dev)
331{
332 ;
333}
334
335static struct pxaohci_platform_data trizeps4_ohci_platform_data = {
336 .port_mode = PMM_PERPORT_MODE,
337 .init = trizeps4_ohci_init,
338 .exit = trizeps4_ohci_exit,
339};
340
341static struct map_desc trizeps4_io_desc[] __initdata = {
342 { /* ConXS CFSR */
343 .virtual = TRIZEPS4_CFSR_VIRT,
344 .pfn = __phys_to_pfn(TRIZEPS4_CFSR_PHYS),
345 .length = 0x00001000,
346 .type = MT_DEVICE
347 },
348 { /* ConXS BCR */
349 .virtual = TRIZEPS4_BOCR_VIRT,
350 .pfn = __phys_to_pfn(TRIZEPS4_BOCR_PHYS),
351 .length = 0x00001000,
352 .type = MT_DEVICE
353 },
354 { /* ConXS IRCR */
355 .virtual = TRIZEPS4_IRCR_VIRT,
356 .pfn = __phys_to_pfn(TRIZEPS4_IRCR_PHYS),
357 .length = 0x00001000,
358 .type = MT_DEVICE
359 },
360 { /* ConXS DCR */
361 .virtual = TRIZEPS4_DICR_VIRT,
362 .pfn = __phys_to_pfn(TRIZEPS4_DICR_PHYS),
363 .length = 0x00001000,
364 .type = MT_DEVICE
365 },
366 { /* ConXS UPSR */
367 .virtual = TRIZEPS4_UPSR_VIRT,
368 .pfn = __phys_to_pfn(TRIZEPS4_UPSR_PHYS),
369 .length = 0x00001000,
370 .type = MT_DEVICE
371 }
372};
373
Richard Purdied14b2722006-09-20 22:54:21 +0100374static struct pxafb_mode_info sharp_lcd_mode = {
Jürgen Schindele326764a2006-06-29 16:01:43 +0100375 .pixclock = 78000,
376 .xres = 640,
377 .yres = 480,
378 .bpp = 8,
379 .hsync_len = 4,
380 .left_margin = 4,
381 .right_margin = 4,
382 .vsync_len = 2,
383 .upper_margin = 0,
384 .lower_margin = 0,
385 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
386 .cmap_greyscale = 0,
Richard Purdied14b2722006-09-20 22:54:21 +0100387};
388
389static struct pxafb_mach_info sharp_lcd = {
390 .modes = &sharp_lcd_mode,
391 .num_modes = 1,
Jürgen Schindele326764a2006-06-29 16:01:43 +0100392 .cmap_inverse = 0,
393 .cmap_static = 0,
394 .lccr0 = LCCR0_Color | LCCR0_Pas | LCCR0_Dual,
395 .lccr3 = 0x0340ff02,
396 .pxafb_backlight_power = board_backlight_power,
397};
398
Jürgen Schindelec9184f52007-05-07 19:48:44 +0100399static struct pxafb_mode_info toshiba_lcd_mode = {
400 .pixclock = 39720,
401 .xres = 640,
402 .yres = 480,
403 .bpp = 8,
404 .hsync_len = 63,
405 .left_margin = 12,
406 .right_margin = 12,
407 .vsync_len = 4,
408 .upper_margin = 32,
409 .lower_margin = 10,
410 .sync = 0,
411 .cmap_greyscale = 0,
412};
413
414static struct pxafb_mach_info toshiba_lcd = {
415 .modes = &toshiba_lcd_mode,
416 .num_modes = 1,
417 .cmap_inverse = 0,
418 .cmap_static = 0,
419 .lccr0 = LCCR0_Color | LCCR0_Act,
420 .lccr3 = 0x03400002,
421 .pxafb_backlight_power = board_backlight_power,
422};
423
Jürgen Schindele326764a2006-06-29 16:01:43 +0100424static void __init trizeps4_init(void)
425{
426 platform_add_devices(trizeps4_devices, ARRAY_SIZE(trizeps4_devices));
427
Jürgen Schindelec9184f52007-05-07 19:48:44 +0100428/* set_pxa_fb_info(&sharp_lcd); */
429 set_pxa_fb_info(&toshiba_lcd);
Jürgen Schindele326764a2006-06-29 16:01:43 +0100430
431 pxa_set_mci_info(&trizeps4_mci_platform_data);
432 pxa_set_ficp_info(&trizeps4_ficp_platform_data);
433 pxa_set_ohci_info(&trizeps4_ohci_platform_data);
Mark Brown9f19d632008-06-10 12:30:05 +0100434 pxa_set_ac97_info(NULL);
Jürgen Schindele326764a2006-06-29 16:01:43 +0100435}
436
437static void __init trizeps4_map_io(void)
438{
439 pxa_map_io();
440 iotable_init(trizeps4_io_desc, ARRAY_SIZE(trizeps4_io_desc));
441
442 /* for DiskOnChip */
443 pxa_gpio_mode(GPIO15_nCS_1_MD);
444
445 /* for off-module PIC on ConXS board */
446 pxa_gpio_mode(GPIO_PIC | GPIO_IN);
447
448 /* UCB1400 irq */
449 pxa_gpio_mode(GPIO_UCB1400 | GPIO_IN);
450
451 /* for DM9000 LAN */
452 pxa_gpio_mode(GPIO78_nCS_2_MD);
453 pxa_gpio_mode(GPIO_DM9000 | GPIO_IN);
454
455 /* for PCMCIA device */
456 pxa_gpio_mode(GPIO_PCD | GPIO_IN);
457 pxa_gpio_mode(GPIO_PRDY | GPIO_IN);
458
459 /* for I2C adapter */
460 pxa_gpio_mode(GPIO117_I2CSCL_MD);
461 pxa_gpio_mode(GPIO118_I2CSDA_MD);
462
463 /* MMC_DET s.o. */
464 pxa_gpio_mode(GPIO_MMC_DET | GPIO_IN);
465
466 /* whats that for ??? */
467 pxa_gpio_mode(GPIO79_nCS_3_MD);
468
Jürgen Schindelec9184f52007-05-07 19:48:44 +0100469#ifdef CONFIG_LEDS
Jürgen Schindele326764a2006-06-29 16:01:43 +0100470 pxa_gpio_mode( GPIO_SYS_BUSY_LED | GPIO_OUT); /* LED1 */
471 pxa_gpio_mode( GPIO_HEARTBEAT_LED | GPIO_OUT); /* LED2 */
Jürgen Schindelec9184f52007-05-07 19:48:44 +0100472#endif
Jürgen Schindele326764a2006-06-29 16:01:43 +0100473#ifdef CONFIG_MACH_TRIZEPS4_CONXS
474#ifdef CONFIG_IDE_PXA_CF
475 /* if boot direct from compact flash dont disable power */
476 trizeps_conxs_bcr = 0x0009;
477#else
478 /* this is the reset value */
479 trizeps_conxs_bcr = 0x00A0;
480#endif
481 ConXS_BCR = trizeps_conxs_bcr;
482#endif
483
Russell King0b0a9df2008-05-18 14:59:36 +0100484#warning FIXME - accessing PM registers directly is deprecated
Jürgen Schindele326764a2006-06-29 16:01:43 +0100485 PWER = 0x00000002;
486 PFER = 0x00000000;
487 PRER = 0x00000002;
488 PGSR0 = 0x0158C000;
489 PGSR1 = 0x00FF0080;
490 PGSR2 = 0x0001C004;
491 /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */
492 PCFR |= PCFR_OPDE;
493}
494
495MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module")
496 /* MAINTAINER("Jürgen Schindele") */
497 .phys_io = 0x40000000,
498 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
499 .boot_params = TRIZEPS4_SDRAM_BASE + 0x100,
Jürgen Schindele326764a2006-06-29 16:01:43 +0100500 .init_machine = trizeps4_init,
501 .map_io = trizeps4_map_io,
Eric Miaocd491042007-06-22 04:14:09 +0100502 .init_irq = pxa27x_init_irq,
Jürgen Schindele326764a2006-06-29 16:01:43 +0100503 .timer = &pxa_timer,
504MACHINE_END
505