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Arnaud Patard3fc154b2007-06-06 21:05:49 -07001/*
2 * linux/drivers/usb/gadget/s3c2410_udc.c
3 *
4 * Samsung S3C24xx series on-chip full speed USB device controllers
5 *
6 * Copyright (C) 2004-2007 Herbert Pötzl - Arnaud Patard
7 * Additional cleanups by Ben Dooks <ben-linux@fluff.org>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
23 */
24
25#include <linux/module.h>
26#include <linux/kernel.h>
27#include <linux/delay.h>
28#include <linux/ioport.h>
29#include <linux/sched.h>
30#include <linux/slab.h>
31#include <linux/smp_lock.h>
32#include <linux/errno.h>
33#include <linux/init.h>
34#include <linux/timer.h>
35#include <linux/list.h>
36#include <linux/interrupt.h>
37#include <linux/platform_device.h>
38#include <linux/version.h>
39#include <linux/clk.h>
40
41#include <linux/debugfs.h>
42#include <linux/seq_file.h>
43
44#include <linux/usb.h>
David Brownell9454a572007-10-04 18:05:17 -070045#include <linux/usb/gadget.h>
Arnaud Patard3fc154b2007-06-06 21:05:49 -070046
47#include <asm/byteorder.h>
48#include <asm/io.h>
49#include <asm/irq.h>
50#include <asm/system.h>
51#include <asm/unaligned.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010052#include <mach/irqs.h>
Arnaud Patard3fc154b2007-06-06 21:05:49 -070053
Russell Kinga09e64f2008-08-05 16:14:15 +010054#include <mach/hardware.h>
55#include <mach/regs-gpio.h>
Ben Dooks899d5662007-11-19 22:28:13 +000056
57#include <asm/plat-s3c24xx/regs-udc.h>
58#include <asm/plat-s3c24xx/udc.h>
Arnaud Patard3fc154b2007-06-06 21:05:49 -070059
Arnaud Patard3fc154b2007-06-06 21:05:49 -070060
61#include "s3c2410_udc.h"
62
63#define DRIVER_DESC "S3C2410 USB Device Controller Gadget"
64#define DRIVER_VERSION "29 Apr 2007"
65#define DRIVER_AUTHOR "Herbert Pötzl <herbert@13thfloor.at>, " \
66 "Arnaud Patard <arnaud.patard@rtp-net.org>"
67
68static const char gadget_name[] = "s3c2410_udc";
69static const char driver_desc[] = DRIVER_DESC;
70
71static struct s3c2410_udc *the_controller;
72static struct clk *udc_clock;
73static struct clk *usb_bus_clock;
74static void __iomem *base_addr;
75static u64 rsrc_start;
76static u64 rsrc_len;
77static struct dentry *s3c2410_udc_debugfs_root;
78
79static inline u32 udc_read(u32 reg)
80{
81 return readb(base_addr + reg);
82}
83
84static inline void udc_write(u32 value, u32 reg)
85{
86 writeb(value, base_addr + reg);
87}
88
89static inline void udc_writeb(void __iomem *base, u32 value, u32 reg)
90{
91 writeb(value, base + reg);
92}
93
94static struct s3c2410_udc_mach_info *udc_info;
95
96/*************************** DEBUG FUNCTION ***************************/
97#define DEBUG_NORMAL 1
98#define DEBUG_VERBOSE 2
99
100#ifdef CONFIG_USB_S3C2410_DEBUG
101#define USB_S3C2410_DEBUG_LEVEL 0
102
103static uint32_t s3c2410_ticks = 0;
104
105static int dprintk(int level, const char *fmt, ...)
106{
107 static char printk_buf[1024];
108 static long prevticks;
109 static int invocation;
110 va_list args;
111 int len;
112
113 if (level > USB_S3C2410_DEBUG_LEVEL)
114 return 0;
115
116 if (s3c2410_ticks != prevticks) {
117 prevticks = s3c2410_ticks;
118 invocation = 0;
119 }
120
121 len = scnprintf(printk_buf,
122 sizeof(printk_buf), "%1lu.%02d USB: ",
123 prevticks, invocation++);
124
125 va_start(args, fmt);
126 len = vscnprintf(printk_buf+len,
127 sizeof(printk_buf)-len, fmt, args);
128 va_end(args);
129
130 return printk(KERN_DEBUG "%s", printk_buf);
131}
132#else
133static int dprintk(int level, const char *fmt, ...)
134{
135 return 0;
136}
137#endif
138static int s3c2410_udc_debugfs_seq_show(struct seq_file *m, void *p)
139{
140 u32 addr_reg,pwr_reg,ep_int_reg,usb_int_reg;
141 u32 ep_int_en_reg, usb_int_en_reg, ep0_csr;
142 u32 ep1_i_csr1,ep1_i_csr2,ep1_o_csr1,ep1_o_csr2;
143 u32 ep2_i_csr1,ep2_i_csr2,ep2_o_csr1,ep2_o_csr2;
144
145 addr_reg = udc_read(S3C2410_UDC_FUNC_ADDR_REG);
146 pwr_reg = udc_read(S3C2410_UDC_PWR_REG);
147 ep_int_reg = udc_read(S3C2410_UDC_EP_INT_REG);
148 usb_int_reg = udc_read(S3C2410_UDC_USB_INT_REG);
149 ep_int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
150 usb_int_en_reg = udc_read(S3C2410_UDC_USB_INT_EN_REG);
151 udc_write(0, S3C2410_UDC_INDEX_REG);
152 ep0_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
153 udc_write(1, S3C2410_UDC_INDEX_REG);
154 ep1_i_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
155 ep1_i_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG);
156 ep1_o_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
157 ep1_o_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG);
158 udc_write(2, S3C2410_UDC_INDEX_REG);
159 ep2_i_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
160 ep2_i_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG);
161 ep2_o_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
162 ep2_o_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG);
163
164 seq_printf(m, "FUNC_ADDR_REG : 0x%04X\n"
165 "PWR_REG : 0x%04X\n"
166 "EP_INT_REG : 0x%04X\n"
167 "USB_INT_REG : 0x%04X\n"
168 "EP_INT_EN_REG : 0x%04X\n"
169 "USB_INT_EN_REG : 0x%04X\n"
170 "EP0_CSR : 0x%04X\n"
171 "EP1_I_CSR1 : 0x%04X\n"
172 "EP1_I_CSR2 : 0x%04X\n"
173 "EP1_O_CSR1 : 0x%04X\n"
174 "EP1_O_CSR2 : 0x%04X\n"
175 "EP2_I_CSR1 : 0x%04X\n"
176 "EP2_I_CSR2 : 0x%04X\n"
177 "EP2_O_CSR1 : 0x%04X\n"
178 "EP2_O_CSR2 : 0x%04X\n",
179 addr_reg,pwr_reg,ep_int_reg,usb_int_reg,
180 ep_int_en_reg, usb_int_en_reg, ep0_csr,
181 ep1_i_csr1,ep1_i_csr2,ep1_o_csr1,ep1_o_csr2,
182 ep2_i_csr1,ep2_i_csr2,ep2_o_csr1,ep2_o_csr2
183 );
184
185 return 0;
186}
187
188static int s3c2410_udc_debugfs_fops_open(struct inode *inode,
189 struct file *file)
190{
191 return single_open(file, s3c2410_udc_debugfs_seq_show, NULL);
192}
193
194static const struct file_operations s3c2410_udc_debugfs_fops = {
195 .open = s3c2410_udc_debugfs_fops_open,
196 .read = seq_read,
197 .llseek = seq_lseek,
198 .release = single_release,
199 .owner = THIS_MODULE,
200};
201
202/* io macros */
203
204static inline void s3c2410_udc_clear_ep0_opr(void __iomem *base)
205{
206 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
207 udc_writeb(base, S3C2410_UDC_EP0_CSR_SOPKTRDY,
208 S3C2410_UDC_EP0_CSR_REG);
209}
210
211static inline void s3c2410_udc_clear_ep0_sst(void __iomem *base)
212{
213 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
214 writeb(0x00, base + S3C2410_UDC_EP0_CSR_REG);
215}
216
217static inline void s3c2410_udc_clear_ep0_se(void __iomem *base)
218{
219 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
220 udc_writeb(base, S3C2410_UDC_EP0_CSR_SSE, S3C2410_UDC_EP0_CSR_REG);
221}
222
223static inline void s3c2410_udc_set_ep0_ipr(void __iomem *base)
224{
225 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
226 udc_writeb(base, S3C2410_UDC_EP0_CSR_IPKRDY, S3C2410_UDC_EP0_CSR_REG);
227}
228
229static inline void s3c2410_udc_set_ep0_de(void __iomem *base)
230{
231 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
232 udc_writeb(base, S3C2410_UDC_EP0_CSR_DE, S3C2410_UDC_EP0_CSR_REG);
233}
234
235inline void s3c2410_udc_set_ep0_ss(void __iomem *b)
236{
237 udc_writeb(b, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
238 udc_writeb(b, S3C2410_UDC_EP0_CSR_SENDSTL, S3C2410_UDC_EP0_CSR_REG);
239}
240
241static inline void s3c2410_udc_set_ep0_de_out(void __iomem *base)
242{
243 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
244
245 udc_writeb(base,(S3C2410_UDC_EP0_CSR_SOPKTRDY
246 | S3C2410_UDC_EP0_CSR_DE),
247 S3C2410_UDC_EP0_CSR_REG);
248}
249
250static inline void s3c2410_udc_set_ep0_sse_out(void __iomem *base)
251{
252 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
253 udc_writeb(base, (S3C2410_UDC_EP0_CSR_SOPKTRDY
254 | S3C2410_UDC_EP0_CSR_SSE),
255 S3C2410_UDC_EP0_CSR_REG);
256}
257
258static inline void s3c2410_udc_set_ep0_de_in(void __iomem *base)
259{
260 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
261 udc_writeb(base, (S3C2410_UDC_EP0_CSR_IPKRDY
262 | S3C2410_UDC_EP0_CSR_DE),
263 S3C2410_UDC_EP0_CSR_REG);
264}
265
266/*------------------------- I/O ----------------------------------*/
267
268/*
269 * s3c2410_udc_done
270 */
271static void s3c2410_udc_done(struct s3c2410_ep *ep,
272 struct s3c2410_request *req, int status)
273{
274 unsigned halted = ep->halted;
275
276 list_del_init(&req->queue);
277
278 if (likely (req->req.status == -EINPROGRESS))
279 req->req.status = status;
280 else
281 status = req->req.status;
282
283 ep->halted = 1;
284 req->req.complete(&ep->ep, &req->req);
285 ep->halted = halted;
286}
287
288static void s3c2410_udc_nuke(struct s3c2410_udc *udc,
289 struct s3c2410_ep *ep, int status)
290{
291 /* Sanity check */
292 if (&ep->queue == NULL)
293 return;
294
295 while (!list_empty (&ep->queue)) {
296 struct s3c2410_request *req;
297 req = list_entry (ep->queue.next, struct s3c2410_request,
298 queue);
299 s3c2410_udc_done(ep, req, status);
300 }
301}
302
303static inline void s3c2410_udc_clear_ep_state(struct s3c2410_udc *dev)
304{
305 unsigned i;
306
307 /* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint
308 * fifos, and pending transactions mustn't be continued in any case.
309 */
310
311 for (i = 1; i < S3C2410_ENDPOINTS; i++)
312 s3c2410_udc_nuke(dev, &dev->ep[i], -ECONNABORTED);
313}
314
315static inline int s3c2410_udc_fifo_count_out(void)
316{
317 int tmp;
318
319 tmp = udc_read(S3C2410_UDC_OUT_FIFO_CNT2_REG) << 8;
320 tmp |= udc_read(S3C2410_UDC_OUT_FIFO_CNT1_REG);
321 return tmp;
322}
323
324/*
325 * s3c2410_udc_write_packet
326 */
327static inline int s3c2410_udc_write_packet(int fifo,
328 struct s3c2410_request *req,
329 unsigned max)
330{
331 unsigned len = min(req->req.length - req->req.actual, max);
332 u8 *buf = req->req.buf + req->req.actual;
333
334 prefetch(buf);
335
336 dprintk(DEBUG_VERBOSE, "%s %d %d %d %d\n", __func__,
337 req->req.actual, req->req.length, len, req->req.actual + len);
338
339 req->req.actual += len;
340
341 udelay(5);
342 writesb(base_addr + fifo, buf, len);
343 return len;
344}
345
346/*
347 * s3c2410_udc_write_fifo
348 *
349 * return: 0 = still running, 1 = completed, negative = errno
350 */
351static int s3c2410_udc_write_fifo(struct s3c2410_ep *ep,
352 struct s3c2410_request *req)
353{
354 unsigned count;
355 int is_last;
356 u32 idx;
357 int fifo_reg;
358 u32 ep_csr;
359
360 idx = ep->bEndpointAddress & 0x7F;
361 switch (idx) {
362 default:
363 idx = 0;
364 case 0:
365 fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
366 break;
367 case 1:
368 fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
369 break;
370 case 2:
371 fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
372 break;
373 case 3:
374 fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
375 break;
376 case 4:
377 fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
378 break;
379 }
380
381 count = s3c2410_udc_write_packet(fifo_reg, req, ep->ep.maxpacket);
382
383 /* last packet is often short (sometimes a zlp) */
384 if (count != ep->ep.maxpacket)
385 is_last = 1;
386 else if (req->req.length != req->req.actual || req->req.zero)
387 is_last = 0;
388 else
389 is_last = 2;
390
391 /* Only ep0 debug messages are interesting */
392 if (idx == 0)
393 dprintk(DEBUG_NORMAL,
394 "Written ep%d %d.%d of %d b [last %d,z %d]\n",
395 idx, count, req->req.actual, req->req.length,
396 is_last, req->req.zero);
397
398 if (is_last) {
399 /* The order is important. It prevents sending 2 packets
400 * at the same time */
401
402 if (idx == 0) {
403 /* Reset signal => no need to say 'data sent' */
404 if (! (udc_read(S3C2410_UDC_USB_INT_REG)
405 & S3C2410_UDC_USBINT_RESET))
406 s3c2410_udc_set_ep0_de_in(base_addr);
407 ep->dev->ep0state=EP0_IDLE;
408 } else {
409 udc_write(idx, S3C2410_UDC_INDEX_REG);
410 ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
411 udc_write(idx, S3C2410_UDC_INDEX_REG);
412 udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
413 S3C2410_UDC_IN_CSR1_REG);
414 }
415
416 s3c2410_udc_done(ep, req, 0);
417 is_last = 1;
418 } else {
419 if (idx == 0) {
420 /* Reset signal => no need to say 'data sent' */
421 if (! (udc_read(S3C2410_UDC_USB_INT_REG)
422 & S3C2410_UDC_USBINT_RESET))
423 s3c2410_udc_set_ep0_ipr(base_addr);
424 } else {
425 udc_write(idx, S3C2410_UDC_INDEX_REG);
426 ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
427 udc_write(idx, S3C2410_UDC_INDEX_REG);
428 udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
429 S3C2410_UDC_IN_CSR1_REG);
430 }
431 }
432
433 return is_last;
434}
435
436static inline int s3c2410_udc_read_packet(int fifo, u8 *buf,
437 struct s3c2410_request *req, unsigned avail)
438{
439 unsigned len;
440
441 len = min(req->req.length - req->req.actual, avail);
442 req->req.actual += len;
443
444 readsb(fifo + base_addr, buf, len);
445 return len;
446}
447
448/*
449 * return: 0 = still running, 1 = queue empty, negative = errno
450 */
451static int s3c2410_udc_read_fifo(struct s3c2410_ep *ep,
452 struct s3c2410_request *req)
453{
454 u8 *buf;
455 u32 ep_csr;
456 unsigned bufferspace;
457 int is_last=1;
458 unsigned avail;
459 int fifo_count = 0;
460 u32 idx;
461 int fifo_reg;
462
463 idx = ep->bEndpointAddress & 0x7F;
464
465 switch (idx) {
466 default:
467 idx = 0;
468 case 0:
469 fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
470 break;
471 case 1:
472 fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
473 break;
474 case 2:
475 fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
476 break;
477 case 3:
478 fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
479 break;
480 case 4:
481 fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
482 break;
483 }
484
485 if (!req->req.length)
486 return 1;
487
488 buf = req->req.buf + req->req.actual;
489 bufferspace = req->req.length - req->req.actual;
490 if (!bufferspace) {
491 dprintk(DEBUG_NORMAL, "%s: buffer full!\n", __func__);
492 return -1;
493 }
494
495 udc_write(idx, S3C2410_UDC_INDEX_REG);
496
497 fifo_count = s3c2410_udc_fifo_count_out();
498 dprintk(DEBUG_NORMAL, "%s fifo count : %d\n", __func__, fifo_count);
499
500 if (fifo_count > ep->ep.maxpacket)
501 avail = ep->ep.maxpacket;
502 else
503 avail = fifo_count;
504
505 fifo_count = s3c2410_udc_read_packet(fifo_reg, buf, req, avail);
506
507 /* checking this with ep0 is not accurate as we already
508 * read a control request
509 **/
510 if (idx != 0 && fifo_count < ep->ep.maxpacket) {
511 is_last = 1;
512 /* overflowed this request? flush extra data */
513 if (fifo_count != avail)
514 req->req.status = -EOVERFLOW;
515 } else {
516 is_last = (req->req.length <= req->req.actual) ? 1 : 0;
517 }
518
519 udc_write(idx, S3C2410_UDC_INDEX_REG);
520 fifo_count = s3c2410_udc_fifo_count_out();
521
522 /* Only ep0 debug messages are interesting */
523 if (idx == 0)
524 dprintk(DEBUG_VERBOSE, "%s fifo count : %d [last %d]\n",
525 __func__, fifo_count,is_last);
526
527 if (is_last) {
528 if (idx == 0) {
529 s3c2410_udc_set_ep0_de_out(base_addr);
530 ep->dev->ep0state = EP0_IDLE;
531 } else {
532 udc_write(idx, S3C2410_UDC_INDEX_REG);
533 ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
534 udc_write(idx, S3C2410_UDC_INDEX_REG);
535 udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
536 S3C2410_UDC_OUT_CSR1_REG);
537 }
538
539 s3c2410_udc_done(ep, req, 0);
540 } else {
541 if (idx == 0) {
542 s3c2410_udc_clear_ep0_opr(base_addr);
543 } else {
544 udc_write(idx, S3C2410_UDC_INDEX_REG);
545 ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
546 udc_write(idx, S3C2410_UDC_INDEX_REG);
547 udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
548 S3C2410_UDC_OUT_CSR1_REG);
549 }
550 }
551
552 return is_last;
553}
554
555static int s3c2410_udc_read_fifo_crq(struct usb_ctrlrequest *crq)
556{
557 unsigned char *outbuf = (unsigned char*)crq;
558 int bytes_read = 0;
559
560 udc_write(0, S3C2410_UDC_INDEX_REG);
561
562 bytes_read = s3c2410_udc_fifo_count_out();
563
564 dprintk(DEBUG_NORMAL, "%s: fifo_count=%d\n", __func__, bytes_read);
565
566 if (bytes_read > sizeof(struct usb_ctrlrequest))
567 bytes_read = sizeof(struct usb_ctrlrequest);
568
569 readsb(S3C2410_UDC_EP0_FIFO_REG + base_addr, outbuf, bytes_read);
570
571 dprintk(DEBUG_VERBOSE, "%s: len=%d %02x:%02x {%x,%x,%x}\n", __func__,
572 bytes_read, crq->bRequest, crq->bRequestType,
573 crq->wValue, crq->wIndex, crq->wLength);
574
575 return bytes_read;
576}
577
578static int s3c2410_udc_get_status(struct s3c2410_udc *dev,
579 struct usb_ctrlrequest *crq)
580{
581 u16 status = 0;
582 u8 ep_num = crq->wIndex & 0x7F;
583 u8 is_in = crq->wIndex & USB_DIR_IN;
584
585 switch (crq->bRequestType & USB_RECIP_MASK) {
586 case USB_RECIP_INTERFACE:
587 break;
588
589 case USB_RECIP_DEVICE:
590 status = dev->devstatus;
591 break;
592
593 case USB_RECIP_ENDPOINT:
594 if (ep_num > 4 || crq->wLength > 2)
595 return 1;
596
597 if (ep_num == 0) {
598 udc_write(0, S3C2410_UDC_INDEX_REG);
599 status = udc_read(S3C2410_UDC_IN_CSR1_REG);
600 status = status & S3C2410_UDC_EP0_CSR_SENDSTL;
601 } else {
602 udc_write(ep_num, S3C2410_UDC_INDEX_REG);
603 if (is_in) {
604 status = udc_read(S3C2410_UDC_IN_CSR1_REG);
605 status = status & S3C2410_UDC_ICSR1_SENDSTL;
606 } else {
607 status = udc_read(S3C2410_UDC_OUT_CSR1_REG);
608 status = status & S3C2410_UDC_OCSR1_SENDSTL;
609 }
610 }
611
612 status = status ? 1 : 0;
613 break;
614
615 default:
616 return 1;
617 }
618
619 /* Seems to be needed to get it working. ouch :( */
620 udelay(5);
621 udc_write(status & 0xFF, S3C2410_UDC_EP0_FIFO_REG);
622 udc_write(status >> 8, S3C2410_UDC_EP0_FIFO_REG);
623 s3c2410_udc_set_ep0_de_in(base_addr);
624
625 return 0;
626}
627/*------------------------- usb state machine -------------------------------*/
628static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value);
629
630static void s3c2410_udc_handle_ep0_idle(struct s3c2410_udc *dev,
631 struct s3c2410_ep *ep,
632 struct usb_ctrlrequest *crq,
633 u32 ep0csr)
634{
635 int len, ret, tmp;
636
637 /* start control request? */
638 if (!(ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY))
639 return;
640
641 s3c2410_udc_nuke(dev, ep, -EPROTO);
642
643 len = s3c2410_udc_read_fifo_crq(crq);
644 if (len != sizeof(*crq)) {
645 dprintk(DEBUG_NORMAL, "setup begin: fifo READ ERROR"
646 " wanted %d bytes got %d. Stalling out...\n",
647 sizeof(*crq), len);
648 s3c2410_udc_set_ep0_ss(base_addr);
649 return;
650 }
651
652 dprintk(DEBUG_NORMAL, "bRequest = %d bRequestType %d wLength = %d\n",
653 crq->bRequest, crq->bRequestType, crq->wLength);
654
655 /* cope with automagic for some standard requests. */
656 dev->req_std = (crq->bRequestType & USB_TYPE_MASK)
657 == USB_TYPE_STANDARD;
658 dev->req_config = 0;
659 dev->req_pending = 1;
660
661 switch (crq->bRequest) {
662 case USB_REQ_SET_CONFIGURATION:
663 dprintk(DEBUG_NORMAL, "USB_REQ_SET_CONFIGURATION ... \n");
664
665 if (crq->bRequestType == USB_RECIP_DEVICE) {
666 dev->req_config = 1;
667 s3c2410_udc_set_ep0_de_out(base_addr);
668 }
669 break;
670
671 case USB_REQ_SET_INTERFACE:
672 dprintk(DEBUG_NORMAL, "USB_REQ_SET_INTERFACE ... \n");
673
674 if (crq->bRequestType == USB_RECIP_INTERFACE) {
675 dev->req_config = 1;
676 s3c2410_udc_set_ep0_de_out(base_addr);
677 }
678 break;
679
680 case USB_REQ_SET_ADDRESS:
681 dprintk(DEBUG_NORMAL, "USB_REQ_SET_ADDRESS ... \n");
682
683 if (crq->bRequestType == USB_RECIP_DEVICE) {
684 tmp = crq->wValue & 0x7F;
685 dev->address = tmp;
686 udc_write((tmp | S3C2410_UDC_FUNCADDR_UPDATE),
687 S3C2410_UDC_FUNC_ADDR_REG);
688 s3c2410_udc_set_ep0_de_out(base_addr);
689 return;
690 }
691 break;
692
693 case USB_REQ_GET_STATUS:
694 dprintk(DEBUG_NORMAL, "USB_REQ_GET_STATUS ... \n");
695 s3c2410_udc_clear_ep0_opr(base_addr);
696
697 if (dev->req_std) {
698 if (!s3c2410_udc_get_status(dev, crq)) {
699 return;
700 }
701 }
702 break;
703
704 case USB_REQ_CLEAR_FEATURE:
705 s3c2410_udc_clear_ep0_opr(base_addr);
706
707 if (crq->bRequestType != USB_RECIP_ENDPOINT)
708 break;
709
710 if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
711 break;
712
713 s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 0);
714 s3c2410_udc_set_ep0_de_out(base_addr);
715 return;
716
717 case USB_REQ_SET_FEATURE:
718 s3c2410_udc_clear_ep0_opr(base_addr);
719
720 if (crq->bRequestType != USB_RECIP_ENDPOINT)
721 break;
722
723 if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
724 break;
725
726 s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 1);
727 s3c2410_udc_set_ep0_de_out(base_addr);
728 return;
729
730 default:
731 s3c2410_udc_clear_ep0_opr(base_addr);
732 break;
733 }
734
735 if (crq->bRequestType & USB_DIR_IN)
736 dev->ep0state = EP0_IN_DATA_PHASE;
737 else
738 dev->ep0state = EP0_OUT_DATA_PHASE;
739
740 ret = dev->driver->setup(&dev->gadget, crq);
741 if (ret < 0) {
742 if (dev->req_config) {
743 dprintk(DEBUG_NORMAL, "config change %02x fail %d?\n",
744 crq->bRequest, ret);
745 return;
746 }
747
748 if (ret == -EOPNOTSUPP)
749 dprintk(DEBUG_NORMAL, "Operation not supported\n");
750 else
751 dprintk(DEBUG_NORMAL,
752 "dev->driver->setup failed. (%d)\n", ret);
753
754 udelay(5);
755 s3c2410_udc_set_ep0_ss(base_addr);
756 s3c2410_udc_set_ep0_de_out(base_addr);
757 dev->ep0state = EP0_IDLE;
758 /* deferred i/o == no response yet */
759 } else if (dev->req_pending) {
760 dprintk(DEBUG_VERBOSE, "dev->req_pending... what now?\n");
761 dev->req_pending=0;
762 }
763
764 dprintk(DEBUG_VERBOSE, "ep0state %s\n", ep0states[dev->ep0state]);
765}
766
767static void s3c2410_udc_handle_ep0(struct s3c2410_udc *dev)
768{
769 u32 ep0csr;
770 struct s3c2410_ep *ep = &dev->ep[0];
771 struct s3c2410_request *req;
772 struct usb_ctrlrequest crq;
773
774 if (list_empty(&ep->queue))
775 req = NULL;
776 else
777 req = list_entry(ep->queue.next, struct s3c2410_request, queue);
778
779 /* We make the assumption that S3C2410_UDC_IN_CSR1_REG equal to
780 * S3C2410_UDC_EP0_CSR_REG when index is zero */
781
782 udc_write(0, S3C2410_UDC_INDEX_REG);
783 ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
784
785 dprintk(DEBUG_NORMAL, "ep0csr %x ep0state %s\n",
786 ep0csr, ep0states[dev->ep0state]);
787
788 /* clear stall status */
789 if (ep0csr & S3C2410_UDC_EP0_CSR_SENTSTL) {
790 s3c2410_udc_nuke(dev, ep, -EPIPE);
791 dprintk(DEBUG_NORMAL, "... clear SENT_STALL ...\n");
792 s3c2410_udc_clear_ep0_sst(base_addr);
793 dev->ep0state = EP0_IDLE;
794 return;
795 }
796
797 /* clear setup end */
798 if (ep0csr & S3C2410_UDC_EP0_CSR_SE) {
799 dprintk(DEBUG_NORMAL, "... serviced SETUP_END ...\n");
800 s3c2410_udc_nuke(dev, ep, 0);
801 s3c2410_udc_clear_ep0_se(base_addr);
802 dev->ep0state = EP0_IDLE;
803 }
804
805 switch (dev->ep0state) {
806 case EP0_IDLE:
807 s3c2410_udc_handle_ep0_idle(dev, ep, &crq, ep0csr);
808 break;
809
810 case EP0_IN_DATA_PHASE: /* GET_DESCRIPTOR etc */
811 dprintk(DEBUG_NORMAL, "EP0_IN_DATA_PHASE ... what now?\n");
812 if (!(ep0csr & S3C2410_UDC_EP0_CSR_IPKRDY) && req) {
813 s3c2410_udc_write_fifo(ep, req);
814 }
815 break;
816
817 case EP0_OUT_DATA_PHASE: /* SET_DESCRIPTOR etc */
818 dprintk(DEBUG_NORMAL, "EP0_OUT_DATA_PHASE ... what now?\n");
819 if ((ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY) && req ) {
820 s3c2410_udc_read_fifo(ep,req);
821 }
822 break;
823
824 case EP0_END_XFER:
825 dprintk(DEBUG_NORMAL, "EP0_END_XFER ... what now?\n");
826 dev->ep0state = EP0_IDLE;
827 break;
828
829 case EP0_STALL:
830 dprintk(DEBUG_NORMAL, "EP0_STALL ... what now?\n");
831 dev->ep0state = EP0_IDLE;
832 break;
833 }
834}
835
836/*
837 * handle_ep - Manage I/O endpoints
838 */
839
840static void s3c2410_udc_handle_ep(struct s3c2410_ep *ep)
841{
842 struct s3c2410_request *req;
843 int is_in = ep->bEndpointAddress & USB_DIR_IN;
844 u32 ep_csr1;
845 u32 idx;
846
847 if (likely (!list_empty(&ep->queue)))
848 req = list_entry(ep->queue.next,
849 struct s3c2410_request, queue);
850 else
851 req = NULL;
852
853 idx = ep->bEndpointAddress & 0x7F;
854
855 if (is_in) {
856 udc_write(idx, S3C2410_UDC_INDEX_REG);
857 ep_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
858 dprintk(DEBUG_VERBOSE, "ep%01d write csr:%02x %d\n",
859 idx, ep_csr1, req ? 1 : 0);
860
861 if (ep_csr1 & S3C2410_UDC_ICSR1_SENTSTL) {
862 dprintk(DEBUG_VERBOSE, "st\n");
863 udc_write(idx, S3C2410_UDC_INDEX_REG);
864 udc_write(ep_csr1 & ~S3C2410_UDC_ICSR1_SENTSTL,
865 S3C2410_UDC_IN_CSR1_REG);
866 return;
867 }
868
869 if (!(ep_csr1 & S3C2410_UDC_ICSR1_PKTRDY) && req) {
870 s3c2410_udc_write_fifo(ep,req);
871 }
872 } else {
873 udc_write(idx, S3C2410_UDC_INDEX_REG);
874 ep_csr1 = udc_read(S3C2410_UDC_OUT_CSR1_REG);
875 dprintk(DEBUG_VERBOSE, "ep%01d rd csr:%02x\n", idx, ep_csr1);
876
877 if (ep_csr1 & S3C2410_UDC_OCSR1_SENTSTL) {
878 udc_write(idx, S3C2410_UDC_INDEX_REG);
879 udc_write(ep_csr1 & ~S3C2410_UDC_OCSR1_SENTSTL,
880 S3C2410_UDC_OUT_CSR1_REG);
881 return;
882 }
883
884 if ((ep_csr1 & S3C2410_UDC_OCSR1_PKTRDY) && req) {
885 s3c2410_udc_read_fifo(ep,req);
886 }
887 }
888}
889
Russell Kinga09e64f2008-08-05 16:14:15 +0100890#include <mach/regs-irq.h>
Arnaud Patard3fc154b2007-06-06 21:05:49 -0700891
892/*
893 * s3c2410_udc_irq - interrupt handler
894 */
Jeff Garzikd8d42232007-11-21 15:13:10 -0800895static irqreturn_t s3c2410_udc_irq(int dummy, void *_dev)
Arnaud Patard3fc154b2007-06-06 21:05:49 -0700896{
897 struct s3c2410_udc *dev = _dev;
898 int usb_status;
899 int usbd_status;
900 int pwr_reg;
901 int ep0csr;
902 int i;
903 u32 idx;
904 unsigned long flags;
905
906 spin_lock_irqsave(&dev->lock, flags);
907
908 /* Driver connected ? */
909 if (!dev->driver) {
910 /* Clear interrupts */
911 udc_write(udc_read(S3C2410_UDC_USB_INT_REG),
912 S3C2410_UDC_USB_INT_REG);
913 udc_write(udc_read(S3C2410_UDC_EP_INT_REG),
914 S3C2410_UDC_EP_INT_REG);
915 }
916
917 /* Save index */
918 idx = udc_read(S3C2410_UDC_INDEX_REG);
919
920 /* Read status registers */
921 usb_status = udc_read(S3C2410_UDC_USB_INT_REG);
922 usbd_status = udc_read(S3C2410_UDC_EP_INT_REG);
923 pwr_reg = udc_read(S3C2410_UDC_PWR_REG);
924
925 udc_writeb(base_addr, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
926 ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
927
928 dprintk(DEBUG_NORMAL, "usbs=%02x, usbds=%02x, pwr=%02x ep0csr=%02x\n",
929 usb_status, usbd_status, pwr_reg, ep0csr);
930
931 /*
932 * Now, handle interrupts. There's two types :
933 * - Reset, Resume, Suspend coming -> usb_int_reg
934 * - EP -> ep_int_reg
935 */
936
937 /* RESET */
938 if (usb_status & S3C2410_UDC_USBINT_RESET) {
939 /* two kind of reset :
940 * - reset start -> pwr reg = 8
941 * - reset end -> pwr reg = 0
942 **/
943 dprintk(DEBUG_NORMAL, "USB reset csr %x pwr %x\n",
944 ep0csr, pwr_reg);
945
946 dev->gadget.speed = USB_SPEED_UNKNOWN;
947 udc_write(0x00, S3C2410_UDC_INDEX_REG);
948 udc_write((dev->ep[0].ep.maxpacket & 0x7ff) >> 3,
949 S3C2410_UDC_MAXP_REG);
950 dev->address = 0;
951
952 dev->ep0state = EP0_IDLE;
953 dev->gadget.speed = USB_SPEED_FULL;
954
955 /* clear interrupt */
956 udc_write(S3C2410_UDC_USBINT_RESET,
957 S3C2410_UDC_USB_INT_REG);
958
959 udc_write(idx, S3C2410_UDC_INDEX_REG);
960 spin_unlock_irqrestore(&dev->lock, flags);
961 return IRQ_HANDLED;
962 }
963
964 /* RESUME */
965 if (usb_status & S3C2410_UDC_USBINT_RESUME) {
966 dprintk(DEBUG_NORMAL, "USB resume\n");
967
968 /* clear interrupt */
969 udc_write(S3C2410_UDC_USBINT_RESUME,
970 S3C2410_UDC_USB_INT_REG);
971
972 if (dev->gadget.speed != USB_SPEED_UNKNOWN
973 && dev->driver
974 && dev->driver->resume)
975 dev->driver->resume(&dev->gadget);
976 }
977
978 /* SUSPEND */
979 if (usb_status & S3C2410_UDC_USBINT_SUSPEND) {
980 dprintk(DEBUG_NORMAL, "USB suspend\n");
981
982 /* clear interrupt */
983 udc_write(S3C2410_UDC_USBINT_SUSPEND,
984 S3C2410_UDC_USB_INT_REG);
985
986 if (dev->gadget.speed != USB_SPEED_UNKNOWN
987 && dev->driver
988 && dev->driver->suspend)
989 dev->driver->suspend(&dev->gadget);
990
991 dev->ep0state = EP0_IDLE;
992 }
993
994 /* EP */
995 /* control traffic */
996 /* check on ep0csr != 0 is not a good idea as clearing in_pkt_ready
997 * generate an interrupt
998 */
999 if (usbd_status & S3C2410_UDC_INT_EP0) {
1000 dprintk(DEBUG_VERBOSE, "USB ep0 irq\n");
1001 /* Clear the interrupt bit by setting it to 1 */
1002 udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_REG);
1003 s3c2410_udc_handle_ep0(dev);
1004 }
1005
1006 /* endpoint data transfers */
1007 for (i = 1; i < S3C2410_ENDPOINTS; i++) {
1008 u32 tmp = 1 << i;
1009 if (usbd_status & tmp) {
1010 dprintk(DEBUG_VERBOSE, "USB ep%d irq\n", i);
1011
1012 /* Clear the interrupt bit by setting it to 1 */
1013 udc_write(tmp, S3C2410_UDC_EP_INT_REG);
1014 s3c2410_udc_handle_ep(&dev->ep[i]);
1015 }
1016 }
1017
Jeff Garzikd8d42232007-11-21 15:13:10 -08001018 dprintk(DEBUG_VERBOSE, "irq: %d s3c2410_udc_done.\n", IRQ_USBD);
Arnaud Patard3fc154b2007-06-06 21:05:49 -07001019
1020 /* Restore old index */
1021 udc_write(idx, S3C2410_UDC_INDEX_REG);
1022
1023 spin_unlock_irqrestore(&dev->lock, flags);
1024
1025 return IRQ_HANDLED;
1026}
1027/*------------------------- s3c2410_ep_ops ----------------------------------*/
1028
1029static inline struct s3c2410_ep *to_s3c2410_ep(struct usb_ep *ep)
1030{
1031 return container_of(ep, struct s3c2410_ep, ep);
1032}
1033
1034static inline struct s3c2410_udc *to_s3c2410_udc(struct usb_gadget *gadget)
1035{
1036 return container_of(gadget, struct s3c2410_udc, gadget);
1037}
1038
1039static inline struct s3c2410_request *to_s3c2410_req(struct usb_request *req)
1040{
1041 return container_of(req, struct s3c2410_request, req);
1042}
1043
1044/*
1045 * s3c2410_udc_ep_enable
1046 */
1047static int s3c2410_udc_ep_enable(struct usb_ep *_ep,
1048 const struct usb_endpoint_descriptor *desc)
1049{
1050 struct s3c2410_udc *dev;
1051 struct s3c2410_ep *ep;
1052 u32 max, tmp;
1053 unsigned long flags;
1054 u32 csr1,csr2;
1055 u32 int_en_reg;
1056
1057 ep = to_s3c2410_ep(_ep);
1058
1059 if (!_ep || !desc || ep->desc
1060 || _ep->name == ep0name
1061 || desc->bDescriptorType != USB_DT_ENDPOINT)
1062 return -EINVAL;
1063
1064 dev = ep->dev;
1065 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
1066 return -ESHUTDOWN;
1067
1068 max = le16_to_cpu(desc->wMaxPacketSize) & 0x1fff;
1069
1070 local_irq_save (flags);
1071 _ep->maxpacket = max & 0x7ff;
1072 ep->desc = desc;
1073 ep->halted = 0;
1074 ep->bEndpointAddress = desc->bEndpointAddress;
1075
1076 /* set max packet */
1077 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1078 udc_write(max >> 3, S3C2410_UDC_MAXP_REG);
1079
1080 /* set type, direction, address; reset fifo counters */
1081 if (desc->bEndpointAddress & USB_DIR_IN) {
1082 csr1 = S3C2410_UDC_ICSR1_FFLUSH|S3C2410_UDC_ICSR1_CLRDT;
1083 csr2 = S3C2410_UDC_ICSR2_MODEIN|S3C2410_UDC_ICSR2_DMAIEN;
1084
1085 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1086 udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1087 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1088 udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1089 } else {
1090 /* don't flush in fifo or it will cause endpoint interrupt */
1091 csr1 = S3C2410_UDC_ICSR1_CLRDT;
1092 csr2 = S3C2410_UDC_ICSR2_DMAIEN;
1093
1094 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1095 udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1096 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1097 udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1098
1099 csr1 = S3C2410_UDC_OCSR1_FFLUSH | S3C2410_UDC_OCSR1_CLRDT;
1100 csr2 = S3C2410_UDC_OCSR2_DMAIEN;
1101
1102 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1103 udc_write(csr1, S3C2410_UDC_OUT_CSR1_REG);
1104 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1105 udc_write(csr2, S3C2410_UDC_OUT_CSR2_REG);
1106 }
1107
1108 /* enable irqs */
1109 int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1110 udc_write(int_en_reg | (1 << ep->num), S3C2410_UDC_EP_INT_EN_REG);
1111
1112 /* print some debug message */
1113 tmp = desc->bEndpointAddress;
1114 dprintk (DEBUG_NORMAL, "enable %s(%d) ep%x%s-blk max %02x\n",
1115 _ep->name,ep->num, tmp,
1116 desc->bEndpointAddress & USB_DIR_IN ? "in" : "out", max);
1117
1118 local_irq_restore (flags);
1119 s3c2410_udc_set_halt(_ep, 0);
1120
1121 return 0;
1122}
1123
1124/*
1125 * s3c2410_udc_ep_disable
1126 */
1127static int s3c2410_udc_ep_disable(struct usb_ep *_ep)
1128{
1129 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1130 unsigned long flags;
1131 u32 int_en_reg;
1132
1133 if (!_ep || !ep->desc) {
1134 dprintk(DEBUG_NORMAL, "%s not enabled\n",
1135 _ep ? ep->ep.name : NULL);
1136 return -EINVAL;
1137 }
1138
1139 local_irq_save(flags);
1140
1141 dprintk(DEBUG_NORMAL, "ep_disable: %s\n", _ep->name);
1142
1143 ep->desc = NULL;
1144 ep->halted = 1;
1145
1146 s3c2410_udc_nuke (ep->dev, ep, -ESHUTDOWN);
1147
1148 /* disable irqs */
1149 int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1150 udc_write(int_en_reg & ~(1<<ep->num), S3C2410_UDC_EP_INT_EN_REG);
1151
1152 local_irq_restore(flags);
1153
1154 dprintk(DEBUG_NORMAL, "%s disabled\n", _ep->name);
1155
1156 return 0;
1157}
1158
1159/*
1160 * s3c2410_udc_alloc_request
1161 */
1162static struct usb_request *
1163s3c2410_udc_alloc_request(struct usb_ep *_ep, gfp_t mem_flags)
1164{
1165 struct s3c2410_request *req;
1166
1167 dprintk(DEBUG_VERBOSE,"%s(%p,%d)\n", __func__, _ep, mem_flags);
1168
1169 if (!_ep)
1170 return NULL;
1171
1172 req = kzalloc (sizeof(struct s3c2410_request), mem_flags);
1173 if (!req)
1174 return NULL;
1175
1176 INIT_LIST_HEAD (&req->queue);
1177 return &req->req;
1178}
1179
1180/*
1181 * s3c2410_udc_free_request
1182 */
1183static void
1184s3c2410_udc_free_request(struct usb_ep *_ep, struct usb_request *_req)
1185{
1186 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1187 struct s3c2410_request *req = to_s3c2410_req(_req);
1188
1189 dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1190
1191 if (!ep || !_req || (!ep->desc && _ep->name != ep0name))
1192 return;
1193
1194 WARN_ON (!list_empty (&req->queue));
1195 kfree(req);
1196}
1197
1198/*
Arnaud Patard3fc154b2007-06-06 21:05:49 -07001199 * s3c2410_udc_queue
1200 */
1201static int s3c2410_udc_queue(struct usb_ep *_ep, struct usb_request *_req,
1202 gfp_t gfp_flags)
1203{
1204 struct s3c2410_request *req = to_s3c2410_req(_req);
1205 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1206 struct s3c2410_udc *dev;
1207 u32 ep_csr = 0;
1208 int fifo_count = 0;
1209 unsigned long flags;
1210
1211 if (unlikely (!_ep || (!ep->desc && ep->ep.name != ep0name))) {
1212 dprintk(DEBUG_NORMAL, "%s: invalid args\n", __func__);
1213 return -EINVAL;
1214 }
1215
1216 dev = ep->dev;
1217 if (unlikely (!dev->driver
1218 || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
1219 return -ESHUTDOWN;
1220 }
1221
1222 local_irq_save (flags);
1223
1224 if (unlikely(!_req || !_req->complete
1225 || !_req->buf || !list_empty(&req->queue))) {
1226 if (!_req)
1227 dprintk(DEBUG_NORMAL, "%s: 1 X X X\n", __func__);
1228 else {
1229 dprintk(DEBUG_NORMAL, "%s: 0 %01d %01d %01d\n",
1230 __func__, !_req->complete,!_req->buf,
1231 !list_empty(&req->queue));
1232 }
1233
1234 local_irq_restore(flags);
1235 return -EINVAL;
1236 }
1237
1238 _req->status = -EINPROGRESS;
1239 _req->actual = 0;
1240
1241 dprintk(DEBUG_VERBOSE, "%s: ep%x len %d\n",
1242 __func__, ep->bEndpointAddress, _req->length);
1243
1244 if (ep->bEndpointAddress) {
1245 udc_write(ep->bEndpointAddress & 0x7F, S3C2410_UDC_INDEX_REG);
1246
1247 ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN)
1248 ? S3C2410_UDC_IN_CSR1_REG
1249 : S3C2410_UDC_OUT_CSR1_REG);
1250 fifo_count = s3c2410_udc_fifo_count_out();
1251 } else {
1252 udc_write(0, S3C2410_UDC_INDEX_REG);
1253 ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
1254 fifo_count = s3c2410_udc_fifo_count_out();
1255 }
1256
1257 /* kickstart this i/o queue? */
1258 if (list_empty(&ep->queue) && !ep->halted) {
1259 if (ep->bEndpointAddress == 0 /* ep0 */) {
1260 switch (dev->ep0state) {
1261 case EP0_IN_DATA_PHASE:
1262 if (!(ep_csr&S3C2410_UDC_EP0_CSR_IPKRDY)
1263 && s3c2410_udc_write_fifo(ep,
1264 req)) {
1265 dev->ep0state = EP0_IDLE;
1266 req = NULL;
1267 }
1268 break;
1269
1270 case EP0_OUT_DATA_PHASE:
1271 if ((!_req->length)
1272 || ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1273 && s3c2410_udc_read_fifo(ep,
1274 req))) {
1275 dev->ep0state = EP0_IDLE;
1276 req = NULL;
1277 }
1278 break;
1279
1280 default:
1281 local_irq_restore(flags);
1282 return -EL2HLT;
1283 }
1284 } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0
1285 && (!(ep_csr&S3C2410_UDC_OCSR1_PKTRDY))
1286 && s3c2410_udc_write_fifo(ep, req)) {
1287 req = NULL;
1288 } else if ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1289 && fifo_count
1290 && s3c2410_udc_read_fifo(ep, req)) {
1291 req = NULL;
1292 }
1293 }
1294
1295 /* pio or dma irq handler advances the queue. */
1296 if (likely (req != 0))
1297 list_add_tail(&req->queue, &ep->queue);
1298
1299 local_irq_restore(flags);
1300
1301 dprintk(DEBUG_VERBOSE, "%s ok\n", __func__);
1302 return 0;
1303}
1304
1305/*
1306 * s3c2410_udc_dequeue
1307 */
1308static int s3c2410_udc_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1309{
1310 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1311 struct s3c2410_udc *udc;
1312 int retval = -EINVAL;
1313 unsigned long flags;
1314 struct s3c2410_request *req = NULL;
1315
1316 dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1317
1318 if (!the_controller->driver)
1319 return -ESHUTDOWN;
1320
1321 if (!_ep || !_req)
1322 return retval;
1323
1324 udc = to_s3c2410_udc(ep->gadget);
1325
1326 local_irq_save (flags);
1327
1328 list_for_each_entry (req, &ep->queue, queue) {
1329 if (&req->req == _req) {
1330 list_del_init (&req->queue);
1331 _req->status = -ECONNRESET;
1332 retval = 0;
1333 break;
1334 }
1335 }
1336
1337 if (retval == 0) {
1338 dprintk(DEBUG_VERBOSE,
1339 "dequeued req %p from %s, len %d buf %p\n",
1340 req, _ep->name, _req->length, _req->buf);
1341
1342 s3c2410_udc_done(ep, req, -ECONNRESET);
1343 }
1344
1345 local_irq_restore (flags);
1346 return retval;
1347}
1348
1349/*
1350 * s3c2410_udc_set_halt
1351 */
1352static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value)
1353{
1354 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1355 u32 ep_csr = 0;
1356 unsigned long flags;
1357 u32 idx;
1358
1359 if (unlikely (!_ep || (!ep->desc && ep->ep.name != ep0name))) {
1360 dprintk(DEBUG_NORMAL, "%s: inval 2\n", __func__);
1361 return -EINVAL;
1362 }
1363
1364 local_irq_save (flags);
1365
1366 idx = ep->bEndpointAddress & 0x7F;
1367
1368 if (idx == 0) {
1369 s3c2410_udc_set_ep0_ss(base_addr);
1370 s3c2410_udc_set_ep0_de_out(base_addr);
1371 } else {
1372 udc_write(idx, S3C2410_UDC_INDEX_REG);
1373 ep_csr = udc_read((ep->bEndpointAddress &USB_DIR_IN)
1374 ? S3C2410_UDC_IN_CSR1_REG
1375 : S3C2410_UDC_OUT_CSR1_REG);
1376
1377 if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
1378 if (value)
1379 udc_write(ep_csr | S3C2410_UDC_ICSR1_SENDSTL,
1380 S3C2410_UDC_IN_CSR1_REG);
1381 else {
1382 ep_csr &= ~S3C2410_UDC_ICSR1_SENDSTL;
1383 udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1384 ep_csr |= S3C2410_UDC_ICSR1_CLRDT;
1385 udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1386 }
1387 } else {
1388 if (value)
1389 udc_write(ep_csr | S3C2410_UDC_OCSR1_SENDSTL,
1390 S3C2410_UDC_OUT_CSR1_REG);
1391 else {
1392 ep_csr &= ~S3C2410_UDC_OCSR1_SENDSTL;
1393 udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1394 ep_csr |= S3C2410_UDC_OCSR1_CLRDT;
1395 udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1396 }
1397 }
1398 }
1399
1400 ep->halted = value ? 1 : 0;
1401 local_irq_restore (flags);
1402
1403 return 0;
1404}
1405
1406static const struct usb_ep_ops s3c2410_ep_ops = {
1407 .enable = s3c2410_udc_ep_enable,
1408 .disable = s3c2410_udc_ep_disable,
1409
1410 .alloc_request = s3c2410_udc_alloc_request,
1411 .free_request = s3c2410_udc_free_request,
1412
Arnaud Patard3fc154b2007-06-06 21:05:49 -07001413 .queue = s3c2410_udc_queue,
1414 .dequeue = s3c2410_udc_dequeue,
1415
1416 .set_halt = s3c2410_udc_set_halt,
1417};
1418
1419/*------------------------- usb_gadget_ops ----------------------------------*/
1420
1421/*
1422 * s3c2410_udc_get_frame
1423 */
1424static int s3c2410_udc_get_frame(struct usb_gadget *_gadget)
1425{
1426 int tmp;
1427
1428 dprintk(DEBUG_VERBOSE, "%s()\n", __func__);
1429
1430 tmp = udc_read(S3C2410_UDC_FRAME_NUM2_REG) << 8;
1431 tmp |= udc_read(S3C2410_UDC_FRAME_NUM1_REG);
1432 return tmp;
1433}
1434
1435/*
1436 * s3c2410_udc_wakeup
1437 */
1438static int s3c2410_udc_wakeup(struct usb_gadget *_gadget)
1439{
1440 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1441 return 0;
1442}
1443
1444/*
1445 * s3c2410_udc_set_selfpowered
1446 */
1447static int s3c2410_udc_set_selfpowered(struct usb_gadget *gadget, int value)
1448{
1449 struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1450
1451 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1452
1453 if (value)
1454 udc->devstatus |= (1 << USB_DEVICE_SELF_POWERED);
1455 else
1456 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
1457
1458 return 0;
1459}
1460
1461static void s3c2410_udc_disable(struct s3c2410_udc *dev);
1462static void s3c2410_udc_enable(struct s3c2410_udc *dev);
1463
1464static int s3c2410_udc_set_pullup(struct s3c2410_udc *udc, int is_on)
1465{
1466 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1467
1468 if (udc_info && udc_info->udc_command) {
1469 if (is_on)
1470 s3c2410_udc_enable(udc);
1471 else {
1472 if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
1473 if (udc->driver && udc->driver->disconnect)
1474 udc->driver->disconnect(&udc->gadget);
1475
1476 }
1477 s3c2410_udc_disable(udc);
1478 }
1479 }
1480 else
1481 return -EOPNOTSUPP;
1482
1483 return 0;
1484}
1485
1486static int s3c2410_udc_vbus_session(struct usb_gadget *gadget, int is_active)
1487{
1488 struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1489
1490 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1491
1492 udc->vbus = (is_active != 0);
1493 s3c2410_udc_set_pullup(udc, is_active);
1494 return 0;
1495}
1496
1497static int s3c2410_udc_pullup(struct usb_gadget *gadget, int is_on)
1498{
1499 struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1500
1501 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1502
1503 s3c2410_udc_set_pullup(udc, is_on ? 0 : 1);
1504 return 0;
1505}
1506
1507static irqreturn_t s3c2410_udc_vbus_irq(int irq, void *_dev)
1508{
1509 struct s3c2410_udc *dev = _dev;
1510 unsigned int value;
1511
1512 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
Ben Dooks5f629ad2007-11-19 22:28:15 +00001513
1514 /* some cpus cannot read from an line configured to IRQ! */
1515 s3c2410_gpio_cfgpin(udc_info->vbus_pin, S3C2410_GPIO_INPUT);
Arnaud Patard3fc154b2007-06-06 21:05:49 -07001516 value = s3c2410_gpio_getpin(udc_info->vbus_pin);
Ben Dooks5f629ad2007-11-19 22:28:15 +00001517 s3c2410_gpio_cfgpin(udc_info->vbus_pin, S3C2410_GPIO_SFN2);
Arnaud Patard3fc154b2007-06-06 21:05:49 -07001518
1519 if (udc_info->vbus_pin_inverted)
1520 value = !value;
1521
1522 if (value != dev->vbus)
1523 s3c2410_udc_vbus_session(&dev->gadget, value);
1524
1525 return IRQ_HANDLED;
1526}
1527
1528static int s3c2410_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1529{
1530 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1531
1532 if (udc_info && udc_info->vbus_draw) {
1533 udc_info->vbus_draw(ma);
1534 return 0;
1535 }
1536
1537 return -ENOTSUPP;
1538}
1539
1540static const struct usb_gadget_ops s3c2410_ops = {
1541 .get_frame = s3c2410_udc_get_frame,
1542 .wakeup = s3c2410_udc_wakeup,
1543 .set_selfpowered = s3c2410_udc_set_selfpowered,
1544 .pullup = s3c2410_udc_pullup,
1545 .vbus_session = s3c2410_udc_vbus_session,
1546 .vbus_draw = s3c2410_vbus_draw,
1547};
1548
1549/*------------------------- gadget driver handling---------------------------*/
1550/*
1551 * s3c2410_udc_disable
1552 */
1553static void s3c2410_udc_disable(struct s3c2410_udc *dev)
1554{
1555 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1556
1557 /* Disable all interrupts */
1558 udc_write(0x00, S3C2410_UDC_USB_INT_EN_REG);
1559 udc_write(0x00, S3C2410_UDC_EP_INT_EN_REG);
1560
1561 /* Clear the interrupt registers */
1562 udc_write(S3C2410_UDC_USBINT_RESET
1563 | S3C2410_UDC_USBINT_RESUME
1564 | S3C2410_UDC_USBINT_SUSPEND,
1565 S3C2410_UDC_USB_INT_REG);
1566
1567 udc_write(0x1F, S3C2410_UDC_EP_INT_REG);
1568
1569 /* Good bye, cruel world */
1570 if (udc_info && udc_info->udc_command)
1571 udc_info->udc_command(S3C2410_UDC_P_DISABLE);
1572
1573 /* Set speed to unknown */
1574 dev->gadget.speed = USB_SPEED_UNKNOWN;
1575}
1576
1577/*
1578 * s3c2410_udc_reinit
1579 */
1580static void s3c2410_udc_reinit(struct s3c2410_udc *dev)
1581{
1582 u32 i;
1583
1584 /* device/ep0 records init */
1585 INIT_LIST_HEAD (&dev->gadget.ep_list);
1586 INIT_LIST_HEAD (&dev->gadget.ep0->ep_list);
1587 dev->ep0state = EP0_IDLE;
1588
1589 for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1590 struct s3c2410_ep *ep = &dev->ep[i];
1591
1592 if (i != 0)
1593 list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list);
1594
1595 ep->dev = dev;
1596 ep->desc = NULL;
1597 ep->halted = 0;
1598 INIT_LIST_HEAD (&ep->queue);
1599 }
1600}
1601
1602/*
1603 * s3c2410_udc_enable
1604 */
1605static void s3c2410_udc_enable(struct s3c2410_udc *dev)
1606{
1607 int i;
1608
1609 dprintk(DEBUG_NORMAL, "s3c2410_udc_enable called\n");
1610
1611 /* dev->gadget.speed = USB_SPEED_UNKNOWN; */
1612 dev->gadget.speed = USB_SPEED_FULL;
1613
1614 /* Set MAXP for all endpoints */
1615 for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1616 udc_write(i, S3C2410_UDC_INDEX_REG);
1617 udc_write((dev->ep[i].ep.maxpacket & 0x7ff) >> 3,
1618 S3C2410_UDC_MAXP_REG);
1619 }
1620
1621 /* Set default power state */
1622 udc_write(DEFAULT_POWER_STATE, S3C2410_UDC_PWR_REG);
1623
1624 /* Enable reset and suspend interrupt interrupts */
1625 udc_write(S3C2410_UDC_USBINT_RESET | S3C2410_UDC_USBINT_SUSPEND,
1626 S3C2410_UDC_USB_INT_EN_REG);
1627
1628 /* Enable ep0 interrupt */
1629 udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_EN_REG);
1630
1631 /* time to say "hello, world" */
1632 if (udc_info && udc_info->udc_command)
1633 udc_info->udc_command(S3C2410_UDC_P_ENABLE);
1634}
1635
1636/*
1637 * usb_gadget_register_driver
1638 */
1639int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1640{
1641 struct s3c2410_udc *udc = the_controller;
1642 int retval;
1643
1644 dprintk(DEBUG_NORMAL, "usb_gadget_register_driver() '%s'\n",
1645 driver->driver.name);
1646
1647 /* Sanity checks */
1648 if (!udc)
1649 return -ENODEV;
1650
1651 if (udc->driver)
1652 return -EBUSY;
1653
1654 if (!driver->bind || !driver->setup
1655 || driver->speed != USB_SPEED_FULL) {
1656 printk(KERN_ERR "Invalid driver: bind %p setup %p speed %d\n",
1657 driver->bind, driver->setup, driver->speed);
1658 return -EINVAL;
1659 }
1660#if defined(MODULE)
1661 if (!driver->unbind) {
1662 printk(KERN_ERR "Invalid driver: no unbind method\n");
1663 return -EINVAL;
1664 }
1665#endif
1666
1667 /* Hook the driver */
1668 udc->driver = driver;
1669 udc->gadget.dev.driver = &driver->driver;
1670
1671 /* Bind the driver */
1672 if ((retval = device_add(&udc->gadget.dev)) != 0) {
1673 printk(KERN_ERR "Error in device_add() : %d\n",retval);
1674 goto register_error;
1675 }
1676
1677 dprintk(DEBUG_NORMAL, "binding gadget driver '%s'\n",
1678 driver->driver.name);
1679
1680 if ((retval = driver->bind (&udc->gadget)) != 0) {
1681 device_del(&udc->gadget.dev);
1682 goto register_error;
1683 }
1684
1685 /* Enable udc */
1686 s3c2410_udc_enable(udc);
1687
1688 return 0;
1689
1690register_error:
1691 udc->driver = NULL;
1692 udc->gadget.dev.driver = NULL;
1693 return retval;
1694}
1695
1696/*
1697 * usb_gadget_unregister_driver
1698 */
1699int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1700{
1701 struct s3c2410_udc *udc = the_controller;
1702
1703 if (!udc)
1704 return -ENODEV;
1705
1706 if (!driver || driver != udc->driver || !driver->unbind)
1707 return -EINVAL;
1708
1709 dprintk(DEBUG_NORMAL,"usb_gadget_register_driver() '%s'\n",
1710 driver->driver.name);
1711
1712 if (driver->disconnect)
1713 driver->disconnect(&udc->gadget);
1714
1715 device_del(&udc->gadget.dev);
1716 udc->driver = NULL;
1717
1718 /* Disable udc */
1719 s3c2410_udc_disable(udc);
1720
1721 return 0;
1722}
1723
1724/*---------------------------------------------------------------------------*/
1725static struct s3c2410_udc memory = {
1726 .gadget = {
1727 .ops = &s3c2410_ops,
1728 .ep0 = &memory.ep[0].ep,
1729 .name = gadget_name,
1730 .dev = {
1731 .bus_id = "gadget",
1732 },
1733 },
1734
1735 /* control endpoint */
1736 .ep[0] = {
1737 .num = 0,
1738 .ep = {
1739 .name = ep0name,
1740 .ops = &s3c2410_ep_ops,
1741 .maxpacket = EP0_FIFO_SIZE,
1742 },
1743 .dev = &memory,
1744 },
1745
1746 /* first group of endpoints */
1747 .ep[1] = {
1748 .num = 1,
1749 .ep = {
1750 .name = "ep1-bulk",
1751 .ops = &s3c2410_ep_ops,
1752 .maxpacket = EP_FIFO_SIZE,
1753 },
1754 .dev = &memory,
1755 .fifo_size = EP_FIFO_SIZE,
1756 .bEndpointAddress = 1,
1757 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1758 },
1759 .ep[2] = {
1760 .num = 2,
1761 .ep = {
1762 .name = "ep2-bulk",
1763 .ops = &s3c2410_ep_ops,
1764 .maxpacket = EP_FIFO_SIZE,
1765 },
1766 .dev = &memory,
1767 .fifo_size = EP_FIFO_SIZE,
1768 .bEndpointAddress = 2,
1769 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1770 },
1771 .ep[3] = {
1772 .num = 3,
1773 .ep = {
1774 .name = "ep3-bulk",
1775 .ops = &s3c2410_ep_ops,
1776 .maxpacket = EP_FIFO_SIZE,
1777 },
1778 .dev = &memory,
1779 .fifo_size = EP_FIFO_SIZE,
1780 .bEndpointAddress = 3,
1781 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1782 },
1783 .ep[4] = {
1784 .num = 4,
1785 .ep = {
1786 .name = "ep4-bulk",
1787 .ops = &s3c2410_ep_ops,
1788 .maxpacket = EP_FIFO_SIZE,
1789 },
1790 .dev = &memory,
1791 .fifo_size = EP_FIFO_SIZE,
1792 .bEndpointAddress = 4,
1793 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1794 }
1795
1796};
1797
1798/*
1799 * probe - binds to the platform device
1800 */
1801static int s3c2410_udc_probe(struct platform_device *pdev)
1802{
1803 struct s3c2410_udc *udc = &memory;
1804 struct device *dev = &pdev->dev;
1805 int retval;
1806 unsigned int irq;
1807
1808 dev_dbg(dev, "%s()\n", __func__);
1809
1810 usb_bus_clock = clk_get(NULL, "usb-bus-gadget");
1811 if (IS_ERR(usb_bus_clock)) {
1812 dev_err(dev, "failed to get usb bus clock source\n");
1813 return PTR_ERR(usb_bus_clock);
1814 }
1815
1816 clk_enable(usb_bus_clock);
1817
1818 udc_clock = clk_get(NULL, "usb-device");
1819 if (IS_ERR(udc_clock)) {
1820 dev_err(dev, "failed to get udc clock source\n");
1821 return PTR_ERR(udc_clock);
1822 }
1823
1824 clk_enable(udc_clock);
1825
1826 mdelay(10);
1827
1828 dev_dbg(dev, "got and enabled clocks\n");
1829
1830 if (strncmp(pdev->name, "s3c2440", 7) == 0) {
1831 dev_info(dev, "S3C2440: increasing FIFO to 128 bytes\n");
1832 memory.ep[1].fifo_size = S3C2440_EP_FIFO_SIZE;
1833 memory.ep[2].fifo_size = S3C2440_EP_FIFO_SIZE;
1834 memory.ep[3].fifo_size = S3C2440_EP_FIFO_SIZE;
1835 memory.ep[4].fifo_size = S3C2440_EP_FIFO_SIZE;
1836 }
1837
1838 spin_lock_init (&udc->lock);
1839 udc_info = pdev->dev.platform_data;
1840
1841 rsrc_start = S3C2410_PA_USBDEV;
1842 rsrc_len = S3C24XX_SZ_USBDEV;
1843
1844 if (!request_mem_region(rsrc_start, rsrc_len, gadget_name))
1845 return -EBUSY;
1846
1847 base_addr = ioremap(rsrc_start, rsrc_len);
1848 if (!base_addr) {
1849 retval = -ENOMEM;
1850 goto err_mem;
1851 }
1852
1853 device_initialize(&udc->gadget.dev);
1854 udc->gadget.dev.parent = &pdev->dev;
1855 udc->gadget.dev.dma_mask = pdev->dev.dma_mask;
1856
1857 the_controller = udc;
1858 platform_set_drvdata(pdev, udc);
1859
1860 s3c2410_udc_disable(udc);
1861 s3c2410_udc_reinit(udc);
1862
1863 /* irq setup after old hardware state is cleaned up */
1864 retval = request_irq(IRQ_USBD, s3c2410_udc_irq,
1865 IRQF_DISABLED, gadget_name, udc);
1866
1867 if (retval != 0) {
1868 dev_err(dev, "cannot get irq %i, err %d\n", IRQ_USBD, retval);
1869 retval = -EBUSY;
1870 goto err_map;
1871 }
1872
1873 dev_dbg(dev, "got irq %i\n", IRQ_USBD);
1874
1875 if (udc_info && udc_info->vbus_pin > 0) {
1876 irq = s3c2410_gpio_getirq(udc_info->vbus_pin);
1877 retval = request_irq(irq, s3c2410_udc_vbus_irq,
Ben Dooks8802bca2007-11-19 22:28:14 +00001878 IRQF_DISABLED | IRQF_TRIGGER_RISING
1879 | IRQF_TRIGGER_FALLING | IRQF_SHARED,
1880 gadget_name, udc);
Arnaud Patard3fc154b2007-06-06 21:05:49 -07001881
1882 if (retval != 0) {
1883 dev_err(dev, "can't get vbus irq %i, err %d\n",
1884 irq, retval);
1885 retval = -EBUSY;
1886 goto err_int;
1887 }
1888
1889 dev_dbg(dev, "got irq %i\n", irq);
1890 } else {
1891 udc->vbus = 1;
1892 }
1893
1894 if (s3c2410_udc_debugfs_root) {
1895 udc->regs_info = debugfs_create_file("registers", S_IRUGO,
1896 s3c2410_udc_debugfs_root,
1897 udc, &s3c2410_udc_debugfs_fops);
1898 if (IS_ERR(udc->regs_info)) {
1899 dev_warn(dev, "debugfs file creation failed %ld\n",
1900 PTR_ERR(udc->regs_info));
1901 udc->regs_info = NULL;
1902 }
1903 }
1904
1905 dev_dbg(dev, "probe ok\n");
1906
1907 return 0;
1908
1909err_int:
1910 free_irq(IRQ_USBD, udc);
1911err_map:
1912 iounmap(base_addr);
1913err_mem:
1914 release_mem_region(rsrc_start, rsrc_len);
1915
1916 return retval;
1917}
1918
1919/*
1920 * s3c2410_udc_remove
1921 */
1922static int s3c2410_udc_remove(struct platform_device *pdev)
1923{
1924 struct s3c2410_udc *udc = platform_get_drvdata(pdev);
1925 unsigned int irq;
1926
1927 dev_dbg(&pdev->dev, "%s()\n", __func__);
1928 if (udc->driver)
1929 return -EBUSY;
1930
1931 debugfs_remove(udc->regs_info);
1932
1933 if (udc_info && udc_info->vbus_pin > 0) {
1934 irq = s3c2410_gpio_getirq(udc_info->vbus_pin);
1935 free_irq(irq, udc);
1936 }
1937
1938 free_irq(IRQ_USBD, udc);
1939
1940 iounmap(base_addr);
1941 release_mem_region(rsrc_start, rsrc_len);
1942
1943 platform_set_drvdata(pdev, NULL);
1944
1945 if (!IS_ERR(udc_clock) && udc_clock != NULL) {
1946 clk_disable(udc_clock);
1947 clk_put(udc_clock);
1948 udc_clock = NULL;
1949 }
1950
1951 if (!IS_ERR(usb_bus_clock) && usb_bus_clock != NULL) {
1952 clk_disable(usb_bus_clock);
1953 clk_put(usb_bus_clock);
1954 usb_bus_clock = NULL;
1955 }
1956
1957 dev_dbg(&pdev->dev, "%s: remove ok\n", __func__);
1958 return 0;
1959}
1960
1961#ifdef CONFIG_PM
1962static int s3c2410_udc_suspend(struct platform_device *pdev, pm_message_t message)
1963{
1964 if (udc_info && udc_info->udc_command)
1965 udc_info->udc_command(S3C2410_UDC_P_DISABLE);
1966
1967 return 0;
1968}
1969
1970static int s3c2410_udc_resume(struct platform_device *pdev)
1971{
1972 if (udc_info && udc_info->udc_command)
1973 udc_info->udc_command(S3C2410_UDC_P_ENABLE);
1974
1975 return 0;
1976}
1977#else
1978#define s3c2410_udc_suspend NULL
1979#define s3c2410_udc_resume NULL
1980#endif
1981
1982static struct platform_driver udc_driver_2410 = {
1983 .driver = {
1984 .name = "s3c2410-usbgadget",
1985 .owner = THIS_MODULE,
1986 },
1987 .probe = s3c2410_udc_probe,
1988 .remove = s3c2410_udc_remove,
1989 .suspend = s3c2410_udc_suspend,
1990 .resume = s3c2410_udc_resume,
1991};
1992
1993static struct platform_driver udc_driver_2440 = {
1994 .driver = {
1995 .name = "s3c2440-usbgadget",
1996 .owner = THIS_MODULE,
1997 },
1998 .probe = s3c2410_udc_probe,
1999 .remove = s3c2410_udc_remove,
2000 .suspend = s3c2410_udc_suspend,
2001 .resume = s3c2410_udc_resume,
2002};
2003
2004static int __init udc_init(void)
2005{
2006 int retval;
2007
2008 dprintk(DEBUG_NORMAL, "%s: version %s\n", gadget_name, DRIVER_VERSION);
2009
2010 s3c2410_udc_debugfs_root = debugfs_create_dir(gadget_name, NULL);
2011 if (IS_ERR(s3c2410_udc_debugfs_root)) {
2012 printk(KERN_ERR "%s: debugfs dir creation failed %ld\n",
2013 gadget_name, PTR_ERR(s3c2410_udc_debugfs_root));
2014 s3c2410_udc_debugfs_root = NULL;
2015 }
2016
2017 retval = platform_driver_register(&udc_driver_2410);
2018 if (retval)
2019 goto err;
2020
2021 retval = platform_driver_register(&udc_driver_2440);
2022 if (retval)
2023 goto err;
2024
2025 return 0;
2026
2027err:
2028 debugfs_remove(s3c2410_udc_debugfs_root);
2029 return retval;
2030}
2031
2032static void __exit udc_exit(void)
2033{
2034 platform_driver_unregister(&udc_driver_2410);
2035 platform_driver_unregister(&udc_driver_2440);
2036 debugfs_remove(s3c2410_udc_debugfs_root);
2037}
2038
2039EXPORT_SYMBOL(usb_gadget_unregister_driver);
2040EXPORT_SYMBOL(usb_gadget_register_driver);
2041
2042module_init(udc_init);
2043module_exit(udc_exit);
2044
2045MODULE_AUTHOR(DRIVER_AUTHOR);
2046MODULE_DESCRIPTION(DRIVER_DESC);
2047MODULE_VERSION(DRIVER_VERSION);
2048MODULE_LICENSE("GPL");
Kay Sieversf34c32f2008-04-10 21:29:21 -07002049MODULE_ALIAS("platform:s3c2410-usbgadget");
2050MODULE_ALIAS("platform:s3c2440-usbgadget");