| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * include/asm-arm/arch-imx/entry-macro.S |
| 3 | * |
| 4 | * Low-level IRQ helper macros for iMX-based platforms |
| 5 | * |
| 6 | * This file is licensed under the terms of the GNU General Public |
| 7 | * License version 2. This program is licensed "as is" without any |
| 8 | * warranty of any kind, whether express or implied. |
| 9 | */ |
| Russell King | be50972 | 2008-08-04 10:41:28 +0100 | [diff] [blame] | 10 | #include <asm/arch/hardware.h> |
| Russell King | 78ff18a | 2006-01-03 17:39:34 +0000 | [diff] [blame] | 11 | |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 12 | .macro disable_fiq |
| 13 | .endm |
| Dan Williams | f80dff9 | 2007-02-16 22:16:32 +0100 | [diff] [blame] | 14 | |
| 15 | .macro get_irqnr_preamble, base, tmp |
| 16 | .endm |
| 17 | |
| 18 | .macro arch_ret_to_user, tmp1, tmp2 |
| 19 | .endm |
| 20 | |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 21 | #define AITC_NIVECSR 0x40 |
| 22 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
| Pavel Pisa | 3b581f5 | 2007-02-12 23:34:38 +0100 | [diff] [blame] | 23 | ldr \base, =IO_ADDRESS(IMX_AITC_BASE) |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 24 | @ Load offset & priority of the highest priority |
| 25 | @ interrupt pending. |
| Pavel Pisa | 3b581f5 | 2007-02-12 23:34:38 +0100 | [diff] [blame] | 26 | ldr \irqstat, [\base, #AITC_NIVECSR] |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 27 | @ Shift off the priority leaving the offset or |
| Pavel Pisa | 3b581f5 | 2007-02-12 23:34:38 +0100 | [diff] [blame] | 28 | @ "interrupt number", use arithmetic shift to |
| 29 | @ transform illegal source (0xffff) as -1 |
| 30 | mov \irqnr, \irqstat, asr #16 |
| 31 | adds \tmp, \irqnr, #1 |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 32 | .endm |