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Catalin Marinas8ad68bb2005-10-31 14:25:02 +00001/*
2 * linux/include/asm-arm/arch-realview/platform.h
3 *
4 * Copyright (c) ARM Limited 2003. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
Catalin Marinas356cb472008-02-04 17:34:58 +010021#ifndef __ASM_ARCH_PLATFORM_H
22#define __ASM_ARCH_PLATFORM_H
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000023
24/*
25 * Memory definitions
26 */
27#define REALVIEW_BOOT_ROM_LO 0x30000000 /* DoC Base (64Mb)...*/
28#define REALVIEW_BOOT_ROM_HI 0x30000000
29#define REALVIEW_BOOT_ROM_BASE REALVIEW_BOOT_ROM_HI /* Normal position */
30#define REALVIEW_BOOT_ROM_SIZE SZ_64M
31
32#define REALVIEW_SSRAM_BASE /* REALVIEW_SSMC_BASE ? */
33#define REALVIEW_SSRAM_SIZE SZ_2M
34
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000035/*
36 * SDRAM
37 */
38#define REALVIEW_SDRAM_BASE 0x00000000
39
40/*
41 * Logic expansion modules
42 *
43 */
44
45
46/* ------------------------------------------------------------------------
47 * RealView Registers
48 * ------------------------------------------------------------------------
49 *
50 */
51#define REALVIEW_SYS_ID_OFFSET 0x00
52#define REALVIEW_SYS_SW_OFFSET 0x04
53#define REALVIEW_SYS_LED_OFFSET 0x08
54#define REALVIEW_SYS_OSC0_OFFSET 0x0C
55
56#define REALVIEW_SYS_OSC1_OFFSET 0x10
57#define REALVIEW_SYS_OSC2_OFFSET 0x14
58#define REALVIEW_SYS_OSC3_OFFSET 0x18
59#define REALVIEW_SYS_OSC4_OFFSET 0x1C /* OSC1 for RealView/AB */
60
61#define REALVIEW_SYS_LOCK_OFFSET 0x20
62#define REALVIEW_SYS_100HZ_OFFSET 0x24
63#define REALVIEW_SYS_CFGDATA1_OFFSET 0x28
64#define REALVIEW_SYS_CFGDATA2_OFFSET 0x2C
65#define REALVIEW_SYS_FLAGS_OFFSET 0x30
66#define REALVIEW_SYS_FLAGSSET_OFFSET 0x30
67#define REALVIEW_SYS_FLAGSCLR_OFFSET 0x34
68#define REALVIEW_SYS_NVFLAGS_OFFSET 0x38
69#define REALVIEW_SYS_NVFLAGSSET_OFFSET 0x38
70#define REALVIEW_SYS_NVFLAGSCLR_OFFSET 0x3C
71#define REALVIEW_SYS_RESETCTL_OFFSET 0x40
72#define REALVIEW_SYS_PCICTL_OFFSET 0x44
73#define REALVIEW_SYS_MCI_OFFSET 0x48
74#define REALVIEW_SYS_FLASH_OFFSET 0x4C
75#define REALVIEW_SYS_CLCD_OFFSET 0x50
76#define REALVIEW_SYS_CLCDSER_OFFSET 0x54
77#define REALVIEW_SYS_BOOTCS_OFFSET 0x58
78#define REALVIEW_SYS_24MHz_OFFSET 0x5C
79#define REALVIEW_SYS_MISC_OFFSET 0x60
80#define REALVIEW_SYS_IOSEL_OFFSET 0x70
Catalin Marinas356cb472008-02-04 17:34:58 +010081#define REALVIEW_SYS_PROCID_OFFSET 0x84
82#define REALVIEW_SYS_TEST_OSC0_OFFSET 0xC0
83#define REALVIEW_SYS_TEST_OSC1_OFFSET 0xC4
84#define REALVIEW_SYS_TEST_OSC2_OFFSET 0xC8
85#define REALVIEW_SYS_TEST_OSC3_OFFSET 0xCC
86#define REALVIEW_SYS_TEST_OSC4_OFFSET 0xD0
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000087
88#define REALVIEW_SYS_BASE 0x10000000
89#define REALVIEW_SYS_ID (REALVIEW_SYS_BASE + REALVIEW_SYS_ID_OFFSET)
90#define REALVIEW_SYS_SW (REALVIEW_SYS_BASE + REALVIEW_SYS_SW_OFFSET)
91#define REALVIEW_SYS_LED (REALVIEW_SYS_BASE + REALVIEW_SYS_LED_OFFSET)
92#define REALVIEW_SYS_OSC0 (REALVIEW_SYS_BASE + REALVIEW_SYS_OSC0_OFFSET)
93#define REALVIEW_SYS_OSC1 (REALVIEW_SYS_BASE + REALVIEW_SYS_OSC1_OFFSET)
94
95#define REALVIEW_SYS_LOCK (REALVIEW_SYS_BASE + REALVIEW_SYS_LOCK_OFFSET)
96#define REALVIEW_SYS_100HZ (REALVIEW_SYS_BASE + REALVIEW_SYS_100HZ_OFFSET)
97#define REALVIEW_SYS_CFGDATA1 (REALVIEW_SYS_BASE + REALVIEW_SYS_CFGDATA1_OFFSET)
98#define REALVIEW_SYS_CFGDATA2 (REALVIEW_SYS_BASE + REALVIEW_SYS_CFGDATA2_OFFSET)
99#define REALVIEW_SYS_FLAGS (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGS_OFFSET)
100#define REALVIEW_SYS_FLAGSSET (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGSSET_OFFSET)
101#define REALVIEW_SYS_FLAGSCLR (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGSCLR_OFFSET)
102#define REALVIEW_SYS_NVFLAGS (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGS_OFFSET)
103#define REALVIEW_SYS_NVFLAGSSET (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGSSET_OFFSET)
104#define REALVIEW_SYS_NVFLAGSCLR (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGSCLR_OFFSET)
105#define REALVIEW_SYS_RESETCTL (REALVIEW_SYS_BASE + REALVIEW_SYS_RESETCTL_OFFSET)
106#define REALVIEW_SYS_PCICTL (REALVIEW_SYS_BASE + REALVIEW_SYS_PCICTL_OFFSET)
107#define REALVIEW_SYS_MCI (REALVIEW_SYS_BASE + REALVIEW_SYS_MCI_OFFSET)
108#define REALVIEW_SYS_FLASH (REALVIEW_SYS_BASE + REALVIEW_SYS_FLASH_OFFSET)
109#define REALVIEW_SYS_CLCD (REALVIEW_SYS_BASE + REALVIEW_SYS_CLCD_OFFSET)
110#define REALVIEW_SYS_CLCDSER (REALVIEW_SYS_BASE + REALVIEW_SYS_CLCDSER_OFFSET)
111#define REALVIEW_SYS_BOOTCS (REALVIEW_SYS_BASE + REALVIEW_SYS_BOOTCS_OFFSET)
112#define REALVIEW_SYS_24MHz (REALVIEW_SYS_BASE + REALVIEW_SYS_24MHz_OFFSET)
113#define REALVIEW_SYS_MISC (REALVIEW_SYS_BASE + REALVIEW_SYS_MISC_OFFSET)
114#define REALVIEW_SYS_IOSEL (REALVIEW_SYS_BASE + REALVIEW_SYS_IOSEL_OFFSET)
Catalin Marinas356cb472008-02-04 17:34:58 +0100115#define REALVIEW_SYS_PROCID (REALVIEW_SYS_BASE + REALVIEW_SYS_PROCID_OFFSET)
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000116#define REALVIEW_SYS_TEST_OSC0 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC0_OFFSET)
117#define REALVIEW_SYS_TEST_OSC1 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC1_OFFSET)
118#define REALVIEW_SYS_TEST_OSC2 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC2_OFFSET)
119#define REALVIEW_SYS_TEST_OSC3 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC3_OFFSET)
120#define REALVIEW_SYS_TEST_OSC4 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC4_OFFSET)
121
122/*
123 * Values for REALVIEW_SYS_RESET_CTRL
124 */
125#define REALVIEW_SYS_CTRL_RESET_CONFIGCLR 0x01
126#define REALVIEW_SYS_CTRL_RESET_CONFIGINIT 0x02
127#define REALVIEW_SYS_CTRL_RESET_DLLRESET 0x03
128#define REALVIEW_SYS_CTRL_RESET_PLLRESET 0x04
129#define REALVIEW_SYS_CTRL_RESET_POR 0x05
130#define REALVIEW_SYS_CTRL_RESET_DoC 0x06
131
132#define REALVIEW_SYS_CTRL_LED (1 << 0)
133
134
135/* ------------------------------------------------------------------------
136 * RealView control registers
137 * ------------------------------------------------------------------------
138 */
139
140/*
141 * REALVIEW_IDFIELD
142 *
143 * 31:24 = manufacturer (0x41 = ARM)
144 * 23:16 = architecture (0x08 = AHB system bus, ASB processor bus)
145 * 15:12 = FPGA (0x3 = XVC600 or XVC600E)
146 * 11:4 = build value
147 * 3:0 = revision number (0x1 = rev B (AHB))
148 */
149
150/*
151 * REALVIEW_SYS_LOCK
152 * control access to SYS_OSCx, SYS_CFGDATAx, SYS_RESETCTL,
153 * SYS_CLD, SYS_BOOTCS
154 */
155#define REALVIEW_SYS_LOCK_LOCKED (1 << 16)
156#define REALVIEW_SYS_LOCKVAL_MASK 0xFFFF /* write 0xA05F to enable write access */
157
158/*
159 * REALVIEW_SYS_FLASH
160 */
161#define REALVIEW_FLASHPROG_FLVPPEN (1 << 0) /* Enable writing to flash */
162
163/*
164 * REALVIEW_INTREG
165 * - used to acknowledge and control MMCI and UART interrupts
166 */
167#define REALVIEW_INTREG_WPROT 0x00 /* MMC protection status (no interrupt generated) */
168#define REALVIEW_INTREG_RI0 0x01 /* Ring indicator UART0 is asserted, */
169#define REALVIEW_INTREG_CARDIN 0x08 /* MMCI card in detect */
170 /* write 1 to acknowledge and clear */
171#define REALVIEW_INTREG_RI1 0x02 /* Ring indicator UART1 is asserted, */
172#define REALVIEW_INTREG_CARDINSERT 0x03 /* Signal insertion of MMC card */
173
174/*
Catalin Marinas393538e2008-04-18 22:43:11 +0100175 * RealView common peripheral addresses
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000176 */
177#define REALVIEW_SCTL_BASE 0x10001000 /* System controller */
178#define REALVIEW_I2C_BASE 0x10002000 /* I2C control */
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000179#define REALVIEW_AACI_BASE 0x10004000 /* Audio */
180#define REALVIEW_MMCI0_BASE 0x10005000 /* MMC interface */
181#define REALVIEW_KMI0_BASE 0x10006000 /* KMI interface */
182#define REALVIEW_KMI1_BASE 0x10007000 /* KMI 2nd interface */
183#define REALVIEW_CHAR_LCD_BASE 0x10008000 /* Character LCD */
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000184#define REALVIEW_SCI_BASE 0x1000E000 /* Smart card controller */
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000185#define REALVIEW_GPIO1_BASE 0x10014000 /* GPIO port 1 */
186#define REALVIEW_GPIO2_BASE 0x10015000 /* GPIO port 2 */
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000187#define REALVIEW_DMC_BASE 0x10018000 /* DMC configuration */
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000188#define REALVIEW_DMAC_BASE 0x10030000 /* DMA controller */
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000189
190/* PCI space */
191#define REALVIEW_PCI_BASE 0x41000000 /* PCI Interface */
192#define REALVIEW_PCI_CFG_BASE 0x42000000
193#define REALVIEW_PCI_MEM_BASE0 0x44000000
194#define REALVIEW_PCI_MEM_BASE1 0x50000000
195#define REALVIEW_PCI_MEM_BASE2 0x60000000
196/* Sizes of above maps */
197#define REALVIEW_PCI_BASE_SIZE 0x01000000
198#define REALVIEW_PCI_CFG_BASE_SIZE 0x02000000
199#define REALVIEW_PCI_MEM_BASE0_SIZE 0x0c000000 /* 32Mb */
200#define REALVIEW_PCI_MEM_BASE1_SIZE 0x10000000 /* 256Mb */
201#define REALVIEW_PCI_MEM_BASE2_SIZE 0x10000000 /* 256Mb */
202
203#define REALVIEW_SDRAM67_BASE 0x70000000 /* SDRAM banks 6 and 7 */
204#define REALVIEW_LT_BASE 0x80000000 /* Logic Tile expansion */
205
206/*
207 * Disk on Chip
208 */
209#define REALVIEW_DOC_BASE 0x2C000000
210#define REALVIEW_DOC_SIZE (16 << 20)
211#define REALVIEW_DOC_PAGE_SIZE 512
212#define REALVIEW_DOC_TOTAL_PAGES (DOC_SIZE / PAGE_SIZE)
213
214#define ERASE_UNIT_PAGES 32
215#define START_PAGE 0x80
216
217/*
218 * LED settings, bits [7:0]
219 */
220#define REALVIEW_SYS_LED0 (1 << 0)
221#define REALVIEW_SYS_LED1 (1 << 1)
222#define REALVIEW_SYS_LED2 (1 << 2)
223#define REALVIEW_SYS_LED3 (1 << 3)
224#define REALVIEW_SYS_LED4 (1 << 4)
225#define REALVIEW_SYS_LED5 (1 << 5)
226#define REALVIEW_SYS_LED6 (1 << 6)
227#define REALVIEW_SYS_LED7 (1 << 7)
228
229#define ALL_LEDS 0xFF
230
231#define LED_BANK REALVIEW_SYS_LED
232
233/*
234 * Control registers
235 */
236#define REALVIEW_IDFIELD_OFFSET 0x0 /* RealView build information */
237#define REALVIEW_FLASHPROG_OFFSET 0x4 /* Flash devices */
238#define REALVIEW_INTREG_OFFSET 0x8 /* Interrupt control */
239#define REALVIEW_DECODE_OFFSET 0xC /* Fitted logic modules */
240
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000241/*
242 * Application Flash
243 *
244 */
245#define FLASH_BASE REALVIEW_FLASH_BASE
246#define FLASH_SIZE REALVIEW_FLASH_SIZE
247#define FLASH_END (FLASH_BASE + FLASH_SIZE - 1)
248#define FLASH_BLOCK_SIZE SZ_128K
249
250/*
251 * Boot Flash
252 *
253 */
254#define EPROM_BASE REALVIEW_BOOT_ROM_HI
255#define EPROM_SIZE REALVIEW_BOOT_ROM_SIZE
256#define EPROM_END (EPROM_BASE + EPROM_SIZE - 1)
257
258/*
259 * Clean base - dummy
260 *
261 */
262#define CLEAN_BASE EPROM_BASE
263
264/*
265 * System controller bit assignment
266 */
267#define REALVIEW_REFCLK 0
268#define REALVIEW_TIMCLK 1
269
270#define REALVIEW_TIMER1_EnSel 15
271#define REALVIEW_TIMER2_EnSel 17
272#define REALVIEW_TIMER3_EnSel 19
273#define REALVIEW_TIMER4_EnSel 21
274
275
276#define MAX_TIMER 2
277#define MAX_PERIOD 699050
278#define TICKS_PER_uSEC 1
279
280/*
281 * These are useconds NOT ticks.
282 *
283 */
284#define mSEC_1 1000
285#define mSEC_5 (mSEC_1 * 5)
286#define mSEC_10 (mSEC_1 * 10)
287#define mSEC_25 (mSEC_1 * 25)
288#define SEC_1 (mSEC_1 * 1000)
289
290#define REALVIEW_CSR_BASE 0x10000000
291#define REALVIEW_CSR_SIZE 0x10000000
292
Catalin Marinas356cb472008-02-04 17:34:58 +0100293#endif /* __ASM_ARCH_PLATFORM_H */