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Catalin Marinas8ad68bb2005-10-31 14:25:02 +00001/*
2 * linux/include/asm-arm/arch-realview/system.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#ifndef __ASM_ARCH_SYSTEM_H
22#define __ASM_ARCH_SYSTEM_H
23
Russell Kingbe509722008-08-04 10:41:28 +010024#include <asm/arch/hardware.h>
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000025#include <asm/io.h>
26#include <asm/arch/platform.h>
27
28static inline void arch_idle(void)
29{
30 /*
31 * This should do all the clock switching
32 * and wait for interrupt tricks
33 */
34 cpu_do_idle();
35}
36
37static inline void arch_reset(char mode)
38{
Russell Kingce07d902005-11-16 14:38:19 +000039 void __iomem *hdr_ctrl = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_RESETCTL_OFFSET;
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000040 unsigned int val;
41
42 /*
43 * To reset, we hit the on-board reset register
44 * in the system FPGA
45 */
46 val = __raw_readl(hdr_ctrl);
47 val |= REALVIEW_SYS_CTRL_RESET_CONFIGCLR;
48 __raw_writel(val, hdr_ctrl);
49}
50
51#endif