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Uwe Zeisbergerf30c2262006-10-03 23:01:26 +02001/* linux/include/asm-arm/arch-s3c2410/fb.h
Arnaud Patard20fd5762005-09-09 13:10:07 -07002 *
3 * Copyright (c) 2004 Arnaud Patard <arnaud.patard@rtp-net.org>
4 *
5 * Inspired by pxafb.h
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
Arnaud Patard20fd5762005-09-09 13:10:07 -070010*/
11
12#ifndef __ASM_ARM_FB_H
13#define __ASM_ARM_FB_H
14
15#include <asm/arch/regs-lcd.h>
16
Arnaud Patard20fd5762005-09-09 13:10:07 -070017struct s3c2410fb_hw {
18 unsigned long lcdcon1;
19 unsigned long lcdcon2;
20 unsigned long lcdcon3;
21 unsigned long lcdcon4;
22 unsigned long lcdcon5;
23};
24
Krzysztof Helt09fe75f2007-10-16 01:28:56 -070025/* LCD description */
26struct s3c2410fb_display {
27 /* LCD type */
28 unsigned type;
Arnaud Patard (Rtp357b8192006-12-08 02:40:23 -080029
Arnaud Patard20fd5762005-09-09 13:10:07 -070030 /* Screen size */
Krzysztof Helt09fe75f2007-10-16 01:28:56 -070031 unsigned short width;
32 unsigned short height;
Arnaud Patard20fd5762005-09-09 13:10:07 -070033
34 /* Screen info */
Krzysztof Helt09fe75f2007-10-16 01:28:56 -070035 unsigned short xres;
36 unsigned short yres;
37 unsigned short bpp;
Arnaud Patard20fd5762005-09-09 13:10:07 -070038
Krzysztof Helt69816692007-10-16 01:29:06 -070039 unsigned pixclock; /* pixclock in picoseconds */
Krzysztof Helt1f411532007-10-16 01:28:57 -070040 unsigned short left_margin; /* value in pixels (TFT) or HCLKs (STN) */
41 unsigned short right_margin; /* value in pixels (TFT) or HCLKs (STN) */
42 unsigned short hsync_len; /* value in pixels (TFT) or HCLKs (STN) */
43 unsigned short upper_margin; /* value in lines (TFT) or 0 (STN) */
44 unsigned short lower_margin; /* value in lines (TFT) or 0 (STN) */
45 unsigned short vsync_len; /* value in lines (TFT) or 0 (STN) */
46
Arnaud Patard20fd5762005-09-09 13:10:07 -070047 /* lcd configuration registers */
Krzysztof Heltf28ef572007-10-16 01:28:58 -070048 unsigned long lcdcon5;
Krzysztof Helt09fe75f2007-10-16 01:28:56 -070049};
50
51struct s3c2410fb_mach_info {
Krzysztof Helt09fe75f2007-10-16 01:28:56 -070052
53 struct s3c2410fb_display *displays; /* attached diplays info */
54 unsigned num_displays; /* number of defined displays */
55 unsigned default_display;
Arnaud Patard20fd5762005-09-09 13:10:07 -070056
57 /* GPIOs */
58
59 unsigned long gpcup;
60 unsigned long gpcup_mask;
61 unsigned long gpccon;
62 unsigned long gpccon_mask;
63 unsigned long gpdup;
64 unsigned long gpdup_mask;
65 unsigned long gpdcon;
66 unsigned long gpdcon_mask;
67
68 /* lpc3600 control register */
69 unsigned long lpcsel;
70};
71
Ben Dooks893b0302005-10-28 15:31:45 +010072extern void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *);
Arnaud Patard20fd5762005-09-09 13:10:07 -070073
74#endif /* __ASM_ARM_FB_H */