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gerrit-public.fairphone.software / kernel / msm / a3014e6b78f5fb1d124ece7c3be54b880c71761e / . / arch / arm / boot / dts / msmcopper-gpio.dtsi
blob: 59ad8dbdced0556481b60261922cb5803631ca39 [file] [log] [blame]
Michael Bohan8b909b42012-04-18 17:39:12 -0700[diff] [blame]1/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13/ {
14 qcom,spmi@fc4c0000 {
15
16 qcom,pm8941@0 {
17
18 pm8941_gpios: pm8941_gpios {
19
20 gpio@c000 {
Michael Bohan8b909b42012-04-18 17:39:12 -0700[diff] [blame]21 status = "ok";
22 };
23
24 gpio@c100 {
Michael Bohan8b909b42012-04-18 17:39:12 -0700[diff] [blame]25 status = "ok";
26 };
27
28 gpio@c200 {
Michael Bohan8b909b42012-04-18 17:39:12 -0700[diff] [blame]29 status = "ok";
30 };
31
32 gpio@c300 {
Michael Bohan8b909b42012-04-18 17:39:12 -0700[diff] [blame]33 status = "ok";
34 };
35
36 gpio@c400 {
Michael Bohan8b909b42012-04-18 17:39:12 -0700[diff] [blame]37 status = "ok";
38 };
39
40 gpio@c500 {
Michael Bohan8b909b42012-04-18 17:39:12 -0700[diff] [blame]41 status = "ok";
42 };
43
44 gpio@c600 {
Michael Bohan8b909b42012-04-18 17:39:12 -0700[diff] [blame]45 status = "ok";
46 };
47
48 gpio@c700 {
Michael Bohan8b909b42012-04-18 17:39:12 -0700[diff] [blame]49 status = "ok";
50 };
51
52 gpio@c800 {
Michael Bohan8b909b42012-04-18 17:39:12 -0700[diff] [blame]53 status = "ok";
54 };
55
56 gpio@c900 {
Michael Bohan8b909b42012-04-18 17:39:12 -0700[diff] [blame]57 status = "ok";
58 };
59
60 gpio@ca00 {
Michael Bohan8b909b42012-04-18 17:39:12 -0700[diff] [blame]61 status = "ok";
62 };
63
64 gpio@cb00 {
Michael Bohan8b909b42012-04-18 17:39:12 -0700[diff] [blame]65 status = "ok";
66 };
67
68 gpio@cc00 {
Michael Bohan8b909b42012-04-18 17:39:12 -0700[diff] [blame]69 status = "ok";
70 };
71
72 gpio@cd00 {
Michael Bohan8b909b42012-04-18 17:39:12 -0700[diff] [blame]73 status = "ok";
74 };
75
76 gpio@ce00 {
Michael Bohan8b909b42012-04-18 17:39:12 -0700[diff] [blame]77 status = "ok";
78 };
79
80 gpio@cf00 {
Michael Bohan8b909b42012-04-18 17:39:12 -0700[diff] [blame]81 status = "ok";
82 };
83
84 gpio@d000 {
Michael Bohan8b909b42012-04-18 17:39:12 -0700[diff] [blame]85 status = "ok";
86 };
87
88 gpio@d100 {
Michael Bohan8b909b42012-04-18 17:39:12 -0700[diff] [blame]89 status = "ok";
90 };
91
92 gpio@d200 {
Michael Bohan8b909b42012-04-18 17:39:12 -0700[diff] [blame]93 status = "ok";
94 };
95
96 gpio@d300 {
Michael Bohan8b909b42012-04-18 17:39:12 -0700[diff] [blame]97 status = "ok";
98 };
99
100 gpio@d400 {
Michael Bohan8b909b42012-04-18 17:39:12 -0700[diff] [blame]101 status = "ok";
102 };
103
104 gpio@d500 {
Michael Bohan8b909b42012-04-18 17:39:12 -0700[diff] [blame]105 status = "ok";
106 };
107
108 gpio@d600 {
Michael Bohan8b909b42012-04-18 17:39:12 -0700[diff] [blame]109 status = "ok";
110 };
111
112 gpio@d700 {
Michael Bohan8b909b42012-04-18 17:39:12 -0700[diff] [blame]113 status = "ok";
114 };
115
116 gpio@d800 {
Michael Bohan8b909b42012-04-18 17:39:12 -0700[diff] [blame]117 qcom,out-strength = <1>;
118 status = "ok";
119 };
120
121 gpio@d900 {
Michael Bohan8b909b42012-04-18 17:39:12 -0700[diff] [blame]122 qcom,out-strength = <1>;
123 status = "ok";
124 };
125
126 gpio@da00 {
Michael Bohan8b909b42012-04-18 17:39:12 -0700[diff] [blame]127 qcom,out-strength = <1>;
128 status = "ok";
129 };
130
131 gpio@db00 {
Michael Bohan8b909b42012-04-18 17:39:12 -0700[diff] [blame]132 qcom,out-strength = <1>;
133 status = "ok";
134 };
135
136 gpio@dc00 {
Michael Bohan8b909b42012-04-18 17:39:12 -0700[diff] [blame]137 qcom,out-strength = <1>;
138 status = "ok";
139 };
140
141 gpio@dd00 {
Michael Bohan8b909b42012-04-18 17:39:12 -0700[diff] [blame]142 qcom,out-strength = <1>;
143 status = "ok";
144 };
145
146 gpio@de00 {
Michael Bohan8b909b42012-04-18 17:39:12 -0700[diff] [blame]147 qcom,out-strength = <1>;
148 status = "ok";
149 };
150
151 gpio@df00 {
Michael Bohan8b909b42012-04-18 17:39:12 -0700[diff] [blame]152 qcom,out-strength = <1>;
153 status = "ok";
154 };
155
156 gpio@e000 {
Michael Bohan8b909b42012-04-18 17:39:12 -0700[diff] [blame]157 qcom,out-strength = <1>;
158 status = "ok";
159 };
160
161 gpio@e100 {
Michael Bohan8b909b42012-04-18 17:39:12 -0700[diff] [blame]162 qcom,out-strength = <1>;
163 status = "ok";
164 };
165
166 gpio@e200 {
Michael Bohan8b909b42012-04-18 17:39:12 -0700[diff] [blame]167 qcom,out-strength = <1>;
168 status = "ok";
169 };
170
171 gpio@e300 {
Michael Bohan8b909b42012-04-18 17:39:12 -0700[diff] [blame]172 qcom,out-strength = <1>;
173 status = "ok";
174 };
175 };
Michael Bohan5085a052012-06-11 13:27:34 -0700[diff] [blame]176
177 pm8941_mpps: pm8941_mpps {
178
179 mpp@a000 {
180 status = "ok";
181 };
182
183 mpp@a100 {
184 status = "ok";
185 };
186
187 mpp@a200 {
188 status = "ok";
189 };
190
191 mpp@a300 {
192 status = "ok";
193 };
194
195 mpp@a400 {
196 status = "ok";
197 };
198
199 mpp@a500 {
200 status = "ok";
201 };
202
203 mpp@a600 {
204 status = "ok";
205 };
206
207 mpp@a700 {
208 status = "ok";
209 };
210 };
211 };
212
213 qcom,pm8841@4 {
214
215 pm8841_mpps: pm8841_mpps {
216
217 mpp@a000 {
218 status = "ok";
219 };
220
221 mpp@a100 {
222 status = "ok";
223 };
224
225 mpp@a200 {
226 status = "ok";
227 };
228
229 mpp@a300 {
230 status = "ok";
231 };
232 };
Michael Bohan8b909b42012-04-18 17:39:12 -0700[diff] [blame]233 };
234 };
235};