Jean-Christophe PLAGNIOL-VILLARD | fea3158 | 2011-10-14 09:40:52 +0800 | [diff] [blame] | 1 | /* |
| 2 | * at91sam9g20.dtsi - Device Tree Include file for AT91SAM9G20 family SoC |
| 3 | * |
| 4 | * Copyright (C) 2011 Atmel, |
| 5 | * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>, |
| 6 | * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
| 7 | * |
| 8 | * Licensed under GPLv2 or later. |
| 9 | */ |
| 10 | |
| 11 | /include/ "skeleton.dtsi" |
| 12 | |
| 13 | / { |
| 14 | model = "Atmel AT91SAM9G20 family SoC"; |
| 15 | compatible = "atmel,at91sam9g20"; |
| 16 | interrupt-parent = <&aic>; |
| 17 | |
| 18 | aliases { |
| 19 | serial0 = &dbgu; |
| 20 | serial1 = &usart0; |
| 21 | serial2 = &usart1; |
| 22 | serial3 = &usart2; |
| 23 | serial4 = &usart3; |
| 24 | serial5 = &usart4; |
| 25 | serial6 = &usart5; |
Nicolas Ferre | 21f8187 | 2012-02-11 15:41:40 +0100 | [diff] [blame] | 26 | gpio0 = &pioA; |
| 27 | gpio1 = &pioB; |
| 28 | gpio2 = &pioC; |
Nicolas Ferre | 3a61a5d | 2012-01-19 10:13:40 +0100 | [diff] [blame] | 29 | tcb0 = &tcb0; |
| 30 | tcb1 = &tcb1; |
Jean-Christophe PLAGNIOL-VILLARD | fea3158 | 2011-10-14 09:40:52 +0800 | [diff] [blame] | 31 | }; |
| 32 | cpus { |
| 33 | cpu@0 { |
| 34 | compatible = "arm,arm926ejs"; |
| 35 | }; |
| 36 | }; |
| 37 | |
| 38 | memory@20000000 { |
| 39 | reg = <0x20000000 0x08000000>; |
| 40 | }; |
| 41 | |
| 42 | ahb { |
| 43 | compatible = "simple-bus"; |
| 44 | #address-cells = <1>; |
| 45 | #size-cells = <1>; |
| 46 | ranges; |
| 47 | |
| 48 | apb { |
| 49 | compatible = "simple-bus"; |
| 50 | #address-cells = <1>; |
| 51 | #size-cells = <1>; |
| 52 | ranges; |
| 53 | |
| 54 | aic: interrupt-controller@fffff000 { |
Nicolas Ferre | e261501 | 2011-11-22 22:26:09 +0100 | [diff] [blame] | 55 | #interrupt-cells = <2>; |
Jean-Christophe PLAGNIOL-VILLARD | fea3158 | 2011-10-14 09:40:52 +0800 | [diff] [blame] | 56 | compatible = "atmel,at91rm9200-aic"; |
| 57 | interrupt-controller; |
| 58 | interrupt-parent; |
| 59 | reg = <0xfffff000 0x200>; |
| 60 | }; |
| 61 | |
Jean-Christophe PLAGNIOL-VILLARD | a7776ec | 2012-03-02 20:54:37 +0800 | [diff] [blame^] | 62 | ramc0: ramc@ffffea00 { |
| 63 | compatible = "atmel,at91sam9260-sdramc"; |
| 64 | reg = <0xffffea00 0x200>; |
| 65 | }; |
| 66 | |
Jean-Christophe PLAGNIOL-VILLARD | eb5e76f | 2012-03-02 20:44:23 +0800 | [diff] [blame] | 67 | pmc: pmc@fffffc00 { |
| 68 | compatible = "atmel,at91rm9200-pmc"; |
| 69 | reg = <0xfffffc00 0x100>; |
| 70 | }; |
| 71 | |
Jean-Christophe PLAGNIOL-VILLARD | c8082d3 | 2012-03-03 03:16:27 +0800 | [diff] [blame] | 72 | rstc@fffffd00 { |
| 73 | compatible = "atmel,at91sam9260-rstc"; |
| 74 | reg = <0xfffffd00 0x10>; |
| 75 | }; |
| 76 | |
Jean-Christophe PLAGNIOL-VILLARD | 23fa648 | 2012-02-27 11:19:34 +0100 | [diff] [blame] | 77 | pit: timer@fffffd30 { |
| 78 | compatible = "atmel,at91sam9260-pit"; |
| 79 | reg = <0xfffffd30 0xf>; |
| 80 | interrupts = <1 4>; |
| 81 | }; |
| 82 | |
Nicolas Ferre | 3a61a5d | 2012-01-19 10:13:40 +0100 | [diff] [blame] | 83 | tcb0: timer@fffa0000 { |
| 84 | compatible = "atmel,at91rm9200-tcb"; |
| 85 | reg = <0xfffa0000 0x100>; |
| 86 | interrupts = <17 4 18 4 19 4>; |
| 87 | }; |
| 88 | |
| 89 | tcb1: timer@fffdc000 { |
| 90 | compatible = "atmel,at91rm9200-tcb"; |
| 91 | reg = <0xfffdc000 0x100>; |
| 92 | interrupts = <26 4 27 4 28 4>; |
| 93 | }; |
| 94 | |
Nicolas Ferre | 21f8187 | 2012-02-11 15:41:40 +0100 | [diff] [blame] | 95 | pioA: gpio@fffff400 { |
| 96 | compatible = "atmel,at91rm9200-gpio"; |
| 97 | reg = <0xfffff400 0x100>; |
| 98 | interrupts = <2 4>; |
| 99 | #gpio-cells = <2>; |
| 100 | gpio-controller; |
| 101 | interrupt-controller; |
| 102 | }; |
| 103 | |
| 104 | pioB: gpio@fffff600 { |
| 105 | compatible = "atmel,at91rm9200-gpio"; |
| 106 | reg = <0xfffff600 0x100>; |
| 107 | interrupts = <3 4>; |
| 108 | #gpio-cells = <2>; |
| 109 | gpio-controller; |
| 110 | interrupt-controller; |
| 111 | }; |
| 112 | |
| 113 | pioC: gpio@fffff800 { |
| 114 | compatible = "atmel,at91rm9200-gpio"; |
| 115 | reg = <0xfffff800 0x100>; |
| 116 | interrupts = <4 4>; |
| 117 | #gpio-cells = <2>; |
| 118 | gpio-controller; |
| 119 | interrupt-controller; |
| 120 | }; |
| 121 | |
Jean-Christophe PLAGNIOL-VILLARD | fea3158 | 2011-10-14 09:40:52 +0800 | [diff] [blame] | 122 | dbgu: serial@fffff200 { |
| 123 | compatible = "atmel,at91sam9260-usart"; |
| 124 | reg = <0xfffff200 0x200>; |
Nicolas Ferre | e261501 | 2011-11-22 22:26:09 +0100 | [diff] [blame] | 125 | interrupts = <1 4>; |
Jean-Christophe PLAGNIOL-VILLARD | fea3158 | 2011-10-14 09:40:52 +0800 | [diff] [blame] | 126 | status = "disabled"; |
| 127 | }; |
| 128 | |
| 129 | usart0: serial@fffb0000 { |
| 130 | compatible = "atmel,at91sam9260-usart"; |
| 131 | reg = <0xfffb0000 0x200>; |
Nicolas Ferre | e261501 | 2011-11-22 22:26:09 +0100 | [diff] [blame] | 132 | interrupts = <6 4>; |
Jean-Christophe PLAGNIOL-VILLARD | fea3158 | 2011-10-14 09:40:52 +0800 | [diff] [blame] | 133 | atmel,use-dma-rx; |
| 134 | atmel,use-dma-tx; |
| 135 | status = "disabled"; |
| 136 | }; |
| 137 | |
| 138 | usart1: serial@fffb4000 { |
| 139 | compatible = "atmel,at91sam9260-usart"; |
| 140 | reg = <0xfffb4000 0x200>; |
Nicolas Ferre | e261501 | 2011-11-22 22:26:09 +0100 | [diff] [blame] | 141 | interrupts = <7 4>; |
Jean-Christophe PLAGNIOL-VILLARD | fea3158 | 2011-10-14 09:40:52 +0800 | [diff] [blame] | 142 | atmel,use-dma-rx; |
| 143 | atmel,use-dma-tx; |
| 144 | status = "disabled"; |
| 145 | }; |
| 146 | |
| 147 | usart2: serial@fffb8000 { |
| 148 | compatible = "atmel,at91sam9260-usart"; |
| 149 | reg = <0xfffb8000 0x200>; |
Nicolas Ferre | e261501 | 2011-11-22 22:26:09 +0100 | [diff] [blame] | 150 | interrupts = <8 4>; |
Jean-Christophe PLAGNIOL-VILLARD | fea3158 | 2011-10-14 09:40:52 +0800 | [diff] [blame] | 151 | atmel,use-dma-rx; |
| 152 | atmel,use-dma-tx; |
| 153 | status = "disabled"; |
| 154 | }; |
| 155 | |
| 156 | usart3: serial@fffd0000 { |
| 157 | compatible = "atmel,at91sam9260-usart"; |
| 158 | reg = <0xfffd0000 0x200>; |
Nicolas Ferre | e261501 | 2011-11-22 22:26:09 +0100 | [diff] [blame] | 159 | interrupts = <23 4>; |
Jean-Christophe PLAGNIOL-VILLARD | fea3158 | 2011-10-14 09:40:52 +0800 | [diff] [blame] | 160 | atmel,use-dma-rx; |
| 161 | atmel,use-dma-tx; |
| 162 | status = "disabled"; |
| 163 | }; |
| 164 | |
| 165 | usart4: serial@fffd4000 { |
| 166 | compatible = "atmel,at91sam9260-usart"; |
| 167 | reg = <0xfffd4000 0x200>; |
Nicolas Ferre | e261501 | 2011-11-22 22:26:09 +0100 | [diff] [blame] | 168 | interrupts = <24 4>; |
Jean-Christophe PLAGNIOL-VILLARD | fea3158 | 2011-10-14 09:40:52 +0800 | [diff] [blame] | 169 | atmel,use-dma-rx; |
| 170 | atmel,use-dma-tx; |
| 171 | status = "disabled"; |
| 172 | }; |
| 173 | |
| 174 | usart5: serial@fffd8000 { |
| 175 | compatible = "atmel,at91sam9260-usart"; |
| 176 | reg = <0xfffd8000 0x200>; |
Nicolas Ferre | e261501 | 2011-11-22 22:26:09 +0100 | [diff] [blame] | 177 | interrupts = <25 4>; |
Jean-Christophe PLAGNIOL-VILLARD | fea3158 | 2011-10-14 09:40:52 +0800 | [diff] [blame] | 178 | atmel,use-dma-rx; |
| 179 | atmel,use-dma-tx; |
| 180 | status = "disabled"; |
| 181 | }; |
Nicolas Ferre | 0d4f99d | 2011-12-05 18:03:05 +0100 | [diff] [blame] | 182 | |
| 183 | macb0: ethernet@fffc4000 { |
| 184 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; |
| 185 | reg = <0xfffc4000 0x100>; |
Nicolas Ferre | e261501 | 2011-11-22 22:26:09 +0100 | [diff] [blame] | 186 | interrupts = <21 4>; |
Nicolas Ferre | 0d4f99d | 2011-12-05 18:03:05 +0100 | [diff] [blame] | 187 | status = "disabled"; |
| 188 | }; |
Jean-Christophe PLAGNIOL-VILLARD | fea3158 | 2011-10-14 09:40:52 +0800 | [diff] [blame] | 189 | }; |
Jean-Christophe PLAGNIOL-VILLARD | d6a0166 | 2012-01-26 02:11:06 +0800 | [diff] [blame] | 190 | |
| 191 | nand0: nand@40000000 { |
| 192 | compatible = "atmel,at91rm9200-nand"; |
| 193 | #address-cells = <1>; |
| 194 | #size-cells = <1>; |
| 195 | reg = <0x40000000 0x10000000 |
| 196 | 0xffffe800 0x200 |
| 197 | >; |
| 198 | atmel,nand-addr-offset = <21>; |
| 199 | atmel,nand-cmd-offset = <22>; |
| 200 | gpios = <&pioC 13 0 |
| 201 | &pioC 14 0 |
| 202 | 0 |
| 203 | >; |
| 204 | status = "disabled"; |
| 205 | }; |
Jean-Christophe PLAGNIOL-VILLARD | fea3158 | 2011-10-14 09:40:52 +0800 | [diff] [blame] | 206 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 3b3f828 | 2012-02-05 18:25:33 +0800 | [diff] [blame] | 207 | |
| 208 | i2c@0 { |
| 209 | compatible = "i2c-gpio"; |
| 210 | gpios = <&pioA 23 0 /* sda */ |
| 211 | &pioA 24 0 /* scl */ |
| 212 | >; |
| 213 | i2c-gpio,sda-open-drain; |
| 214 | i2c-gpio,scl-open-drain; |
| 215 | i2c-gpio,delay-us = <2>; /* ~100 kHz */ |
| 216 | #address-cells = <1>; |
| 217 | #size-cells = <0>; |
| 218 | status = "disabled"; |
| 219 | }; |
Jean-Christophe PLAGNIOL-VILLARD | fea3158 | 2011-10-14 09:40:52 +0800 | [diff] [blame] | 220 | }; |