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Eric Miao49cbe782009-01-20 14:15:18 +08001/*
2 * linux/arch/arm/mach-mmp/aspenite.c
3 *
4 * Support for the Marvell PXA168-based Aspenite and Zylonite2
5 * Development Platform.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * publishhed by the Free Software Foundation.
10 */
11
12#include <linux/init.h>
Eric Miao9c291f02009-02-10 10:35:25 +080013#include <linux/kernel.h>
Eric Miaoa6b993c2009-02-18 16:38:22 +080014#include <linux/platform_device.h>
15#include <linux/smc91x.h>
Haojian Zhuangef559de2009-09-10 14:37:48 +080016#include <linux/mtd/mtd.h>
17#include <linux/mtd/partitions.h>
18#include <linux/mtd/nand.h>
Eric Miao49cbe782009-01-20 14:15:18 +080019
20#include <asm/mach-types.h>
21#include <asm/mach/arch.h>
22#include <mach/addr-map.h>
Eric Miao9c291f02009-02-10 10:35:25 +080023#include <mach/mfp-pxa168.h>
24#include <mach/pxa168.h>
Eric Miaoa6b993c2009-02-18 16:38:22 +080025#include <mach/gpio.h>
Eric Miao49cbe782009-01-20 14:15:18 +080026
27#include "common.h"
28
Eric Miao9c291f02009-02-10 10:35:25 +080029static unsigned long common_pin_config[] __initdata = {
Eric Miaoa6b993c2009-02-18 16:38:22 +080030 /* Data Flash Interface */
31 GPIO0_DFI_D15,
32 GPIO1_DFI_D14,
33 GPIO2_DFI_D13,
34 GPIO3_DFI_D12,
35 GPIO4_DFI_D11,
36 GPIO5_DFI_D10,
37 GPIO6_DFI_D9,
38 GPIO7_DFI_D8,
39 GPIO8_DFI_D7,
40 GPIO9_DFI_D6,
41 GPIO10_DFI_D5,
42 GPIO11_DFI_D4,
43 GPIO12_DFI_D3,
44 GPIO13_DFI_D2,
45 GPIO14_DFI_D1,
46 GPIO15_DFI_D0,
47
48 /* Static Memory Controller */
49 GPIO18_SMC_nCS0,
50 GPIO34_SMC_nCS1,
51 GPIO23_SMC_nLUA,
52 GPIO25_SMC_nLLA,
53 GPIO28_SMC_RDY,
54 GPIO29_SMC_SCLK,
55 GPIO35_SMC_BE1,
56 GPIO36_SMC_BE2,
57 GPIO27_GPIO, /* Ethernet IRQ */
58
Eric Miao9c291f02009-02-10 10:35:25 +080059 /* UART1 */
60 GPIO107_UART1_RXD,
61 GPIO108_UART1_TXD,
Haojian Zhuang07871c12010-03-19 11:55:14 -040062
63 /* SSP1 */
64 GPIO113_I2S_MCLK,
65 GPIO114_I2S_FRM,
66 GPIO115_I2S_BCLK,
67 GPIO116_I2S_RXD,
68 GPIO117_I2S_TXD,
Eric Miao9c291f02009-02-10 10:35:25 +080069};
70
Eric Miaoa6b993c2009-02-18 16:38:22 +080071static struct smc91x_platdata smc91x_info = {
72 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
73};
74
75static struct resource smc91x_resources[] = {
76 [0] = {
77 .start = SMC_CS1_PHYS_BASE + 0x300,
78 .end = SMC_CS1_PHYS_BASE + 0xfffff,
79 .flags = IORESOURCE_MEM,
80 },
81 [1] = {
82 .start = gpio_to_irq(27),
83 .end = gpio_to_irq(27),
84 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
85 }
86};
87
88static struct platform_device smc91x_device = {
89 .name = "smc91x",
90 .id = 0,
91 .dev = {
92 .platform_data = &smc91x_info,
93 },
94 .num_resources = ARRAY_SIZE(smc91x_resources),
95 .resource = smc91x_resources,
96};
97
Haojian Zhuangef559de2009-09-10 14:37:48 +080098static struct mtd_partition aspenite_nand_partitions[] = {
99 {
100 .name = "bootloader",
101 .offset = 0,
102 .size = SZ_1M,
103 .mask_flags = MTD_WRITEABLE,
104 }, {
105 .name = "reserved",
106 .offset = MTDPART_OFS_APPEND,
107 .size = SZ_128K,
108 .mask_flags = MTD_WRITEABLE,
109 }, {
110 .name = "reserved",
111 .offset = MTDPART_OFS_APPEND,
112 .size = SZ_8M,
113 .mask_flags = MTD_WRITEABLE,
114 }, {
115 .name = "kernel",
116 .offset = MTDPART_OFS_APPEND,
117 .size = (SZ_2M + SZ_1M),
118 .mask_flags = 0,
119 }, {
120 .name = "filesystem",
121 .offset = MTDPART_OFS_APPEND,
122 .size = SZ_48M,
123 .mask_flags = 0,
124 }
125};
126
127static struct pxa3xx_nand_platform_data aspenite_nand_info = {
128 .enable_arbiter = 1,
129 .parts = aspenite_nand_partitions,
130 .nr_parts = ARRAY_SIZE(aspenite_nand_partitions),
131};
132
Haojian Zhuang07871c12010-03-19 11:55:14 -0400133static struct i2c_board_info aspenite_i2c_info[] __initdata = {
134 { I2C_BOARD_INFO("wm8753", 0x1b), },
135};
136
Eric Miao49cbe782009-01-20 14:15:18 +0800137static void __init common_init(void)
138{
Eric Miao9c291f02009-02-10 10:35:25 +0800139 mfp_config(ARRAY_AND_SIZE(common_pin_config));
140
Eric Miaoa6b993c2009-02-18 16:38:22 +0800141 /* on-chip devices */
Eric Miao9c291f02009-02-10 10:35:25 +0800142 pxa168_add_uart(1);
Haojian Zhuang07871c12010-03-19 11:55:14 -0400143 pxa168_add_twsi(1, NULL, ARRAY_AND_SIZE(aspenite_i2c_info));
144 pxa168_add_ssp(1);
Haojian Zhuangef559de2009-09-10 14:37:48 +0800145 pxa168_add_nand(&aspenite_nand_info);
Eric Miaoa6b993c2009-02-18 16:38:22 +0800146
147 /* off-chip devices */
148 platform_device_register(&smc91x_device);
Eric Miao49cbe782009-01-20 14:15:18 +0800149}
150
151MACHINE_START(ASPENITE, "PXA168-based Aspenite Development Platform")
152 .phys_io = APB_PHYS_BASE,
153 .boot_params = 0x00000100,
154 .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc,
155 .map_io = pxa_map_io,
156 .init_irq = pxa168_init_irq,
157 .timer = &pxa168_timer,
158 .init_machine = common_init,
159MACHINE_END
160
161MACHINE_START(ZYLONITE2, "PXA168-based Zylonite2 Development Platform")
162 .phys_io = APB_PHYS_BASE,
163 .boot_params = 0x00000100,
164 .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc,
165 .map_io = pxa_map_io,
166 .init_irq = pxa168_init_irq,
167 .timer = &pxa168_timer,
168 .init_machine = common_init,
169MACHINE_END