Praveen Chidambaram | a1f9828 | 2012-11-29 09:56:57 -0700 | [diff] [blame] | 1 | /* Copyright (c) 2013 The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | /include/ "skeleton.dtsi" |
| 14 | |
| 15 | / { |
| 16 | qcom,spm@f9089000 { |
| 17 | compatible = "qcom,spm-v2"; |
| 18 | #address-cells = <1>; |
| 19 | #size-cells = <1>; |
| 20 | reg = <0xf9089000 0x1000>; |
| 21 | qcom,core-id = <0>; |
| 22 | qcom,saw2-ver-reg = <0xfd0>; |
| 23 | qcom,saw2-cfg = <0x01>; |
| 24 | qcom,saw2-spm-dly= <0x20000400>; |
| 25 | qcom,saw2-spm-ctl = <0x1>; |
| 26 | qcom,saw2-spm-cmd-wfi = [60 03 60 76 76 0b 0f]; |
| 27 | qcom,saw2-spm-cmd-spc = [00 20 10 80 90 5b 60 03 60 3b 76 76 94 |
| 28 | 5b 80 10 2b 30 06 26 30 0f]; |
| 29 | qcom,saw2-spm-cmd-pc = [00 20 10 80 90 5b 60 07 3b 76 76 0b 94 |
| 30 | 5b 80 10 2b 30 06 26 30 0f]; |
| 31 | }; |
| 32 | |
| 33 | qcom,spm@f9099000 { |
| 34 | compatible = "qcom,spm-v2"; |
| 35 | #address-cells = <1>; |
| 36 | #size-cells = <1>; |
| 37 | reg = <0xf9099000 0x1000>; |
| 38 | qcom,core-id = <1>; |
| 39 | qcom,saw2-ver-reg = <0xfd0>; |
| 40 | qcom,saw2-cfg = <0x01>; |
| 41 | qcom,saw2-spm-dly= <0x20000400>; |
| 42 | qcom,saw2-spm-ctl = <0x1>; |
| 43 | qcom,saw2-spm-cmd-wfi = [60 03 60 76 76 0b 0f]; |
| 44 | qcom,saw2-spm-cmd-spc = [00 20 10 80 90 5b 60 03 60 3b 76 76 94 |
| 45 | 5b 80 10 2b 30 06 26 30 0f]; |
| 46 | qcom,saw2-spm-cmd-pc = [00 20 10 80 90 5b 60 07 3b 76 76 0b 94 |
| 47 | 5b 80 10 2b 30 06 26 30 0f]; |
| 48 | }; |
| 49 | |
| 50 | qcom,spm@f90a9000 { |
| 51 | compatible = "qcom,spm-v2"; |
| 52 | #address-cells = <1>; |
| 53 | #size-cells = <1>; |
| 54 | reg = <0xf90a9000 0x1000>; |
| 55 | qcom,core-id = <2>; |
| 56 | qcom,saw2-ver-reg = <0xfd0>; |
| 57 | qcom,saw2-cfg = <0x01>; |
| 58 | qcom,saw2-spm-dly= <0x20000400>; |
| 59 | qcom,saw2-spm-ctl = <0x1>; |
| 60 | qcom,saw2-spm-cmd-wfi = [60 03 60 76 76 0b 0f]; |
| 61 | qcom,saw2-spm-cmd-spc = [00 20 10 80 90 5b 60 03 60 3b 76 76 94 |
| 62 | 5b 80 10 2b 30 06 26 30 0f]; |
| 63 | qcom,saw2-spm-cmd-pc = [00 20 10 80 90 5b 60 07 3b 76 76 0b 94 |
| 64 | 5b 80 10 2b 30 06 26 30 0f]; |
| 65 | }; |
| 66 | |
| 67 | qcom,spm@f90b9000 { |
| 68 | compatible = "qcom,spm-v2"; |
| 69 | #address-cells = <1>; |
| 70 | #size-cells = <1>; |
| 71 | reg = <0xf90b9000 0x1000>; |
| 72 | qcom,core-id = <3>; |
| 73 | qcom,saw2-ver-reg = <0xfd0>; |
| 74 | qcom,saw2-cfg = <0x01>; |
| 75 | qcom,saw2-spm-dly= <0x20000400>; |
| 76 | qcom,saw2-spm-ctl = <0x1>; |
| 77 | qcom,saw2-spm-cmd-wfi = [60 03 60 76 76 0b 0f]; |
| 78 | qcom,saw2-spm-cmd-spc = [00 20 10 80 90 5b 60 03 60 3b 76 76 94 |
| 79 | 5b 80 10 2b 30 06 26 30 0f]; |
| 80 | qcom,saw2-spm-cmd-pc = [00 20 10 80 90 5b 60 07 3b 76 76 0b 94 |
| 81 | 5b 80 10 2b 30 06 26 30 0f]; |
| 82 | }; |
| 83 | |
| 84 | qcom,spm@f9012000 { |
| 85 | compatible = "qcom,spm-v2"; |
| 86 | #address-cells = <1>; |
| 87 | #size-cells = <1>; |
| 88 | reg = <0xf9012000 0x1000>; |
| 89 | qcom,core-id = <0xffff>; /* L2/APCS SAW */ |
| 90 | qcom,saw2-ver-reg = <0xfd0>; |
| 91 | qcom,saw2-cfg = <0x14>; |
| 92 | qcom,saw2-spm-dly= <0x20000400>; |
| 93 | qcom,saw2-spm-ctl = <0x1>; |
| 94 | qcom,saw2-pmic-data0 = <0x02030080>; |
| 95 | qcom,saw2-pmic-data1 = <0x00030000>; |
| 96 | qcom,vctl-timeout-us = <50>; |
| 97 | qcom,vctl-port = <0x0>; |
| 98 | qcom,phase-port = <0x1>; |
| 99 | qcom,pfm-port = <0x2>; |
| 100 | qcom,saw2-spm-cmd-ret = [0b 00 03 00 7b 0f]; |
| 101 | qcom,saw2-spm-cmd-gdhs = [00 20 32 60 70 80 0b 6b c0 e0 d0 42 07 |
| 102 | 78 1f 80 4e d0 e0 c0 22 6b 50 4b 60 02 32 50 7b |
| 103 | 0f]; |
| 104 | qcom,saw2-spm-cmd-pc = [00 32 60 70 80 b0 0b 10 e0 d0 6b c0 |
| 105 | 42 f0 11 07 01 b0 78 1f 80 4e c0 d0 12 e0 6b 50 4b |
| 106 | 60 02 32 50 f0 7b 0f]; /*APCS_PMIC_OFF_L2RAM_OFF*/ |
| 107 | }; |
| 108 | |
| 109 | qcom,lpm-resources { |
| 110 | compatible = "qcom,lpm-resources"; |
| 111 | #address-cells = <1>; |
| 112 | #size-cells = <0>; |
| 113 | |
| 114 | qcom,lpm-resources@0 { |
| 115 | reg = <0x0>; |
| 116 | qcom,name = "vdd-dig"; |
| 117 | qcom,resource-type = <0>; |
| 118 | qcom,type = <0x62706d73>; /* "smpb" */ |
| 119 | qcom,id = <0x02>; |
| 120 | qcom,key = <0x6e726f63>; /* "corn" */ |
| 121 | qcom,init-value = <5>; /* Super Turbo */ |
| 122 | }; |
| 123 | |
| 124 | qcom,lpm-resources@1 { |
| 125 | reg = <0x1>; |
| 126 | qcom,name = "vdd-mem"; |
| 127 | qcom,resource-type = <0>; |
| 128 | qcom,type = <0x62706d73>; /* "smpb" */ |
| 129 | qcom,id = <0x01>; |
| 130 | qcom,key = <0x7675>; /* "uv" */ |
| 131 | qcom,init-value = <1050000>; /* Super Turbo */ |
| 132 | }; |
| 133 | |
| 134 | qcom,lpm-resources@2 { |
| 135 | reg = <0x2>; |
| 136 | qcom,name = "pxo"; |
| 137 | qcom,resource-type = <0>; |
| 138 | qcom,type = <0x306b6c63>; /* "clk0" */ |
| 139 | qcom,id = <0x00>; |
| 140 | qcom,key = <0x62616e45>; /* "Enab" */ |
| 141 | qcom,init-value = <1>; /* On */ |
| 142 | }; |
| 143 | |
| 144 | qcom,lpm-resources@3 { |
| 145 | reg = <0x3>; |
| 146 | qcom,name = "l2"; |
| 147 | qcom,resource-type = <1>; |
| 148 | qcom,init-value = <2>; /* Retention */ |
| 149 | }; |
| 150 | }; |
| 151 | |
| 152 | qcom,lpm-levels { |
| 153 | compatible = "qcom,lpm-levels"; |
| 154 | #address-cells = <1>; |
| 155 | #size-cells = <0>; |
| 156 | |
| 157 | qcom,lpm-level@0 { |
| 158 | reg = <0x0>; |
| 159 | qcom,mode = <0>; /* MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT */ |
| 160 | qcom,xo = <1>; /* ON */ |
| 161 | qcom,l2 = <3>; /* ACTIVE */ |
| 162 | qcom,vdd-mem-upper-bound = <1150000>; /* MAX */ |
| 163 | qcom,vdd-mem-lower-bound = <1050000>; /* ACTIVE */ |
| 164 | qcom,vdd-dig-upper-bound = <5>; /* MAX */ |
| 165 | qcom,vdd-dig-lower-bound = <3>; /* ACTIVE */ |
| 166 | qcom,latency-us = <1>; |
| 167 | qcom,ss-power = <784>; |
| 168 | qcom,energy-overhead = <190000>; |
| 169 | qcom,time-overhead = <100>; |
| 170 | }; |
| 171 | |
| 172 | qcom,lpm-level@1 { |
| 173 | reg = <0x1>; |
| 174 | qcom,mode = <4>; /* MSM_PM_SLEEP_MODE_RETENTION*/ |
| 175 | qcom,xo = <1>; /* ON */ |
| 176 | qcom,l2 = <3>; /* ACTIVE */ |
| 177 | qcom,vdd-mem-upper-bound = <1150000>; /* MAX */ |
| 178 | qcom,vdd-mem-lower-bound = <1050000>; /* ACTIVE */ |
| 179 | qcom,vdd-dig-upper-bound = <5>; /* MAX */ |
| 180 | qcom,vdd-dig-lower-bound = <3>; /* ACTIVE */ |
| 181 | qcom,latency-us = <75>; |
| 182 | qcom,ss-power = <735>; |
| 183 | qcom,energy-overhead = <77341>; |
| 184 | qcom,time-overhead = <105>; |
| 185 | }; |
| 186 | |
| 187 | |
| 188 | qcom,lpm-level@2 { |
| 189 | reg = <0x2>; |
| 190 | qcom,mode = <2>; /* MSM_PM_SLEEP_MODE_STANDALONE_POWER_COLLAPSE */ |
| 191 | qcom,xo = <1>; /* ON */ |
| 192 | qcom,l2 = <3>; /* ACTIVE */ |
| 193 | qcom,vdd-mem-upper-bound = <1150000>; /* MAX */ |
| 194 | qcom,vdd-mem-lower-bound = <1050000>; /* ACTIVE */ |
| 195 | qcom,vdd-dig-upper-bound = <5>; /* MAX */ |
| 196 | qcom,vdd-dig-lower-bound = <3>; /* ACTIVE */ |
| 197 | qcom,latency-us = <95>; |
| 198 | qcom,ss-power = <725>; |
| 199 | qcom,energy-overhead = <99500>; |
| 200 | qcom,time-overhead = <130>; |
| 201 | }; |
| 202 | |
| 203 | qcom,lpm-level@3 { |
| 204 | reg = <0x3>; |
| 205 | qcom,mode = <3>; /* MSM_PM_SLEEP_MODE_POWER_COLLAPSE */ |
| 206 | qcom,xo = <1>; /* ON */ |
| 207 | qcom,l2 = <1>; /* GDHS */ |
| 208 | qcom,vdd-mem-upper-bound = <1150000>; /* MAX */ |
| 209 | qcom,vdd-mem-lower-bound = <1050000>; /* ACTIVE */ |
| 210 | qcom,vdd-dig-upper-bound = <5>; /* MAX */ |
| 211 | qcom,vdd-dig-lower-bound = <3>; /* ACTIVE */ |
| 212 | qcom,latency-us = <2000>; |
| 213 | qcom,ss-power = <138>; |
| 214 | qcom,energy-overhead = <1208400>; |
| 215 | qcom,time-overhead = <3200>; |
| 216 | }; |
| 217 | |
| 218 | qcom,lpm-level@4 { |
| 219 | reg = <0x4>; |
| 220 | qcom,mode = <3>; /* MSM_PM_SLEEP_MODE_POWER_COLLAPSE */ |
| 221 | qcom,xo = <1>; /* ON */ |
| 222 | qcom,l2 = <0>; /* OFF */ |
| 223 | qcom,vdd-mem-upper-bound = <1050000>; /* ACTIVE */ |
| 224 | qcom,vdd-mem-lower-bound = <750000>; /* RETENTION HIGH */ |
| 225 | qcom,vdd-dig-upper-bound = <3>; /* ACTIVE */ |
| 226 | qcom,vdd-dig-lower-bound = <2>; /* RETENTION HIGH */ |
| 227 | qcom,latency-us = <3000>; |
| 228 | qcom,ss-power = <110>; |
| 229 | qcom,energy-overhead = <1250300>; |
| 230 | qcom,time-overhead = <3500>; |
| 231 | }; |
| 232 | |
| 233 | qcom,lpm-level@5 { |
| 234 | reg = <0x5>; |
| 235 | qcom,mode = <3>; /* MSM_PM_SLEEP_MODE_POWER_COLLAPSE */ |
| 236 | qcom,xo = <0>; /* OFF */ |
| 237 | qcom,l2 = <1>; /* GDHS */ |
| 238 | qcom,vdd-mem-upper-bound = <1150000>; /* MAX */ |
| 239 | qcom,vdd-mem-lower-bound = <1050000>; /* ACTIVE */ |
| 240 | qcom,vdd-dig-upper-bound = <5>; /* MAX */ |
| 241 | qcom,vdd-dig-lower-bound = <3>; /* ACTIVE */ |
| 242 | qcom,latency-us = <3000>; |
| 243 | qcom,ss-power = <68>; |
| 244 | qcom,energy-overhead = <1350200>; |
| 245 | qcom,time-overhead = <4000>; |
| 246 | }; |
| 247 | |
| 248 | qcom,lpm-level@6 { |
| 249 | reg = <0x6>; |
| 250 | qcom,mode = <3>; /* MSM_PM_SLEEP_MODE_POWER_COLLAPSE */ |
| 251 | qcom,xo = <0>; /* OFF */ |
| 252 | qcom,l2 = <0>; /* OFF */ |
| 253 | qcom,vdd-mem-upper-bound = <1150000>; /* MAX */ |
| 254 | qcom,vdd-mem-lower-bound = <1050000>; /* ACTIVE */ |
| 255 | qcom,vdd-dig-upper-bound = <5>; /* MAX */ |
| 256 | qcom,vdd-dig-lower-bound = <3>; /* ACTIVE */ |
| 257 | qcom,latency-us = <10300>; |
| 258 | qcom,ss-power = <63>; |
| 259 | qcom,energy-overhead = <2128000>; |
| 260 | qcom,time-overhead = <18200>; |
| 261 | }; |
| 262 | |
| 263 | qcom,lpm-level@7 { |
| 264 | reg = <0x7>; |
| 265 | qcom,mode= <3>; /* MSM_PM_SLEEP_MODE_POWER_COLLAPSE */ |
| 266 | qcom,xo = <0>; /* OFF */ |
| 267 | qcom,l2 = <0>; /* OFF */ |
| 268 | qcom,vdd-mem-upper-bound = <1050000>; /* ACTIVE */ |
| 269 | qcom,vdd-mem-lower-bound = <750000>; /* RETENTION HIGH */ |
| 270 | qcom,vdd-dig-upper-bound = <3>; /* ACTIVE */ |
| 271 | qcom,vdd-dig-lower-bound = <2>; /* RETIONTION HIGH */ |
| 272 | qcom,latency-us = <18000>; |
| 273 | qcom,ss-power = <10>; |
| 274 | qcom,energy-overhead = <3202600>; |
| 275 | qcom,time-overhead = <27000>; |
| 276 | }; |
| 277 | |
| 278 | qcom,lpm-level@8 { |
| 279 | reg = <0x8>; |
| 280 | qcom,mode= <3>; /* MSM_PM_SLEEP_MODE_POWER_COLLAPSE */ |
| 281 | qcom,xo = <0>; /* OFF */ |
| 282 | qcom,l2 = <0>; /* OFF */ |
| 283 | qcom,vdd-mem-upper-bound = <750000>; /* RETENTION HIGH */ |
| 284 | qcom,vdd-mem-lower-bound = <750000>; /* RETENTION LOW */ |
| 285 | qcom,vdd-dig-upper-bound = <2>; /* RETENTION HIGH */ |
| 286 | qcom,vdd-dig-lower-bound = <0>; /* RETENTION LOW */ |
| 287 | qcom,latency-us = <20000>; |
| 288 | qcom,ss-power = <2>; |
| 289 | qcom,energy-overhead = <4252000>; |
| 290 | qcom,time-overhead = <32000>; |
| 291 | }; |
| 292 | }; |
| 293 | |
| 294 | qcom,pm-boot { |
| 295 | compatible = "qcom,pm-boot"; |
| 296 | qcom,mode = <0>; /* MSM_PM_BOOT_CONFIG_TZ */ |
| 297 | }; |
| 298 | |
| 299 | qcom,mpm@fc4281d0 { |
| 300 | compatible = "qcom,mpm-v2"; |
| 301 | reg = <0xfc4281d0 0x1000>, /* MSM_RPM_MPM_BASE 4K */ |
| 302 | <0xf9011008 0x4>; /* MSM_APCS_GCC_BASE 4K */ |
| 303 | reg-names = "vmpm", "ipc"; |
| 304 | interrupts = <0 171 1>; |
| 305 | |
| 306 | qcom,ipc-bit-offset = <1>; |
| 307 | |
| 308 | qcom,gic-parent = <&intc>; |
| 309 | qcom,gic-map = <47 172>, /* usb2_hsic_async_wakeup_irq */ |
| 310 | <53 104>, /* mdss_irq */ |
| 311 | <62 222>, /* ee0_krait_hlos_spmi_periph_irq */ |
| 312 | <0xff 57>, /* mss_to_apps_irq(0) */ |
| 313 | <0xff 58>, /* mss_to_apps_irq(1) */ |
| 314 | <0xff 59>, /* mss_to_apps_irq(2) */ |
| 315 | <0xff 60>, /* mss_to_apps_irq(3) */ |
| 316 | <0xff 173>, /* o_wcss_apss_smd_hi */ |
| 317 | <0xff 174>, /* o_wcss_apss_smd_med */ |
| 318 | <0xff 175>, /* o_wcss_apss_smd_low */ |
| 319 | <0xff 176>, /* o_wcss_apss_smsm_irq */ |
| 320 | <0xff 177>, /* o_wcss_apss_wlan_data_xfer_done */ |
| 321 | <0xff 178>, /* o_wcss_apss_wlan_rx_data_avail */ |
| 322 | <0xff 179>, /* o_wcss_apss_asic_intr |
| 323 | |
| 324 | <0xff 188>, /* lpass_irq_out_apcs(0) */ |
| 325 | <0xff 189>, /* lpass_irq_out_apcs(1) */ |
| 326 | <0xff 190>, /* lpass_irq_out_apcs(2) */ |
| 327 | <0xff 191>, /* lpass_irq_out_apcs(3) */ |
| 328 | <0xff 192>, /* lpass_irq_out_apcs(4) */ |
| 329 | <0xff 193>, /* lpass_irq_out_apcs(5) */ |
| 330 | <0xff 194>, /* lpass_irq_out_apcs(6) */ |
| 331 | <0xff 195>, /* lpass_irq_out_apcs(7) */ |
| 332 | <0xff 196>, /* lpass_irq_out_apcs(8) */ |
| 333 | <0xff 197>, /* lpass_irq_out_apcs(9) */ |
| 334 | <0xff 200>, /* rpm_ipc(4) */ |
| 335 | <0xff 201>, /* rpm_ipc(5) */ |
| 336 | <0xff 202>, /* rpm_ipc(6) */ |
| 337 | <0xff 203>, /* rpm_ipc(7) */ |
| 338 | <0xff 204>, /* rpm_ipc(24) */ |
| 339 | <0xff 205>, /* rpm_ipc(25) */ |
| 340 | <0xff 206>, /* rpm_ipc(26) */ |
| 341 | <0xff 207>, /* rpm_ipc(27) */ |
| 342 | <0xff 240>; /* summary_irq_kpss */ |
| 343 | |
| 344 | qcom,gpio-parent = <&msmgpio>; |
| 345 | qcom,gpio-map = <3 102>, |
| 346 | <4 1 >, |
| 347 | <5 5 >, |
| 348 | <6 9 >, |
| 349 | <7 18>, |
| 350 | <8 20>, |
| 351 | <9 24>, |
| 352 | <10 27>, |
| 353 | <11 28>, |
| 354 | <12 34>, |
| 355 | <13 35>, |
| 356 | <14 37>, |
| 357 | <15 42>, |
| 358 | <16 44>, |
| 359 | <17 46>, |
| 360 | <18 50>, |
| 361 | <19 54>, |
| 362 | <20 59>, |
| 363 | <21 61>, |
| 364 | <22 62>, |
| 365 | <23 64>, |
| 366 | <24 65>, |
| 367 | <25 66>, |
| 368 | <26 67>, |
| 369 | <27 68>, |
| 370 | <28 71>, |
| 371 | <29 72>, |
| 372 | <30 73>, |
| 373 | <31 74>, |
| 374 | <32 75>, |
| 375 | <33 77>, |
| 376 | <34 79>, |
| 377 | <35 80>, |
| 378 | <36 82>, |
| 379 | <37 86>, |
| 380 | <38 92>, |
| 381 | <39 93>, |
| 382 | <40 95>; |
| 383 | }; |
| 384 | |
| 385 | qcom,pc-cntr@fe805664 { |
| 386 | compatible = "qcom,pc-cntr"; |
| 387 | reg = <0xfe805664 0x40>; |
| 388 | }; |
| 389 | |
| 390 | qcom,pm-8x60 { |
| 391 | compatible = "qcom,pm-8x60"; |
| 392 | qcom,pc-mode = <0>; /*MSM_PC_TZ_L2_INT */ |
| 393 | qcom,use-sync-timer; |
| 394 | }; |
| 395 | |
| 396 | qcom,rpm-stats@0xfc19dbd0{ |
| 397 | compatible = "qcom,rpm-stats"; |
| 398 | reg = <0xfc19dbd0 0x1000>; |
| 399 | reg-names = "phys_addr_base"; |
| 400 | qcom,sleep-stats-version = <2>; |
| 401 | }; |
| 402 | }; |