| Paul Mundt | 43b8774 | 2010-04-13 14:43:03 +0900 | [diff] [blame] | 1 | config INTC_USERIMASK |
| 2 | bool "Userspace interrupt masking support" |
| 3 | depends on ARCH_SHMOBILE || (SUPERH && CPU_SH4A) |
| 4 | help |
| 5 | This enables support for hardware-assisted userspace hardirq |
| 6 | masking. |
| 7 | |
| 8 | SH-4A and newer interrupt blocks all support a special shadowed |
| 9 | page with all non-masking registers obscured when mapped in to |
| 10 | userspace. This is primarily for use by userspace device |
| 11 | drivers that are using special priority levels. |
| 12 | |
| 13 | If in doubt, say N. |
| Paul Mundt | dc825b1 | 2010-04-15 13:13:52 +0900 | [diff] [blame] | 14 | |
| 15 | config INTC_BALANCING |
| 16 | bool "Hardware IRQ balancing support" |
| 17 | depends on SMP && SUPERH && CPU_SUBTYPE_SH7786 |
| 18 | help |
| 19 | This enables support for IRQ auto-distribution mode on SH-X3 |
| 20 | SMP parts. All of the balancing and CPU wakeup decisions are |
| 21 | taken care of automatically by hardware for distributed |
| 22 | vectors. |
| 23 | |
| 24 | If in doubt, say N. |