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Steve Glendinningfd9abb32008-11-05 00:35:37 +00001/***************************************************************************
2 *
3 * Copyright (C) 2004-2008 SMSC
4 * Copyright (C) 2005-2008 ARM
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 *
20 ***************************************************************************/
21#ifndef __LINUX_SMSC911X_H__
22#define __LINUX_SMSC911X_H__
23
24#include <linux/phy.h>
25
26/* platform_device configuration data, should be assigned to
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070027 * the platform_device's dev.platform_data
28 * Provides 2 GPIO-related fields
29 * reset_gpio to map the ETHERNET_RESET GPIO pin
30 * has_reset_gpio - to indicate if the GPIO is being set(1) or not(0)
31 * and remain compatible with architectures not using GPIOs
32 * Default would be zero if its not being assigned any value.
33 * Both values would need to set in the appropriate board file
34 */
Steve Glendinningfd9abb32008-11-05 00:35:37 +000035struct smsc911x_platform_config {
36 unsigned int irq_polarity;
37 unsigned int irq_type;
Steve Glendinning2107fb82008-11-05 00:35:38 +000038 unsigned int flags;
Mathieu J. Poirierc326de82011-04-13 17:13:00 -070039 unsigned int shift;
Steve Glendinningfd9abb32008-11-05 00:35:37 +000040 phy_interface_t phy_interface;
Manuel Laussaace4952009-10-13 07:25:49 +000041 unsigned char mac[6];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070042 unsigned char has_reset_gpio;
43 unsigned int reset_gpio;
Steve Glendinningfd9abb32008-11-05 00:35:37 +000044};
45
46/* Constants for platform_device irq polarity configuration */
47#define SMSC911X_IRQ_POLARITY_ACTIVE_LOW 0
48#define SMSC911X_IRQ_POLARITY_ACTIVE_HIGH 1
49
50/* Constants for platform_device irq type configuration */
51#define SMSC911X_IRQ_TYPE_OPEN_DRAIN 0
52#define SMSC911X_IRQ_TYPE_PUSH_PULL 1
53
Steve Glendinning2107fb82008-11-05 00:35:38 +000054/* Constants for flags */
55#define SMSC911X_USE_16BIT (BIT(0))
56#define SMSC911X_USE_32BIT (BIT(1))
Steve Glendinningd23f0282009-01-27 06:51:11 +000057#define SMSC911X_FORCE_INTERNAL_PHY (BIT(2))
58#define SMSC911X_FORCE_EXTERNAL_PHY (BIT(3))
Steve Glendinning31f45742009-01-27 06:51:12 +000059#define SMSC911X_SAVE_MAC_ADDRESS (BIT(4))
Steve Glendinning2107fb82008-11-05 00:35:38 +000060
Magnus Damm833cc672009-04-27 21:32:16 +000061/*
62 * SMSC911X_SWAP_FIFO:
63 * Enables software byte swap for fifo data. Should only be used as a
64 * "last resort" in the case of big endian mode on boards with incorrectly
65 * routed data bus to older devices such as LAN9118. Newer devices such as
66 * LAN9221 can handle this in hardware, there are registers to control
67 * this swapping but the driver doesn't currently use them.
68 */
69#define SMSC911X_SWAP_FIFO (BIT(5))
70
Steve Glendinningfd9abb32008-11-05 00:35:37 +000071#endif /* __LINUX_SMSC911X_H__ */