blob: 4dcb5a7e40e874c37440cbcf82073844ebf6d4d7 [file] [log] [blame]
Peter Ujfalusifd26f942011-11-28 15:45:40 +02001/*
2 * omap-dmic.c -- OMAP ASoC DMIC DAI driver
3 *
4 * Copyright (C) 2010 - 2011 Texas Instruments
5 *
6 * Author: David Lambert <dlambert@ti.com>
7 * Misael Lopez Cruz <misael.lopez@ti.com>
8 * Liam Girdwood <lrg@ti.com>
9 * Peter Ujfalusi <peter.ujfalusi@ti.com>
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * version 2 as published by the Free Software Foundation.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
23 * 02110-1301 USA
24 *
25 */
26
27#include <linux/init.h>
28#include <linux/module.h>
29#include <linux/platform_device.h>
30#include <linux/err.h>
31#include <linux/clk.h>
32#include <linux/io.h>
33#include <linux/slab.h>
34#include <linux/pm_runtime.h>
35#include <plat/dma.h>
36
37#include <sound/core.h>
38#include <sound/pcm.h>
39#include <sound/pcm_params.h>
40#include <sound/initval.h>
41#include <sound/soc.h>
42
43#include "omap-pcm.h"
44#include "omap-dmic.h"
45
46struct omap_dmic {
47 struct device *dev;
48 void __iomem *io_base;
49 struct clk *fclk;
50 int fclk_freq;
51 int out_freq;
52 int clk_div;
53 int sysclk;
54 int threshold;
55 u32 ch_enabled;
56 bool active;
57 struct mutex mutex;
58};
59
60/*
61 * Stream DMA parameters
62 */
63static struct omap_pcm_dma_data omap_dmic_dai_dma_params = {
64 .name = "DMIC capture",
65 .data_type = OMAP_DMA_DATA_TYPE_S32,
66 .sync_mode = OMAP_DMA_SYNC_PACKET,
67};
68
69static inline void omap_dmic_write(struct omap_dmic *dmic, u16 reg, u32 val)
70{
71 __raw_writel(val, dmic->io_base + reg);
72}
73
74static inline int omap_dmic_read(struct omap_dmic *dmic, u16 reg)
75{
76 return __raw_readl(dmic->io_base + reg);
77}
78
79static inline void omap_dmic_start(struct omap_dmic *dmic)
80{
81 u32 ctrl = omap_dmic_read(dmic, OMAP_DMIC_CTRL_REG);
82
83 /* Configure DMA controller */
84 omap_dmic_write(dmic, OMAP_DMIC_DMAENABLE_SET_REG,
85 OMAP_DMIC_DMA_ENABLE);
86
87 omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG, ctrl | dmic->ch_enabled);
88}
89
90static inline void omap_dmic_stop(struct omap_dmic *dmic)
91{
92 u32 ctrl = omap_dmic_read(dmic, OMAP_DMIC_CTRL_REG);
93 omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG,
94 ctrl & ~OMAP_DMIC_UP_ENABLE_MASK);
95
96 /* Disable DMA request generation */
97 omap_dmic_write(dmic, OMAP_DMIC_DMAENABLE_CLR_REG,
98 OMAP_DMIC_DMA_ENABLE);
99
100}
101
102static inline int dmic_is_enabled(struct omap_dmic *dmic)
103{
104 return omap_dmic_read(dmic, OMAP_DMIC_CTRL_REG) &
105 OMAP_DMIC_UP_ENABLE_MASK;
106}
107
108static int omap_dmic_dai_startup(struct snd_pcm_substream *substream,
109 struct snd_soc_dai *dai)
110{
111 struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
112 int ret = 0;
113
114 mutex_lock(&dmic->mutex);
115
Peter Ujfalusi7df6f252012-01-18 12:18:23 +0100116 if (!dai->active)
Peter Ujfalusifd26f942011-11-28 15:45:40 +0200117 dmic->active = 1;
Peter Ujfalusi7df6f252012-01-18 12:18:23 +0100118 else
Peter Ujfalusifd26f942011-11-28 15:45:40 +0200119 ret = -EBUSY;
Peter Ujfalusifd26f942011-11-28 15:45:40 +0200120
121 mutex_unlock(&dmic->mutex);
122
123 return ret;
124}
125
126static void omap_dmic_dai_shutdown(struct snd_pcm_substream *substream,
127 struct snd_soc_dai *dai)
128{
129 struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
130
131 mutex_lock(&dmic->mutex);
132
Mark Brown06d07b62011-12-03 20:20:02 +0000133 if (!dai->active)
Peter Ujfalusifd26f942011-11-28 15:45:40 +0200134 dmic->active = 0;
Peter Ujfalusifd26f942011-11-28 15:45:40 +0200135
136 mutex_unlock(&dmic->mutex);
137}
138
139static int omap_dmic_select_divider(struct omap_dmic *dmic, int sample_rate)
140{
141 int divider = -EINVAL;
142
143 /*
144 * 192KHz rate is only supported with 19.2MHz/3.84MHz clock
145 * configuration.
146 */
147 if (sample_rate == 192000) {
148 if (dmic->fclk_freq == 19200000 && dmic->out_freq == 3840000)
149 divider = 0x6; /* Divider: 5 (192KHz sampling rate) */
150 else
151 dev_err(dmic->dev,
152 "invalid clock configuration for 192KHz\n");
153
154 return divider;
155 }
156
157 switch (dmic->out_freq) {
158 case 1536000:
159 if (dmic->fclk_freq != 24576000)
160 goto div_err;
161 divider = 0x4; /* Divider: 16 */
162 break;
163 case 2400000:
164 switch (dmic->fclk_freq) {
165 case 12000000:
166 divider = 0x5; /* Divider: 5 */
167 break;
168 case 19200000:
169 divider = 0x0; /* Divider: 8 */
170 break;
171 case 24000000:
172 divider = 0x2; /* Divider: 10 */
173 break;
174 default:
175 goto div_err;
176 }
177 break;
178 case 3072000:
179 if (dmic->fclk_freq != 24576000)
180 goto div_err;
181 divider = 0x3; /* Divider: 8 */
182 break;
183 case 3840000:
184 if (dmic->fclk_freq != 19200000)
185 goto div_err;
186 divider = 0x1; /* Divider: 5 (96KHz sampling rate) */
187 break;
188 default:
189 dev_err(dmic->dev, "invalid out frequency: %dHz\n",
190 dmic->out_freq);
191 break;
192 }
193
194 return divider;
195
196div_err:
197 dev_err(dmic->dev, "invalid out frequency %dHz for %dHz input\n",
198 dmic->out_freq, dmic->fclk_freq);
199 return -EINVAL;
200}
201
202static int omap_dmic_dai_hw_params(struct snd_pcm_substream *substream,
203 struct snd_pcm_hw_params *params,
204 struct snd_soc_dai *dai)
205{
206 struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
207 int channels;
208
209 dmic->clk_div = omap_dmic_select_divider(dmic, params_rate(params));
210 if (dmic->clk_div < 0) {
211 dev_err(dmic->dev, "no valid divider for %dHz from %dHz\n",
212 dmic->out_freq, dmic->fclk_freq);
213 return -EINVAL;
214 }
215
216 dmic->ch_enabled = 0;
217 channels = params_channels(params);
218 switch (channels) {
219 case 6:
220 dmic->ch_enabled |= OMAP_DMIC_UP3_ENABLE;
221 case 4:
222 dmic->ch_enabled |= OMAP_DMIC_UP2_ENABLE;
223 case 2:
224 dmic->ch_enabled |= OMAP_DMIC_UP1_ENABLE;
225 break;
226 default:
227 dev_err(dmic->dev, "invalid number of legacy channels\n");
228 return -EINVAL;
229 }
230
231 /* packet size is threshold * channels */
232 omap_dmic_dai_dma_params.packet_size = dmic->threshold * channels;
233 snd_soc_dai_set_dma_data(dai, substream, &omap_dmic_dai_dma_params);
234
235 return 0;
236}
237
238static int omap_dmic_dai_prepare(struct snd_pcm_substream *substream,
239 struct snd_soc_dai *dai)
240{
241 struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
242 u32 ctrl;
243
244 /* Configure uplink threshold */
245 omap_dmic_write(dmic, OMAP_DMIC_FIFO_CTRL_REG, dmic->threshold);
246
247 ctrl = omap_dmic_read(dmic, OMAP_DMIC_CTRL_REG);
248
249 /* Set dmic out format */
250 ctrl &= ~(OMAP_DMIC_FORMAT | OMAP_DMIC_POLAR_MASK);
251 ctrl |= (OMAP_DMICOUTFORMAT_LJUST | OMAP_DMIC_POLAR1 |
252 OMAP_DMIC_POLAR2 | OMAP_DMIC_POLAR3);
253
254 /* Configure dmic clock divider */
255 ctrl &= ~OMAP_DMIC_CLK_DIV_MASK;
256 ctrl |= OMAP_DMIC_CLK_DIV(dmic->clk_div);
257
258 omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG, ctrl);
259
260 omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG,
261 ctrl | OMAP_DMICOUTFORMAT_LJUST | OMAP_DMIC_POLAR1 |
262 OMAP_DMIC_POLAR2 | OMAP_DMIC_POLAR3);
263
264 return 0;
265}
266
267static int omap_dmic_dai_trigger(struct snd_pcm_substream *substream,
268 int cmd, struct snd_soc_dai *dai)
269{
270 struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
271
272 switch (cmd) {
273 case SNDRV_PCM_TRIGGER_START:
274 omap_dmic_start(dmic);
275 break;
276 case SNDRV_PCM_TRIGGER_STOP:
277 omap_dmic_stop(dmic);
278 break;
279 default:
280 break;
281 }
282
283 return 0;
284}
285
286static int omap_dmic_select_fclk(struct omap_dmic *dmic, int clk_id,
287 unsigned int freq)
288{
289 struct clk *parent_clk;
290 char *parent_clk_name;
291 int ret = 0;
292
293 switch (freq) {
294 case 12000000:
295 case 19200000:
296 case 24000000:
297 case 24576000:
298 break;
299 default:
300 dev_err(dmic->dev, "invalid input frequency: %dHz\n", freq);
301 dmic->fclk_freq = 0;
302 return -EINVAL;
303 }
304
305 if (dmic->sysclk == clk_id) {
306 dmic->fclk_freq = freq;
307 return 0;
308 }
309
310 /* re-parent not allowed if a stream is ongoing */
311 if (dmic->active && dmic_is_enabled(dmic)) {
312 dev_err(dmic->dev, "can't re-parent when DMIC active\n");
313 return -EBUSY;
314 }
315
316 switch (clk_id) {
317 case OMAP_DMIC_SYSCLK_PAD_CLKS:
318 parent_clk_name = "pad_clks_ck";
319 break;
320 case OMAP_DMIC_SYSCLK_SLIMBLUS_CLKS:
321 parent_clk_name = "slimbus_clk";
322 break;
323 case OMAP_DMIC_SYSCLK_SYNC_MUX_CLKS:
324 parent_clk_name = "dmic_sync_mux_ck";
325 break;
326 default:
327 dev_err(dmic->dev, "fclk clk_id (%d) not supported\n", clk_id);
328 return -EINVAL;
329 }
330
331 parent_clk = clk_get(dmic->dev, parent_clk_name);
332 if (IS_ERR(parent_clk)) {
333 dev_err(dmic->dev, "can't get %s\n", parent_clk_name);
334 return -ENODEV;
335 }
336
337 mutex_lock(&dmic->mutex);
338 if (dmic->active) {
339 /* disable clock while reparenting */
340 pm_runtime_put_sync(dmic->dev);
341 ret = clk_set_parent(dmic->fclk, parent_clk);
342 pm_runtime_get_sync(dmic->dev);
343 } else {
344 ret = clk_set_parent(dmic->fclk, parent_clk);
345 }
346 mutex_unlock(&dmic->mutex);
347
348 if (ret < 0) {
349 dev_err(dmic->dev, "re-parent failed\n");
350 goto err_busy;
351 }
352
353 dmic->sysclk = clk_id;
354 dmic->fclk_freq = freq;
355
356err_busy:
357 clk_put(parent_clk);
358
359 return ret;
360}
361
362static int omap_dmic_select_outclk(struct omap_dmic *dmic, int clk_id,
363 unsigned int freq)
364{
365 int ret = 0;
366
367 if (clk_id != OMAP_DMIC_ABE_DMIC_CLK) {
368 dev_err(dmic->dev, "output clk_id (%d) not supported\n",
369 clk_id);
370 return -EINVAL;
371 }
372
373 switch (freq) {
374 case 1536000:
375 case 2400000:
376 case 3072000:
377 case 3840000:
378 dmic->out_freq = freq;
379 break;
380 default:
381 dev_err(dmic->dev, "invalid out frequency: %dHz\n", freq);
382 dmic->out_freq = 0;
383 ret = -EINVAL;
384 }
385
386 return ret;
387}
388
389static int omap_dmic_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
390 unsigned int freq, int dir)
391{
392 struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
393
394 if (dir == SND_SOC_CLOCK_IN)
395 return omap_dmic_select_fclk(dmic, clk_id, freq);
396 else if (dir == SND_SOC_CLOCK_OUT)
397 return omap_dmic_select_outclk(dmic, clk_id, freq);
398
399 dev_err(dmic->dev, "invalid clock direction (%d)\n", dir);
400 return -EINVAL;
401}
402
403static const struct snd_soc_dai_ops omap_dmic_dai_ops = {
404 .startup = omap_dmic_dai_startup,
405 .shutdown = omap_dmic_dai_shutdown,
406 .hw_params = omap_dmic_dai_hw_params,
407 .prepare = omap_dmic_dai_prepare,
408 .trigger = omap_dmic_dai_trigger,
409 .set_sysclk = omap_dmic_set_dai_sysclk,
410};
411
412static int omap_dmic_probe(struct snd_soc_dai *dai)
413{
414 struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
415
416 pm_runtime_enable(dmic->dev);
417
418 /* Disable lines while request is ongoing */
419 pm_runtime_get_sync(dmic->dev);
420 omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG, 0x00);
421 pm_runtime_put_sync(dmic->dev);
422
423 /* Configure DMIC threshold value */
424 dmic->threshold = OMAP_DMIC_THRES_MAX - 3;
425 return 0;
426}
427
428static int omap_dmic_remove(struct snd_soc_dai *dai)
429{
430 struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
431
432 pm_runtime_disable(dmic->dev);
433
434 return 0;
435}
436
437static struct snd_soc_dai_driver omap_dmic_dai = {
438 .name = "omap-dmic",
439 .probe = omap_dmic_probe,
440 .remove = omap_dmic_remove,
441 .capture = {
442 .channels_min = 2,
443 .channels_max = 6,
444 .rates = SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000,
445 .formats = SNDRV_PCM_FMTBIT_S32_LE,
Peter Ujfalusi7df6f252012-01-18 12:18:23 +0100446 .sig_bits = 24,
Peter Ujfalusifd26f942011-11-28 15:45:40 +0200447 },
448 .ops = &omap_dmic_dai_ops,
449};
450
451static __devinit int asoc_dmic_probe(struct platform_device *pdev)
452{
453 struct omap_dmic *dmic;
454 struct resource *res;
455 int ret;
456
457 dmic = devm_kzalloc(&pdev->dev, sizeof(struct omap_dmic), GFP_KERNEL);
458 if (!dmic)
459 return -ENOMEM;
460
461 platform_set_drvdata(pdev, dmic);
462 dmic->dev = &pdev->dev;
463 dmic->sysclk = OMAP_DMIC_SYSCLK_SYNC_MUX_CLKS;
464
465 mutex_init(&dmic->mutex);
466
467 dmic->fclk = clk_get(dmic->dev, "dmic_fck");
468 if (IS_ERR(dmic->fclk)) {
469 dev_err(dmic->dev, "cant get dmic_fck\n");
470 return -ENODEV;
471 }
472
473 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dma");
474 if (!res) {
475 dev_err(dmic->dev, "invalid dma memory resource\n");
476 ret = -ENODEV;
477 goto err_put_clk;
478 }
479 omap_dmic_dai_dma_params.port_addr = res->start + OMAP_DMIC_DATA_REG;
480
481 res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
482 if (!res) {
483 dev_err(dmic->dev, "invalid dma resource\n");
484 ret = -ENODEV;
485 goto err_put_clk;
486 }
487 omap_dmic_dai_dma_params.dma_req = res->start;
488
489 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu");
490 if (!res) {
491 dev_err(dmic->dev, "invalid memory resource\n");
492 ret = -ENODEV;
493 goto err_put_clk;
494 }
495
496 if (!devm_request_mem_region(&pdev->dev, res->start,
497 resource_size(res), pdev->name)) {
498 dev_err(dmic->dev, "memory region already claimed\n");
499 ret = -ENODEV;
500 goto err_put_clk;
501 }
502
503 dmic->io_base = devm_ioremap(&pdev->dev, res->start,
504 resource_size(res));
505 if (!dmic->io_base) {
506 ret = -ENOMEM;
507 goto err_put_clk;
508 }
509
510 ret = snd_soc_register_dai(&pdev->dev, &omap_dmic_dai);
511 if (ret)
512 goto err_put_clk;
513
514 return 0;
515
516err_put_clk:
517 clk_put(dmic->fclk);
518 return ret;
519}
520
521static int __devexit asoc_dmic_remove(struct platform_device *pdev)
522{
523 struct omap_dmic *dmic = platform_get_drvdata(pdev);
524
525 snd_soc_unregister_dai(&pdev->dev);
526 clk_put(dmic->fclk);
527
528 return 0;
529}
530
531static struct platform_driver asoc_dmic_driver = {
532 .driver = {
533 .name = "omap-dmic",
534 .owner = THIS_MODULE,
535 },
536 .probe = asoc_dmic_probe,
537 .remove = __devexit_p(asoc_dmic_remove),
538};
539
540module_platform_driver(asoc_dmic_driver);
541
542MODULE_ALIAS("platform:omap-dmic");
543MODULE_AUTHOR("Peter Ujfalusi <peter.ujfalusi@ti.com>");
544MODULE_DESCRIPTION("OMAP DMIC ASoC Interface");
545MODULE_LICENSE("GPL");