blob: e7dc6165032a35e540216d870d6ef75b2acb78e6 [file] [log] [blame]
Linus Walleijae6b4d82011-10-19 18:14:33 +02001/*
2 * Internal interface between the core pin control system and the
3 * pin config portions
4 *
5 * Copyright (C) 2011 ST-Ericsson SA
6 * Written on behalf of Linaro for ST-Ericsson
7 * Based on bits of regulator core, gpio core and clk core
8 *
9 * Author: Linus Walleij <linus.walleij@linaro.org>
10 *
11 * License terms: GNU General Public License (GPL) version 2
12 */
13
14#ifdef CONFIG_PINCONF
15
16int pinconf_check_ops(const struct pinconf_ops *ops);
17void pinconf_init_device_debugfs(struct dentry *devroot,
18 struct pinctrl_dev *pctldev);
19int pin_config_get_for_pin(struct pinctrl_dev *pctldev, unsigned pin,
20 unsigned long *config);
21int pin_config_set_for_pin(struct pinctrl_dev *pctldev, unsigned pin,
22 unsigned long config);
23
24#else
25
26static inline int pinconf_check_ops(const struct pinconf_ops *ops)
27{
28 return 0;
29}
30
31static inline void pinconf_init_device_debugfs(struct dentry *devroot,
32 struct pinctrl_dev *pctldev)
33{
34}
35
36#endif