David Keitel | 8498711 | 2013-02-11 13:26:30 -0800 | [diff] [blame] | 1 | /* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. |
Kenneth Heitke | e580400 | 2012-11-15 17:50:07 -0700 | [diff] [blame] | 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | &spmi_bus { |
| 14 | #address-cells = <1>; |
| 15 | #size-cells = <0>; |
| 16 | interrupt-controller; |
| 17 | #interrupt-cells = <3>; |
David Keitel | 8498711 | 2013-02-11 13:26:30 -0800 | [diff] [blame] | 18 | |
David Keitel | 4109e95 | 2013-02-07 20:22:13 -0800 | [diff] [blame] | 19 | qcom,pm8226@0 { |
| 20 | spmi-slave-container; |
| 21 | reg = <0x0>; |
| 22 | #address-cells = <1>; |
| 23 | #size-cells = <1>; |
| 24 | |
Amy Maloche | f822594 | 2013-03-04 12:16:29 -0800 | [diff] [blame] | 25 | qcom,power-on@800 { |
| 26 | compatible = "qcom,qpnp-power-on"; |
| 27 | reg = <0x800 0x100>; |
| 28 | interrupts = <0x0 0x8 0x0>, |
| 29 | <0x0 0x8 0x1>, |
| 30 | <0x0 0x8 0x4>; |
| 31 | interrupt-names = "kpdpwr", "resin", "resin-bark"; |
| 32 | qcom,pon-dbc-delay = <15625>; |
| 33 | qcom,system-reset; |
| 34 | |
| 35 | qcom,pon_1 { |
| 36 | qcom,pon-type = <0>; |
| 37 | qcom,pull-up = <1>; |
| 38 | linux,code = <116>; |
| 39 | }; |
| 40 | |
| 41 | qcom,pon_2 { |
| 42 | qcom,pon-type = <1>; |
| 43 | qcom,support-reset = <1>; |
| 44 | qcom,pull-up = <1>; |
| 45 | qcom,s1-timer = <0>; |
| 46 | qcom,s2-timer = <2000>; |
| 47 | qcom,s2-type = <1>; |
| 48 | linux,code = <114>; |
| 49 | }; |
| 50 | }; |
| 51 | |
David Keitel | 4109e95 | 2013-02-07 20:22:13 -0800 | [diff] [blame] | 52 | pm8226_gpios: gpios { |
| 53 | spmi-dev-container; |
| 54 | compatible = "qcom,qpnp-pin"; |
| 55 | gpio-controller; |
| 56 | #gpio-cells = <2>; |
| 57 | #address-cells = <1>; |
| 58 | #size-cells = <1>; |
| 59 | label = "pm8226-gpio"; |
| 60 | |
| 61 | gpio@c000 { |
| 62 | reg = <0xc000 0x100>; |
| 63 | qcom,pin-num = <1>; |
| 64 | }; |
| 65 | |
| 66 | gpio@c100 { |
| 67 | reg = <0xc100 0x100>; |
| 68 | qcom,pin-num = <2>; |
| 69 | }; |
| 70 | |
| 71 | gpio@c200 { |
| 72 | reg = <0xc200 0x100>; |
| 73 | qcom,pin-num = <3>; |
| 74 | }; |
| 75 | |
| 76 | gpio@c300 { |
| 77 | reg = <0xc300 0x100>; |
| 78 | qcom,pin-num = <4>; |
| 79 | }; |
| 80 | |
| 81 | gpio@c400 { |
| 82 | reg = <0xc400 0x100>; |
| 83 | qcom,pin-num = <5>; |
| 84 | }; |
| 85 | |
| 86 | gpio@c500 { |
| 87 | reg = <0xc500 0x100>; |
| 88 | qcom,pin-num = <6>; |
| 89 | }; |
| 90 | |
| 91 | gpio@c600 { |
| 92 | reg = <0xc600 0x100>; |
| 93 | qcom,pin-num = <7>; |
| 94 | }; |
| 95 | |
| 96 | gpio@c700 { |
| 97 | reg = <0xc700 0x100>; |
| 98 | qcom,pin-num = <8>; |
| 99 | }; |
| 100 | }; |
| 101 | |
| 102 | pm8226_mpps: mpps { |
| 103 | spmi-dev-container; |
| 104 | compatible = "qcom,qpnp-pin"; |
| 105 | gpio-controller; |
| 106 | #gpio-cells = <2>; |
| 107 | #address-cells = <1>; |
| 108 | #size-cells = <1>; |
| 109 | label = "pm8226-mpp"; |
| 110 | |
| 111 | mpp@a000 { |
| 112 | reg = <0xa000 0x100>; |
| 113 | qcom,pin-num = <1>; |
| 114 | }; |
| 115 | |
| 116 | mpp@a100 { |
| 117 | reg = <0xa100 0x100>; |
| 118 | qcom,pin-num = <2>; |
| 119 | }; |
| 120 | |
| 121 | mpp@a200 { |
| 122 | reg = <0xa200 0x100>; |
| 123 | qcom,pin-num = <3>; |
| 124 | }; |
| 125 | |
| 126 | mpp@a300 { |
| 127 | reg = <0xa300 0x100>; |
| 128 | qcom,pin-num = <4>; |
| 129 | }; |
| 130 | |
| 131 | mpp@a400 { |
| 132 | reg = <0xa400 0x100>; |
| 133 | qcom,pin-num = <5>; |
| 134 | }; |
| 135 | |
| 136 | mpp@a500 { |
| 137 | reg = <0xa500 0x100>; |
| 138 | qcom,pin-num = <6>; |
| 139 | }; |
| 140 | |
| 141 | mpp@a600 { |
| 142 | reg = <0xa600 0x100>; |
| 143 | qcom,pin-num = <7>; |
| 144 | }; |
| 145 | |
| 146 | mpp@a700 { |
| 147 | reg = <0xa700 0x100>; |
| 148 | qcom,pin-num = <8>; |
| 149 | }; |
| 150 | }; |
Siddartha Mohanadoss | ae99e77 | 2013-02-19 15:44:40 -0800 | [diff] [blame] | 151 | |
| 152 | pm8226_vadc: vadc@3100 { |
| 153 | compatible = "qcom,qpnp-vadc"; |
| 154 | reg = <0x3100 0x100>; |
| 155 | #address-cells = <1>; |
| 156 | #size-cells = <0>; |
| 157 | interrupts = <0x0 0x31 0x0>; |
| 158 | interrupt-names = "eoc-int-en-set"; |
| 159 | qcom,adc-bit-resolution = <15>; |
| 160 | qcom,adc-vdd-reference = <1800>; |
| 161 | |
| 162 | chan@8 { |
| 163 | label = "die_temp"; |
| 164 | reg = <8>; |
| 165 | qcom,decimation = <0>; |
| 166 | qcom,pre-div-channel-scaling = <0>; |
| 167 | qcom,calibration-type = "absolute"; |
| 168 | qcom,scale-function = <3>; |
| 169 | qcom,hw-settle-time = <0>; |
| 170 | qcom,fast-avg-setup = <0>; |
| 171 | }; |
| 172 | |
| 173 | chan@9 { |
| 174 | label = "ref_625mv"; |
| 175 | reg = <9>; |
| 176 | qcom,decimation = <0>; |
| 177 | qcom,pre-div-channel-scaling = <0>; |
| 178 | qcom,calibration-type = "absolute"; |
| 179 | qcom,scale-function = <0>; |
| 180 | qcom,hw-settle-time = <0>; |
| 181 | qcom,fast-avg-setup = <0>; |
| 182 | }; |
| 183 | |
| 184 | chan@a { |
| 185 | label = "ref_1250v"; |
| 186 | reg = <0xa>; |
| 187 | qcom,decimation = <0>; |
| 188 | qcom,pre-div-channel-scaling = <0>; |
| 189 | qcom,calibration-type = "absolute"; |
| 190 | qcom,scale-function = <0>; |
| 191 | qcom,hw-settle-time = <0>; |
| 192 | qcom,fast-avg-setup = <0>; |
| 193 | }; |
| 194 | }; |
| 195 | |
| 196 | iadc@3600 { |
| 197 | compatible = "qcom,qpnp-iadc"; |
| 198 | reg = <0x3600 0x100>; |
| 199 | #address-cells = <1>; |
| 200 | #size-cells = <0>; |
| 201 | interrupts = <0x0 0x36 0x0>; |
| 202 | interrupt-names = "eoc-int-en-set"; |
| 203 | qcom,adc-bit-resolution = <16>; |
| 204 | qcom,adc-vdd-reference = <1800>; |
| 205 | qcom,rsense = <1500>; |
| 206 | |
| 207 | chan@0 { |
| 208 | label = "internal_rsense"; |
| 209 | reg = <0>; |
| 210 | qcom,decimation = <0>; |
| 211 | qcom,pre-div-channel-scaling = <1>; |
| 212 | qcom,calibration-type = "absolute"; |
| 213 | qcom,scale-function = <0>; |
| 214 | qcom,hw-settle-time = <0>; |
| 215 | qcom,fast-avg-setup = <0>; |
| 216 | }; |
| 217 | }; |
David Keitel | 4109e95 | 2013-02-07 20:22:13 -0800 | [diff] [blame] | 218 | }; |
| 219 | |
David Keitel | 8498711 | 2013-02-11 13:26:30 -0800 | [diff] [blame] | 220 | qcom,pm8226@1 { |
| 221 | spmi-slave-container; |
| 222 | reg = <0x1>; |
| 223 | #address-cells = <1>; |
| 224 | #size-cells = <1>; |
| 225 | |
| 226 | regulator@1400 { |
| 227 | regulator-name = "8226_s1"; |
| 228 | spmi-dev-container; |
| 229 | #address-cells = <1>; |
| 230 | #size-cells = <1>; |
| 231 | compatible = "qcom,qpnp-regulator"; |
| 232 | reg = <0x1400 0x300>; |
| 233 | status = "disabled"; |
| 234 | |
| 235 | qcom,ctl@1400 { |
| 236 | reg = <0x1400 0x100>; |
| 237 | }; |
| 238 | qcom,ps@1500 { |
| 239 | reg = <0x1500 0x100>; |
| 240 | }; |
| 241 | qcom,freq@1600 { |
| 242 | reg = <0x1600 0x100>; |
| 243 | }; |
| 244 | }; |
| 245 | |
| 246 | regulator@1700 { |
| 247 | regulator-name = "8226_s2"; |
| 248 | spmi-dev-container; |
| 249 | #address-cells = <1>; |
| 250 | #size-cells = <1>; |
| 251 | compatible = "qcom,qpnp-regulator"; |
| 252 | reg = <0x1700 0x300>; |
| 253 | status = "disabled"; |
| 254 | |
| 255 | qcom,ctl@1700 { |
| 256 | reg = <0x1700 0x100>; |
| 257 | }; |
| 258 | qcom,ps@1800 { |
| 259 | reg = <0x1800 0x100>; |
| 260 | }; |
| 261 | qcom,freq@1900 { |
| 262 | reg = <0x1900 0x100>; |
| 263 | }; |
| 264 | }; |
| 265 | |
| 266 | regulator@1a00 { |
| 267 | regulator-name = "8226_s3"; |
| 268 | spmi-dev-container; |
| 269 | #address-cells = <1>; |
| 270 | #size-cells = <1>; |
| 271 | compatible = "qcom,qpnp-regulator"; |
| 272 | reg = <0x1a00 0x300>; |
| 273 | status = "disabled"; |
| 274 | |
| 275 | qcom,ctl@1a00 { |
| 276 | reg = <0x1a00 0x100>; |
| 277 | }; |
| 278 | qcom,ps@1b00 { |
| 279 | reg = <0x1b00 0x100>; |
| 280 | }; |
| 281 | qcom,freq@1c00 { |
| 282 | reg = <0x1c00 0x100>; |
| 283 | }; |
| 284 | }; |
| 285 | |
| 286 | regulator@1d00 { |
| 287 | regulator-name = "8226_s4"; |
| 288 | spmi-dev-container; |
| 289 | #address-cells = <1>; |
| 290 | #size-cells = <1>; |
| 291 | compatible = "qcom,qpnp-regulator"; |
| 292 | reg = <0x1d00 0x300>; |
| 293 | status = "disabled"; |
| 294 | |
| 295 | qcom,ctl@1d00 { |
| 296 | reg = <0x1d00 0x100>; |
| 297 | }; |
| 298 | qcom,ps@1e00 { |
| 299 | reg = <0x1e00 0x100>; |
| 300 | }; |
| 301 | qcom,freq@1f00 { |
| 302 | reg = <0x1f00 0x100>; |
| 303 | }; |
| 304 | }; |
| 305 | |
| 306 | regulator@2000 { |
| 307 | regulator-name = "8226_s5"; |
| 308 | spmi-dev-container; |
| 309 | #address-cells = <1>; |
| 310 | #size-cells = <1>; |
| 311 | compatible = "qcom,qpnp-regulator"; |
| 312 | reg = <0x2000 0x300>; |
| 313 | status = "disabled"; |
| 314 | |
| 315 | qcom,ctl@2000 { |
| 316 | reg = <0x2000 0x100>; |
| 317 | }; |
| 318 | qcom,ps@2100 { |
| 319 | reg = <0x2100 0x100>; |
| 320 | }; |
| 321 | qcom,freq@2200 { |
| 322 | reg = <0x2200 0x100>; |
| 323 | }; |
| 324 | }; |
| 325 | |
| 326 | regulator@4000 { |
| 327 | regulator-name = "8226_l1"; |
| 328 | reg = <0x4000 0x100>; |
| 329 | compatible = "qcom,qpnp-regulator"; |
| 330 | status = "disabled"; |
| 331 | }; |
| 332 | |
| 333 | regulator@4100 { |
| 334 | regulator-name = "8226_l2"; |
| 335 | reg = <0x4100 0x100>; |
| 336 | compatible = "qcom,qpnp-regulator"; |
| 337 | status = "disabled"; |
| 338 | }; |
| 339 | |
| 340 | regulator@4200 { |
| 341 | regulator-name = "8226_l3"; |
| 342 | reg = <0x4200 0x100>; |
| 343 | compatible = "qcom,qpnp-regulator"; |
| 344 | status = "disabled"; |
| 345 | }; |
| 346 | |
| 347 | regulator@4300 { |
| 348 | regulator-name = "8226_l4"; |
| 349 | reg = <0x4300 0x100>; |
| 350 | compatible = "qcom,qpnp-regulator"; |
| 351 | status = "disabled"; |
| 352 | }; |
| 353 | |
| 354 | regulator@4400 { |
| 355 | regulator-name = "8226_l5"; |
| 356 | reg = <0x4400 0x100>; |
| 357 | compatible = "qcom,qpnp-regulator"; |
| 358 | status = "disabled"; |
| 359 | }; |
| 360 | |
| 361 | regulator@4500 { |
| 362 | regulator-name = "8226_l6"; |
| 363 | reg = <0x4500 0x100>; |
| 364 | compatible = "qcom,qpnp-regulator"; |
| 365 | status = "disabled"; |
| 366 | }; |
| 367 | |
| 368 | regulator@4600 { |
| 369 | regulator-name = "8226_l7"; |
| 370 | reg = <0x4600 0x100>; |
| 371 | compatible = "qcom,qpnp-regulator"; |
| 372 | status = "disabled"; |
| 373 | }; |
| 374 | |
| 375 | regulator@4700 { |
| 376 | regulator-name = "8226_l8"; |
| 377 | reg = <0x4700 0x100>; |
| 378 | compatible = "qcom,qpnp-regulator"; |
| 379 | status = "disabled"; |
| 380 | }; |
| 381 | |
| 382 | regulator@4800 { |
| 383 | regulator-name = "8226_l9"; |
| 384 | reg = <0x4800 0x100>; |
| 385 | compatible = "qcom,qpnp-regulator"; |
| 386 | status = "disabled"; |
| 387 | }; |
| 388 | |
| 389 | regulator@4900 { |
| 390 | regulator-name = "8226_l10"; |
| 391 | reg = <0x4900 0x100>; |
| 392 | compatible = "qcom,qpnp-regulator"; |
| 393 | status = "disabled"; |
| 394 | }; |
| 395 | |
| 396 | regulator@4b00 { |
| 397 | regulator-name = "8226_l12"; |
| 398 | reg = <0x4b00 0x100>; |
| 399 | compatible = "qcom,qpnp-regulator"; |
| 400 | status = "disabled"; |
| 401 | }; |
| 402 | |
| 403 | regulator@4d00 { |
| 404 | regulator-name = "8226_l14"; |
| 405 | reg = <0x4d00 0x100>; |
| 406 | compatible = "qcom,qpnp-regulator"; |
| 407 | status = "disabled"; |
| 408 | }; |
| 409 | |
| 410 | regulator@4e00 { |
| 411 | regulator-name = "8226_l15"; |
| 412 | reg = <0x4e00 0x100>; |
| 413 | compatible = "qcom,qpnp-regulator"; |
| 414 | status = "disabled"; |
| 415 | }; |
| 416 | |
| 417 | regulator@4f00 { |
| 418 | regulator-name = "8226_l16"; |
| 419 | reg = <0x4f00 0x100>; |
| 420 | compatible = "qcom,qpnp-regulator"; |
| 421 | status = "disabled"; |
| 422 | }; |
| 423 | |
| 424 | regulator@5000 { |
| 425 | regulator-name = "8226_l17"; |
| 426 | reg = <0x5000 0x100>; |
| 427 | compatible = "qcom,qpnp-regulator"; |
| 428 | status = "disabled"; |
| 429 | }; |
| 430 | |
| 431 | regulator@5100 { |
| 432 | regulator-name = "8226_l18"; |
| 433 | reg = <0x5100 0x100>; |
| 434 | compatible = "qcom,qpnp-regulator"; |
| 435 | status = "disabled"; |
| 436 | }; |
| 437 | |
| 438 | regulator@5200 { |
| 439 | regulator-name = "8226_l19"; |
| 440 | reg = <0x5200 0x100>; |
| 441 | compatible = "qcom,qpnp-regulator"; |
| 442 | status = "disabled"; |
| 443 | }; |
| 444 | |
| 445 | regulator@5300 { |
| 446 | regulator-name = "8226_l20"; |
| 447 | reg = <0x5300 0x100>; |
| 448 | compatible = "qcom,qpnp-regulator"; |
| 449 | status = "disabled"; |
| 450 | }; |
| 451 | |
| 452 | regulator@5400 { |
| 453 | regulator-name = "8226_l21"; |
| 454 | reg = <0x5400 0x100>; |
| 455 | compatible = "qcom,qpnp-regulator"; |
| 456 | status = "disabled"; |
| 457 | }; |
| 458 | |
| 459 | regulator@5500 { |
| 460 | regulator-name = "8226_l22"; |
| 461 | reg = <0x5500 0x100>; |
| 462 | compatible = "qcom,qpnp-regulator"; |
| 463 | status = "disabled"; |
| 464 | }; |
| 465 | |
| 466 | regulator@5600 { |
| 467 | regulator-name = "8226_l23"; |
| 468 | reg = <0x5600 0x100>; |
| 469 | compatible = "qcom,qpnp-regulator"; |
| 470 | status = "disabled"; |
| 471 | }; |
| 472 | |
| 473 | regulator@5700 { |
| 474 | regulator-name = "8226_l24"; |
| 475 | reg = <0x5700 0x100>; |
| 476 | compatible = "qcom,qpnp-regulator"; |
| 477 | status = "disabled"; |
| 478 | }; |
| 479 | |
| 480 | regulator@5900 { |
| 481 | regulator-name = "8226_l26"; |
| 482 | reg = <0x5900 0x100>; |
| 483 | compatible = "qcom,qpnp-regulator"; |
| 484 | status = "disabled"; |
| 485 | }; |
| 486 | |
| 487 | regulator@5a00 { |
| 488 | regulator-name = "8226_l27"; |
| 489 | reg = <0x5a00 0x100>; |
| 490 | compatible = "qcom,qpnp-regulator"; |
| 491 | status = "disabled"; |
| 492 | }; |
| 493 | |
| 494 | regulator@5b00 { |
| 495 | regulator-name = "8226_l28"; |
| 496 | reg = <0x5b00 0x100>; |
| 497 | compatible = "qcom,qpnp-regulator"; |
| 498 | status = "disabled"; |
| 499 | }; |
| 500 | |
| 501 | regulator@8000 { |
| 502 | regulator-name = "8226_lvs1"; |
| 503 | reg = <0x8000 0x100>; |
| 504 | compatible = "qcom,qpnp-regulator"; |
| 505 | status = "disabled"; |
| 506 | }; |
| 507 | }; |
Kenneth Heitke | e580400 | 2012-11-15 17:50:07 -0700 | [diff] [blame] | 508 | }; |