Thomas Gleixner | c2805aa | 2008-01-30 13:30:35 +0100 | [diff] [blame] | 1 | #ifndef _AM_X86_MPSPEC_H |
| 2 | #define _AM_X86_MPSPEC_H |
| 3 | |
Ingo Molnar | 86c9835 | 2008-03-28 11:59:57 +0100 | [diff] [blame] | 4 | #include <linux/init.h> |
| 5 | |
Thomas Gleixner | c2805aa | 2008-01-30 13:30:35 +0100 | [diff] [blame] | 6 | #include <asm/mpspec_def.h> |
| 7 | |
Thomas Gleixner | 96a388d | 2007-10-11 11:20:03 +0200 | [diff] [blame] | 8 | #ifdef CONFIG_X86_32 |
Thomas Gleixner | c2805aa | 2008-01-30 13:30:35 +0100 | [diff] [blame] | 9 | #include <mach_mpspec.h> |
| 10 | |
Thomas Gleixner | c2805aa | 2008-01-30 13:30:35 +0100 | [diff] [blame] | 11 | extern unsigned int def_to_bigsmp; |
| 12 | extern int apic_version[MAX_APICS]; |
Thomas Gleixner | ae9d983 | 2008-01-30 13:30:36 +0100 | [diff] [blame] | 13 | extern u8 apicid_2_node[]; |
Thomas Gleixner | c2805aa | 2008-01-30 13:30:35 +0100 | [diff] [blame] | 14 | extern int pic_mode; |
| 15 | |
Thomas Gleixner | ae9d983 | 2008-01-30 13:30:36 +0100 | [diff] [blame] | 16 | #define MAX_APICID 256 |
| 17 | |
Thomas Gleixner | 96a388d | 2007-10-11 11:20:03 +0200 | [diff] [blame] | 18 | #else |
Thomas Gleixner | c2805aa | 2008-01-30 13:30:35 +0100 | [diff] [blame] | 19 | |
| 20 | #define MAX_MP_BUSSES 256 |
| 21 | /* Each PCI slot may be a combo card with its own bus. 4 IRQ pins per slot. */ |
| 22 | #define MAX_IRQ_SOURCES (MAX_MP_BUSSES * 4) |
| 23 | |
Yinghai Lu | 8643f9d | 2008-02-19 03:21:06 -0800 | [diff] [blame] | 24 | extern void early_find_smp_config(void); |
| 25 | extern void early_get_smp_config(void); |
| 26 | |
Thomas Gleixner | c2805aa | 2008-01-30 13:30:35 +0100 | [diff] [blame] | 27 | #endif |
| 28 | |
Alexey Starikovskiy | c0a282c | 2008-03-20 14:55:02 +0300 | [diff] [blame] | 29 | #if defined(CONFIG_MCA) || defined(CONFIG_EISA) |
| 30 | extern int mp_bus_id_to_type[MAX_MP_BUSSES]; |
| 31 | #endif |
| 32 | |
Alexey Starikovskiy | a6333c3 | 2008-03-20 14:54:09 +0300 | [diff] [blame] | 33 | extern DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES); |
Alexey Starikovskiy | c0a282c | 2008-03-20 14:55:02 +0300 | [diff] [blame] | 34 | |
Thomas Gleixner | c2805aa | 2008-01-30 13:30:35 +0100 | [diff] [blame] | 35 | extern int mp_bus_id_to_pci_bus[MAX_MP_BUSSES]; |
| 36 | |
| 37 | extern unsigned int boot_cpu_physical_apicid; |
| 38 | extern int smp_found_config; |
| 39 | extern int nr_ioapics; |
| 40 | extern int mp_irq_entries; |
| 41 | extern struct mpc_config_intsrc mp_irqs[MAX_IRQ_SOURCES]; |
| 42 | extern int mpc_default_type; |
| 43 | extern unsigned long mp_lapic_addr; |
| 44 | |
| 45 | extern void find_smp_config(void); |
| 46 | extern void get_smp_config(void); |
| 47 | |
Alexey Starikovskiy | 903dcb5 | 2008-03-27 23:55:22 +0300 | [diff] [blame] | 48 | void __cpuinit generic_processor_info(int apicid, int version); |
Thomas Gleixner | c2805aa | 2008-01-30 13:30:35 +0100 | [diff] [blame] | 49 | #ifdef CONFIG_ACPI |
| 50 | extern void mp_register_lapic(u8 id, u8 enabled); |
| 51 | extern void mp_register_lapic_address(u64 address); |
| 52 | extern void mp_register_ioapic(u8 id, u32 address, u32 gsi_base); |
| 53 | extern void mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, |
| 54 | u32 gsi); |
| 55 | extern void mp_config_acpi_legacy_irqs(void); |
| 56 | extern int mp_register_gsi(u32 gsi, int edge_level, int active_high_low); |
| 57 | #endif /* CONFIG_ACPI */ |
| 58 | |
| 59 | #define PHYSID_ARRAY_SIZE BITS_TO_LONGS(MAX_APICS) |
| 60 | |
Joe Perches | 30971e1 | 2008-03-23 01:02:49 -0700 | [diff] [blame] | 61 | struct physid_mask { |
Thomas Gleixner | c2805aa | 2008-01-30 13:30:35 +0100 | [diff] [blame] | 62 | unsigned long mask[PHYSID_ARRAY_SIZE]; |
| 63 | }; |
| 64 | |
| 65 | typedef struct physid_mask physid_mask_t; |
| 66 | |
| 67 | #define physid_set(physid, map) set_bit(physid, (map).mask) |
| 68 | #define physid_clear(physid, map) clear_bit(physid, (map).mask) |
| 69 | #define physid_isset(physid, map) test_bit(physid, (map).mask) |
Joe Perches | 30971e1 | 2008-03-23 01:02:49 -0700 | [diff] [blame] | 70 | #define physid_test_and_set(physid, map) \ |
Thomas Gleixner | c2805aa | 2008-01-30 13:30:35 +0100 | [diff] [blame] | 71 | test_and_set_bit(physid, (map).mask) |
| 72 | |
Joe Perches | 30971e1 | 2008-03-23 01:02:49 -0700 | [diff] [blame] | 73 | #define physids_and(dst, src1, src2) \ |
Thomas Gleixner | c2805aa | 2008-01-30 13:30:35 +0100 | [diff] [blame] | 74 | bitmap_and((dst).mask, (src1).mask, (src2).mask, MAX_APICS) |
| 75 | |
Joe Perches | 30971e1 | 2008-03-23 01:02:49 -0700 | [diff] [blame] | 76 | #define physids_or(dst, src1, src2) \ |
Thomas Gleixner | c2805aa | 2008-01-30 13:30:35 +0100 | [diff] [blame] | 77 | bitmap_or((dst).mask, (src1).mask, (src2).mask, MAX_APICS) |
| 78 | |
Joe Perches | 30971e1 | 2008-03-23 01:02:49 -0700 | [diff] [blame] | 79 | #define physids_clear(map) \ |
Thomas Gleixner | c2805aa | 2008-01-30 13:30:35 +0100 | [diff] [blame] | 80 | bitmap_zero((map).mask, MAX_APICS) |
| 81 | |
Joe Perches | 30971e1 | 2008-03-23 01:02:49 -0700 | [diff] [blame] | 82 | #define physids_complement(dst, src) \ |
Thomas Gleixner | c2805aa | 2008-01-30 13:30:35 +0100 | [diff] [blame] | 83 | bitmap_complement((dst).mask, (src).mask, MAX_APICS) |
| 84 | |
Joe Perches | 30971e1 | 2008-03-23 01:02:49 -0700 | [diff] [blame] | 85 | #define physids_empty(map) \ |
Thomas Gleixner | c2805aa | 2008-01-30 13:30:35 +0100 | [diff] [blame] | 86 | bitmap_empty((map).mask, MAX_APICS) |
| 87 | |
Joe Perches | 30971e1 | 2008-03-23 01:02:49 -0700 | [diff] [blame] | 88 | #define physids_equal(map1, map2) \ |
Thomas Gleixner | c2805aa | 2008-01-30 13:30:35 +0100 | [diff] [blame] | 89 | bitmap_equal((map1).mask, (map2).mask, MAX_APICS) |
| 90 | |
Joe Perches | 30971e1 | 2008-03-23 01:02:49 -0700 | [diff] [blame] | 91 | #define physids_weight(map) \ |
Thomas Gleixner | c2805aa | 2008-01-30 13:30:35 +0100 | [diff] [blame] | 92 | bitmap_weight((map).mask, MAX_APICS) |
| 93 | |
Joe Perches | 30971e1 | 2008-03-23 01:02:49 -0700 | [diff] [blame] | 94 | #define physids_shift_right(d, s, n) \ |
Thomas Gleixner | c2805aa | 2008-01-30 13:30:35 +0100 | [diff] [blame] | 95 | bitmap_shift_right((d).mask, (s).mask, n, MAX_APICS) |
| 96 | |
Joe Perches | 30971e1 | 2008-03-23 01:02:49 -0700 | [diff] [blame] | 97 | #define physids_shift_left(d, s, n) \ |
Thomas Gleixner | c2805aa | 2008-01-30 13:30:35 +0100 | [diff] [blame] | 98 | bitmap_shift_left((d).mask, (s).mask, n, MAX_APICS) |
| 99 | |
| 100 | #define physids_coerce(map) ((map).mask[0]) |
| 101 | |
| 102 | #define physids_promote(physids) \ |
| 103 | ({ \ |
| 104 | physid_mask_t __physid_mask = PHYSID_MASK_NONE; \ |
| 105 | __physid_mask.mask[0] = physids; \ |
| 106 | __physid_mask; \ |
| 107 | }) |
| 108 | |
| 109 | #define physid_mask_of_physid(physid) \ |
| 110 | ({ \ |
| 111 | physid_mask_t __physid_mask = PHYSID_MASK_NONE; \ |
| 112 | physid_set(physid, __physid_mask); \ |
| 113 | __physid_mask; \ |
| 114 | }) |
| 115 | |
| 116 | #define PHYSID_MASK_ALL { {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} } |
| 117 | #define PHYSID_MASK_NONE { {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} } |
| 118 | |
| 119 | extern physid_mask_t phys_cpu_present_map; |
| 120 | |
Thomas Gleixner | 96a388d | 2007-10-11 11:20:03 +0200 | [diff] [blame] | 121 | #endif |