Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 1 | /* |
Michael Hennerich | fb7f6cc | 2011-05-18 14:42:05 +0100 | [diff] [blame] | 2 | * ADE7758 Poly Phase Multifunction Energy Metering IC driver |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 3 | * |
Michael Hennerich | fb7f6cc | 2011-05-18 14:42:05 +0100 | [diff] [blame] | 4 | * Copyright 2010-2011 Analog Devices Inc. |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 5 | * |
Michael Hennerich | fb7f6cc | 2011-05-18 14:42:05 +0100 | [diff] [blame] | 6 | * Licensed under the GPL-2. |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #include <linux/interrupt.h> |
| 10 | #include <linux/irq.h> |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 11 | #include <linux/delay.h> |
| 12 | #include <linux/mutex.h> |
| 13 | #include <linux/device.h> |
| 14 | #include <linux/kernel.h> |
| 15 | #include <linux/spi/spi.h> |
| 16 | #include <linux/slab.h> |
| 17 | #include <linux/sysfs.h> |
| 18 | #include <linux/list.h> |
Paul Gortmaker | 99c9785 | 2011-07-03 15:49:50 -0400 | [diff] [blame] | 19 | #include <linux/module.h> |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 20 | |
| 21 | #include "../iio.h" |
| 22 | #include "../sysfs.h" |
Jonathan Cameron | af5046a | 2011-10-26 17:41:32 +0100 | [diff] [blame^] | 23 | #include "../buffer.h" |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 24 | #include "meter.h" |
| 25 | #include "ade7758.h" |
| 26 | |
Michael Hennerich | 8a27a02 | 2011-05-18 14:42:07 +0100 | [diff] [blame] | 27 | int ade7758_spi_write_reg_8(struct device *dev, |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 28 | u8 reg_address, |
| 29 | u8 val) |
| 30 | { |
| 31 | int ret; |
| 32 | struct iio_dev *indio_dev = dev_get_drvdata(dev); |
Michael Hennerich | a3f0237 | 2011-05-18 14:42:36 +0100 | [diff] [blame] | 33 | struct ade7758_state *st = iio_priv(indio_dev); |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 34 | |
| 35 | mutex_lock(&st->buf_lock); |
| 36 | st->tx[0] = ADE7758_WRITE_REG(reg_address); |
| 37 | st->tx[1] = val; |
| 38 | |
| 39 | ret = spi_write(st->us, st->tx, 2); |
| 40 | mutex_unlock(&st->buf_lock); |
| 41 | |
| 42 | return ret; |
| 43 | } |
| 44 | |
| 45 | static int ade7758_spi_write_reg_16(struct device *dev, |
| 46 | u8 reg_address, |
| 47 | u16 value) |
| 48 | { |
| 49 | int ret; |
| 50 | struct spi_message msg; |
| 51 | struct iio_dev *indio_dev = dev_get_drvdata(dev); |
Michael Hennerich | a3f0237 | 2011-05-18 14:42:36 +0100 | [diff] [blame] | 52 | struct ade7758_state *st = iio_priv(indio_dev); |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 53 | struct spi_transfer xfers[] = { |
| 54 | { |
| 55 | .tx_buf = st->tx, |
| 56 | .bits_per_word = 8, |
| 57 | .len = 3, |
| 58 | } |
| 59 | }; |
| 60 | |
| 61 | mutex_lock(&st->buf_lock); |
| 62 | st->tx[0] = ADE7758_WRITE_REG(reg_address); |
| 63 | st->tx[1] = (value >> 8) & 0xFF; |
| 64 | st->tx[2] = value & 0xFF; |
| 65 | |
| 66 | spi_message_init(&msg); |
| 67 | spi_message_add_tail(xfers, &msg); |
| 68 | ret = spi_sync(st->us, &msg); |
| 69 | mutex_unlock(&st->buf_lock); |
| 70 | |
| 71 | return ret; |
| 72 | } |
| 73 | |
| 74 | static int ade7758_spi_write_reg_24(struct device *dev, |
| 75 | u8 reg_address, |
| 76 | u32 value) |
| 77 | { |
| 78 | int ret; |
| 79 | struct spi_message msg; |
| 80 | struct iio_dev *indio_dev = dev_get_drvdata(dev); |
Michael Hennerich | a3f0237 | 2011-05-18 14:42:36 +0100 | [diff] [blame] | 81 | struct ade7758_state *st = iio_priv(indio_dev); |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 82 | struct spi_transfer xfers[] = { |
| 83 | { |
| 84 | .tx_buf = st->tx, |
| 85 | .bits_per_word = 8, |
| 86 | .len = 4, |
| 87 | } |
| 88 | }; |
| 89 | |
| 90 | mutex_lock(&st->buf_lock); |
| 91 | st->tx[0] = ADE7758_WRITE_REG(reg_address); |
| 92 | st->tx[1] = (value >> 16) & 0xFF; |
| 93 | st->tx[2] = (value >> 8) & 0xFF; |
| 94 | st->tx[3] = value & 0xFF; |
| 95 | |
| 96 | spi_message_init(&msg); |
| 97 | spi_message_add_tail(xfers, &msg); |
| 98 | ret = spi_sync(st->us, &msg); |
| 99 | mutex_unlock(&st->buf_lock); |
| 100 | |
| 101 | return ret; |
| 102 | } |
| 103 | |
Michael Hennerich | f535e08 | 2011-05-18 14:42:04 +0100 | [diff] [blame] | 104 | int ade7758_spi_read_reg_8(struct device *dev, |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 105 | u8 reg_address, |
| 106 | u8 *val) |
| 107 | { |
| 108 | struct spi_message msg; |
| 109 | struct iio_dev *indio_dev = dev_get_drvdata(dev); |
Michael Hennerich | a3f0237 | 2011-05-18 14:42:36 +0100 | [diff] [blame] | 110 | struct ade7758_state *st = iio_priv(indio_dev); |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 111 | int ret; |
| 112 | struct spi_transfer xfers[] = { |
| 113 | { |
| 114 | .tx_buf = st->tx, |
Michael Hennerich | f535e08 | 2011-05-18 14:42:04 +0100 | [diff] [blame] | 115 | .bits_per_word = 8, |
| 116 | .len = 1, |
| 117 | .delay_usecs = 4, |
| 118 | }, |
| 119 | { |
| 120 | .tx_buf = &st->tx[1], |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 121 | .rx_buf = st->rx, |
| 122 | .bits_per_word = 8, |
Michael Hennerich | f535e08 | 2011-05-18 14:42:04 +0100 | [diff] [blame] | 123 | .len = 1, |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 124 | }, |
| 125 | }; |
| 126 | |
| 127 | mutex_lock(&st->buf_lock); |
| 128 | st->tx[0] = ADE7758_READ_REG(reg_address); |
| 129 | st->tx[1] = 0; |
| 130 | |
| 131 | spi_message_init(&msg); |
Michael Hennerich | f535e08 | 2011-05-18 14:42:04 +0100 | [diff] [blame] | 132 | spi_message_add_tail(&xfers[0], &msg); |
| 133 | spi_message_add_tail(&xfers[1], &msg); |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 134 | ret = spi_sync(st->us, &msg); |
| 135 | if (ret) { |
| 136 | dev_err(&st->us->dev, "problem when reading 8 bit register 0x%02X", |
| 137 | reg_address); |
| 138 | goto error_ret; |
| 139 | } |
Michael Hennerich | f535e08 | 2011-05-18 14:42:04 +0100 | [diff] [blame] | 140 | *val = st->rx[0]; |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 141 | |
| 142 | error_ret: |
| 143 | mutex_unlock(&st->buf_lock); |
| 144 | return ret; |
| 145 | } |
| 146 | |
| 147 | static int ade7758_spi_read_reg_16(struct device *dev, |
| 148 | u8 reg_address, |
| 149 | u16 *val) |
| 150 | { |
| 151 | struct spi_message msg; |
| 152 | struct iio_dev *indio_dev = dev_get_drvdata(dev); |
Michael Hennerich | a3f0237 | 2011-05-18 14:42:36 +0100 | [diff] [blame] | 153 | struct ade7758_state *st = iio_priv(indio_dev); |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 154 | int ret; |
| 155 | struct spi_transfer xfers[] = { |
| 156 | { |
| 157 | .tx_buf = st->tx, |
Michael Hennerich | f535e08 | 2011-05-18 14:42:04 +0100 | [diff] [blame] | 158 | .bits_per_word = 8, |
| 159 | .len = 1, |
| 160 | .delay_usecs = 4, |
| 161 | }, |
| 162 | { |
| 163 | .tx_buf = &st->tx[1], |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 164 | .rx_buf = st->rx, |
| 165 | .bits_per_word = 8, |
Michael Hennerich | f535e08 | 2011-05-18 14:42:04 +0100 | [diff] [blame] | 166 | .len = 2, |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 167 | }, |
| 168 | }; |
| 169 | |
Michael Hennerich | f535e08 | 2011-05-18 14:42:04 +0100 | [diff] [blame] | 170 | |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 171 | mutex_lock(&st->buf_lock); |
| 172 | st->tx[0] = ADE7758_READ_REG(reg_address); |
| 173 | st->tx[1] = 0; |
| 174 | st->tx[2] = 0; |
| 175 | |
| 176 | spi_message_init(&msg); |
Michael Hennerich | f535e08 | 2011-05-18 14:42:04 +0100 | [diff] [blame] | 177 | spi_message_add_tail(&xfers[0], &msg); |
| 178 | spi_message_add_tail(&xfers[1], &msg); |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 179 | ret = spi_sync(st->us, &msg); |
| 180 | if (ret) { |
| 181 | dev_err(&st->us->dev, "problem when reading 16 bit register 0x%02X", |
| 182 | reg_address); |
| 183 | goto error_ret; |
| 184 | } |
Michael Hennerich | f535e08 | 2011-05-18 14:42:04 +0100 | [diff] [blame] | 185 | |
| 186 | *val = (st->rx[0] << 8) | st->rx[1]; |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 187 | |
| 188 | error_ret: |
| 189 | mutex_unlock(&st->buf_lock); |
| 190 | return ret; |
| 191 | } |
| 192 | |
| 193 | static int ade7758_spi_read_reg_24(struct device *dev, |
| 194 | u8 reg_address, |
| 195 | u32 *val) |
| 196 | { |
| 197 | struct spi_message msg; |
| 198 | struct iio_dev *indio_dev = dev_get_drvdata(dev); |
Michael Hennerich | a3f0237 | 2011-05-18 14:42:36 +0100 | [diff] [blame] | 199 | struct ade7758_state *st = iio_priv(indio_dev); |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 200 | int ret; |
| 201 | struct spi_transfer xfers[] = { |
| 202 | { |
| 203 | .tx_buf = st->tx, |
Michael Hennerich | f535e08 | 2011-05-18 14:42:04 +0100 | [diff] [blame] | 204 | .bits_per_word = 8, |
| 205 | .len = 1, |
| 206 | .delay_usecs = 4, |
| 207 | }, |
| 208 | { |
| 209 | .tx_buf = &st->tx[1], |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 210 | .rx_buf = st->rx, |
| 211 | .bits_per_word = 8, |
Michael Hennerich | f535e08 | 2011-05-18 14:42:04 +0100 | [diff] [blame] | 212 | .len = 3, |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 213 | }, |
| 214 | }; |
| 215 | |
| 216 | mutex_lock(&st->buf_lock); |
| 217 | st->tx[0] = ADE7758_READ_REG(reg_address); |
| 218 | st->tx[1] = 0; |
| 219 | st->tx[2] = 0; |
| 220 | st->tx[3] = 0; |
| 221 | |
| 222 | spi_message_init(&msg); |
Michael Hennerich | f535e08 | 2011-05-18 14:42:04 +0100 | [diff] [blame] | 223 | spi_message_add_tail(&xfers[0], &msg); |
| 224 | spi_message_add_tail(&xfers[1], &msg); |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 225 | ret = spi_sync(st->us, &msg); |
| 226 | if (ret) { |
| 227 | dev_err(&st->us->dev, "problem when reading 24 bit register 0x%02X", |
| 228 | reg_address); |
| 229 | goto error_ret; |
| 230 | } |
Michael Hennerich | f535e08 | 2011-05-18 14:42:04 +0100 | [diff] [blame] | 231 | *val = (st->rx[0] << 16) | (st->rx[1] << 8) | st->rx[2]; |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 232 | |
| 233 | error_ret: |
| 234 | mutex_unlock(&st->buf_lock); |
| 235 | return ret; |
| 236 | } |
| 237 | |
| 238 | static ssize_t ade7758_read_8bit(struct device *dev, |
| 239 | struct device_attribute *attr, |
| 240 | char *buf) |
| 241 | { |
| 242 | int ret; |
| 243 | u8 val = 0; |
| 244 | struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); |
| 245 | |
| 246 | ret = ade7758_spi_read_reg_8(dev, this_attr->address, &val); |
| 247 | if (ret) |
| 248 | return ret; |
| 249 | |
| 250 | return sprintf(buf, "%u\n", val); |
| 251 | } |
| 252 | |
| 253 | static ssize_t ade7758_read_16bit(struct device *dev, |
| 254 | struct device_attribute *attr, |
| 255 | char *buf) |
| 256 | { |
| 257 | int ret; |
| 258 | u16 val = 0; |
| 259 | struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); |
| 260 | |
| 261 | ret = ade7758_spi_read_reg_16(dev, this_attr->address, &val); |
| 262 | if (ret) |
| 263 | return ret; |
| 264 | |
| 265 | return sprintf(buf, "%u\n", val); |
| 266 | } |
| 267 | |
| 268 | static ssize_t ade7758_read_24bit(struct device *dev, |
| 269 | struct device_attribute *attr, |
| 270 | char *buf) |
| 271 | { |
| 272 | int ret; |
| 273 | u32 val = 0; |
| 274 | struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); |
| 275 | |
| 276 | ret = ade7758_spi_read_reg_24(dev, this_attr->address, &val); |
| 277 | if (ret) |
| 278 | return ret; |
| 279 | |
| 280 | return sprintf(buf, "%u\n", val & 0xFFFFFF); |
| 281 | } |
| 282 | |
| 283 | static ssize_t ade7758_write_8bit(struct device *dev, |
| 284 | struct device_attribute *attr, |
| 285 | const char *buf, |
| 286 | size_t len) |
| 287 | { |
| 288 | struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); |
| 289 | int ret; |
| 290 | long val; |
| 291 | |
| 292 | ret = strict_strtol(buf, 10, &val); |
| 293 | if (ret) |
| 294 | goto error_ret; |
| 295 | ret = ade7758_spi_write_reg_8(dev, this_attr->address, val); |
| 296 | |
| 297 | error_ret: |
| 298 | return ret ? ret : len; |
| 299 | } |
| 300 | |
| 301 | static ssize_t ade7758_write_16bit(struct device *dev, |
| 302 | struct device_attribute *attr, |
| 303 | const char *buf, |
| 304 | size_t len) |
| 305 | { |
| 306 | struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); |
| 307 | int ret; |
| 308 | long val; |
| 309 | |
| 310 | ret = strict_strtol(buf, 10, &val); |
| 311 | if (ret) |
| 312 | goto error_ret; |
| 313 | ret = ade7758_spi_write_reg_16(dev, this_attr->address, val); |
| 314 | |
| 315 | error_ret: |
| 316 | return ret ? ret : len; |
| 317 | } |
| 318 | |
Jonathan Cameron | 4be6f5d | 2011-04-18 12:59:06 +0100 | [diff] [blame] | 319 | static int ade7758_reset(struct device *dev) |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 320 | { |
| 321 | int ret; |
| 322 | u8 val; |
| 323 | ade7758_spi_read_reg_8(dev, |
| 324 | ADE7758_OPMODE, |
| 325 | &val); |
| 326 | val |= 1 << 6; /* Software Chip Reset */ |
| 327 | ret = ade7758_spi_write_reg_8(dev, |
| 328 | ADE7758_OPMODE, |
| 329 | val); |
| 330 | |
| 331 | return ret; |
| 332 | } |
| 333 | |
| 334 | static ssize_t ade7758_write_reset(struct device *dev, |
| 335 | struct device_attribute *attr, |
| 336 | const char *buf, size_t len) |
| 337 | { |
| 338 | if (len < 1) |
| 339 | return -1; |
| 340 | switch (buf[0]) { |
| 341 | case '1': |
| 342 | case 'y': |
| 343 | case 'Y': |
| 344 | return ade7758_reset(dev); |
| 345 | } |
Michael Hennerich | fb7f6cc | 2011-05-18 14:42:05 +0100 | [diff] [blame] | 346 | return len; |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 347 | } |
| 348 | |
| 349 | static IIO_DEV_ATTR_VPEAK(S_IWUSR | S_IRUGO, |
| 350 | ade7758_read_8bit, |
| 351 | ade7758_write_8bit, |
| 352 | ADE7758_VPEAK); |
| 353 | static IIO_DEV_ATTR_IPEAK(S_IWUSR | S_IRUGO, |
| 354 | ade7758_read_8bit, |
| 355 | ade7758_write_8bit, |
| 356 | ADE7758_VPEAK); |
| 357 | static IIO_DEV_ATTR_APHCAL(S_IWUSR | S_IRUGO, |
| 358 | ade7758_read_8bit, |
| 359 | ade7758_write_8bit, |
| 360 | ADE7758_APHCAL); |
| 361 | static IIO_DEV_ATTR_BPHCAL(S_IWUSR | S_IRUGO, |
| 362 | ade7758_read_8bit, |
| 363 | ade7758_write_8bit, |
| 364 | ADE7758_BPHCAL); |
| 365 | static IIO_DEV_ATTR_CPHCAL(S_IWUSR | S_IRUGO, |
| 366 | ade7758_read_8bit, |
| 367 | ade7758_write_8bit, |
| 368 | ADE7758_CPHCAL); |
| 369 | static IIO_DEV_ATTR_WDIV(S_IWUSR | S_IRUGO, |
| 370 | ade7758_read_8bit, |
| 371 | ade7758_write_8bit, |
| 372 | ADE7758_WDIV); |
| 373 | static IIO_DEV_ATTR_VADIV(S_IWUSR | S_IRUGO, |
| 374 | ade7758_read_8bit, |
| 375 | ade7758_write_8bit, |
| 376 | ADE7758_VADIV); |
| 377 | static IIO_DEV_ATTR_AIRMS(S_IRUGO, |
| 378 | ade7758_read_24bit, |
| 379 | NULL, |
| 380 | ADE7758_AIRMS); |
| 381 | static IIO_DEV_ATTR_BIRMS(S_IRUGO, |
| 382 | ade7758_read_24bit, |
| 383 | NULL, |
| 384 | ADE7758_BIRMS); |
| 385 | static IIO_DEV_ATTR_CIRMS(S_IRUGO, |
| 386 | ade7758_read_24bit, |
| 387 | NULL, |
| 388 | ADE7758_CIRMS); |
| 389 | static IIO_DEV_ATTR_AVRMS(S_IRUGO, |
| 390 | ade7758_read_24bit, |
| 391 | NULL, |
| 392 | ADE7758_AVRMS); |
| 393 | static IIO_DEV_ATTR_BVRMS(S_IRUGO, |
| 394 | ade7758_read_24bit, |
| 395 | NULL, |
| 396 | ADE7758_BVRMS); |
| 397 | static IIO_DEV_ATTR_CVRMS(S_IRUGO, |
| 398 | ade7758_read_24bit, |
| 399 | NULL, |
| 400 | ADE7758_CVRMS); |
| 401 | static IIO_DEV_ATTR_AIRMSOS(S_IWUSR | S_IRUGO, |
| 402 | ade7758_read_16bit, |
| 403 | ade7758_write_16bit, |
| 404 | ADE7758_AIRMSOS); |
| 405 | static IIO_DEV_ATTR_BIRMSOS(S_IWUSR | S_IRUGO, |
| 406 | ade7758_read_16bit, |
| 407 | ade7758_write_16bit, |
| 408 | ADE7758_BIRMSOS); |
| 409 | static IIO_DEV_ATTR_CIRMSOS(S_IWUSR | S_IRUGO, |
| 410 | ade7758_read_16bit, |
| 411 | ade7758_write_16bit, |
| 412 | ADE7758_CIRMSOS); |
| 413 | static IIO_DEV_ATTR_AVRMSOS(S_IWUSR | S_IRUGO, |
| 414 | ade7758_read_16bit, |
| 415 | ade7758_write_16bit, |
| 416 | ADE7758_AVRMSOS); |
| 417 | static IIO_DEV_ATTR_BVRMSOS(S_IWUSR | S_IRUGO, |
| 418 | ade7758_read_16bit, |
| 419 | ade7758_write_16bit, |
| 420 | ADE7758_BVRMSOS); |
| 421 | static IIO_DEV_ATTR_CVRMSOS(S_IWUSR | S_IRUGO, |
| 422 | ade7758_read_16bit, |
| 423 | ade7758_write_16bit, |
| 424 | ADE7758_CVRMSOS); |
| 425 | static IIO_DEV_ATTR_AIGAIN(S_IWUSR | S_IRUGO, |
| 426 | ade7758_read_16bit, |
| 427 | ade7758_write_16bit, |
| 428 | ADE7758_AIGAIN); |
| 429 | static IIO_DEV_ATTR_BIGAIN(S_IWUSR | S_IRUGO, |
| 430 | ade7758_read_16bit, |
| 431 | ade7758_write_16bit, |
| 432 | ADE7758_BIGAIN); |
| 433 | static IIO_DEV_ATTR_CIGAIN(S_IWUSR | S_IRUGO, |
| 434 | ade7758_read_16bit, |
| 435 | ade7758_write_16bit, |
| 436 | ADE7758_CIGAIN); |
| 437 | static IIO_DEV_ATTR_AVRMSGAIN(S_IWUSR | S_IRUGO, |
| 438 | ade7758_read_16bit, |
| 439 | ade7758_write_16bit, |
| 440 | ADE7758_AVRMSGAIN); |
| 441 | static IIO_DEV_ATTR_BVRMSGAIN(S_IWUSR | S_IRUGO, |
| 442 | ade7758_read_16bit, |
| 443 | ade7758_write_16bit, |
| 444 | ADE7758_BVRMSGAIN); |
| 445 | static IIO_DEV_ATTR_CVRMSGAIN(S_IWUSR | S_IRUGO, |
| 446 | ade7758_read_16bit, |
| 447 | ade7758_write_16bit, |
| 448 | ADE7758_CVRMSGAIN); |
| 449 | |
| 450 | int ade7758_set_irq(struct device *dev, bool enable) |
| 451 | { |
| 452 | int ret; |
| 453 | u32 irqen; |
| 454 | ret = ade7758_spi_read_reg_24(dev, ADE7758_MASK, &irqen); |
| 455 | if (ret) |
| 456 | goto error_ret; |
| 457 | |
| 458 | if (enable) |
| 459 | irqen |= 1 << 16; /* Enables an interrupt when a data is |
| 460 | present in the waveform register */ |
| 461 | else |
| 462 | irqen &= ~(1 << 16); |
| 463 | |
| 464 | ret = ade7758_spi_write_reg_24(dev, ADE7758_MASK, irqen); |
| 465 | if (ret) |
| 466 | goto error_ret; |
| 467 | |
| 468 | error_ret: |
| 469 | return ret; |
| 470 | } |
| 471 | |
| 472 | /* Power down the device */ |
| 473 | static int ade7758_stop_device(struct device *dev) |
| 474 | { |
| 475 | int ret; |
| 476 | u8 val; |
| 477 | ade7758_spi_read_reg_8(dev, |
| 478 | ADE7758_OPMODE, |
| 479 | &val); |
| 480 | val |= 7 << 3; /* ADE7758 powered down */ |
| 481 | ret = ade7758_spi_write_reg_8(dev, |
| 482 | ADE7758_OPMODE, |
| 483 | val); |
| 484 | |
| 485 | return ret; |
| 486 | } |
| 487 | |
Michael Hennerich | a3f0237 | 2011-05-18 14:42:36 +0100 | [diff] [blame] | 488 | static int ade7758_initial_setup(struct iio_dev *indio_dev) |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 489 | { |
Michael Hennerich | a3f0237 | 2011-05-18 14:42:36 +0100 | [diff] [blame] | 490 | struct ade7758_state *st = iio_priv(indio_dev); |
| 491 | struct device *dev = &indio_dev->dev; |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 492 | int ret; |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 493 | |
| 494 | /* use low spi speed for init */ |
Michael Hennerich | 8a27a02 | 2011-05-18 14:42:07 +0100 | [diff] [blame] | 495 | st->us->mode = SPI_MODE_1; |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 496 | spi_setup(st->us); |
| 497 | |
| 498 | /* Disable IRQ */ |
| 499 | ret = ade7758_set_irq(dev, false); |
| 500 | if (ret) { |
| 501 | dev_err(dev, "disable irq failed"); |
| 502 | goto err_ret; |
| 503 | } |
| 504 | |
| 505 | ade7758_reset(dev); |
| 506 | msleep(ADE7758_STARTUP_DELAY); |
| 507 | |
| 508 | err_ret: |
| 509 | return ret; |
| 510 | } |
| 511 | |
| 512 | static ssize_t ade7758_read_frequency(struct device *dev, |
| 513 | struct device_attribute *attr, |
| 514 | char *buf) |
| 515 | { |
| 516 | int ret, len = 0; |
| 517 | u8 t; |
| 518 | int sps; |
| 519 | ret = ade7758_spi_read_reg_8(dev, |
| 520 | ADE7758_WAVMODE, |
| 521 | &t); |
| 522 | if (ret) |
| 523 | return ret; |
| 524 | |
| 525 | t = (t >> 5) & 0x3; |
| 526 | sps = 26040 / (1 << t); |
| 527 | |
| 528 | len = sprintf(buf, "%d SPS\n", sps); |
| 529 | return len; |
| 530 | } |
| 531 | |
| 532 | static ssize_t ade7758_write_frequency(struct device *dev, |
| 533 | struct device_attribute *attr, |
| 534 | const char *buf, |
| 535 | size_t len) |
| 536 | { |
| 537 | struct iio_dev *indio_dev = dev_get_drvdata(dev); |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 538 | unsigned long val; |
| 539 | int ret; |
| 540 | u8 reg, t; |
| 541 | |
| 542 | ret = strict_strtol(buf, 10, &val); |
| 543 | if (ret) |
| 544 | return ret; |
| 545 | |
| 546 | mutex_lock(&indio_dev->mlock); |
| 547 | |
Michael Hennerich | 9308bc9 | 2011-05-18 14:42:06 +0100 | [diff] [blame] | 548 | switch (val) { |
| 549 | case 26040: |
| 550 | t = 0; |
| 551 | break; |
| 552 | case 13020: |
| 553 | t = 1; |
| 554 | break; |
| 555 | case 6510: |
| 556 | t = 2; |
| 557 | break; |
| 558 | case 3255: |
| 559 | t = 3; |
| 560 | break; |
| 561 | default: |
| 562 | ret = -EINVAL; |
| 563 | goto out; |
| 564 | } |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 565 | |
| 566 | ret = ade7758_spi_read_reg_8(dev, |
| 567 | ADE7758_WAVMODE, |
| 568 | ®); |
| 569 | if (ret) |
| 570 | goto out; |
| 571 | |
| 572 | reg &= ~(5 << 3); |
| 573 | reg |= t << 5; |
| 574 | |
| 575 | ret = ade7758_spi_write_reg_8(dev, |
| 576 | ADE7758_WAVMODE, |
| 577 | reg); |
| 578 | |
| 579 | out: |
| 580 | mutex_unlock(&indio_dev->mlock); |
| 581 | |
| 582 | return ret ? ret : len; |
| 583 | } |
| 584 | |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 585 | static IIO_DEV_ATTR_TEMP_RAW(ade7758_read_8bit); |
Jonathan Cameron | 322c956 | 2011-09-14 13:01:23 +0100 | [diff] [blame] | 586 | static IIO_CONST_ATTR(in_temp_offset, "129 C"); |
| 587 | static IIO_CONST_ATTR(in_temp_scale, "4 C"); |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 588 | |
| 589 | static IIO_DEV_ATTR_AWATTHR(ade7758_read_16bit, |
| 590 | ADE7758_AWATTHR); |
| 591 | static IIO_DEV_ATTR_BWATTHR(ade7758_read_16bit, |
| 592 | ADE7758_BWATTHR); |
| 593 | static IIO_DEV_ATTR_CWATTHR(ade7758_read_16bit, |
| 594 | ADE7758_CWATTHR); |
| 595 | static IIO_DEV_ATTR_AVARHR(ade7758_read_16bit, |
| 596 | ADE7758_AVARHR); |
| 597 | static IIO_DEV_ATTR_BVARHR(ade7758_read_16bit, |
| 598 | ADE7758_BVARHR); |
| 599 | static IIO_DEV_ATTR_CVARHR(ade7758_read_16bit, |
| 600 | ADE7758_CVARHR); |
| 601 | static IIO_DEV_ATTR_AVAHR(ade7758_read_16bit, |
| 602 | ADE7758_AVAHR); |
| 603 | static IIO_DEV_ATTR_BVAHR(ade7758_read_16bit, |
| 604 | ADE7758_BVAHR); |
| 605 | static IIO_DEV_ATTR_CVAHR(ade7758_read_16bit, |
| 606 | ADE7758_CVAHR); |
| 607 | |
| 608 | static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO, |
| 609 | ade7758_read_frequency, |
| 610 | ade7758_write_frequency); |
| 611 | |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 612 | static IIO_DEV_ATTR_RESET(ade7758_write_reset); |
| 613 | |
Michael Hennerich | 9308bc9 | 2011-05-18 14:42:06 +0100 | [diff] [blame] | 614 | static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("26040 13020 6510 3255"); |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 615 | |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 616 | static struct attribute *ade7758_attributes[] = { |
Jonathan Cameron | 322c956 | 2011-09-14 13:01:23 +0100 | [diff] [blame] | 617 | &iio_dev_attr_in_temp_raw.dev_attr.attr, |
| 618 | &iio_const_attr_in_temp_offset.dev_attr.attr, |
| 619 | &iio_const_attr_in_temp_scale.dev_attr.attr, |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 620 | &iio_dev_attr_sampling_frequency.dev_attr.attr, |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 621 | &iio_const_attr_sampling_frequency_available.dev_attr.attr, |
| 622 | &iio_dev_attr_reset.dev_attr.attr, |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 623 | &iio_dev_attr_awatthr.dev_attr.attr, |
| 624 | &iio_dev_attr_bwatthr.dev_attr.attr, |
| 625 | &iio_dev_attr_cwatthr.dev_attr.attr, |
| 626 | &iio_dev_attr_avarhr.dev_attr.attr, |
| 627 | &iio_dev_attr_bvarhr.dev_attr.attr, |
| 628 | &iio_dev_attr_cvarhr.dev_attr.attr, |
| 629 | &iio_dev_attr_avahr.dev_attr.attr, |
| 630 | &iio_dev_attr_bvahr.dev_attr.attr, |
| 631 | &iio_dev_attr_cvahr.dev_attr.attr, |
| 632 | &iio_dev_attr_vpeak.dev_attr.attr, |
| 633 | &iio_dev_attr_ipeak.dev_attr.attr, |
| 634 | &iio_dev_attr_aphcal.dev_attr.attr, |
| 635 | &iio_dev_attr_bphcal.dev_attr.attr, |
| 636 | &iio_dev_attr_cphcal.dev_attr.attr, |
| 637 | &iio_dev_attr_wdiv.dev_attr.attr, |
| 638 | &iio_dev_attr_vadiv.dev_attr.attr, |
| 639 | &iio_dev_attr_airms.dev_attr.attr, |
| 640 | &iio_dev_attr_birms.dev_attr.attr, |
| 641 | &iio_dev_attr_cirms.dev_attr.attr, |
| 642 | &iio_dev_attr_avrms.dev_attr.attr, |
| 643 | &iio_dev_attr_bvrms.dev_attr.attr, |
| 644 | &iio_dev_attr_cvrms.dev_attr.attr, |
| 645 | &iio_dev_attr_aigain.dev_attr.attr, |
| 646 | &iio_dev_attr_bigain.dev_attr.attr, |
| 647 | &iio_dev_attr_cigain.dev_attr.attr, |
| 648 | &iio_dev_attr_avrmsgain.dev_attr.attr, |
| 649 | &iio_dev_attr_bvrmsgain.dev_attr.attr, |
| 650 | &iio_dev_attr_cvrmsgain.dev_attr.attr, |
| 651 | &iio_dev_attr_airmsos.dev_attr.attr, |
| 652 | &iio_dev_attr_birmsos.dev_attr.attr, |
| 653 | &iio_dev_attr_cirmsos.dev_attr.attr, |
| 654 | &iio_dev_attr_avrmsos.dev_attr.attr, |
| 655 | &iio_dev_attr_bvrmsos.dev_attr.attr, |
| 656 | &iio_dev_attr_cvrmsos.dev_attr.attr, |
| 657 | NULL, |
| 658 | }; |
| 659 | |
| 660 | static const struct attribute_group ade7758_attribute_group = { |
| 661 | .attrs = ade7758_attributes, |
| 662 | }; |
| 663 | |
Michael Hennerich | 8a27a02 | 2011-05-18 14:42:07 +0100 | [diff] [blame] | 664 | static struct iio_chan_spec ade7758_channels[] = { |
Jonathan Cameron | 6835cb6 | 2011-09-27 09:56:41 +0100 | [diff] [blame] | 665 | IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, "raw", 0, 0, |
Michael Hennerich | 8a27a02 | 2011-05-18 14:42:07 +0100 | [diff] [blame] | 666 | (1 << IIO_CHAN_INFO_SCALE_SHARED), |
| 667 | AD7758_WT(AD7758_PHASE_A, AD7758_VOLTAGE), |
| 668 | 0, IIO_ST('s', 24, 32, 0), 0), |
| 669 | IIO_CHAN(IIO_CURRENT, 0, 1, 0, "raw", 0, 0, |
| 670 | (1 << IIO_CHAN_INFO_SCALE_SHARED), |
| 671 | AD7758_WT(AD7758_PHASE_A, AD7758_CURRENT), |
| 672 | 1, IIO_ST('s', 24, 32, 0), 0), |
| 673 | IIO_CHAN(IIO_POWER, 0, 1, 0, "apparent_raw", 0, 0, |
| 674 | (1 << IIO_CHAN_INFO_SCALE_SHARED), |
| 675 | AD7758_WT(AD7758_PHASE_A, AD7758_APP_PWR), |
| 676 | 2, IIO_ST('s', 24, 32, 0), 0), |
| 677 | IIO_CHAN(IIO_POWER, 0, 1, 0, "active_raw", 0, 0, |
| 678 | (1 << IIO_CHAN_INFO_SCALE_SHARED), |
| 679 | AD7758_WT(AD7758_PHASE_A, AD7758_ACT_PWR), |
| 680 | 3, IIO_ST('s', 24, 32, 0), 0), |
| 681 | IIO_CHAN(IIO_POWER, 0, 1, 0, "reactive_raw", 0, 0, |
| 682 | (1 << IIO_CHAN_INFO_SCALE_SHARED), |
| 683 | AD7758_WT(AD7758_PHASE_A, AD7758_REACT_PWR), |
| 684 | 4, IIO_ST('s', 24, 32, 0), 0), |
Jonathan Cameron | 6835cb6 | 2011-09-27 09:56:41 +0100 | [diff] [blame] | 685 | IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, "raw", 1, 0, |
Michael Hennerich | 8a27a02 | 2011-05-18 14:42:07 +0100 | [diff] [blame] | 686 | (1 << IIO_CHAN_INFO_SCALE_SHARED), |
| 687 | AD7758_WT(AD7758_PHASE_B, AD7758_VOLTAGE), |
| 688 | 5, IIO_ST('s', 24, 32, 0), 0), |
| 689 | IIO_CHAN(IIO_CURRENT, 0, 1, 0, "raw", 1, 0, |
| 690 | (1 << IIO_CHAN_INFO_SCALE_SHARED), |
| 691 | AD7758_WT(AD7758_PHASE_B, AD7758_CURRENT), |
| 692 | 6, IIO_ST('s', 24, 32, 0), 0), |
| 693 | IIO_CHAN(IIO_POWER, 0, 1, 0, "apparent_raw", 1, 0, |
| 694 | (1 << IIO_CHAN_INFO_SCALE_SHARED), |
| 695 | AD7758_WT(AD7758_PHASE_B, AD7758_APP_PWR), |
| 696 | 7, IIO_ST('s', 24, 32, 0), 0), |
| 697 | IIO_CHAN(IIO_POWER, 0, 1, 0, "active_raw", 1, 0, |
| 698 | (1 << IIO_CHAN_INFO_SCALE_SHARED), |
| 699 | AD7758_WT(AD7758_PHASE_B, AD7758_ACT_PWR), |
| 700 | 8, IIO_ST('s', 24, 32, 0), 0), |
| 701 | IIO_CHAN(IIO_POWER, 0, 1, 0, "reactive_raw", 1, 0, |
| 702 | (1 << IIO_CHAN_INFO_SCALE_SHARED), |
| 703 | AD7758_WT(AD7758_PHASE_B, AD7758_REACT_PWR), |
| 704 | 9, IIO_ST('s', 24, 32, 0), 0), |
Jonathan Cameron | 6835cb6 | 2011-09-27 09:56:41 +0100 | [diff] [blame] | 705 | IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, "raw", 2, 0, |
Michael Hennerich | 8a27a02 | 2011-05-18 14:42:07 +0100 | [diff] [blame] | 706 | (1 << IIO_CHAN_INFO_SCALE_SHARED), |
| 707 | AD7758_WT(AD7758_PHASE_C, AD7758_VOLTAGE), |
| 708 | 10, IIO_ST('s', 24, 32, 0), 0), |
| 709 | IIO_CHAN(IIO_CURRENT, 0, 1, 0, "raw", 2, 0, |
| 710 | (1 << IIO_CHAN_INFO_SCALE_SHARED), |
| 711 | AD7758_WT(AD7758_PHASE_C, AD7758_CURRENT), |
| 712 | 11, IIO_ST('s', 24, 32, 0), 0), |
| 713 | IIO_CHAN(IIO_POWER, 0, 1, 0, "apparent_raw", 2, 0, |
| 714 | (1 << IIO_CHAN_INFO_SCALE_SHARED), |
| 715 | AD7758_WT(AD7758_PHASE_C, AD7758_APP_PWR), |
| 716 | 12, IIO_ST('s', 24, 32, 0), 0), |
| 717 | IIO_CHAN(IIO_POWER, 0, 1, 0, "active_raw", 2, 0, |
| 718 | (1 << IIO_CHAN_INFO_SCALE_SHARED), |
| 719 | AD7758_WT(AD7758_PHASE_C, AD7758_ACT_PWR), |
| 720 | 13, IIO_ST('s', 24, 32, 0), 0), |
| 721 | IIO_CHAN(IIO_POWER, 0, 1, 0, "reactive_raw", 2, 0, |
| 722 | (1 << IIO_CHAN_INFO_SCALE_SHARED), |
| 723 | AD7758_WT(AD7758_PHASE_C, AD7758_REACT_PWR), |
| 724 | 14, IIO_ST('s', 24, 32, 0), 0), |
| 725 | IIO_CHAN_SOFT_TIMESTAMP(15), |
| 726 | }; |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 727 | |
Jonathan Cameron | 6fe8135 | 2011-05-18 14:42:37 +0100 | [diff] [blame] | 728 | static const struct iio_info ade7758_info = { |
| 729 | .attrs = &ade7758_attribute_group, |
| 730 | .driver_module = THIS_MODULE, |
| 731 | }; |
| 732 | |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 733 | static int __devinit ade7758_probe(struct spi_device *spi) |
| 734 | { |
Jonathan Cameron | 26d25ae | 2011-09-02 17:14:40 +0100 | [diff] [blame] | 735 | int i, ret; |
Michael Hennerich | a3f0237 | 2011-05-18 14:42:36 +0100 | [diff] [blame] | 736 | struct ade7758_state *st; |
| 737 | struct iio_dev *indio_dev = iio_allocate_device(sizeof(*st)); |
| 738 | |
| 739 | if (indio_dev == NULL) { |
| 740 | ret = -ENOMEM; |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 741 | goto error_ret; |
| 742 | } |
Michael Hennerich | a3f0237 | 2011-05-18 14:42:36 +0100 | [diff] [blame] | 743 | |
| 744 | st = iio_priv(indio_dev); |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 745 | /* this is only used for removal purposes */ |
Michael Hennerich | a3f0237 | 2011-05-18 14:42:36 +0100 | [diff] [blame] | 746 | spi_set_drvdata(spi, indio_dev); |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 747 | |
| 748 | /* Allocate the comms buffers */ |
| 749 | st->rx = kzalloc(sizeof(*st->rx)*ADE7758_MAX_RX, GFP_KERNEL); |
| 750 | if (st->rx == NULL) { |
| 751 | ret = -ENOMEM; |
Michael Hennerich | a3f0237 | 2011-05-18 14:42:36 +0100 | [diff] [blame] | 752 | goto error_free_dev; |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 753 | } |
| 754 | st->tx = kzalloc(sizeof(*st->tx)*ADE7758_MAX_TX, GFP_KERNEL); |
| 755 | if (st->tx == NULL) { |
| 756 | ret = -ENOMEM; |
| 757 | goto error_free_rx; |
| 758 | } |
| 759 | st->us = spi; |
Michael Hennerich | 8a27a02 | 2011-05-18 14:42:07 +0100 | [diff] [blame] | 760 | st->ade7758_ring_channels = &ade7758_channels[0]; |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 761 | mutex_init(&st->buf_lock); |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 762 | |
Michael Hennerich | a3f0237 | 2011-05-18 14:42:36 +0100 | [diff] [blame] | 763 | indio_dev->name = spi->dev.driver->name; |
| 764 | indio_dev->dev.parent = &spi->dev; |
Jonathan Cameron | 6fe8135 | 2011-05-18 14:42:37 +0100 | [diff] [blame] | 765 | indio_dev->info = &ade7758_info; |
Michael Hennerich | a3f0237 | 2011-05-18 14:42:36 +0100 | [diff] [blame] | 766 | indio_dev->modes = INDIO_DIRECT_MODE; |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 767 | |
Michael Hennerich | 8a27a02 | 2011-05-18 14:42:07 +0100 | [diff] [blame] | 768 | for (i = 0; i < AD7758_NUM_WAVESRC; i++) |
Jonathan Cameron | 32b5eec | 2011-09-02 17:14:38 +0100 | [diff] [blame] | 769 | set_bit(i, &st->available_scan_masks[i]); |
Michael Hennerich | 8a27a02 | 2011-05-18 14:42:07 +0100 | [diff] [blame] | 770 | |
Michael Hennerich | a3f0237 | 2011-05-18 14:42:36 +0100 | [diff] [blame] | 771 | indio_dev->available_scan_masks = st->available_scan_masks; |
Michael Hennerich | 8a27a02 | 2011-05-18 14:42:07 +0100 | [diff] [blame] | 772 | |
Michael Hennerich | a3f0237 | 2011-05-18 14:42:36 +0100 | [diff] [blame] | 773 | ret = ade7758_configure_ring(indio_dev); |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 774 | if (ret) |
Michael Hennerich | a3f0237 | 2011-05-18 14:42:36 +0100 | [diff] [blame] | 775 | goto error_free_tx; |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 776 | |
Jonathan Cameron | 14555b1 | 2011-09-21 11:15:57 +0100 | [diff] [blame] | 777 | ret = iio_buffer_register(indio_dev, |
| 778 | &ade7758_channels[0], |
| 779 | ARRAY_SIZE(ade7758_channels)); |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 780 | if (ret) { |
Michael Hennerich | 8a27a02 | 2011-05-18 14:42:07 +0100 | [diff] [blame] | 781 | dev_err(&spi->dev, "failed to initialize the ring\n"); |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 782 | goto error_unreg_ring_funcs; |
| 783 | } |
| 784 | |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 785 | /* Get the device into a sane initial state */ |
Michael Hennerich | a3f0237 | 2011-05-18 14:42:36 +0100 | [diff] [blame] | 786 | ret = ade7758_initial_setup(indio_dev); |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 787 | if (ret) |
Michael Hennerich | 8a27a02 | 2011-05-18 14:42:07 +0100 | [diff] [blame] | 788 | goto error_uninitialize_ring; |
| 789 | |
| 790 | if (spi->irq) { |
Michael Hennerich | a3f0237 | 2011-05-18 14:42:36 +0100 | [diff] [blame] | 791 | ret = ade7758_probe_trigger(indio_dev); |
Michael Hennerich | 8a27a02 | 2011-05-18 14:42:07 +0100 | [diff] [blame] | 792 | if (ret) |
Jonathan Cameron | 26d25ae | 2011-09-02 17:14:40 +0100 | [diff] [blame] | 793 | goto error_uninitialize_ring; |
Michael Hennerich | 8a27a02 | 2011-05-18 14:42:07 +0100 | [diff] [blame] | 794 | } |
| 795 | |
Jonathan Cameron | 26d25ae | 2011-09-02 17:14:40 +0100 | [diff] [blame] | 796 | ret = iio_device_register(indio_dev); |
| 797 | if (ret) |
| 798 | goto error_remove_trigger; |
| 799 | |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 800 | return 0; |
| 801 | |
| 802 | error_remove_trigger: |
Jonathan Cameron | ec3afa4 | 2011-09-21 11:15:54 +0100 | [diff] [blame] | 803 | if (indio_dev->modes & INDIO_BUFFER_TRIGGERED) |
Michael Hennerich | a3f0237 | 2011-05-18 14:42:36 +0100 | [diff] [blame] | 804 | ade7758_remove_trigger(indio_dev); |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 805 | error_uninitialize_ring: |
Jonathan Cameron | 1aa0427 | 2011-08-30 12:32:47 +0100 | [diff] [blame] | 806 | ade7758_uninitialize_ring(indio_dev); |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 807 | error_unreg_ring_funcs: |
Michael Hennerich | a3f0237 | 2011-05-18 14:42:36 +0100 | [diff] [blame] | 808 | ade7758_unconfigure_ring(indio_dev); |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 809 | error_free_tx: |
| 810 | kfree(st->tx); |
| 811 | error_free_rx: |
| 812 | kfree(st->rx); |
Michael Hennerich | a3f0237 | 2011-05-18 14:42:36 +0100 | [diff] [blame] | 813 | error_free_dev: |
Jonathan Cameron | 26d25ae | 2011-09-02 17:14:40 +0100 | [diff] [blame] | 814 | iio_free_device(indio_dev); |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 815 | error_ret: |
| 816 | return ret; |
| 817 | } |
| 818 | |
| 819 | static int ade7758_remove(struct spi_device *spi) |
| 820 | { |
Michael Hennerich | a3f0237 | 2011-05-18 14:42:36 +0100 | [diff] [blame] | 821 | struct iio_dev *indio_dev = spi_get_drvdata(spi); |
| 822 | struct ade7758_state *st = iio_priv(indio_dev); |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 823 | int ret; |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 824 | |
Jonathan Cameron | d2fffd6 | 2011-10-14 14:46:58 +0100 | [diff] [blame] | 825 | iio_device_unregister(indio_dev); |
Michael Hennerich | a3f0237 | 2011-05-18 14:42:36 +0100 | [diff] [blame] | 826 | ret = ade7758_stop_device(&indio_dev->dev); |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 827 | if (ret) |
| 828 | goto err_ret; |
| 829 | |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 830 | ade7758_remove_trigger(indio_dev); |
Jonathan Cameron | 1aa0427 | 2011-08-30 12:32:47 +0100 | [diff] [blame] | 831 | ade7758_uninitialize_ring(indio_dev); |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 832 | ade7758_unconfigure_ring(indio_dev); |
| 833 | kfree(st->tx); |
| 834 | kfree(st->rx); |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 835 | |
Jonathan Cameron | d2fffd6 | 2011-10-14 14:46:58 +0100 | [diff] [blame] | 836 | iio_free_device(indio_dev); |
| 837 | |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 838 | err_ret: |
| 839 | return ret; |
| 840 | } |
| 841 | |
Michael Hennerich | 8a27a02 | 2011-05-18 14:42:07 +0100 | [diff] [blame] | 842 | static const struct spi_device_id ade7758_id[] = { |
| 843 | {"ade7758", 0}, |
| 844 | {} |
| 845 | }; |
| 846 | |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 847 | static struct spi_driver ade7758_driver = { |
| 848 | .driver = { |
| 849 | .name = "ade7758", |
| 850 | .owner = THIS_MODULE, |
| 851 | }, |
| 852 | .probe = ade7758_probe, |
| 853 | .remove = __devexit_p(ade7758_remove), |
Michael Hennerich | 8a27a02 | 2011-05-18 14:42:07 +0100 | [diff] [blame] | 854 | .id_table = ade7758_id, |
Barry Song | 8210cfe | 2010-10-27 21:44:16 -0400 | [diff] [blame] | 855 | }; |
| 856 | |
| 857 | static __init int ade7758_init(void) |
| 858 | { |
| 859 | return spi_register_driver(&ade7758_driver); |
| 860 | } |
| 861 | module_init(ade7758_init); |
| 862 | |
| 863 | static __exit void ade7758_exit(void) |
| 864 | { |
| 865 | spi_unregister_driver(&ade7758_driver); |
| 866 | } |
| 867 | module_exit(ade7758_exit); |
| 868 | |
| 869 | MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>"); |
| 870 | MODULE_DESCRIPTION("Analog Devices ADE7758 Polyphase Multifunction Energy Metering IC Driver"); |
| 871 | MODULE_LICENSE("GPL v2"); |