Jing Zhou | 6fb7f97 | 2014-01-24 09:36:30 -0800 | [diff] [blame] | 1 | /* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved. |
Lokesh Batra | 8d55eec | 2013-02-26 11:31:21 -0800 | [diff] [blame] | 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
Stepan Moskovchenko | 7d8cdcaa | 2013-04-25 17:10:55 -0700 | [diff] [blame] | 12 | &soc { |
Lokesh Batra | 8d55eec | 2013-02-26 11:31:21 -0800 | [diff] [blame] | 13 | msm_gpu: qcom,kgsl-3d0@fdc00000 { |
| 14 | label = "kgsl-3d0"; |
| 15 | compatible = "qcom,kgsl-3d0", "qcom,kgsl-3d"; |
| 16 | reg = <0xfdc00000 0x10000 |
| 17 | 0xfdc10000 0x10000>; |
| 18 | reg-names = "kgsl_3d0_reg_memory", "kgsl_3d0_shader_memory"; |
| 19 | interrupts = <0 33 0>; |
| 20 | interrupt-names = "kgsl_3d0_irq"; |
| 21 | qcom,id = <0>; |
| 22 | |
| 23 | qcom,chipid = <0x03000520>; |
| 24 | |
| 25 | qcom,initial-pwrlevel = <1>; |
| 26 | |
| 27 | qcom,idle-timeout = <8>; /* <HZ/12> */ |
Lokesh Batra | 8d55eec | 2013-02-26 11:31:21 -0800 | [diff] [blame] | 28 | qcom,strtstp-sleepwake; |
Vladimir Razgulin | bae66be | 2013-04-16 12:40:16 -0600 | [diff] [blame] | 29 | qcom,clk-map = <0x000005E>; /* KGSL_CLK_CORE | |
| 30 | KGSL_CLK_IFACE | KGSL_CLK_MEM | KGSL_CLK_MEM_IFACE | |
| 31 | KGSL_CLK_ALT_MEM_IFACE */ |
Lokesh Batra | 8d55eec | 2013-02-26 11:31:21 -0800 | [diff] [blame] | 32 | |
| 33 | /* Bus Scale Settings */ |
| 34 | qcom,msm-bus,name = "grp3d"; |
| 35 | qcom,msm-bus,num-cases = <4>; |
Lokesh Batra | 8d55eec | 2013-02-26 11:31:21 -0800 | [diff] [blame] | 36 | qcom,msm-bus,num-paths = <1>; |
| 37 | qcom,msm-bus,vectors-KBps = |
| 38 | <26 512 0 0>, |
| 39 | <26 512 0 800000>, |
| 40 | <26 512 0 1600000>, |
Jing Zhou | 6fb7f97 | 2014-01-24 09:36:30 -0800 | [diff] [blame] | 41 | <26 512 0 2664000>; |
Lokesh Batra | 8d55eec | 2013-02-26 11:31:21 -0800 | [diff] [blame] | 42 | |
| 43 | /* GDSC oxili regulators */ |
| 44 | vdd-supply = <&gdsc_oxili_cx>; |
| 45 | |
| 46 | /* IOMMU Data */ |
| 47 | iommu = <&gfx_iommu>; |
| 48 | |
| 49 | /* Power levels */ |
| 50 | qcom,gpu-pwrlevels { |
| 51 | #address-cells = <1>; |
| 52 | #size-cells = <0>; |
| 53 | |
| 54 | compatible = "qcom,gpu-pwrlevels"; |
| 55 | |
| 56 | qcom,gpu-pwrlevel@0 { |
| 57 | reg = <0>; |
| 58 | qcom,gpu-freq = <400000000>; |
| 59 | qcom,bus-freq = <3>; |
| 60 | qcom,io-fraction = <0>; |
| 61 | }; |
| 62 | |
| 63 | qcom,gpu-pwrlevel@1 { |
| 64 | reg = <1>; |
| 65 | qcom,gpu-freq = <300000000>; |
| 66 | qcom,bus-freq = <2>; |
| 67 | qcom,io-fraction = <33>; |
| 68 | }; |
| 69 | |
| 70 | qcom,gpu-pwrlevel@2 { |
| 71 | reg = <2>; |
| 72 | qcom,gpu-freq = <200000000>; |
| 73 | qcom,bus-freq = <2>; |
| 74 | qcom,io-fraction = <33>; |
| 75 | }; |
| 76 | |
| 77 | qcom,gpu-pwrlevel@3 { |
| 78 | reg = <3>; |
| 79 | qcom,gpu-freq = <150000000>; |
| 80 | qcom,bus-freq = <1>; |
| 81 | qcom,io-fraction = <100>; |
| 82 | }; |
| 83 | |
| 84 | qcom,gpu-pwrlevel@4 { |
| 85 | reg = <4>; |
| 86 | qcom,gpu-freq = <27000000>; |
| 87 | qcom,bus-freq = <0>; |
| 88 | qcom,io-fraction = <0>; |
| 89 | }; |
| 90 | }; |
| 91 | |
| 92 | /* DVCS Info */ |
| 93 | qcom,dcvs-core-info { |
| 94 | #address-cells = <1>; |
| 95 | #size-cells = <0>; |
| 96 | |
| 97 | compatible = "qcom,dcvs-core-info"; |
| 98 | |
| 99 | qcom,num-cores = <1>; |
| 100 | qcom,sensors = <0>; |
| 101 | |
| 102 | qcom,core-core-type = <1>; |
| 103 | |
| 104 | qcom,algo-disable-pc-threshold = <0>; |
| 105 | qcom,algo-em-win-size-min-us = <100000>; |
| 106 | qcom,algo-em-win-size-max-us = <300000>; |
| 107 | qcom,algo-em-max-util-pct = <97>; |
| 108 | qcom,algo-group-id = <95>; |
| 109 | qcom,algo-max-freq-chg-time-us = <100000>; |
| 110 | qcom,algo-slack-mode-dynamic = <100000>; |
| 111 | qcom,algo-slack-weight-thresh-pct = <0>; |
| 112 | qcom,algo-slack-time-min-us = <39000>; |
| 113 | qcom,algo-slack-time-max-us = <39000>; |
| 114 | qcom,algo-ss-win-size-min-us = <1000000>; |
| 115 | qcom,algo-ss-win-size-max-us = <1000000>; |
| 116 | qcom,algo-ss-util-pct = <95>; |
| 117 | qcom,algo-ss-no-corr-below-freq = <0>; |
| 118 | |
| 119 | qcom,energy-active-coeff-a = <2492>; |
| 120 | qcom,energy-active-coeff-b = <0>; |
| 121 | qcom,energy-active-coeff-c = <0>; |
| 122 | qcom,energy-leakage-coeff-a = <11>; |
| 123 | qcom,energy-leakage-coeff-b = <157150>; |
| 124 | qcom,energy-leakage-coeff-c = <0>; |
| 125 | qcom,energy-leakage-coeff-d = <0>; |
| 126 | |
| 127 | qcom,power-current-temp = <25>; |
| 128 | qcom,power-num-freq = <4>; |
| 129 | |
| 130 | qcom,dcvs-freq@0 { |
| 131 | reg = <0>; |
| 132 | qcom,freq = <0>; |
| 133 | qcom,voltage = <0>; |
| 134 | qcom,is_trans_level = <0>; |
| 135 | qcom,active-energy-offset = <100>; |
| 136 | qcom,leakage-energy-offset = <0>; |
| 137 | }; |
| 138 | |
| 139 | qcom,dcvs-freq@1 { |
| 140 | reg = <1>; |
| 141 | qcom,freq = <0>; |
| 142 | qcom,voltage = <0>; |
| 143 | qcom,is_trans_level = <0>; |
| 144 | qcom,active-energy-offset = <100>; |
| 145 | qcom,leakage-energy-offset = <0>; |
| 146 | }; |
| 147 | |
| 148 | qcom,dcvs-freq@2 { |
| 149 | reg = <2>; |
| 150 | qcom,freq = <0>; |
| 151 | qcom,voltage = <0>; |
| 152 | qcom,is_trans_level = <0>; |
| 153 | qcom,active-energy-offset = <100>; |
| 154 | qcom,leakage-energy-offset = <0>; |
| 155 | }; |
| 156 | |
| 157 | qcom,dcvs-freq@3 { |
| 158 | reg = <3>; |
| 159 | qcom,freq = <0>; |
| 160 | qcom,voltage = <0>; |
| 161 | qcom,is_trans_level = <0>; |
| 162 | qcom,active-energy-offset = <844545>; |
| 163 | qcom,leakage-energy-offset = <0>; |
| 164 | }; |
| 165 | }; |
| 166 | }; |
| 167 | }; |